cpu_riscv64.go

     1  // Copyright 2019 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  package cpu
     6  
     7  const CacheLinePadSize = 64
     8  
     9  // RISC-V doesn't have a 'cpuid' equivalent. On Linux we rely on the riscv_hwprobe syscall.
    10  
    11  // getGORISCV64level is implemented in cpu_riscv64.s. Returns number 20, 22, or 23.
    12  func getGORISCV64level() int32
    13  
    14  func doinit() {
    15  	options = []option{
    16  		{Name: "fastmisaligned", Feature: &RISCV64.HasFastMisaligned},
    17  		{Name: "zbc", Feature: &RISCV64.HasZbc},
    18  		{Name: "zvbc", Feature: &RISCV64.HasZvbc},
    19  		{Name: "zvkg", Feature: &RISCV64.HasZvkg},
    20  		{Name: "zvkned", Feature: &RISCV64.HasZvkned},
    21  		{Name: "zvknha", Feature: &RISCV64.HasZvknha},
    22  		{Name: "zvknhb", Feature: &RISCV64.HasZvknhb},
    23  		{Name: "zvksed", Feature: &RISCV64.HasZvksed},
    24  		{Name: "zvksh", Feature: &RISCV64.HasZvksh},
    25  	}
    26  	level := getGORISCV64level()
    27  	if level < 22 {
    28  		// Zbb is mandatory for rva22u64 and higher.
    29  		options = append(options, option{Name: "zbb", Feature: &RISCV64.HasZbb})
    30  	}
    31  	if level < 23 {
    32  		// V, Zvbb and Zvkt are mandatory for rva23u64 and higher.
    33  		options = append(options,
    34  			option{Name: "v", Feature: &RISCV64.HasV},
    35  			option{Name: "zvbb", Feature: &RISCV64.HasZvbb},
    36  			option{Name: "zvkt", Feature: &RISCV64.HasZvkt},
    37  		)
    38  	}
    39  
    40  	doDerived = func() {
    41  		// If the vector extension is disabled by GODEBUG, then the VLENB is zero.
    42  		if !RISCV64.HasV {
    43  			RISCV64.VLENB = 0
    44  		}
    45  	}
    46  
    47  	osInit()
    48  	if RISCV64.HasV {
    49  		RISCV64.VLENB = readVLENB()
    50  	}
    51  }
    52  
    53  func isSet(hwc uint, value uint) bool {
    54  	return hwc&value != 0
    55  }
    56  
    57  // Read the vector register length in bytes from the vlenb CSR.
    58  // May only be called when the vector extension is present.
    59  // Implemented in cpu_riscv64.s.
    60  func readVLENB() uint
    61
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