Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

     1  // Code generated from _gen/MIPS.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueMIPS(v *Value) bool {
     8  	switch v.Op {
     9  	case OpAbs:
    10  		v.Op = OpMIPSABSD
    11  		return true
    12  	case OpAdd16:
    13  		v.Op = OpMIPSADD
    14  		return true
    15  	case OpAdd32:
    16  		v.Op = OpMIPSADD
    17  		return true
    18  	case OpAdd32F:
    19  		v.Op = OpMIPSADDF
    20  		return true
    21  	case OpAdd32withcarry:
    22  		return rewriteValueMIPS_OpAdd32withcarry(v)
    23  	case OpAdd64F:
    24  		v.Op = OpMIPSADDD
    25  		return true
    26  	case OpAdd8:
    27  		v.Op = OpMIPSADD
    28  		return true
    29  	case OpAddPtr:
    30  		v.Op = OpMIPSADD
    31  		return true
    32  	case OpAddr:
    33  		return rewriteValueMIPS_OpAddr(v)
    34  	case OpAnd16:
    35  		v.Op = OpMIPSAND
    36  		return true
    37  	case OpAnd32:
    38  		v.Op = OpMIPSAND
    39  		return true
    40  	case OpAnd8:
    41  		v.Op = OpMIPSAND
    42  		return true
    43  	case OpAndB:
    44  		v.Op = OpMIPSAND
    45  		return true
    46  	case OpAtomicAdd32:
    47  		v.Op = OpMIPSLoweredAtomicAdd
    48  		return true
    49  	case OpAtomicAnd32:
    50  		v.Op = OpMIPSLoweredAtomicAnd
    51  		return true
    52  	case OpAtomicAnd8:
    53  		return rewriteValueMIPS_OpAtomicAnd8(v)
    54  	case OpAtomicCompareAndSwap32:
    55  		v.Op = OpMIPSLoweredAtomicCas
    56  		return true
    57  	case OpAtomicExchange32:
    58  		v.Op = OpMIPSLoweredAtomicExchange
    59  		return true
    60  	case OpAtomicLoad32:
    61  		v.Op = OpMIPSLoweredAtomicLoad32
    62  		return true
    63  	case OpAtomicLoad8:
    64  		v.Op = OpMIPSLoweredAtomicLoad8
    65  		return true
    66  	case OpAtomicLoadPtr:
    67  		v.Op = OpMIPSLoweredAtomicLoad32
    68  		return true
    69  	case OpAtomicOr32:
    70  		v.Op = OpMIPSLoweredAtomicOr
    71  		return true
    72  	case OpAtomicOr8:
    73  		return rewriteValueMIPS_OpAtomicOr8(v)
    74  	case OpAtomicStore32:
    75  		v.Op = OpMIPSLoweredAtomicStore32
    76  		return true
    77  	case OpAtomicStore8:
    78  		v.Op = OpMIPSLoweredAtomicStore8
    79  		return true
    80  	case OpAtomicStorePtrNoWB:
    81  		v.Op = OpMIPSLoweredAtomicStore32
    82  		return true
    83  	case OpAvg32u:
    84  		return rewriteValueMIPS_OpAvg32u(v)
    85  	case OpBitLen16:
    86  		return rewriteValueMIPS_OpBitLen16(v)
    87  	case OpBitLen32:
    88  		return rewriteValueMIPS_OpBitLen32(v)
    89  	case OpBitLen8:
    90  		return rewriteValueMIPS_OpBitLen8(v)
    91  	case OpClosureCall:
    92  		v.Op = OpMIPSCALLclosure
    93  		return true
    94  	case OpCom16:
    95  		return rewriteValueMIPS_OpCom16(v)
    96  	case OpCom32:
    97  		return rewriteValueMIPS_OpCom32(v)
    98  	case OpCom8:
    99  		return rewriteValueMIPS_OpCom8(v)
   100  	case OpConst16:
   101  		return rewriteValueMIPS_OpConst16(v)
   102  	case OpConst32:
   103  		return rewriteValueMIPS_OpConst32(v)
   104  	case OpConst32F:
   105  		v.Op = OpMIPSMOVFconst
   106  		return true
   107  	case OpConst64F:
   108  		v.Op = OpMIPSMOVDconst
   109  		return true
   110  	case OpConst8:
   111  		return rewriteValueMIPS_OpConst8(v)
   112  	case OpConstBool:
   113  		return rewriteValueMIPS_OpConstBool(v)
   114  	case OpConstNil:
   115  		return rewriteValueMIPS_OpConstNil(v)
   116  	case OpCtz16:
   117  		return rewriteValueMIPS_OpCtz16(v)
   118  	case OpCtz16NonZero:
   119  		v.Op = OpCtz32
   120  		return true
   121  	case OpCtz32:
   122  		return rewriteValueMIPS_OpCtz32(v)
   123  	case OpCtz32NonZero:
   124  		v.Op = OpCtz32
   125  		return true
   126  	case OpCtz8:
   127  		return rewriteValueMIPS_OpCtz8(v)
   128  	case OpCtz8NonZero:
   129  		v.Op = OpCtz32
   130  		return true
   131  	case OpCvt32Fto32:
   132  		v.Op = OpMIPSTRUNCFW
   133  		return true
   134  	case OpCvt32Fto64F:
   135  		v.Op = OpMIPSMOVFD
   136  		return true
   137  	case OpCvt32to32F:
   138  		v.Op = OpMIPSMOVWF
   139  		return true
   140  	case OpCvt32to64F:
   141  		v.Op = OpMIPSMOVWD
   142  		return true
   143  	case OpCvt64Fto32:
   144  		v.Op = OpMIPSTRUNCDW
   145  		return true
   146  	case OpCvt64Fto32F:
   147  		v.Op = OpMIPSMOVDF
   148  		return true
   149  	case OpCvtBoolToUint8:
   150  		v.Op = OpCopy
   151  		return true
   152  	case OpDiv16:
   153  		return rewriteValueMIPS_OpDiv16(v)
   154  	case OpDiv16u:
   155  		return rewriteValueMIPS_OpDiv16u(v)
   156  	case OpDiv32:
   157  		return rewriteValueMIPS_OpDiv32(v)
   158  	case OpDiv32F:
   159  		v.Op = OpMIPSDIVF
   160  		return true
   161  	case OpDiv32u:
   162  		return rewriteValueMIPS_OpDiv32u(v)
   163  	case OpDiv64F:
   164  		v.Op = OpMIPSDIVD
   165  		return true
   166  	case OpDiv8:
   167  		return rewriteValueMIPS_OpDiv8(v)
   168  	case OpDiv8u:
   169  		return rewriteValueMIPS_OpDiv8u(v)
   170  	case OpEq16:
   171  		return rewriteValueMIPS_OpEq16(v)
   172  	case OpEq32:
   173  		return rewriteValueMIPS_OpEq32(v)
   174  	case OpEq32F:
   175  		return rewriteValueMIPS_OpEq32F(v)
   176  	case OpEq64F:
   177  		return rewriteValueMIPS_OpEq64F(v)
   178  	case OpEq8:
   179  		return rewriteValueMIPS_OpEq8(v)
   180  	case OpEqB:
   181  		return rewriteValueMIPS_OpEqB(v)
   182  	case OpEqPtr:
   183  		return rewriteValueMIPS_OpEqPtr(v)
   184  	case OpGetCallerPC:
   185  		v.Op = OpMIPSLoweredGetCallerPC
   186  		return true
   187  	case OpGetCallerSP:
   188  		v.Op = OpMIPSLoweredGetCallerSP
   189  		return true
   190  	case OpGetClosurePtr:
   191  		v.Op = OpMIPSLoweredGetClosurePtr
   192  		return true
   193  	case OpHmul32:
   194  		return rewriteValueMIPS_OpHmul32(v)
   195  	case OpHmul32u:
   196  		return rewriteValueMIPS_OpHmul32u(v)
   197  	case OpInterCall:
   198  		v.Op = OpMIPSCALLinter
   199  		return true
   200  	case OpIsInBounds:
   201  		return rewriteValueMIPS_OpIsInBounds(v)
   202  	case OpIsNonNil:
   203  		return rewriteValueMIPS_OpIsNonNil(v)
   204  	case OpIsSliceInBounds:
   205  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   206  	case OpLeq16:
   207  		return rewriteValueMIPS_OpLeq16(v)
   208  	case OpLeq16U:
   209  		return rewriteValueMIPS_OpLeq16U(v)
   210  	case OpLeq32:
   211  		return rewriteValueMIPS_OpLeq32(v)
   212  	case OpLeq32F:
   213  		return rewriteValueMIPS_OpLeq32F(v)
   214  	case OpLeq32U:
   215  		return rewriteValueMIPS_OpLeq32U(v)
   216  	case OpLeq64F:
   217  		return rewriteValueMIPS_OpLeq64F(v)
   218  	case OpLeq8:
   219  		return rewriteValueMIPS_OpLeq8(v)
   220  	case OpLeq8U:
   221  		return rewriteValueMIPS_OpLeq8U(v)
   222  	case OpLess16:
   223  		return rewriteValueMIPS_OpLess16(v)
   224  	case OpLess16U:
   225  		return rewriteValueMIPS_OpLess16U(v)
   226  	case OpLess32:
   227  		return rewriteValueMIPS_OpLess32(v)
   228  	case OpLess32F:
   229  		return rewriteValueMIPS_OpLess32F(v)
   230  	case OpLess32U:
   231  		return rewriteValueMIPS_OpLess32U(v)
   232  	case OpLess64F:
   233  		return rewriteValueMIPS_OpLess64F(v)
   234  	case OpLess8:
   235  		return rewriteValueMIPS_OpLess8(v)
   236  	case OpLess8U:
   237  		return rewriteValueMIPS_OpLess8U(v)
   238  	case OpLoad:
   239  		return rewriteValueMIPS_OpLoad(v)
   240  	case OpLocalAddr:
   241  		return rewriteValueMIPS_OpLocalAddr(v)
   242  	case OpLsh16x16:
   243  		return rewriteValueMIPS_OpLsh16x16(v)
   244  	case OpLsh16x32:
   245  		return rewriteValueMIPS_OpLsh16x32(v)
   246  	case OpLsh16x64:
   247  		return rewriteValueMIPS_OpLsh16x64(v)
   248  	case OpLsh16x8:
   249  		return rewriteValueMIPS_OpLsh16x8(v)
   250  	case OpLsh32x16:
   251  		return rewriteValueMIPS_OpLsh32x16(v)
   252  	case OpLsh32x32:
   253  		return rewriteValueMIPS_OpLsh32x32(v)
   254  	case OpLsh32x64:
   255  		return rewriteValueMIPS_OpLsh32x64(v)
   256  	case OpLsh32x8:
   257  		return rewriteValueMIPS_OpLsh32x8(v)
   258  	case OpLsh8x16:
   259  		return rewriteValueMIPS_OpLsh8x16(v)
   260  	case OpLsh8x32:
   261  		return rewriteValueMIPS_OpLsh8x32(v)
   262  	case OpLsh8x64:
   263  		return rewriteValueMIPS_OpLsh8x64(v)
   264  	case OpLsh8x8:
   265  		return rewriteValueMIPS_OpLsh8x8(v)
   266  	case OpMIPSADD:
   267  		return rewriteValueMIPS_OpMIPSADD(v)
   268  	case OpMIPSADDconst:
   269  		return rewriteValueMIPS_OpMIPSADDconst(v)
   270  	case OpMIPSAND:
   271  		return rewriteValueMIPS_OpMIPSAND(v)
   272  	case OpMIPSANDconst:
   273  		return rewriteValueMIPS_OpMIPSANDconst(v)
   274  	case OpMIPSCMOVZ:
   275  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   276  	case OpMIPSCMOVZzero:
   277  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   278  	case OpMIPSLoweredAtomicAdd:
   279  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   280  	case OpMIPSLoweredAtomicStore32:
   281  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   282  	case OpMIPSLoweredPanicBoundsRC:
   283  		return rewriteValueMIPS_OpMIPSLoweredPanicBoundsRC(v)
   284  	case OpMIPSLoweredPanicBoundsRR:
   285  		return rewriteValueMIPS_OpMIPSLoweredPanicBoundsRR(v)
   286  	case OpMIPSLoweredPanicExtendRC:
   287  		return rewriteValueMIPS_OpMIPSLoweredPanicExtendRC(v)
   288  	case OpMIPSLoweredPanicExtendRR:
   289  		return rewriteValueMIPS_OpMIPSLoweredPanicExtendRR(v)
   290  	case OpMIPSMOVBUload:
   291  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   292  	case OpMIPSMOVBUreg:
   293  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   294  	case OpMIPSMOVBload:
   295  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   296  	case OpMIPSMOVBreg:
   297  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   298  	case OpMIPSMOVBstore:
   299  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   300  	case OpMIPSMOVBstorezero:
   301  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   302  	case OpMIPSMOVDload:
   303  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   304  	case OpMIPSMOVDstore:
   305  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   306  	case OpMIPSMOVFload:
   307  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   308  	case OpMIPSMOVFstore:
   309  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   310  	case OpMIPSMOVHUload:
   311  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   312  	case OpMIPSMOVHUreg:
   313  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   314  	case OpMIPSMOVHload:
   315  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   316  	case OpMIPSMOVHreg:
   317  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   318  	case OpMIPSMOVHstore:
   319  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   320  	case OpMIPSMOVHstorezero:
   321  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   322  	case OpMIPSMOVWload:
   323  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   324  	case OpMIPSMOVWnop:
   325  		return rewriteValueMIPS_OpMIPSMOVWnop(v)
   326  	case OpMIPSMOVWreg:
   327  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   328  	case OpMIPSMOVWstore:
   329  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   330  	case OpMIPSMOVWstorezero:
   331  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   332  	case OpMIPSMUL:
   333  		return rewriteValueMIPS_OpMIPSMUL(v)
   334  	case OpMIPSNEG:
   335  		return rewriteValueMIPS_OpMIPSNEG(v)
   336  	case OpMIPSOR:
   337  		return rewriteValueMIPS_OpMIPSOR(v)
   338  	case OpMIPSORconst:
   339  		return rewriteValueMIPS_OpMIPSORconst(v)
   340  	case OpMIPSSGT:
   341  		return rewriteValueMIPS_OpMIPSSGT(v)
   342  	case OpMIPSSGTU:
   343  		return rewriteValueMIPS_OpMIPSSGTU(v)
   344  	case OpMIPSSGTUconst:
   345  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   346  	case OpMIPSSGTUzero:
   347  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   348  	case OpMIPSSGTconst:
   349  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   350  	case OpMIPSSGTzero:
   351  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   352  	case OpMIPSSLL:
   353  		return rewriteValueMIPS_OpMIPSSLL(v)
   354  	case OpMIPSSLLconst:
   355  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   356  	case OpMIPSSRA:
   357  		return rewriteValueMIPS_OpMIPSSRA(v)
   358  	case OpMIPSSRAconst:
   359  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   360  	case OpMIPSSRL:
   361  		return rewriteValueMIPS_OpMIPSSRL(v)
   362  	case OpMIPSSRLconst:
   363  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   364  	case OpMIPSSUB:
   365  		return rewriteValueMIPS_OpMIPSSUB(v)
   366  	case OpMIPSSUBconst:
   367  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   368  	case OpMIPSXOR:
   369  		return rewriteValueMIPS_OpMIPSXOR(v)
   370  	case OpMIPSXORconst:
   371  		return rewriteValueMIPS_OpMIPSXORconst(v)
   372  	case OpMod16:
   373  		return rewriteValueMIPS_OpMod16(v)
   374  	case OpMod16u:
   375  		return rewriteValueMIPS_OpMod16u(v)
   376  	case OpMod32:
   377  		return rewriteValueMIPS_OpMod32(v)
   378  	case OpMod32u:
   379  		return rewriteValueMIPS_OpMod32u(v)
   380  	case OpMod8:
   381  		return rewriteValueMIPS_OpMod8(v)
   382  	case OpMod8u:
   383  		return rewriteValueMIPS_OpMod8u(v)
   384  	case OpMove:
   385  		return rewriteValueMIPS_OpMove(v)
   386  	case OpMul16:
   387  		v.Op = OpMIPSMUL
   388  		return true
   389  	case OpMul32:
   390  		v.Op = OpMIPSMUL
   391  		return true
   392  	case OpMul32F:
   393  		v.Op = OpMIPSMULF
   394  		return true
   395  	case OpMul32uhilo:
   396  		v.Op = OpMIPSMULTU
   397  		return true
   398  	case OpMul64F:
   399  		v.Op = OpMIPSMULD
   400  		return true
   401  	case OpMul8:
   402  		v.Op = OpMIPSMUL
   403  		return true
   404  	case OpNeg16:
   405  		v.Op = OpMIPSNEG
   406  		return true
   407  	case OpNeg32:
   408  		v.Op = OpMIPSNEG
   409  		return true
   410  	case OpNeg32F:
   411  		v.Op = OpMIPSNEGF
   412  		return true
   413  	case OpNeg64F:
   414  		v.Op = OpMIPSNEGD
   415  		return true
   416  	case OpNeg8:
   417  		v.Op = OpMIPSNEG
   418  		return true
   419  	case OpNeq16:
   420  		return rewriteValueMIPS_OpNeq16(v)
   421  	case OpNeq32:
   422  		return rewriteValueMIPS_OpNeq32(v)
   423  	case OpNeq32F:
   424  		return rewriteValueMIPS_OpNeq32F(v)
   425  	case OpNeq64F:
   426  		return rewriteValueMIPS_OpNeq64F(v)
   427  	case OpNeq8:
   428  		return rewriteValueMIPS_OpNeq8(v)
   429  	case OpNeqB:
   430  		v.Op = OpMIPSXOR
   431  		return true
   432  	case OpNeqPtr:
   433  		return rewriteValueMIPS_OpNeqPtr(v)
   434  	case OpNilCheck:
   435  		v.Op = OpMIPSLoweredNilCheck
   436  		return true
   437  	case OpNot:
   438  		return rewriteValueMIPS_OpNot(v)
   439  	case OpOffPtr:
   440  		return rewriteValueMIPS_OpOffPtr(v)
   441  	case OpOr16:
   442  		v.Op = OpMIPSOR
   443  		return true
   444  	case OpOr32:
   445  		v.Op = OpMIPSOR
   446  		return true
   447  	case OpOr8:
   448  		v.Op = OpMIPSOR
   449  		return true
   450  	case OpOrB:
   451  		v.Op = OpMIPSOR
   452  		return true
   453  	case OpPanicBounds:
   454  		v.Op = OpMIPSLoweredPanicBoundsRR
   455  		return true
   456  	case OpPanicExtend:
   457  		v.Op = OpMIPSLoweredPanicExtendRR
   458  		return true
   459  	case OpPubBarrier:
   460  		v.Op = OpMIPSLoweredPubBarrier
   461  		return true
   462  	case OpRotateLeft16:
   463  		return rewriteValueMIPS_OpRotateLeft16(v)
   464  	case OpRotateLeft32:
   465  		return rewriteValueMIPS_OpRotateLeft32(v)
   466  	case OpRotateLeft64:
   467  		return rewriteValueMIPS_OpRotateLeft64(v)
   468  	case OpRotateLeft8:
   469  		return rewriteValueMIPS_OpRotateLeft8(v)
   470  	case OpRound32F:
   471  		v.Op = OpCopy
   472  		return true
   473  	case OpRound64F:
   474  		v.Op = OpCopy
   475  		return true
   476  	case OpRsh16Ux16:
   477  		return rewriteValueMIPS_OpRsh16Ux16(v)
   478  	case OpRsh16Ux32:
   479  		return rewriteValueMIPS_OpRsh16Ux32(v)
   480  	case OpRsh16Ux64:
   481  		return rewriteValueMIPS_OpRsh16Ux64(v)
   482  	case OpRsh16Ux8:
   483  		return rewriteValueMIPS_OpRsh16Ux8(v)
   484  	case OpRsh16x16:
   485  		return rewriteValueMIPS_OpRsh16x16(v)
   486  	case OpRsh16x32:
   487  		return rewriteValueMIPS_OpRsh16x32(v)
   488  	case OpRsh16x64:
   489  		return rewriteValueMIPS_OpRsh16x64(v)
   490  	case OpRsh16x8:
   491  		return rewriteValueMIPS_OpRsh16x8(v)
   492  	case OpRsh32Ux16:
   493  		return rewriteValueMIPS_OpRsh32Ux16(v)
   494  	case OpRsh32Ux32:
   495  		return rewriteValueMIPS_OpRsh32Ux32(v)
   496  	case OpRsh32Ux64:
   497  		return rewriteValueMIPS_OpRsh32Ux64(v)
   498  	case OpRsh32Ux8:
   499  		return rewriteValueMIPS_OpRsh32Ux8(v)
   500  	case OpRsh32x16:
   501  		return rewriteValueMIPS_OpRsh32x16(v)
   502  	case OpRsh32x32:
   503  		return rewriteValueMIPS_OpRsh32x32(v)
   504  	case OpRsh32x64:
   505  		return rewriteValueMIPS_OpRsh32x64(v)
   506  	case OpRsh32x8:
   507  		return rewriteValueMIPS_OpRsh32x8(v)
   508  	case OpRsh8Ux16:
   509  		return rewriteValueMIPS_OpRsh8Ux16(v)
   510  	case OpRsh8Ux32:
   511  		return rewriteValueMIPS_OpRsh8Ux32(v)
   512  	case OpRsh8Ux64:
   513  		return rewriteValueMIPS_OpRsh8Ux64(v)
   514  	case OpRsh8Ux8:
   515  		return rewriteValueMIPS_OpRsh8Ux8(v)
   516  	case OpRsh8x16:
   517  		return rewriteValueMIPS_OpRsh8x16(v)
   518  	case OpRsh8x32:
   519  		return rewriteValueMIPS_OpRsh8x32(v)
   520  	case OpRsh8x64:
   521  		return rewriteValueMIPS_OpRsh8x64(v)
   522  	case OpRsh8x8:
   523  		return rewriteValueMIPS_OpRsh8x8(v)
   524  	case OpSelect0:
   525  		return rewriteValueMIPS_OpSelect0(v)
   526  	case OpSelect1:
   527  		return rewriteValueMIPS_OpSelect1(v)
   528  	case OpSignExt16to32:
   529  		v.Op = OpMIPSMOVHreg
   530  		return true
   531  	case OpSignExt8to16:
   532  		v.Op = OpMIPSMOVBreg
   533  		return true
   534  	case OpSignExt8to32:
   535  		v.Op = OpMIPSMOVBreg
   536  		return true
   537  	case OpSignmask:
   538  		return rewriteValueMIPS_OpSignmask(v)
   539  	case OpSlicemask:
   540  		return rewriteValueMIPS_OpSlicemask(v)
   541  	case OpSqrt:
   542  		v.Op = OpMIPSSQRTD
   543  		return true
   544  	case OpSqrt32:
   545  		v.Op = OpMIPSSQRTF
   546  		return true
   547  	case OpStaticCall:
   548  		v.Op = OpMIPSCALLstatic
   549  		return true
   550  	case OpStore:
   551  		return rewriteValueMIPS_OpStore(v)
   552  	case OpSub16:
   553  		v.Op = OpMIPSSUB
   554  		return true
   555  	case OpSub32:
   556  		v.Op = OpMIPSSUB
   557  		return true
   558  	case OpSub32F:
   559  		v.Op = OpMIPSSUBF
   560  		return true
   561  	case OpSub32withcarry:
   562  		return rewriteValueMIPS_OpSub32withcarry(v)
   563  	case OpSub64F:
   564  		v.Op = OpMIPSSUBD
   565  		return true
   566  	case OpSub8:
   567  		v.Op = OpMIPSSUB
   568  		return true
   569  	case OpSubPtr:
   570  		v.Op = OpMIPSSUB
   571  		return true
   572  	case OpTailCall:
   573  		v.Op = OpMIPSCALLtail
   574  		return true
   575  	case OpTrunc16to8:
   576  		v.Op = OpCopy
   577  		return true
   578  	case OpTrunc32to16:
   579  		v.Op = OpCopy
   580  		return true
   581  	case OpTrunc32to8:
   582  		v.Op = OpCopy
   583  		return true
   584  	case OpWB:
   585  		v.Op = OpMIPSLoweredWB
   586  		return true
   587  	case OpXor16:
   588  		v.Op = OpMIPSXOR
   589  		return true
   590  	case OpXor32:
   591  		v.Op = OpMIPSXOR
   592  		return true
   593  	case OpXor8:
   594  		v.Op = OpMIPSXOR
   595  		return true
   596  	case OpZero:
   597  		return rewriteValueMIPS_OpZero(v)
   598  	case OpZeroExt16to32:
   599  		v.Op = OpMIPSMOVHUreg
   600  		return true
   601  	case OpZeroExt8to16:
   602  		v.Op = OpMIPSMOVBUreg
   603  		return true
   604  	case OpZeroExt8to32:
   605  		v.Op = OpMIPSMOVBUreg
   606  		return true
   607  	case OpZeromask:
   608  		return rewriteValueMIPS_OpZeromask(v)
   609  	}
   610  	return false
   611  }
   612  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   613  	v_2 := v.Args[2]
   614  	v_1 := v.Args[1]
   615  	v_0 := v.Args[0]
   616  	b := v.Block
   617  	// match: (Add32withcarry <t> x y c)
   618  	// result: (ADD c (ADD <t> x y))
   619  	for {
   620  		t := v.Type
   621  		x := v_0
   622  		y := v_1
   623  		c := v_2
   624  		v.reset(OpMIPSADD)
   625  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   626  		v0.AddArg2(x, y)
   627  		v.AddArg2(c, v0)
   628  		return true
   629  	}
   630  }
   631  func rewriteValueMIPS_OpAddr(v *Value) bool {
   632  	v_0 := v.Args[0]
   633  	// match: (Addr {sym} base)
   634  	// result: (MOVWaddr {sym} base)
   635  	for {
   636  		sym := auxToSym(v.Aux)
   637  		base := v_0
   638  		v.reset(OpMIPSMOVWaddr)
   639  		v.Aux = symToAux(sym)
   640  		v.AddArg(base)
   641  		return true
   642  	}
   643  }
   644  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   645  	v_2 := v.Args[2]
   646  	v_1 := v.Args[1]
   647  	v_0 := v.Args[0]
   648  	b := v.Block
   649  	config := b.Func.Config
   650  	typ := &b.Func.Config.Types
   651  	// match: (AtomicAnd8 ptr val mem)
   652  	// cond: !config.BigEndian
   653  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   654  	for {
   655  		ptr := v_0
   656  		val := v_1
   657  		mem := v_2
   658  		if !(!config.BigEndian) {
   659  			break
   660  		}
   661  		v.reset(OpMIPSLoweredAtomicAnd)
   662  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   663  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   664  		v1.AuxInt = int32ToAuxInt(^3)
   665  		v0.AddArg2(v1, ptr)
   666  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   667  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   668  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   669  		v4.AddArg(val)
   670  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   671  		v5.AuxInt = int32ToAuxInt(3)
   672  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   673  		v6.AuxInt = int32ToAuxInt(3)
   674  		v6.AddArg(ptr)
   675  		v5.AddArg(v6)
   676  		v3.AddArg2(v4, v5)
   677  		v7 := b.NewValue0(v.Pos, OpMIPSNOR, typ.UInt32)
   678  		v8 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   679  		v8.AuxInt = int32ToAuxInt(0)
   680  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   681  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   682  		v10.AuxInt = int32ToAuxInt(0xff)
   683  		v9.AddArg2(v10, v5)
   684  		v7.AddArg2(v8, v9)
   685  		v2.AddArg2(v3, v7)
   686  		v.AddArg3(v0, v2, mem)
   687  		return true
   688  	}
   689  	// match: (AtomicAnd8 ptr val mem)
   690  	// cond: config.BigEndian
   691  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   692  	for {
   693  		ptr := v_0
   694  		val := v_1
   695  		mem := v_2
   696  		if !(config.BigEndian) {
   697  			break
   698  		}
   699  		v.reset(OpMIPSLoweredAtomicAnd)
   700  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   701  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   702  		v1.AuxInt = int32ToAuxInt(^3)
   703  		v0.AddArg2(v1, ptr)
   704  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   705  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   706  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   707  		v4.AddArg(val)
   708  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   709  		v5.AuxInt = int32ToAuxInt(3)
   710  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   711  		v6.AuxInt = int32ToAuxInt(3)
   712  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   713  		v7.AuxInt = int32ToAuxInt(3)
   714  		v7.AddArg(ptr)
   715  		v6.AddArg(v7)
   716  		v5.AddArg(v6)
   717  		v3.AddArg2(v4, v5)
   718  		v8 := b.NewValue0(v.Pos, OpMIPSNOR, typ.UInt32)
   719  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   720  		v9.AuxInt = int32ToAuxInt(0)
   721  		v10 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   722  		v11 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   723  		v11.AuxInt = int32ToAuxInt(0xff)
   724  		v10.AddArg2(v11, v5)
   725  		v8.AddArg2(v9, v10)
   726  		v2.AddArg2(v3, v8)
   727  		v.AddArg3(v0, v2, mem)
   728  		return true
   729  	}
   730  	return false
   731  }
   732  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   733  	v_2 := v.Args[2]
   734  	v_1 := v.Args[1]
   735  	v_0 := v.Args[0]
   736  	b := v.Block
   737  	config := b.Func.Config
   738  	typ := &b.Func.Config.Types
   739  	// match: (AtomicOr8 ptr val mem)
   740  	// cond: !config.BigEndian
   741  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   742  	for {
   743  		ptr := v_0
   744  		val := v_1
   745  		mem := v_2
   746  		if !(!config.BigEndian) {
   747  			break
   748  		}
   749  		v.reset(OpMIPSLoweredAtomicOr)
   750  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   751  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   752  		v1.AuxInt = int32ToAuxInt(^3)
   753  		v0.AddArg2(v1, ptr)
   754  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   755  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   756  		v3.AddArg(val)
   757  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   758  		v4.AuxInt = int32ToAuxInt(3)
   759  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   760  		v5.AuxInt = int32ToAuxInt(3)
   761  		v5.AddArg(ptr)
   762  		v4.AddArg(v5)
   763  		v2.AddArg2(v3, v4)
   764  		v.AddArg3(v0, v2, mem)
   765  		return true
   766  	}
   767  	// match: (AtomicOr8 ptr val mem)
   768  	// cond: config.BigEndian
   769  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   770  	for {
   771  		ptr := v_0
   772  		val := v_1
   773  		mem := v_2
   774  		if !(config.BigEndian) {
   775  			break
   776  		}
   777  		v.reset(OpMIPSLoweredAtomicOr)
   778  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   779  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   780  		v1.AuxInt = int32ToAuxInt(^3)
   781  		v0.AddArg2(v1, ptr)
   782  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   783  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   784  		v3.AddArg(val)
   785  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   786  		v4.AuxInt = int32ToAuxInt(3)
   787  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   788  		v5.AuxInt = int32ToAuxInt(3)
   789  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   790  		v6.AuxInt = int32ToAuxInt(3)
   791  		v6.AddArg(ptr)
   792  		v5.AddArg(v6)
   793  		v4.AddArg(v5)
   794  		v2.AddArg2(v3, v4)
   795  		v.AddArg3(v0, v2, mem)
   796  		return true
   797  	}
   798  	return false
   799  }
   800  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   801  	v_1 := v.Args[1]
   802  	v_0 := v.Args[0]
   803  	b := v.Block
   804  	// match: (Avg32u <t> x y)
   805  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   806  	for {
   807  		t := v.Type
   808  		x := v_0
   809  		y := v_1
   810  		v.reset(OpMIPSADD)
   811  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   812  		v0.AuxInt = int32ToAuxInt(1)
   813  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   814  		v1.AddArg2(x, y)
   815  		v0.AddArg(v1)
   816  		v.AddArg2(v0, y)
   817  		return true
   818  	}
   819  }
   820  func rewriteValueMIPS_OpBitLen16(v *Value) bool {
   821  	v_0 := v.Args[0]
   822  	b := v.Block
   823  	typ := &b.Func.Config.Types
   824  	// match: (BitLen16 x)
   825  	// result: (BitLen32 (ZeroExt16to32 x))
   826  	for {
   827  		x := v_0
   828  		v.reset(OpBitLen32)
   829  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   830  		v0.AddArg(x)
   831  		v.AddArg(v0)
   832  		return true
   833  	}
   834  }
   835  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   836  	v_0 := v.Args[0]
   837  	b := v.Block
   838  	typ := &b.Func.Config.Types
   839  	// match: (BitLen32 <t> x)
   840  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   841  	for {
   842  		t := v.Type
   843  		x := v_0
   844  		v.reset(OpMIPSSUB)
   845  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   846  		v0.AuxInt = int32ToAuxInt(32)
   847  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   848  		v1.AddArg(x)
   849  		v.AddArg2(v0, v1)
   850  		return true
   851  	}
   852  }
   853  func rewriteValueMIPS_OpBitLen8(v *Value) bool {
   854  	v_0 := v.Args[0]
   855  	b := v.Block
   856  	typ := &b.Func.Config.Types
   857  	// match: (BitLen8 x)
   858  	// result: (BitLen32 (ZeroExt8to32 x))
   859  	for {
   860  		x := v_0
   861  		v.reset(OpBitLen32)
   862  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   863  		v0.AddArg(x)
   864  		v.AddArg(v0)
   865  		return true
   866  	}
   867  }
   868  func rewriteValueMIPS_OpCom16(v *Value) bool {
   869  	v_0 := v.Args[0]
   870  	b := v.Block
   871  	typ := &b.Func.Config.Types
   872  	// match: (Com16 x)
   873  	// result: (NOR (MOVWconst [0]) x)
   874  	for {
   875  		x := v_0
   876  		v.reset(OpMIPSNOR)
   877  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   878  		v0.AuxInt = int32ToAuxInt(0)
   879  		v.AddArg2(v0, x)
   880  		return true
   881  	}
   882  }
   883  func rewriteValueMIPS_OpCom32(v *Value) bool {
   884  	v_0 := v.Args[0]
   885  	b := v.Block
   886  	typ := &b.Func.Config.Types
   887  	// match: (Com32 x)
   888  	// result: (NOR (MOVWconst [0]) x)
   889  	for {
   890  		x := v_0
   891  		v.reset(OpMIPSNOR)
   892  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   893  		v0.AuxInt = int32ToAuxInt(0)
   894  		v.AddArg2(v0, x)
   895  		return true
   896  	}
   897  }
   898  func rewriteValueMIPS_OpCom8(v *Value) bool {
   899  	v_0 := v.Args[0]
   900  	b := v.Block
   901  	typ := &b.Func.Config.Types
   902  	// match: (Com8 x)
   903  	// result: (NOR (MOVWconst [0]) x)
   904  	for {
   905  		x := v_0
   906  		v.reset(OpMIPSNOR)
   907  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   908  		v0.AuxInt = int32ToAuxInt(0)
   909  		v.AddArg2(v0, x)
   910  		return true
   911  	}
   912  }
   913  func rewriteValueMIPS_OpConst16(v *Value) bool {
   914  	// match: (Const16 [val])
   915  	// result: (MOVWconst [int32(val)])
   916  	for {
   917  		val := auxIntToInt16(v.AuxInt)
   918  		v.reset(OpMIPSMOVWconst)
   919  		v.AuxInt = int32ToAuxInt(int32(val))
   920  		return true
   921  	}
   922  }
   923  func rewriteValueMIPS_OpConst32(v *Value) bool {
   924  	// match: (Const32 [val])
   925  	// result: (MOVWconst [int32(val)])
   926  	for {
   927  		val := auxIntToInt32(v.AuxInt)
   928  		v.reset(OpMIPSMOVWconst)
   929  		v.AuxInt = int32ToAuxInt(int32(val))
   930  		return true
   931  	}
   932  }
   933  func rewriteValueMIPS_OpConst8(v *Value) bool {
   934  	// match: (Const8 [val])
   935  	// result: (MOVWconst [int32(val)])
   936  	for {
   937  		val := auxIntToInt8(v.AuxInt)
   938  		v.reset(OpMIPSMOVWconst)
   939  		v.AuxInt = int32ToAuxInt(int32(val))
   940  		return true
   941  	}
   942  }
   943  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   944  	// match: (ConstBool [t])
   945  	// result: (MOVWconst [b2i32(t)])
   946  	for {
   947  		t := auxIntToBool(v.AuxInt)
   948  		v.reset(OpMIPSMOVWconst)
   949  		v.AuxInt = int32ToAuxInt(b2i32(t))
   950  		return true
   951  	}
   952  }
   953  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   954  	// match: (ConstNil)
   955  	// result: (MOVWconst [0])
   956  	for {
   957  		v.reset(OpMIPSMOVWconst)
   958  		v.AuxInt = int32ToAuxInt(0)
   959  		return true
   960  	}
   961  }
   962  func rewriteValueMIPS_OpCtz16(v *Value) bool {
   963  	v_0 := v.Args[0]
   964  	b := v.Block
   965  	typ := &b.Func.Config.Types
   966  	// match: (Ctz16 x)
   967  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<16])))
   968  	for {
   969  		x := v_0
   970  		v.reset(OpCtz32)
   971  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   972  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   973  		v1.AuxInt = int32ToAuxInt(1 << 16)
   974  		v0.AddArg2(x, v1)
   975  		v.AddArg(v0)
   976  		return true
   977  	}
   978  }
   979  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   980  	v_0 := v.Args[0]
   981  	b := v.Block
   982  	typ := &b.Func.Config.Types
   983  	// match: (Ctz32 <t> x)
   984  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   985  	for {
   986  		t := v.Type
   987  		x := v_0
   988  		v.reset(OpMIPSSUB)
   989  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   990  		v0.AuxInt = int32ToAuxInt(32)
   991  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   992  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   993  		v2.AuxInt = int32ToAuxInt(1)
   994  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   995  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   996  		v4.AddArg(x)
   997  		v3.AddArg2(x, v4)
   998  		v2.AddArg(v3)
   999  		v1.AddArg(v2)
  1000  		v.AddArg2(v0, v1)
  1001  		return true
  1002  	}
  1003  }
  1004  func rewriteValueMIPS_OpCtz8(v *Value) bool {
  1005  	v_0 := v.Args[0]
  1006  	b := v.Block
  1007  	typ := &b.Func.Config.Types
  1008  	// match: (Ctz8 x)
  1009  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<8])))
  1010  	for {
  1011  		x := v_0
  1012  		v.reset(OpCtz32)
  1013  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
  1014  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1015  		v1.AuxInt = int32ToAuxInt(1 << 8)
  1016  		v0.AddArg2(x, v1)
  1017  		v.AddArg(v0)
  1018  		return true
  1019  	}
  1020  }
  1021  func rewriteValueMIPS_OpDiv16(v *Value) bool {
  1022  	v_1 := v.Args[1]
  1023  	v_0 := v.Args[0]
  1024  	b := v.Block
  1025  	typ := &b.Func.Config.Types
  1026  	// match: (Div16 x y)
  1027  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  1028  	for {
  1029  		x := v_0
  1030  		y := v_1
  1031  		v.reset(OpSelect1)
  1032  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1033  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1034  		v1.AddArg(x)
  1035  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1036  		v2.AddArg(y)
  1037  		v0.AddArg2(v1, v2)
  1038  		v.AddArg(v0)
  1039  		return true
  1040  	}
  1041  }
  1042  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
  1043  	v_1 := v.Args[1]
  1044  	v_0 := v.Args[0]
  1045  	b := v.Block
  1046  	typ := &b.Func.Config.Types
  1047  	// match: (Div16u x y)
  1048  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1049  	for {
  1050  		x := v_0
  1051  		y := v_1
  1052  		v.reset(OpSelect1)
  1053  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1054  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1055  		v1.AddArg(x)
  1056  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1057  		v2.AddArg(y)
  1058  		v0.AddArg2(v1, v2)
  1059  		v.AddArg(v0)
  1060  		return true
  1061  	}
  1062  }
  1063  func rewriteValueMIPS_OpDiv32(v *Value) bool {
  1064  	v_1 := v.Args[1]
  1065  	v_0 := v.Args[0]
  1066  	b := v.Block
  1067  	typ := &b.Func.Config.Types
  1068  	// match: (Div32 x y)
  1069  	// result: (Select1 (DIV x y))
  1070  	for {
  1071  		x := v_0
  1072  		y := v_1
  1073  		v.reset(OpSelect1)
  1074  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1075  		v0.AddArg2(x, y)
  1076  		v.AddArg(v0)
  1077  		return true
  1078  	}
  1079  }
  1080  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
  1081  	v_1 := v.Args[1]
  1082  	v_0 := v.Args[0]
  1083  	b := v.Block
  1084  	typ := &b.Func.Config.Types
  1085  	// match: (Div32u x y)
  1086  	// result: (Select1 (DIVU x y))
  1087  	for {
  1088  		x := v_0
  1089  		y := v_1
  1090  		v.reset(OpSelect1)
  1091  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1092  		v0.AddArg2(x, y)
  1093  		v.AddArg(v0)
  1094  		return true
  1095  	}
  1096  }
  1097  func rewriteValueMIPS_OpDiv8(v *Value) bool {
  1098  	v_1 := v.Args[1]
  1099  	v_0 := v.Args[0]
  1100  	b := v.Block
  1101  	typ := &b.Func.Config.Types
  1102  	// match: (Div8 x y)
  1103  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1104  	for {
  1105  		x := v_0
  1106  		y := v_1
  1107  		v.reset(OpSelect1)
  1108  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1109  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1110  		v1.AddArg(x)
  1111  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1112  		v2.AddArg(y)
  1113  		v0.AddArg2(v1, v2)
  1114  		v.AddArg(v0)
  1115  		return true
  1116  	}
  1117  }
  1118  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1119  	v_1 := v.Args[1]
  1120  	v_0 := v.Args[0]
  1121  	b := v.Block
  1122  	typ := &b.Func.Config.Types
  1123  	// match: (Div8u x y)
  1124  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1125  	for {
  1126  		x := v_0
  1127  		y := v_1
  1128  		v.reset(OpSelect1)
  1129  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1130  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1131  		v1.AddArg(x)
  1132  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1133  		v2.AddArg(y)
  1134  		v0.AddArg2(v1, v2)
  1135  		v.AddArg(v0)
  1136  		return true
  1137  	}
  1138  }
  1139  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1140  	v_1 := v.Args[1]
  1141  	v_0 := v.Args[0]
  1142  	b := v.Block
  1143  	typ := &b.Func.Config.Types
  1144  	// match: (Eq16 x y)
  1145  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1146  	for {
  1147  		x := v_0
  1148  		y := v_1
  1149  		v.reset(OpMIPSSGTUconst)
  1150  		v.AuxInt = int32ToAuxInt(1)
  1151  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1152  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1153  		v1.AddArg(x)
  1154  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1155  		v2.AddArg(y)
  1156  		v0.AddArg2(v1, v2)
  1157  		v.AddArg(v0)
  1158  		return true
  1159  	}
  1160  }
  1161  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1162  	v_1 := v.Args[1]
  1163  	v_0 := v.Args[0]
  1164  	b := v.Block
  1165  	typ := &b.Func.Config.Types
  1166  	// match: (Eq32 x y)
  1167  	// result: (SGTUconst [1] (XOR x y))
  1168  	for {
  1169  		x := v_0
  1170  		y := v_1
  1171  		v.reset(OpMIPSSGTUconst)
  1172  		v.AuxInt = int32ToAuxInt(1)
  1173  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1174  		v0.AddArg2(x, y)
  1175  		v.AddArg(v0)
  1176  		return true
  1177  	}
  1178  }
  1179  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1180  	v_1 := v.Args[1]
  1181  	v_0 := v.Args[0]
  1182  	b := v.Block
  1183  	// match: (Eq32F x y)
  1184  	// result: (FPFlagTrue (CMPEQF x y))
  1185  	for {
  1186  		x := v_0
  1187  		y := v_1
  1188  		v.reset(OpMIPSFPFlagTrue)
  1189  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1190  		v0.AddArg2(x, y)
  1191  		v.AddArg(v0)
  1192  		return true
  1193  	}
  1194  }
  1195  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1196  	v_1 := v.Args[1]
  1197  	v_0 := v.Args[0]
  1198  	b := v.Block
  1199  	// match: (Eq64F x y)
  1200  	// result: (FPFlagTrue (CMPEQD x y))
  1201  	for {
  1202  		x := v_0
  1203  		y := v_1
  1204  		v.reset(OpMIPSFPFlagTrue)
  1205  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1206  		v0.AddArg2(x, y)
  1207  		v.AddArg(v0)
  1208  		return true
  1209  	}
  1210  }
  1211  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1212  	v_1 := v.Args[1]
  1213  	v_0 := v.Args[0]
  1214  	b := v.Block
  1215  	typ := &b.Func.Config.Types
  1216  	// match: (Eq8 x y)
  1217  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1218  	for {
  1219  		x := v_0
  1220  		y := v_1
  1221  		v.reset(OpMIPSSGTUconst)
  1222  		v.AuxInt = int32ToAuxInt(1)
  1223  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1224  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1225  		v1.AddArg(x)
  1226  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1227  		v2.AddArg(y)
  1228  		v0.AddArg2(v1, v2)
  1229  		v.AddArg(v0)
  1230  		return true
  1231  	}
  1232  }
  1233  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1234  	v_1 := v.Args[1]
  1235  	v_0 := v.Args[0]
  1236  	b := v.Block
  1237  	typ := &b.Func.Config.Types
  1238  	// match: (EqB x y)
  1239  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1240  	for {
  1241  		x := v_0
  1242  		y := v_1
  1243  		v.reset(OpMIPSXORconst)
  1244  		v.AuxInt = int32ToAuxInt(1)
  1245  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1246  		v0.AddArg2(x, y)
  1247  		v.AddArg(v0)
  1248  		return true
  1249  	}
  1250  }
  1251  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1252  	v_1 := v.Args[1]
  1253  	v_0 := v.Args[0]
  1254  	b := v.Block
  1255  	typ := &b.Func.Config.Types
  1256  	// match: (EqPtr x y)
  1257  	// result: (SGTUconst [1] (XOR x y))
  1258  	for {
  1259  		x := v_0
  1260  		y := v_1
  1261  		v.reset(OpMIPSSGTUconst)
  1262  		v.AuxInt = int32ToAuxInt(1)
  1263  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1264  		v0.AddArg2(x, y)
  1265  		v.AddArg(v0)
  1266  		return true
  1267  	}
  1268  }
  1269  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1270  	v_1 := v.Args[1]
  1271  	v_0 := v.Args[0]
  1272  	b := v.Block
  1273  	typ := &b.Func.Config.Types
  1274  	// match: (Hmul32 x y)
  1275  	// result: (Select0 (MULT x y))
  1276  	for {
  1277  		x := v_0
  1278  		y := v_1
  1279  		v.reset(OpSelect0)
  1280  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1281  		v0.AddArg2(x, y)
  1282  		v.AddArg(v0)
  1283  		return true
  1284  	}
  1285  }
  1286  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1287  	v_1 := v.Args[1]
  1288  	v_0 := v.Args[0]
  1289  	b := v.Block
  1290  	typ := &b.Func.Config.Types
  1291  	// match: (Hmul32u x y)
  1292  	// result: (Select0 (MULTU x y))
  1293  	for {
  1294  		x := v_0
  1295  		y := v_1
  1296  		v.reset(OpSelect0)
  1297  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1298  		v0.AddArg2(x, y)
  1299  		v.AddArg(v0)
  1300  		return true
  1301  	}
  1302  }
  1303  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1304  	v_1 := v.Args[1]
  1305  	v_0 := v.Args[0]
  1306  	// match: (IsInBounds idx len)
  1307  	// result: (SGTU len idx)
  1308  	for {
  1309  		idx := v_0
  1310  		len := v_1
  1311  		v.reset(OpMIPSSGTU)
  1312  		v.AddArg2(len, idx)
  1313  		return true
  1314  	}
  1315  }
  1316  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1317  	v_0 := v.Args[0]
  1318  	b := v.Block
  1319  	typ := &b.Func.Config.Types
  1320  	// match: (IsNonNil ptr)
  1321  	// result: (SGTU ptr (MOVWconst [0]))
  1322  	for {
  1323  		ptr := v_0
  1324  		v.reset(OpMIPSSGTU)
  1325  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1326  		v0.AuxInt = int32ToAuxInt(0)
  1327  		v.AddArg2(ptr, v0)
  1328  		return true
  1329  	}
  1330  }
  1331  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1332  	v_1 := v.Args[1]
  1333  	v_0 := v.Args[0]
  1334  	b := v.Block
  1335  	typ := &b.Func.Config.Types
  1336  	// match: (IsSliceInBounds idx len)
  1337  	// result: (XORconst [1] (SGTU idx len))
  1338  	for {
  1339  		idx := v_0
  1340  		len := v_1
  1341  		v.reset(OpMIPSXORconst)
  1342  		v.AuxInt = int32ToAuxInt(1)
  1343  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1344  		v0.AddArg2(idx, len)
  1345  		v.AddArg(v0)
  1346  		return true
  1347  	}
  1348  }
  1349  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1350  	v_1 := v.Args[1]
  1351  	v_0 := v.Args[0]
  1352  	b := v.Block
  1353  	typ := &b.Func.Config.Types
  1354  	// match: (Leq16 x y)
  1355  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1356  	for {
  1357  		x := v_0
  1358  		y := v_1
  1359  		v.reset(OpMIPSXORconst)
  1360  		v.AuxInt = int32ToAuxInt(1)
  1361  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1362  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1363  		v1.AddArg(x)
  1364  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1365  		v2.AddArg(y)
  1366  		v0.AddArg2(v1, v2)
  1367  		v.AddArg(v0)
  1368  		return true
  1369  	}
  1370  }
  1371  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1372  	v_1 := v.Args[1]
  1373  	v_0 := v.Args[0]
  1374  	b := v.Block
  1375  	typ := &b.Func.Config.Types
  1376  	// match: (Leq16U x y)
  1377  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1378  	for {
  1379  		x := v_0
  1380  		y := v_1
  1381  		v.reset(OpMIPSXORconst)
  1382  		v.AuxInt = int32ToAuxInt(1)
  1383  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1384  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1385  		v1.AddArg(x)
  1386  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1387  		v2.AddArg(y)
  1388  		v0.AddArg2(v1, v2)
  1389  		v.AddArg(v0)
  1390  		return true
  1391  	}
  1392  }
  1393  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1394  	v_1 := v.Args[1]
  1395  	v_0 := v.Args[0]
  1396  	b := v.Block
  1397  	typ := &b.Func.Config.Types
  1398  	// match: (Leq32 x y)
  1399  	// result: (XORconst [1] (SGT x y))
  1400  	for {
  1401  		x := v_0
  1402  		y := v_1
  1403  		v.reset(OpMIPSXORconst)
  1404  		v.AuxInt = int32ToAuxInt(1)
  1405  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1406  		v0.AddArg2(x, y)
  1407  		v.AddArg(v0)
  1408  		return true
  1409  	}
  1410  }
  1411  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1412  	v_1 := v.Args[1]
  1413  	v_0 := v.Args[0]
  1414  	b := v.Block
  1415  	// match: (Leq32F x y)
  1416  	// result: (FPFlagTrue (CMPGEF y x))
  1417  	for {
  1418  		x := v_0
  1419  		y := v_1
  1420  		v.reset(OpMIPSFPFlagTrue)
  1421  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1422  		v0.AddArg2(y, x)
  1423  		v.AddArg(v0)
  1424  		return true
  1425  	}
  1426  }
  1427  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1428  	v_1 := v.Args[1]
  1429  	v_0 := v.Args[0]
  1430  	b := v.Block
  1431  	typ := &b.Func.Config.Types
  1432  	// match: (Leq32U x y)
  1433  	// result: (XORconst [1] (SGTU x y))
  1434  	for {
  1435  		x := v_0
  1436  		y := v_1
  1437  		v.reset(OpMIPSXORconst)
  1438  		v.AuxInt = int32ToAuxInt(1)
  1439  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1440  		v0.AddArg2(x, y)
  1441  		v.AddArg(v0)
  1442  		return true
  1443  	}
  1444  }
  1445  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1446  	v_1 := v.Args[1]
  1447  	v_0 := v.Args[0]
  1448  	b := v.Block
  1449  	// match: (Leq64F x y)
  1450  	// result: (FPFlagTrue (CMPGED y x))
  1451  	for {
  1452  		x := v_0
  1453  		y := v_1
  1454  		v.reset(OpMIPSFPFlagTrue)
  1455  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1456  		v0.AddArg2(y, x)
  1457  		v.AddArg(v0)
  1458  		return true
  1459  	}
  1460  }
  1461  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1462  	v_1 := v.Args[1]
  1463  	v_0 := v.Args[0]
  1464  	b := v.Block
  1465  	typ := &b.Func.Config.Types
  1466  	// match: (Leq8 x y)
  1467  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1468  	for {
  1469  		x := v_0
  1470  		y := v_1
  1471  		v.reset(OpMIPSXORconst)
  1472  		v.AuxInt = int32ToAuxInt(1)
  1473  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1474  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1475  		v1.AddArg(x)
  1476  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1477  		v2.AddArg(y)
  1478  		v0.AddArg2(v1, v2)
  1479  		v.AddArg(v0)
  1480  		return true
  1481  	}
  1482  }
  1483  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1484  	v_1 := v.Args[1]
  1485  	v_0 := v.Args[0]
  1486  	b := v.Block
  1487  	typ := &b.Func.Config.Types
  1488  	// match: (Leq8U x y)
  1489  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1490  	for {
  1491  		x := v_0
  1492  		y := v_1
  1493  		v.reset(OpMIPSXORconst)
  1494  		v.AuxInt = int32ToAuxInt(1)
  1495  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1496  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1497  		v1.AddArg(x)
  1498  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1499  		v2.AddArg(y)
  1500  		v0.AddArg2(v1, v2)
  1501  		v.AddArg(v0)
  1502  		return true
  1503  	}
  1504  }
  1505  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1506  	v_1 := v.Args[1]
  1507  	v_0 := v.Args[0]
  1508  	b := v.Block
  1509  	typ := &b.Func.Config.Types
  1510  	// match: (Less16 x y)
  1511  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1512  	for {
  1513  		x := v_0
  1514  		y := v_1
  1515  		v.reset(OpMIPSSGT)
  1516  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1517  		v0.AddArg(y)
  1518  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1519  		v1.AddArg(x)
  1520  		v.AddArg2(v0, v1)
  1521  		return true
  1522  	}
  1523  }
  1524  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1525  	v_1 := v.Args[1]
  1526  	v_0 := v.Args[0]
  1527  	b := v.Block
  1528  	typ := &b.Func.Config.Types
  1529  	// match: (Less16U x y)
  1530  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1531  	for {
  1532  		x := v_0
  1533  		y := v_1
  1534  		v.reset(OpMIPSSGTU)
  1535  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1536  		v0.AddArg(y)
  1537  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1538  		v1.AddArg(x)
  1539  		v.AddArg2(v0, v1)
  1540  		return true
  1541  	}
  1542  }
  1543  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1544  	v_1 := v.Args[1]
  1545  	v_0 := v.Args[0]
  1546  	// match: (Less32 x y)
  1547  	// result: (SGT y x)
  1548  	for {
  1549  		x := v_0
  1550  		y := v_1
  1551  		v.reset(OpMIPSSGT)
  1552  		v.AddArg2(y, x)
  1553  		return true
  1554  	}
  1555  }
  1556  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1557  	v_1 := v.Args[1]
  1558  	v_0 := v.Args[0]
  1559  	b := v.Block
  1560  	// match: (Less32F x y)
  1561  	// result: (FPFlagTrue (CMPGTF y x))
  1562  	for {
  1563  		x := v_0
  1564  		y := v_1
  1565  		v.reset(OpMIPSFPFlagTrue)
  1566  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1567  		v0.AddArg2(y, x)
  1568  		v.AddArg(v0)
  1569  		return true
  1570  	}
  1571  }
  1572  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1573  	v_1 := v.Args[1]
  1574  	v_0 := v.Args[0]
  1575  	// match: (Less32U x y)
  1576  	// result: (SGTU y x)
  1577  	for {
  1578  		x := v_0
  1579  		y := v_1
  1580  		v.reset(OpMIPSSGTU)
  1581  		v.AddArg2(y, x)
  1582  		return true
  1583  	}
  1584  }
  1585  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1586  	v_1 := v.Args[1]
  1587  	v_0 := v.Args[0]
  1588  	b := v.Block
  1589  	// match: (Less64F x y)
  1590  	// result: (FPFlagTrue (CMPGTD y x))
  1591  	for {
  1592  		x := v_0
  1593  		y := v_1
  1594  		v.reset(OpMIPSFPFlagTrue)
  1595  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1596  		v0.AddArg2(y, x)
  1597  		v.AddArg(v0)
  1598  		return true
  1599  	}
  1600  }
  1601  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1602  	v_1 := v.Args[1]
  1603  	v_0 := v.Args[0]
  1604  	b := v.Block
  1605  	typ := &b.Func.Config.Types
  1606  	// match: (Less8 x y)
  1607  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1608  	for {
  1609  		x := v_0
  1610  		y := v_1
  1611  		v.reset(OpMIPSSGT)
  1612  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1613  		v0.AddArg(y)
  1614  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1615  		v1.AddArg(x)
  1616  		v.AddArg2(v0, v1)
  1617  		return true
  1618  	}
  1619  }
  1620  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1621  	v_1 := v.Args[1]
  1622  	v_0 := v.Args[0]
  1623  	b := v.Block
  1624  	typ := &b.Func.Config.Types
  1625  	// match: (Less8U x y)
  1626  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1627  	for {
  1628  		x := v_0
  1629  		y := v_1
  1630  		v.reset(OpMIPSSGTU)
  1631  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1632  		v0.AddArg(y)
  1633  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1634  		v1.AddArg(x)
  1635  		v.AddArg2(v0, v1)
  1636  		return true
  1637  	}
  1638  }
  1639  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1640  	v_1 := v.Args[1]
  1641  	v_0 := v.Args[0]
  1642  	// match: (Load <t> ptr mem)
  1643  	// cond: t.IsBoolean()
  1644  	// result: (MOVBUload ptr mem)
  1645  	for {
  1646  		t := v.Type
  1647  		ptr := v_0
  1648  		mem := v_1
  1649  		if !(t.IsBoolean()) {
  1650  			break
  1651  		}
  1652  		v.reset(OpMIPSMOVBUload)
  1653  		v.AddArg2(ptr, mem)
  1654  		return true
  1655  	}
  1656  	// match: (Load <t> ptr mem)
  1657  	// cond: (is8BitInt(t) && t.IsSigned())
  1658  	// result: (MOVBload ptr mem)
  1659  	for {
  1660  		t := v.Type
  1661  		ptr := v_0
  1662  		mem := v_1
  1663  		if !(is8BitInt(t) && t.IsSigned()) {
  1664  			break
  1665  		}
  1666  		v.reset(OpMIPSMOVBload)
  1667  		v.AddArg2(ptr, mem)
  1668  		return true
  1669  	}
  1670  	// match: (Load <t> ptr mem)
  1671  	// cond: (is8BitInt(t) && !t.IsSigned())
  1672  	// result: (MOVBUload ptr mem)
  1673  	for {
  1674  		t := v.Type
  1675  		ptr := v_0
  1676  		mem := v_1
  1677  		if !(is8BitInt(t) && !t.IsSigned()) {
  1678  			break
  1679  		}
  1680  		v.reset(OpMIPSMOVBUload)
  1681  		v.AddArg2(ptr, mem)
  1682  		return true
  1683  	}
  1684  	// match: (Load <t> ptr mem)
  1685  	// cond: (is16BitInt(t) && t.IsSigned())
  1686  	// result: (MOVHload ptr mem)
  1687  	for {
  1688  		t := v.Type
  1689  		ptr := v_0
  1690  		mem := v_1
  1691  		if !(is16BitInt(t) && t.IsSigned()) {
  1692  			break
  1693  		}
  1694  		v.reset(OpMIPSMOVHload)
  1695  		v.AddArg2(ptr, mem)
  1696  		return true
  1697  	}
  1698  	// match: (Load <t> ptr mem)
  1699  	// cond: (is16BitInt(t) && !t.IsSigned())
  1700  	// result: (MOVHUload ptr mem)
  1701  	for {
  1702  		t := v.Type
  1703  		ptr := v_0
  1704  		mem := v_1
  1705  		if !(is16BitInt(t) && !t.IsSigned()) {
  1706  			break
  1707  		}
  1708  		v.reset(OpMIPSMOVHUload)
  1709  		v.AddArg2(ptr, mem)
  1710  		return true
  1711  	}
  1712  	// match: (Load <t> ptr mem)
  1713  	// cond: (is32BitInt(t) || isPtr(t))
  1714  	// result: (MOVWload ptr mem)
  1715  	for {
  1716  		t := v.Type
  1717  		ptr := v_0
  1718  		mem := v_1
  1719  		if !(is32BitInt(t) || isPtr(t)) {
  1720  			break
  1721  		}
  1722  		v.reset(OpMIPSMOVWload)
  1723  		v.AddArg2(ptr, mem)
  1724  		return true
  1725  	}
  1726  	// match: (Load <t> ptr mem)
  1727  	// cond: is32BitFloat(t)
  1728  	// result: (MOVFload ptr mem)
  1729  	for {
  1730  		t := v.Type
  1731  		ptr := v_0
  1732  		mem := v_1
  1733  		if !(is32BitFloat(t)) {
  1734  			break
  1735  		}
  1736  		v.reset(OpMIPSMOVFload)
  1737  		v.AddArg2(ptr, mem)
  1738  		return true
  1739  	}
  1740  	// match: (Load <t> ptr mem)
  1741  	// cond: is64BitFloat(t)
  1742  	// result: (MOVDload ptr mem)
  1743  	for {
  1744  		t := v.Type
  1745  		ptr := v_0
  1746  		mem := v_1
  1747  		if !(is64BitFloat(t)) {
  1748  			break
  1749  		}
  1750  		v.reset(OpMIPSMOVDload)
  1751  		v.AddArg2(ptr, mem)
  1752  		return true
  1753  	}
  1754  	return false
  1755  }
  1756  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1757  	v_1 := v.Args[1]
  1758  	v_0 := v.Args[0]
  1759  	b := v.Block
  1760  	typ := &b.Func.Config.Types
  1761  	// match: (LocalAddr <t> {sym} base mem)
  1762  	// cond: t.Elem().HasPointers()
  1763  	// result: (MOVWaddr {sym} (SPanchored base mem))
  1764  	for {
  1765  		t := v.Type
  1766  		sym := auxToSym(v.Aux)
  1767  		base := v_0
  1768  		mem := v_1
  1769  		if !(t.Elem().HasPointers()) {
  1770  			break
  1771  		}
  1772  		v.reset(OpMIPSMOVWaddr)
  1773  		v.Aux = symToAux(sym)
  1774  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
  1775  		v0.AddArg2(base, mem)
  1776  		v.AddArg(v0)
  1777  		return true
  1778  	}
  1779  	// match: (LocalAddr <t> {sym} base _)
  1780  	// cond: !t.Elem().HasPointers()
  1781  	// result: (MOVWaddr {sym} base)
  1782  	for {
  1783  		t := v.Type
  1784  		sym := auxToSym(v.Aux)
  1785  		base := v_0
  1786  		if !(!t.Elem().HasPointers()) {
  1787  			break
  1788  		}
  1789  		v.reset(OpMIPSMOVWaddr)
  1790  		v.Aux = symToAux(sym)
  1791  		v.AddArg(base)
  1792  		return true
  1793  	}
  1794  	return false
  1795  }
  1796  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1797  	v_1 := v.Args[1]
  1798  	v_0 := v.Args[0]
  1799  	b := v.Block
  1800  	typ := &b.Func.Config.Types
  1801  	// match: (Lsh16x16 <t> x y)
  1802  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1803  	for {
  1804  		t := v.Type
  1805  		x := v_0
  1806  		y := v_1
  1807  		v.reset(OpMIPSCMOVZ)
  1808  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1809  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1810  		v1.AddArg(y)
  1811  		v0.AddArg2(x, v1)
  1812  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1813  		v2.AuxInt = int32ToAuxInt(0)
  1814  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1815  		v3.AuxInt = int32ToAuxInt(32)
  1816  		v3.AddArg(v1)
  1817  		v.AddArg3(v0, v2, v3)
  1818  		return true
  1819  	}
  1820  }
  1821  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1822  	v_1 := v.Args[1]
  1823  	v_0 := v.Args[0]
  1824  	b := v.Block
  1825  	typ := &b.Func.Config.Types
  1826  	// match: (Lsh16x32 <t> x y)
  1827  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1828  	for {
  1829  		t := v.Type
  1830  		x := v_0
  1831  		y := v_1
  1832  		v.reset(OpMIPSCMOVZ)
  1833  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1834  		v0.AddArg2(x, y)
  1835  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1836  		v1.AuxInt = int32ToAuxInt(0)
  1837  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1838  		v2.AuxInt = int32ToAuxInt(32)
  1839  		v2.AddArg(y)
  1840  		v.AddArg3(v0, v1, v2)
  1841  		return true
  1842  	}
  1843  }
  1844  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1845  	v_1 := v.Args[1]
  1846  	v_0 := v.Args[0]
  1847  	// match: (Lsh16x64 x (Const64 [c]))
  1848  	// cond: uint32(c) < 16
  1849  	// result: (SLLconst x [int32(c)])
  1850  	for {
  1851  		x := v_0
  1852  		if v_1.Op != OpConst64 {
  1853  			break
  1854  		}
  1855  		c := auxIntToInt64(v_1.AuxInt)
  1856  		if !(uint32(c) < 16) {
  1857  			break
  1858  		}
  1859  		v.reset(OpMIPSSLLconst)
  1860  		v.AuxInt = int32ToAuxInt(int32(c))
  1861  		v.AddArg(x)
  1862  		return true
  1863  	}
  1864  	// match: (Lsh16x64 _ (Const64 [c]))
  1865  	// cond: uint32(c) >= 16
  1866  	// result: (MOVWconst [0])
  1867  	for {
  1868  		if v_1.Op != OpConst64 {
  1869  			break
  1870  		}
  1871  		c := auxIntToInt64(v_1.AuxInt)
  1872  		if !(uint32(c) >= 16) {
  1873  			break
  1874  		}
  1875  		v.reset(OpMIPSMOVWconst)
  1876  		v.AuxInt = int32ToAuxInt(0)
  1877  		return true
  1878  	}
  1879  	return false
  1880  }
  1881  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1882  	v_1 := v.Args[1]
  1883  	v_0 := v.Args[0]
  1884  	b := v.Block
  1885  	typ := &b.Func.Config.Types
  1886  	// match: (Lsh16x8 <t> x y)
  1887  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1888  	for {
  1889  		t := v.Type
  1890  		x := v_0
  1891  		y := v_1
  1892  		v.reset(OpMIPSCMOVZ)
  1893  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1894  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1895  		v1.AddArg(y)
  1896  		v0.AddArg2(x, v1)
  1897  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1898  		v2.AuxInt = int32ToAuxInt(0)
  1899  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1900  		v3.AuxInt = int32ToAuxInt(32)
  1901  		v3.AddArg(v1)
  1902  		v.AddArg3(v0, v2, v3)
  1903  		return true
  1904  	}
  1905  }
  1906  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1907  	v_1 := v.Args[1]
  1908  	v_0 := v.Args[0]
  1909  	b := v.Block
  1910  	typ := &b.Func.Config.Types
  1911  	// match: (Lsh32x16 <t> x y)
  1912  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1913  	for {
  1914  		t := v.Type
  1915  		x := v_0
  1916  		y := v_1
  1917  		v.reset(OpMIPSCMOVZ)
  1918  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1919  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1920  		v1.AddArg(y)
  1921  		v0.AddArg2(x, v1)
  1922  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1923  		v2.AuxInt = int32ToAuxInt(0)
  1924  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1925  		v3.AuxInt = int32ToAuxInt(32)
  1926  		v3.AddArg(v1)
  1927  		v.AddArg3(v0, v2, v3)
  1928  		return true
  1929  	}
  1930  }
  1931  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1932  	v_1 := v.Args[1]
  1933  	v_0 := v.Args[0]
  1934  	b := v.Block
  1935  	typ := &b.Func.Config.Types
  1936  	// match: (Lsh32x32 <t> x y)
  1937  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1938  	for {
  1939  		t := v.Type
  1940  		x := v_0
  1941  		y := v_1
  1942  		v.reset(OpMIPSCMOVZ)
  1943  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1944  		v0.AddArg2(x, y)
  1945  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1946  		v1.AuxInt = int32ToAuxInt(0)
  1947  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1948  		v2.AuxInt = int32ToAuxInt(32)
  1949  		v2.AddArg(y)
  1950  		v.AddArg3(v0, v1, v2)
  1951  		return true
  1952  	}
  1953  }
  1954  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1955  	v_1 := v.Args[1]
  1956  	v_0 := v.Args[0]
  1957  	// match: (Lsh32x64 x (Const64 [c]))
  1958  	// cond: uint32(c) < 32
  1959  	// result: (SLLconst x [int32(c)])
  1960  	for {
  1961  		x := v_0
  1962  		if v_1.Op != OpConst64 {
  1963  			break
  1964  		}
  1965  		c := auxIntToInt64(v_1.AuxInt)
  1966  		if !(uint32(c) < 32) {
  1967  			break
  1968  		}
  1969  		v.reset(OpMIPSSLLconst)
  1970  		v.AuxInt = int32ToAuxInt(int32(c))
  1971  		v.AddArg(x)
  1972  		return true
  1973  	}
  1974  	// match: (Lsh32x64 _ (Const64 [c]))
  1975  	// cond: uint32(c) >= 32
  1976  	// result: (MOVWconst [0])
  1977  	for {
  1978  		if v_1.Op != OpConst64 {
  1979  			break
  1980  		}
  1981  		c := auxIntToInt64(v_1.AuxInt)
  1982  		if !(uint32(c) >= 32) {
  1983  			break
  1984  		}
  1985  		v.reset(OpMIPSMOVWconst)
  1986  		v.AuxInt = int32ToAuxInt(0)
  1987  		return true
  1988  	}
  1989  	return false
  1990  }
  1991  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1992  	v_1 := v.Args[1]
  1993  	v_0 := v.Args[0]
  1994  	b := v.Block
  1995  	typ := &b.Func.Config.Types
  1996  	// match: (Lsh32x8 <t> x y)
  1997  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1998  	for {
  1999  		t := v.Type
  2000  		x := v_0
  2001  		y := v_1
  2002  		v.reset(OpMIPSCMOVZ)
  2003  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2004  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2005  		v1.AddArg(y)
  2006  		v0.AddArg2(x, v1)
  2007  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2008  		v2.AuxInt = int32ToAuxInt(0)
  2009  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2010  		v3.AuxInt = int32ToAuxInt(32)
  2011  		v3.AddArg(v1)
  2012  		v.AddArg3(v0, v2, v3)
  2013  		return true
  2014  	}
  2015  }
  2016  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  2017  	v_1 := v.Args[1]
  2018  	v_0 := v.Args[0]
  2019  	b := v.Block
  2020  	typ := &b.Func.Config.Types
  2021  	// match: (Lsh8x16 <t> x y)
  2022  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2023  	for {
  2024  		t := v.Type
  2025  		x := v_0
  2026  		y := v_1
  2027  		v.reset(OpMIPSCMOVZ)
  2028  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2029  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2030  		v1.AddArg(y)
  2031  		v0.AddArg2(x, v1)
  2032  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2033  		v2.AuxInt = int32ToAuxInt(0)
  2034  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2035  		v3.AuxInt = int32ToAuxInt(32)
  2036  		v3.AddArg(v1)
  2037  		v.AddArg3(v0, v2, v3)
  2038  		return true
  2039  	}
  2040  }
  2041  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  2042  	v_1 := v.Args[1]
  2043  	v_0 := v.Args[0]
  2044  	b := v.Block
  2045  	typ := &b.Func.Config.Types
  2046  	// match: (Lsh8x32 <t> x y)
  2047  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2048  	for {
  2049  		t := v.Type
  2050  		x := v_0
  2051  		y := v_1
  2052  		v.reset(OpMIPSCMOVZ)
  2053  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2054  		v0.AddArg2(x, y)
  2055  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2056  		v1.AuxInt = int32ToAuxInt(0)
  2057  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2058  		v2.AuxInt = int32ToAuxInt(32)
  2059  		v2.AddArg(y)
  2060  		v.AddArg3(v0, v1, v2)
  2061  		return true
  2062  	}
  2063  }
  2064  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  2065  	v_1 := v.Args[1]
  2066  	v_0 := v.Args[0]
  2067  	// match: (Lsh8x64 x (Const64 [c]))
  2068  	// cond: uint32(c) < 8
  2069  	// result: (SLLconst x [int32(c)])
  2070  	for {
  2071  		x := v_0
  2072  		if v_1.Op != OpConst64 {
  2073  			break
  2074  		}
  2075  		c := auxIntToInt64(v_1.AuxInt)
  2076  		if !(uint32(c) < 8) {
  2077  			break
  2078  		}
  2079  		v.reset(OpMIPSSLLconst)
  2080  		v.AuxInt = int32ToAuxInt(int32(c))
  2081  		v.AddArg(x)
  2082  		return true
  2083  	}
  2084  	// match: (Lsh8x64 _ (Const64 [c]))
  2085  	// cond: uint32(c) >= 8
  2086  	// result: (MOVWconst [0])
  2087  	for {
  2088  		if v_1.Op != OpConst64 {
  2089  			break
  2090  		}
  2091  		c := auxIntToInt64(v_1.AuxInt)
  2092  		if !(uint32(c) >= 8) {
  2093  			break
  2094  		}
  2095  		v.reset(OpMIPSMOVWconst)
  2096  		v.AuxInt = int32ToAuxInt(0)
  2097  		return true
  2098  	}
  2099  	return false
  2100  }
  2101  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  2102  	v_1 := v.Args[1]
  2103  	v_0 := v.Args[0]
  2104  	b := v.Block
  2105  	typ := &b.Func.Config.Types
  2106  	// match: (Lsh8x8 <t> x y)
  2107  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2108  	for {
  2109  		t := v.Type
  2110  		x := v_0
  2111  		y := v_1
  2112  		v.reset(OpMIPSCMOVZ)
  2113  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2114  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2115  		v1.AddArg(y)
  2116  		v0.AddArg2(x, v1)
  2117  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2118  		v2.AuxInt = int32ToAuxInt(0)
  2119  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2120  		v3.AuxInt = int32ToAuxInt(32)
  2121  		v3.AddArg(v1)
  2122  		v.AddArg3(v0, v2, v3)
  2123  		return true
  2124  	}
  2125  }
  2126  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2127  	v_1 := v.Args[1]
  2128  	v_0 := v.Args[0]
  2129  	// match: (ADD x (MOVWconst <t> [c]))
  2130  	// cond: !t.IsPtr()
  2131  	// result: (ADDconst [c] x)
  2132  	for {
  2133  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2134  			x := v_0
  2135  			if v_1.Op != OpMIPSMOVWconst {
  2136  				continue
  2137  			}
  2138  			t := v_1.Type
  2139  			c := auxIntToInt32(v_1.AuxInt)
  2140  			if !(!t.IsPtr()) {
  2141  				continue
  2142  			}
  2143  			v.reset(OpMIPSADDconst)
  2144  			v.AuxInt = int32ToAuxInt(c)
  2145  			v.AddArg(x)
  2146  			return true
  2147  		}
  2148  		break
  2149  	}
  2150  	// match: (ADD x (NEG y))
  2151  	// result: (SUB x y)
  2152  	for {
  2153  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2154  			x := v_0
  2155  			if v_1.Op != OpMIPSNEG {
  2156  				continue
  2157  			}
  2158  			y := v_1.Args[0]
  2159  			v.reset(OpMIPSSUB)
  2160  			v.AddArg2(x, y)
  2161  			return true
  2162  		}
  2163  		break
  2164  	}
  2165  	return false
  2166  }
  2167  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2168  	v_0 := v.Args[0]
  2169  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2170  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2171  	for {
  2172  		off1 := auxIntToInt32(v.AuxInt)
  2173  		if v_0.Op != OpMIPSMOVWaddr {
  2174  			break
  2175  		}
  2176  		off2 := auxIntToInt32(v_0.AuxInt)
  2177  		sym := auxToSym(v_0.Aux)
  2178  		ptr := v_0.Args[0]
  2179  		v.reset(OpMIPSMOVWaddr)
  2180  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2181  		v.Aux = symToAux(sym)
  2182  		v.AddArg(ptr)
  2183  		return true
  2184  	}
  2185  	// match: (ADDconst [0] x)
  2186  	// result: x
  2187  	for {
  2188  		if auxIntToInt32(v.AuxInt) != 0 {
  2189  			break
  2190  		}
  2191  		x := v_0
  2192  		v.copyOf(x)
  2193  		return true
  2194  	}
  2195  	// match: (ADDconst [c] (MOVWconst [d]))
  2196  	// result: (MOVWconst [int32(c+d)])
  2197  	for {
  2198  		c := auxIntToInt32(v.AuxInt)
  2199  		if v_0.Op != OpMIPSMOVWconst {
  2200  			break
  2201  		}
  2202  		d := auxIntToInt32(v_0.AuxInt)
  2203  		v.reset(OpMIPSMOVWconst)
  2204  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2205  		return true
  2206  	}
  2207  	// match: (ADDconst [c] (ADDconst [d] x))
  2208  	// result: (ADDconst [c+d] x)
  2209  	for {
  2210  		c := auxIntToInt32(v.AuxInt)
  2211  		if v_0.Op != OpMIPSADDconst {
  2212  			break
  2213  		}
  2214  		d := auxIntToInt32(v_0.AuxInt)
  2215  		x := v_0.Args[0]
  2216  		v.reset(OpMIPSADDconst)
  2217  		v.AuxInt = int32ToAuxInt(c + d)
  2218  		v.AddArg(x)
  2219  		return true
  2220  	}
  2221  	// match: (ADDconst [c] (SUBconst [d] x))
  2222  	// result: (ADDconst [c-d] x)
  2223  	for {
  2224  		c := auxIntToInt32(v.AuxInt)
  2225  		if v_0.Op != OpMIPSSUBconst {
  2226  			break
  2227  		}
  2228  		d := auxIntToInt32(v_0.AuxInt)
  2229  		x := v_0.Args[0]
  2230  		v.reset(OpMIPSADDconst)
  2231  		v.AuxInt = int32ToAuxInt(c - d)
  2232  		v.AddArg(x)
  2233  		return true
  2234  	}
  2235  	return false
  2236  }
  2237  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2238  	v_1 := v.Args[1]
  2239  	v_0 := v.Args[0]
  2240  	b := v.Block
  2241  	// match: (AND x (MOVWconst [c]))
  2242  	// result: (ANDconst [c] x)
  2243  	for {
  2244  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2245  			x := v_0
  2246  			if v_1.Op != OpMIPSMOVWconst {
  2247  				continue
  2248  			}
  2249  			c := auxIntToInt32(v_1.AuxInt)
  2250  			v.reset(OpMIPSANDconst)
  2251  			v.AuxInt = int32ToAuxInt(c)
  2252  			v.AddArg(x)
  2253  			return true
  2254  		}
  2255  		break
  2256  	}
  2257  	// match: (AND x x)
  2258  	// result: x
  2259  	for {
  2260  		x := v_0
  2261  		if x != v_1 {
  2262  			break
  2263  		}
  2264  		v.copyOf(x)
  2265  		return true
  2266  	}
  2267  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2268  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2269  	for {
  2270  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2271  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2272  				continue
  2273  			}
  2274  			x := v_0.Args[0]
  2275  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2276  				continue
  2277  			}
  2278  			y := v_1.Args[0]
  2279  			v.reset(OpMIPSSGTUconst)
  2280  			v.AuxInt = int32ToAuxInt(1)
  2281  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2282  			v0.AddArg2(x, y)
  2283  			v.AddArg(v0)
  2284  			return true
  2285  		}
  2286  		break
  2287  	}
  2288  	return false
  2289  }
  2290  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2291  	v_0 := v.Args[0]
  2292  	// match: (ANDconst [0] _)
  2293  	// result: (MOVWconst [0])
  2294  	for {
  2295  		if auxIntToInt32(v.AuxInt) != 0 {
  2296  			break
  2297  		}
  2298  		v.reset(OpMIPSMOVWconst)
  2299  		v.AuxInt = int32ToAuxInt(0)
  2300  		return true
  2301  	}
  2302  	// match: (ANDconst [-1] x)
  2303  	// result: x
  2304  	for {
  2305  		if auxIntToInt32(v.AuxInt) != -1 {
  2306  			break
  2307  		}
  2308  		x := v_0
  2309  		v.copyOf(x)
  2310  		return true
  2311  	}
  2312  	// match: (ANDconst [c] (MOVWconst [d]))
  2313  	// result: (MOVWconst [c&d])
  2314  	for {
  2315  		c := auxIntToInt32(v.AuxInt)
  2316  		if v_0.Op != OpMIPSMOVWconst {
  2317  			break
  2318  		}
  2319  		d := auxIntToInt32(v_0.AuxInt)
  2320  		v.reset(OpMIPSMOVWconst)
  2321  		v.AuxInt = int32ToAuxInt(c & d)
  2322  		return true
  2323  	}
  2324  	// match: (ANDconst [c] (ANDconst [d] x))
  2325  	// result: (ANDconst [c&d] x)
  2326  	for {
  2327  		c := auxIntToInt32(v.AuxInt)
  2328  		if v_0.Op != OpMIPSANDconst {
  2329  			break
  2330  		}
  2331  		d := auxIntToInt32(v_0.AuxInt)
  2332  		x := v_0.Args[0]
  2333  		v.reset(OpMIPSANDconst)
  2334  		v.AuxInt = int32ToAuxInt(c & d)
  2335  		v.AddArg(x)
  2336  		return true
  2337  	}
  2338  	return false
  2339  }
  2340  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2341  	v_2 := v.Args[2]
  2342  	v_1 := v.Args[1]
  2343  	v_0 := v.Args[0]
  2344  	// match: (CMOVZ _ f (MOVWconst [0]))
  2345  	// result: f
  2346  	for {
  2347  		f := v_1
  2348  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2349  			break
  2350  		}
  2351  		v.copyOf(f)
  2352  		return true
  2353  	}
  2354  	// match: (CMOVZ a _ (MOVWconst [c]))
  2355  	// cond: c!=0
  2356  	// result: a
  2357  	for {
  2358  		a := v_0
  2359  		if v_2.Op != OpMIPSMOVWconst {
  2360  			break
  2361  		}
  2362  		c := auxIntToInt32(v_2.AuxInt)
  2363  		if !(c != 0) {
  2364  			break
  2365  		}
  2366  		v.copyOf(a)
  2367  		return true
  2368  	}
  2369  	// match: (CMOVZ a (MOVWconst [0]) c)
  2370  	// result: (CMOVZzero a c)
  2371  	for {
  2372  		a := v_0
  2373  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2374  			break
  2375  		}
  2376  		c := v_2
  2377  		v.reset(OpMIPSCMOVZzero)
  2378  		v.AddArg2(a, c)
  2379  		return true
  2380  	}
  2381  	return false
  2382  }
  2383  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2384  	v_1 := v.Args[1]
  2385  	v_0 := v.Args[0]
  2386  	// match: (CMOVZzero _ (MOVWconst [0]))
  2387  	// result: (MOVWconst [0])
  2388  	for {
  2389  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2390  			break
  2391  		}
  2392  		v.reset(OpMIPSMOVWconst)
  2393  		v.AuxInt = int32ToAuxInt(0)
  2394  		return true
  2395  	}
  2396  	// match: (CMOVZzero a (MOVWconst [c]))
  2397  	// cond: c!=0
  2398  	// result: a
  2399  	for {
  2400  		a := v_0
  2401  		if v_1.Op != OpMIPSMOVWconst {
  2402  			break
  2403  		}
  2404  		c := auxIntToInt32(v_1.AuxInt)
  2405  		if !(c != 0) {
  2406  			break
  2407  		}
  2408  		v.copyOf(a)
  2409  		return true
  2410  	}
  2411  	return false
  2412  }
  2413  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2414  	v_2 := v.Args[2]
  2415  	v_1 := v.Args[1]
  2416  	v_0 := v.Args[0]
  2417  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2418  	// cond: is16Bit(int64(c))
  2419  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2420  	for {
  2421  		ptr := v_0
  2422  		if v_1.Op != OpMIPSMOVWconst {
  2423  			break
  2424  		}
  2425  		c := auxIntToInt32(v_1.AuxInt)
  2426  		mem := v_2
  2427  		if !(is16Bit(int64(c))) {
  2428  			break
  2429  		}
  2430  		v.reset(OpMIPSLoweredAtomicAddconst)
  2431  		v.AuxInt = int32ToAuxInt(c)
  2432  		v.AddArg2(ptr, mem)
  2433  		return true
  2434  	}
  2435  	return false
  2436  }
  2437  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2438  	v_2 := v.Args[2]
  2439  	v_1 := v.Args[1]
  2440  	v_0 := v.Args[0]
  2441  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2442  	// result: (LoweredAtomicStorezero ptr mem)
  2443  	for {
  2444  		ptr := v_0
  2445  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2446  			break
  2447  		}
  2448  		mem := v_2
  2449  		v.reset(OpMIPSLoweredAtomicStorezero)
  2450  		v.AddArg2(ptr, mem)
  2451  		return true
  2452  	}
  2453  	return false
  2454  }
  2455  func rewriteValueMIPS_OpMIPSLoweredPanicBoundsRC(v *Value) bool {
  2456  	v_1 := v.Args[1]
  2457  	v_0 := v.Args[0]
  2458  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVWconst [c]) mem)
  2459  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:int64(c), Cy:p.C}} mem)
  2460  	for {
  2461  		kind := auxIntToInt64(v.AuxInt)
  2462  		p := auxToPanicBoundsC(v.Aux)
  2463  		if v_0.Op != OpMIPSMOVWconst {
  2464  			break
  2465  		}
  2466  		c := auxIntToInt32(v_0.AuxInt)
  2467  		mem := v_1
  2468  		v.reset(OpMIPSLoweredPanicBoundsCC)
  2469  		v.AuxInt = int64ToAuxInt(kind)
  2470  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: int64(c), Cy: p.C})
  2471  		v.AddArg(mem)
  2472  		return true
  2473  	}
  2474  	return false
  2475  }
  2476  func rewriteValueMIPS_OpMIPSLoweredPanicBoundsRR(v *Value) bool {
  2477  	v_2 := v.Args[2]
  2478  	v_1 := v.Args[1]
  2479  	v_0 := v.Args[0]
  2480  	// match: (LoweredPanicBoundsRR [kind] x (MOVWconst [c]) mem)
  2481  	// result: (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:int64(c)}} mem)
  2482  	for {
  2483  		kind := auxIntToInt64(v.AuxInt)
  2484  		x := v_0
  2485  		if v_1.Op != OpMIPSMOVWconst {
  2486  			break
  2487  		}
  2488  		c := auxIntToInt32(v_1.AuxInt)
  2489  		mem := v_2
  2490  		v.reset(OpMIPSLoweredPanicBoundsRC)
  2491  		v.AuxInt = int64ToAuxInt(kind)
  2492  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2493  		v.AddArg2(x, mem)
  2494  		return true
  2495  	}
  2496  	// match: (LoweredPanicBoundsRR [kind] (MOVWconst [c]) y mem)
  2497  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:int64(c)}} y mem)
  2498  	for {
  2499  		kind := auxIntToInt64(v.AuxInt)
  2500  		if v_0.Op != OpMIPSMOVWconst {
  2501  			break
  2502  		}
  2503  		c := auxIntToInt32(v_0.AuxInt)
  2504  		y := v_1
  2505  		mem := v_2
  2506  		v.reset(OpMIPSLoweredPanicBoundsCR)
  2507  		v.AuxInt = int64ToAuxInt(kind)
  2508  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2509  		v.AddArg2(y, mem)
  2510  		return true
  2511  	}
  2512  	return false
  2513  }
  2514  func rewriteValueMIPS_OpMIPSLoweredPanicExtendRC(v *Value) bool {
  2515  	v_2 := v.Args[2]
  2516  	v_1 := v.Args[1]
  2517  	v_0 := v.Args[0]
  2518  	// match: (LoweredPanicExtendRC [kind] {p} (MOVWconst [hi]) (MOVWconst [lo]) mem)
  2519  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:int64(hi)<<32+int64(uint32(lo)), Cy:p.C}} mem)
  2520  	for {
  2521  		kind := auxIntToInt64(v.AuxInt)
  2522  		p := auxToPanicBoundsC(v.Aux)
  2523  		if v_0.Op != OpMIPSMOVWconst {
  2524  			break
  2525  		}
  2526  		hi := auxIntToInt32(v_0.AuxInt)
  2527  		if v_1.Op != OpMIPSMOVWconst {
  2528  			break
  2529  		}
  2530  		lo := auxIntToInt32(v_1.AuxInt)
  2531  		mem := v_2
  2532  		v.reset(OpMIPSLoweredPanicBoundsCC)
  2533  		v.AuxInt = int64ToAuxInt(kind)
  2534  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: int64(hi)<<32 + int64(uint32(lo)), Cy: p.C})
  2535  		v.AddArg(mem)
  2536  		return true
  2537  	}
  2538  	return false
  2539  }
  2540  func rewriteValueMIPS_OpMIPSLoweredPanicExtendRR(v *Value) bool {
  2541  	v_3 := v.Args[3]
  2542  	v_2 := v.Args[2]
  2543  	v_1 := v.Args[1]
  2544  	v_0 := v.Args[0]
  2545  	// match: (LoweredPanicExtendRR [kind] hi lo (MOVWconst [c]) mem)
  2546  	// result: (LoweredPanicExtendRC [kind] hi lo {PanicBoundsC{C:int64(c)}} mem)
  2547  	for {
  2548  		kind := auxIntToInt64(v.AuxInt)
  2549  		hi := v_0
  2550  		lo := v_1
  2551  		if v_2.Op != OpMIPSMOVWconst {
  2552  			break
  2553  		}
  2554  		c := auxIntToInt32(v_2.AuxInt)
  2555  		mem := v_3
  2556  		v.reset(OpMIPSLoweredPanicExtendRC)
  2557  		v.AuxInt = int64ToAuxInt(kind)
  2558  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2559  		v.AddArg3(hi, lo, mem)
  2560  		return true
  2561  	}
  2562  	// match: (LoweredPanicExtendRR [kind] (MOVWconst [hi]) (MOVWconst [lo]) y mem)
  2563  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:int64(hi)<<32 + int64(uint32(lo))}} y mem)
  2564  	for {
  2565  		kind := auxIntToInt64(v.AuxInt)
  2566  		if v_0.Op != OpMIPSMOVWconst {
  2567  			break
  2568  		}
  2569  		hi := auxIntToInt32(v_0.AuxInt)
  2570  		if v_1.Op != OpMIPSMOVWconst {
  2571  			break
  2572  		}
  2573  		lo := auxIntToInt32(v_1.AuxInt)
  2574  		y := v_2
  2575  		mem := v_3
  2576  		v.reset(OpMIPSLoweredPanicBoundsCR)
  2577  		v.AuxInt = int64ToAuxInt(kind)
  2578  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(hi)<<32 + int64(uint32(lo))})
  2579  		v.AddArg2(y, mem)
  2580  		return true
  2581  	}
  2582  	return false
  2583  }
  2584  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2585  	v_1 := v.Args[1]
  2586  	v_0 := v.Args[0]
  2587  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2588  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2589  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2590  	for {
  2591  		off1 := auxIntToInt32(v.AuxInt)
  2592  		sym := auxToSym(v.Aux)
  2593  		x := v_0
  2594  		if x.Op != OpMIPSADDconst {
  2595  			break
  2596  		}
  2597  		off2 := auxIntToInt32(x.AuxInt)
  2598  		ptr := x.Args[0]
  2599  		mem := v_1
  2600  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2601  			break
  2602  		}
  2603  		v.reset(OpMIPSMOVBUload)
  2604  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2605  		v.Aux = symToAux(sym)
  2606  		v.AddArg2(ptr, mem)
  2607  		return true
  2608  	}
  2609  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2610  	// cond: canMergeSym(sym1,sym2)
  2611  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2612  	for {
  2613  		off1 := auxIntToInt32(v.AuxInt)
  2614  		sym1 := auxToSym(v.Aux)
  2615  		if v_0.Op != OpMIPSMOVWaddr {
  2616  			break
  2617  		}
  2618  		off2 := auxIntToInt32(v_0.AuxInt)
  2619  		sym2 := auxToSym(v_0.Aux)
  2620  		ptr := v_0.Args[0]
  2621  		mem := v_1
  2622  		if !(canMergeSym(sym1, sym2)) {
  2623  			break
  2624  		}
  2625  		v.reset(OpMIPSMOVBUload)
  2626  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2627  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2628  		v.AddArg2(ptr, mem)
  2629  		return true
  2630  	}
  2631  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2632  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2633  	// result: (MOVBUreg x)
  2634  	for {
  2635  		off := auxIntToInt32(v.AuxInt)
  2636  		sym := auxToSym(v.Aux)
  2637  		ptr := v_0
  2638  		if v_1.Op != OpMIPSMOVBstore {
  2639  			break
  2640  		}
  2641  		off2 := auxIntToInt32(v_1.AuxInt)
  2642  		sym2 := auxToSym(v_1.Aux)
  2643  		x := v_1.Args[1]
  2644  		ptr2 := v_1.Args[0]
  2645  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2646  			break
  2647  		}
  2648  		v.reset(OpMIPSMOVBUreg)
  2649  		v.AddArg(x)
  2650  		return true
  2651  	}
  2652  	return false
  2653  }
  2654  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2655  	v_0 := v.Args[0]
  2656  	b := v.Block
  2657  	// match: (MOVBUreg x:(MOVBUload _ _))
  2658  	// result: (MOVWreg x)
  2659  	for {
  2660  		x := v_0
  2661  		if x.Op != OpMIPSMOVBUload {
  2662  			break
  2663  		}
  2664  		v.reset(OpMIPSMOVWreg)
  2665  		v.AddArg(x)
  2666  		return true
  2667  	}
  2668  	// match: (MOVBUreg x:(MOVBUreg _))
  2669  	// result: (MOVWreg x)
  2670  	for {
  2671  		x := v_0
  2672  		if x.Op != OpMIPSMOVBUreg {
  2673  			break
  2674  		}
  2675  		v.reset(OpMIPSMOVWreg)
  2676  		v.AddArg(x)
  2677  		return true
  2678  	}
  2679  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2680  	// cond: x.Uses == 1 && clobber(x)
  2681  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2682  	for {
  2683  		t := v.Type
  2684  		x := v_0
  2685  		if x.Op != OpMIPSMOVBload {
  2686  			break
  2687  		}
  2688  		off := auxIntToInt32(x.AuxInt)
  2689  		sym := auxToSym(x.Aux)
  2690  		mem := x.Args[1]
  2691  		ptr := x.Args[0]
  2692  		if !(x.Uses == 1 && clobber(x)) {
  2693  			break
  2694  		}
  2695  		b = x.Block
  2696  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2697  		v.copyOf(v0)
  2698  		v0.AuxInt = int32ToAuxInt(off)
  2699  		v0.Aux = symToAux(sym)
  2700  		v0.AddArg2(ptr, mem)
  2701  		return true
  2702  	}
  2703  	// match: (MOVBUreg (ANDconst [c] x))
  2704  	// result: (ANDconst [c&0xff] x)
  2705  	for {
  2706  		if v_0.Op != OpMIPSANDconst {
  2707  			break
  2708  		}
  2709  		c := auxIntToInt32(v_0.AuxInt)
  2710  		x := v_0.Args[0]
  2711  		v.reset(OpMIPSANDconst)
  2712  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2713  		v.AddArg(x)
  2714  		return true
  2715  	}
  2716  	// match: (MOVBUreg (MOVWconst [c]))
  2717  	// result: (MOVWconst [int32(uint8(c))])
  2718  	for {
  2719  		if v_0.Op != OpMIPSMOVWconst {
  2720  			break
  2721  		}
  2722  		c := auxIntToInt32(v_0.AuxInt)
  2723  		v.reset(OpMIPSMOVWconst)
  2724  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2725  		return true
  2726  	}
  2727  	return false
  2728  }
  2729  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2730  	v_1 := v.Args[1]
  2731  	v_0 := v.Args[0]
  2732  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2733  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2734  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2735  	for {
  2736  		off1 := auxIntToInt32(v.AuxInt)
  2737  		sym := auxToSym(v.Aux)
  2738  		x := v_0
  2739  		if x.Op != OpMIPSADDconst {
  2740  			break
  2741  		}
  2742  		off2 := auxIntToInt32(x.AuxInt)
  2743  		ptr := x.Args[0]
  2744  		mem := v_1
  2745  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2746  			break
  2747  		}
  2748  		v.reset(OpMIPSMOVBload)
  2749  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2750  		v.Aux = symToAux(sym)
  2751  		v.AddArg2(ptr, mem)
  2752  		return true
  2753  	}
  2754  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2755  	// cond: canMergeSym(sym1,sym2)
  2756  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2757  	for {
  2758  		off1 := auxIntToInt32(v.AuxInt)
  2759  		sym1 := auxToSym(v.Aux)
  2760  		if v_0.Op != OpMIPSMOVWaddr {
  2761  			break
  2762  		}
  2763  		off2 := auxIntToInt32(v_0.AuxInt)
  2764  		sym2 := auxToSym(v_0.Aux)
  2765  		ptr := v_0.Args[0]
  2766  		mem := v_1
  2767  		if !(canMergeSym(sym1, sym2)) {
  2768  			break
  2769  		}
  2770  		v.reset(OpMIPSMOVBload)
  2771  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2772  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2773  		v.AddArg2(ptr, mem)
  2774  		return true
  2775  	}
  2776  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2777  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2778  	// result: (MOVBreg x)
  2779  	for {
  2780  		off := auxIntToInt32(v.AuxInt)
  2781  		sym := auxToSym(v.Aux)
  2782  		ptr := v_0
  2783  		if v_1.Op != OpMIPSMOVBstore {
  2784  			break
  2785  		}
  2786  		off2 := auxIntToInt32(v_1.AuxInt)
  2787  		sym2 := auxToSym(v_1.Aux)
  2788  		x := v_1.Args[1]
  2789  		ptr2 := v_1.Args[0]
  2790  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2791  			break
  2792  		}
  2793  		v.reset(OpMIPSMOVBreg)
  2794  		v.AddArg(x)
  2795  		return true
  2796  	}
  2797  	return false
  2798  }
  2799  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2800  	v_0 := v.Args[0]
  2801  	b := v.Block
  2802  	// match: (MOVBreg x:(MOVBload _ _))
  2803  	// result: (MOVWreg x)
  2804  	for {
  2805  		x := v_0
  2806  		if x.Op != OpMIPSMOVBload {
  2807  			break
  2808  		}
  2809  		v.reset(OpMIPSMOVWreg)
  2810  		v.AddArg(x)
  2811  		return true
  2812  	}
  2813  	// match: (MOVBreg x:(MOVBreg _))
  2814  	// result: (MOVWreg x)
  2815  	for {
  2816  		x := v_0
  2817  		if x.Op != OpMIPSMOVBreg {
  2818  			break
  2819  		}
  2820  		v.reset(OpMIPSMOVWreg)
  2821  		v.AddArg(x)
  2822  		return true
  2823  	}
  2824  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2825  	// cond: x.Uses == 1 && clobber(x)
  2826  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2827  	for {
  2828  		t := v.Type
  2829  		x := v_0
  2830  		if x.Op != OpMIPSMOVBUload {
  2831  			break
  2832  		}
  2833  		off := auxIntToInt32(x.AuxInt)
  2834  		sym := auxToSym(x.Aux)
  2835  		mem := x.Args[1]
  2836  		ptr := x.Args[0]
  2837  		if !(x.Uses == 1 && clobber(x)) {
  2838  			break
  2839  		}
  2840  		b = x.Block
  2841  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2842  		v.copyOf(v0)
  2843  		v0.AuxInt = int32ToAuxInt(off)
  2844  		v0.Aux = symToAux(sym)
  2845  		v0.AddArg2(ptr, mem)
  2846  		return true
  2847  	}
  2848  	// match: (MOVBreg (ANDconst [c] x))
  2849  	// cond: c & 0x80 == 0
  2850  	// result: (ANDconst [c&0x7f] x)
  2851  	for {
  2852  		if v_0.Op != OpMIPSANDconst {
  2853  			break
  2854  		}
  2855  		c := auxIntToInt32(v_0.AuxInt)
  2856  		x := v_0.Args[0]
  2857  		if !(c&0x80 == 0) {
  2858  			break
  2859  		}
  2860  		v.reset(OpMIPSANDconst)
  2861  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2862  		v.AddArg(x)
  2863  		return true
  2864  	}
  2865  	// match: (MOVBreg (MOVWconst [c]))
  2866  	// result: (MOVWconst [int32(int8(c))])
  2867  	for {
  2868  		if v_0.Op != OpMIPSMOVWconst {
  2869  			break
  2870  		}
  2871  		c := auxIntToInt32(v_0.AuxInt)
  2872  		v.reset(OpMIPSMOVWconst)
  2873  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2874  		return true
  2875  	}
  2876  	return false
  2877  }
  2878  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2879  	v_2 := v.Args[2]
  2880  	v_1 := v.Args[1]
  2881  	v_0 := v.Args[0]
  2882  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2883  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2884  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2885  	for {
  2886  		off1 := auxIntToInt32(v.AuxInt)
  2887  		sym := auxToSym(v.Aux)
  2888  		x := v_0
  2889  		if x.Op != OpMIPSADDconst {
  2890  			break
  2891  		}
  2892  		off2 := auxIntToInt32(x.AuxInt)
  2893  		ptr := x.Args[0]
  2894  		val := v_1
  2895  		mem := v_2
  2896  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2897  			break
  2898  		}
  2899  		v.reset(OpMIPSMOVBstore)
  2900  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2901  		v.Aux = symToAux(sym)
  2902  		v.AddArg3(ptr, val, mem)
  2903  		return true
  2904  	}
  2905  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2906  	// cond: canMergeSym(sym1,sym2)
  2907  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2908  	for {
  2909  		off1 := auxIntToInt32(v.AuxInt)
  2910  		sym1 := auxToSym(v.Aux)
  2911  		if v_0.Op != OpMIPSMOVWaddr {
  2912  			break
  2913  		}
  2914  		off2 := auxIntToInt32(v_0.AuxInt)
  2915  		sym2 := auxToSym(v_0.Aux)
  2916  		ptr := v_0.Args[0]
  2917  		val := v_1
  2918  		mem := v_2
  2919  		if !(canMergeSym(sym1, sym2)) {
  2920  			break
  2921  		}
  2922  		v.reset(OpMIPSMOVBstore)
  2923  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2924  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2925  		v.AddArg3(ptr, val, mem)
  2926  		return true
  2927  	}
  2928  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2929  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2930  	for {
  2931  		off := auxIntToInt32(v.AuxInt)
  2932  		sym := auxToSym(v.Aux)
  2933  		ptr := v_0
  2934  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2935  			break
  2936  		}
  2937  		mem := v_2
  2938  		v.reset(OpMIPSMOVBstorezero)
  2939  		v.AuxInt = int32ToAuxInt(off)
  2940  		v.Aux = symToAux(sym)
  2941  		v.AddArg2(ptr, mem)
  2942  		return true
  2943  	}
  2944  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2945  	// result: (MOVBstore [off] {sym} ptr x mem)
  2946  	for {
  2947  		off := auxIntToInt32(v.AuxInt)
  2948  		sym := auxToSym(v.Aux)
  2949  		ptr := v_0
  2950  		if v_1.Op != OpMIPSMOVBreg {
  2951  			break
  2952  		}
  2953  		x := v_1.Args[0]
  2954  		mem := v_2
  2955  		v.reset(OpMIPSMOVBstore)
  2956  		v.AuxInt = int32ToAuxInt(off)
  2957  		v.Aux = symToAux(sym)
  2958  		v.AddArg3(ptr, x, mem)
  2959  		return true
  2960  	}
  2961  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2962  	// result: (MOVBstore [off] {sym} ptr x mem)
  2963  	for {
  2964  		off := auxIntToInt32(v.AuxInt)
  2965  		sym := auxToSym(v.Aux)
  2966  		ptr := v_0
  2967  		if v_1.Op != OpMIPSMOVBUreg {
  2968  			break
  2969  		}
  2970  		x := v_1.Args[0]
  2971  		mem := v_2
  2972  		v.reset(OpMIPSMOVBstore)
  2973  		v.AuxInt = int32ToAuxInt(off)
  2974  		v.Aux = symToAux(sym)
  2975  		v.AddArg3(ptr, x, mem)
  2976  		return true
  2977  	}
  2978  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2979  	// result: (MOVBstore [off] {sym} ptr x mem)
  2980  	for {
  2981  		off := auxIntToInt32(v.AuxInt)
  2982  		sym := auxToSym(v.Aux)
  2983  		ptr := v_0
  2984  		if v_1.Op != OpMIPSMOVHreg {
  2985  			break
  2986  		}
  2987  		x := v_1.Args[0]
  2988  		mem := v_2
  2989  		v.reset(OpMIPSMOVBstore)
  2990  		v.AuxInt = int32ToAuxInt(off)
  2991  		v.Aux = symToAux(sym)
  2992  		v.AddArg3(ptr, x, mem)
  2993  		return true
  2994  	}
  2995  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2996  	// result: (MOVBstore [off] {sym} ptr x mem)
  2997  	for {
  2998  		off := auxIntToInt32(v.AuxInt)
  2999  		sym := auxToSym(v.Aux)
  3000  		ptr := v_0
  3001  		if v_1.Op != OpMIPSMOVHUreg {
  3002  			break
  3003  		}
  3004  		x := v_1.Args[0]
  3005  		mem := v_2
  3006  		v.reset(OpMIPSMOVBstore)
  3007  		v.AuxInt = int32ToAuxInt(off)
  3008  		v.Aux = symToAux(sym)
  3009  		v.AddArg3(ptr, x, mem)
  3010  		return true
  3011  	}
  3012  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3013  	// result: (MOVBstore [off] {sym} ptr x mem)
  3014  	for {
  3015  		off := auxIntToInt32(v.AuxInt)
  3016  		sym := auxToSym(v.Aux)
  3017  		ptr := v_0
  3018  		if v_1.Op != OpMIPSMOVWreg {
  3019  			break
  3020  		}
  3021  		x := v_1.Args[0]
  3022  		mem := v_2
  3023  		v.reset(OpMIPSMOVBstore)
  3024  		v.AuxInt = int32ToAuxInt(off)
  3025  		v.Aux = symToAux(sym)
  3026  		v.AddArg3(ptr, x, mem)
  3027  		return true
  3028  	}
  3029  	return false
  3030  }
  3031  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  3032  	v_1 := v.Args[1]
  3033  	v_0 := v.Args[0]
  3034  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3035  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3036  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  3037  	for {
  3038  		off1 := auxIntToInt32(v.AuxInt)
  3039  		sym := auxToSym(v.Aux)
  3040  		x := v_0
  3041  		if x.Op != OpMIPSADDconst {
  3042  			break
  3043  		}
  3044  		off2 := auxIntToInt32(x.AuxInt)
  3045  		ptr := x.Args[0]
  3046  		mem := v_1
  3047  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3048  			break
  3049  		}
  3050  		v.reset(OpMIPSMOVBstorezero)
  3051  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3052  		v.Aux = symToAux(sym)
  3053  		v.AddArg2(ptr, mem)
  3054  		return true
  3055  	}
  3056  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3057  	// cond: canMergeSym(sym1,sym2)
  3058  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3059  	for {
  3060  		off1 := auxIntToInt32(v.AuxInt)
  3061  		sym1 := auxToSym(v.Aux)
  3062  		if v_0.Op != OpMIPSMOVWaddr {
  3063  			break
  3064  		}
  3065  		off2 := auxIntToInt32(v_0.AuxInt)
  3066  		sym2 := auxToSym(v_0.Aux)
  3067  		ptr := v_0.Args[0]
  3068  		mem := v_1
  3069  		if !(canMergeSym(sym1, sym2)) {
  3070  			break
  3071  		}
  3072  		v.reset(OpMIPSMOVBstorezero)
  3073  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3074  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3075  		v.AddArg2(ptr, mem)
  3076  		return true
  3077  	}
  3078  	return false
  3079  }
  3080  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  3081  	v_1 := v.Args[1]
  3082  	v_0 := v.Args[0]
  3083  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3084  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3085  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  3086  	for {
  3087  		off1 := auxIntToInt32(v.AuxInt)
  3088  		sym := auxToSym(v.Aux)
  3089  		x := v_0
  3090  		if x.Op != OpMIPSADDconst {
  3091  			break
  3092  		}
  3093  		off2 := auxIntToInt32(x.AuxInt)
  3094  		ptr := x.Args[0]
  3095  		mem := v_1
  3096  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3097  			break
  3098  		}
  3099  		v.reset(OpMIPSMOVDload)
  3100  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3101  		v.Aux = symToAux(sym)
  3102  		v.AddArg2(ptr, mem)
  3103  		return true
  3104  	}
  3105  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3106  	// cond: canMergeSym(sym1,sym2)
  3107  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3108  	for {
  3109  		off1 := auxIntToInt32(v.AuxInt)
  3110  		sym1 := auxToSym(v.Aux)
  3111  		if v_0.Op != OpMIPSMOVWaddr {
  3112  			break
  3113  		}
  3114  		off2 := auxIntToInt32(v_0.AuxInt)
  3115  		sym2 := auxToSym(v_0.Aux)
  3116  		ptr := v_0.Args[0]
  3117  		mem := v_1
  3118  		if !(canMergeSym(sym1, sym2)) {
  3119  			break
  3120  		}
  3121  		v.reset(OpMIPSMOVDload)
  3122  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3123  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3124  		v.AddArg2(ptr, mem)
  3125  		return true
  3126  	}
  3127  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  3128  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3129  	// result: x
  3130  	for {
  3131  		off := auxIntToInt32(v.AuxInt)
  3132  		sym := auxToSym(v.Aux)
  3133  		ptr := v_0
  3134  		if v_1.Op != OpMIPSMOVDstore {
  3135  			break
  3136  		}
  3137  		off2 := auxIntToInt32(v_1.AuxInt)
  3138  		sym2 := auxToSym(v_1.Aux)
  3139  		x := v_1.Args[1]
  3140  		ptr2 := v_1.Args[0]
  3141  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3142  			break
  3143  		}
  3144  		v.copyOf(x)
  3145  		return true
  3146  	}
  3147  	return false
  3148  }
  3149  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  3150  	v_2 := v.Args[2]
  3151  	v_1 := v.Args[1]
  3152  	v_0 := v.Args[0]
  3153  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3154  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3155  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  3156  	for {
  3157  		off1 := auxIntToInt32(v.AuxInt)
  3158  		sym := auxToSym(v.Aux)
  3159  		x := v_0
  3160  		if x.Op != OpMIPSADDconst {
  3161  			break
  3162  		}
  3163  		off2 := auxIntToInt32(x.AuxInt)
  3164  		ptr := x.Args[0]
  3165  		val := v_1
  3166  		mem := v_2
  3167  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3168  			break
  3169  		}
  3170  		v.reset(OpMIPSMOVDstore)
  3171  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3172  		v.Aux = symToAux(sym)
  3173  		v.AddArg3(ptr, val, mem)
  3174  		return true
  3175  	}
  3176  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3177  	// cond: canMergeSym(sym1,sym2)
  3178  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3179  	for {
  3180  		off1 := auxIntToInt32(v.AuxInt)
  3181  		sym1 := auxToSym(v.Aux)
  3182  		if v_0.Op != OpMIPSMOVWaddr {
  3183  			break
  3184  		}
  3185  		off2 := auxIntToInt32(v_0.AuxInt)
  3186  		sym2 := auxToSym(v_0.Aux)
  3187  		ptr := v_0.Args[0]
  3188  		val := v_1
  3189  		mem := v_2
  3190  		if !(canMergeSym(sym1, sym2)) {
  3191  			break
  3192  		}
  3193  		v.reset(OpMIPSMOVDstore)
  3194  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3195  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3196  		v.AddArg3(ptr, val, mem)
  3197  		return true
  3198  	}
  3199  	return false
  3200  }
  3201  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  3202  	v_1 := v.Args[1]
  3203  	v_0 := v.Args[0]
  3204  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3205  	// result: (MOVWgpfp val)
  3206  	for {
  3207  		off := auxIntToInt32(v.AuxInt)
  3208  		sym := auxToSym(v.Aux)
  3209  		ptr := v_0
  3210  		if v_1.Op != OpMIPSMOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3211  			break
  3212  		}
  3213  		val := v_1.Args[1]
  3214  		if ptr != v_1.Args[0] {
  3215  			break
  3216  		}
  3217  		v.reset(OpMIPSMOVWgpfp)
  3218  		v.AddArg(val)
  3219  		return true
  3220  	}
  3221  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3222  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3223  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  3224  	for {
  3225  		off1 := auxIntToInt32(v.AuxInt)
  3226  		sym := auxToSym(v.Aux)
  3227  		x := v_0
  3228  		if x.Op != OpMIPSADDconst {
  3229  			break
  3230  		}
  3231  		off2 := auxIntToInt32(x.AuxInt)
  3232  		ptr := x.Args[0]
  3233  		mem := v_1
  3234  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3235  			break
  3236  		}
  3237  		v.reset(OpMIPSMOVFload)
  3238  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3239  		v.Aux = symToAux(sym)
  3240  		v.AddArg2(ptr, mem)
  3241  		return true
  3242  	}
  3243  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3244  	// cond: canMergeSym(sym1,sym2)
  3245  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3246  	for {
  3247  		off1 := auxIntToInt32(v.AuxInt)
  3248  		sym1 := auxToSym(v.Aux)
  3249  		if v_0.Op != OpMIPSMOVWaddr {
  3250  			break
  3251  		}
  3252  		off2 := auxIntToInt32(v_0.AuxInt)
  3253  		sym2 := auxToSym(v_0.Aux)
  3254  		ptr := v_0.Args[0]
  3255  		mem := v_1
  3256  		if !(canMergeSym(sym1, sym2)) {
  3257  			break
  3258  		}
  3259  		v.reset(OpMIPSMOVFload)
  3260  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3261  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3262  		v.AddArg2(ptr, mem)
  3263  		return true
  3264  	}
  3265  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  3266  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3267  	// result: x
  3268  	for {
  3269  		off := auxIntToInt32(v.AuxInt)
  3270  		sym := auxToSym(v.Aux)
  3271  		ptr := v_0
  3272  		if v_1.Op != OpMIPSMOVFstore {
  3273  			break
  3274  		}
  3275  		off2 := auxIntToInt32(v_1.AuxInt)
  3276  		sym2 := auxToSym(v_1.Aux)
  3277  		x := v_1.Args[1]
  3278  		ptr2 := v_1.Args[0]
  3279  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3280  			break
  3281  		}
  3282  		v.copyOf(x)
  3283  		return true
  3284  	}
  3285  	return false
  3286  }
  3287  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3288  	v_2 := v.Args[2]
  3289  	v_1 := v.Args[1]
  3290  	v_0 := v.Args[0]
  3291  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3292  	// result: (MOVWstore [off] {sym} ptr val mem)
  3293  	for {
  3294  		off := auxIntToInt32(v.AuxInt)
  3295  		sym := auxToSym(v.Aux)
  3296  		ptr := v_0
  3297  		if v_1.Op != OpMIPSMOVWgpfp {
  3298  			break
  3299  		}
  3300  		val := v_1.Args[0]
  3301  		mem := v_2
  3302  		v.reset(OpMIPSMOVWstore)
  3303  		v.AuxInt = int32ToAuxInt(off)
  3304  		v.Aux = symToAux(sym)
  3305  		v.AddArg3(ptr, val, mem)
  3306  		return true
  3307  	}
  3308  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3309  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3310  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3311  	for {
  3312  		off1 := auxIntToInt32(v.AuxInt)
  3313  		sym := auxToSym(v.Aux)
  3314  		x := v_0
  3315  		if x.Op != OpMIPSADDconst {
  3316  			break
  3317  		}
  3318  		off2 := auxIntToInt32(x.AuxInt)
  3319  		ptr := x.Args[0]
  3320  		val := v_1
  3321  		mem := v_2
  3322  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3323  			break
  3324  		}
  3325  		v.reset(OpMIPSMOVFstore)
  3326  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3327  		v.Aux = symToAux(sym)
  3328  		v.AddArg3(ptr, val, mem)
  3329  		return true
  3330  	}
  3331  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3332  	// cond: canMergeSym(sym1,sym2)
  3333  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3334  	for {
  3335  		off1 := auxIntToInt32(v.AuxInt)
  3336  		sym1 := auxToSym(v.Aux)
  3337  		if v_0.Op != OpMIPSMOVWaddr {
  3338  			break
  3339  		}
  3340  		off2 := auxIntToInt32(v_0.AuxInt)
  3341  		sym2 := auxToSym(v_0.Aux)
  3342  		ptr := v_0.Args[0]
  3343  		val := v_1
  3344  		mem := v_2
  3345  		if !(canMergeSym(sym1, sym2)) {
  3346  			break
  3347  		}
  3348  		v.reset(OpMIPSMOVFstore)
  3349  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3350  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3351  		v.AddArg3(ptr, val, mem)
  3352  		return true
  3353  	}
  3354  	return false
  3355  }
  3356  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3357  	v_1 := v.Args[1]
  3358  	v_0 := v.Args[0]
  3359  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3360  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3361  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3362  	for {
  3363  		off1 := auxIntToInt32(v.AuxInt)
  3364  		sym := auxToSym(v.Aux)
  3365  		x := v_0
  3366  		if x.Op != OpMIPSADDconst {
  3367  			break
  3368  		}
  3369  		off2 := auxIntToInt32(x.AuxInt)
  3370  		ptr := x.Args[0]
  3371  		mem := v_1
  3372  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3373  			break
  3374  		}
  3375  		v.reset(OpMIPSMOVHUload)
  3376  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3377  		v.Aux = symToAux(sym)
  3378  		v.AddArg2(ptr, mem)
  3379  		return true
  3380  	}
  3381  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3382  	// cond: canMergeSym(sym1,sym2)
  3383  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3384  	for {
  3385  		off1 := auxIntToInt32(v.AuxInt)
  3386  		sym1 := auxToSym(v.Aux)
  3387  		if v_0.Op != OpMIPSMOVWaddr {
  3388  			break
  3389  		}
  3390  		off2 := auxIntToInt32(v_0.AuxInt)
  3391  		sym2 := auxToSym(v_0.Aux)
  3392  		ptr := v_0.Args[0]
  3393  		mem := v_1
  3394  		if !(canMergeSym(sym1, sym2)) {
  3395  			break
  3396  		}
  3397  		v.reset(OpMIPSMOVHUload)
  3398  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3399  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3400  		v.AddArg2(ptr, mem)
  3401  		return true
  3402  	}
  3403  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3404  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3405  	// result: (MOVHUreg x)
  3406  	for {
  3407  		off := auxIntToInt32(v.AuxInt)
  3408  		sym := auxToSym(v.Aux)
  3409  		ptr := v_0
  3410  		if v_1.Op != OpMIPSMOVHstore {
  3411  			break
  3412  		}
  3413  		off2 := auxIntToInt32(v_1.AuxInt)
  3414  		sym2 := auxToSym(v_1.Aux)
  3415  		x := v_1.Args[1]
  3416  		ptr2 := v_1.Args[0]
  3417  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3418  			break
  3419  		}
  3420  		v.reset(OpMIPSMOVHUreg)
  3421  		v.AddArg(x)
  3422  		return true
  3423  	}
  3424  	return false
  3425  }
  3426  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3427  	v_0 := v.Args[0]
  3428  	b := v.Block
  3429  	// match: (MOVHUreg x:(MOVBUload _ _))
  3430  	// result: (MOVWreg x)
  3431  	for {
  3432  		x := v_0
  3433  		if x.Op != OpMIPSMOVBUload {
  3434  			break
  3435  		}
  3436  		v.reset(OpMIPSMOVWreg)
  3437  		v.AddArg(x)
  3438  		return true
  3439  	}
  3440  	// match: (MOVHUreg x:(MOVHUload _ _))
  3441  	// result: (MOVWreg x)
  3442  	for {
  3443  		x := v_0
  3444  		if x.Op != OpMIPSMOVHUload {
  3445  			break
  3446  		}
  3447  		v.reset(OpMIPSMOVWreg)
  3448  		v.AddArg(x)
  3449  		return true
  3450  	}
  3451  	// match: (MOVHUreg x:(MOVBUreg _))
  3452  	// result: (MOVWreg x)
  3453  	for {
  3454  		x := v_0
  3455  		if x.Op != OpMIPSMOVBUreg {
  3456  			break
  3457  		}
  3458  		v.reset(OpMIPSMOVWreg)
  3459  		v.AddArg(x)
  3460  		return true
  3461  	}
  3462  	// match: (MOVHUreg x:(MOVHUreg _))
  3463  	// result: (MOVWreg x)
  3464  	for {
  3465  		x := v_0
  3466  		if x.Op != OpMIPSMOVHUreg {
  3467  			break
  3468  		}
  3469  		v.reset(OpMIPSMOVWreg)
  3470  		v.AddArg(x)
  3471  		return true
  3472  	}
  3473  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3474  	// cond: x.Uses == 1 && clobber(x)
  3475  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3476  	for {
  3477  		t := v.Type
  3478  		x := v_0
  3479  		if x.Op != OpMIPSMOVHload {
  3480  			break
  3481  		}
  3482  		off := auxIntToInt32(x.AuxInt)
  3483  		sym := auxToSym(x.Aux)
  3484  		mem := x.Args[1]
  3485  		ptr := x.Args[0]
  3486  		if !(x.Uses == 1 && clobber(x)) {
  3487  			break
  3488  		}
  3489  		b = x.Block
  3490  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3491  		v.copyOf(v0)
  3492  		v0.AuxInt = int32ToAuxInt(off)
  3493  		v0.Aux = symToAux(sym)
  3494  		v0.AddArg2(ptr, mem)
  3495  		return true
  3496  	}
  3497  	// match: (MOVHUreg (ANDconst [c] x))
  3498  	// result: (ANDconst [c&0xffff] x)
  3499  	for {
  3500  		if v_0.Op != OpMIPSANDconst {
  3501  			break
  3502  		}
  3503  		c := auxIntToInt32(v_0.AuxInt)
  3504  		x := v_0.Args[0]
  3505  		v.reset(OpMIPSANDconst)
  3506  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3507  		v.AddArg(x)
  3508  		return true
  3509  	}
  3510  	// match: (MOVHUreg (MOVWconst [c]))
  3511  	// result: (MOVWconst [int32(uint16(c))])
  3512  	for {
  3513  		if v_0.Op != OpMIPSMOVWconst {
  3514  			break
  3515  		}
  3516  		c := auxIntToInt32(v_0.AuxInt)
  3517  		v.reset(OpMIPSMOVWconst)
  3518  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3519  		return true
  3520  	}
  3521  	return false
  3522  }
  3523  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3524  	v_1 := v.Args[1]
  3525  	v_0 := v.Args[0]
  3526  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3527  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3528  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3529  	for {
  3530  		off1 := auxIntToInt32(v.AuxInt)
  3531  		sym := auxToSym(v.Aux)
  3532  		x := v_0
  3533  		if x.Op != OpMIPSADDconst {
  3534  			break
  3535  		}
  3536  		off2 := auxIntToInt32(x.AuxInt)
  3537  		ptr := x.Args[0]
  3538  		mem := v_1
  3539  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3540  			break
  3541  		}
  3542  		v.reset(OpMIPSMOVHload)
  3543  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3544  		v.Aux = symToAux(sym)
  3545  		v.AddArg2(ptr, mem)
  3546  		return true
  3547  	}
  3548  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3549  	// cond: canMergeSym(sym1,sym2)
  3550  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3551  	for {
  3552  		off1 := auxIntToInt32(v.AuxInt)
  3553  		sym1 := auxToSym(v.Aux)
  3554  		if v_0.Op != OpMIPSMOVWaddr {
  3555  			break
  3556  		}
  3557  		off2 := auxIntToInt32(v_0.AuxInt)
  3558  		sym2 := auxToSym(v_0.Aux)
  3559  		ptr := v_0.Args[0]
  3560  		mem := v_1
  3561  		if !(canMergeSym(sym1, sym2)) {
  3562  			break
  3563  		}
  3564  		v.reset(OpMIPSMOVHload)
  3565  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3566  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3567  		v.AddArg2(ptr, mem)
  3568  		return true
  3569  	}
  3570  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3571  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3572  	// result: (MOVHreg x)
  3573  	for {
  3574  		off := auxIntToInt32(v.AuxInt)
  3575  		sym := auxToSym(v.Aux)
  3576  		ptr := v_0
  3577  		if v_1.Op != OpMIPSMOVHstore {
  3578  			break
  3579  		}
  3580  		off2 := auxIntToInt32(v_1.AuxInt)
  3581  		sym2 := auxToSym(v_1.Aux)
  3582  		x := v_1.Args[1]
  3583  		ptr2 := v_1.Args[0]
  3584  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3585  			break
  3586  		}
  3587  		v.reset(OpMIPSMOVHreg)
  3588  		v.AddArg(x)
  3589  		return true
  3590  	}
  3591  	return false
  3592  }
  3593  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3594  	v_0 := v.Args[0]
  3595  	b := v.Block
  3596  	// match: (MOVHreg x:(MOVBload _ _))
  3597  	// result: (MOVWreg x)
  3598  	for {
  3599  		x := v_0
  3600  		if x.Op != OpMIPSMOVBload {
  3601  			break
  3602  		}
  3603  		v.reset(OpMIPSMOVWreg)
  3604  		v.AddArg(x)
  3605  		return true
  3606  	}
  3607  	// match: (MOVHreg x:(MOVBUload _ _))
  3608  	// result: (MOVWreg x)
  3609  	for {
  3610  		x := v_0
  3611  		if x.Op != OpMIPSMOVBUload {
  3612  			break
  3613  		}
  3614  		v.reset(OpMIPSMOVWreg)
  3615  		v.AddArg(x)
  3616  		return true
  3617  	}
  3618  	// match: (MOVHreg x:(MOVHload _ _))
  3619  	// result: (MOVWreg x)
  3620  	for {
  3621  		x := v_0
  3622  		if x.Op != OpMIPSMOVHload {
  3623  			break
  3624  		}
  3625  		v.reset(OpMIPSMOVWreg)
  3626  		v.AddArg(x)
  3627  		return true
  3628  	}
  3629  	// match: (MOVHreg x:(MOVBreg _))
  3630  	// result: (MOVWreg x)
  3631  	for {
  3632  		x := v_0
  3633  		if x.Op != OpMIPSMOVBreg {
  3634  			break
  3635  		}
  3636  		v.reset(OpMIPSMOVWreg)
  3637  		v.AddArg(x)
  3638  		return true
  3639  	}
  3640  	// match: (MOVHreg x:(MOVBUreg _))
  3641  	// result: (MOVWreg x)
  3642  	for {
  3643  		x := v_0
  3644  		if x.Op != OpMIPSMOVBUreg {
  3645  			break
  3646  		}
  3647  		v.reset(OpMIPSMOVWreg)
  3648  		v.AddArg(x)
  3649  		return true
  3650  	}
  3651  	// match: (MOVHreg x:(MOVHreg _))
  3652  	// result: (MOVWreg x)
  3653  	for {
  3654  		x := v_0
  3655  		if x.Op != OpMIPSMOVHreg {
  3656  			break
  3657  		}
  3658  		v.reset(OpMIPSMOVWreg)
  3659  		v.AddArg(x)
  3660  		return true
  3661  	}
  3662  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3663  	// cond: x.Uses == 1 && clobber(x)
  3664  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3665  	for {
  3666  		t := v.Type
  3667  		x := v_0
  3668  		if x.Op != OpMIPSMOVHUload {
  3669  			break
  3670  		}
  3671  		off := auxIntToInt32(x.AuxInt)
  3672  		sym := auxToSym(x.Aux)
  3673  		mem := x.Args[1]
  3674  		ptr := x.Args[0]
  3675  		if !(x.Uses == 1 && clobber(x)) {
  3676  			break
  3677  		}
  3678  		b = x.Block
  3679  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3680  		v.copyOf(v0)
  3681  		v0.AuxInt = int32ToAuxInt(off)
  3682  		v0.Aux = symToAux(sym)
  3683  		v0.AddArg2(ptr, mem)
  3684  		return true
  3685  	}
  3686  	// match: (MOVHreg (ANDconst [c] x))
  3687  	// cond: c & 0x8000 == 0
  3688  	// result: (ANDconst [c&0x7fff] x)
  3689  	for {
  3690  		if v_0.Op != OpMIPSANDconst {
  3691  			break
  3692  		}
  3693  		c := auxIntToInt32(v_0.AuxInt)
  3694  		x := v_0.Args[0]
  3695  		if !(c&0x8000 == 0) {
  3696  			break
  3697  		}
  3698  		v.reset(OpMIPSANDconst)
  3699  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3700  		v.AddArg(x)
  3701  		return true
  3702  	}
  3703  	// match: (MOVHreg (MOVWconst [c]))
  3704  	// result: (MOVWconst [int32(int16(c))])
  3705  	for {
  3706  		if v_0.Op != OpMIPSMOVWconst {
  3707  			break
  3708  		}
  3709  		c := auxIntToInt32(v_0.AuxInt)
  3710  		v.reset(OpMIPSMOVWconst)
  3711  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3712  		return true
  3713  	}
  3714  	return false
  3715  }
  3716  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3717  	v_2 := v.Args[2]
  3718  	v_1 := v.Args[1]
  3719  	v_0 := v.Args[0]
  3720  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3721  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3722  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3723  	for {
  3724  		off1 := auxIntToInt32(v.AuxInt)
  3725  		sym := auxToSym(v.Aux)
  3726  		x := v_0
  3727  		if x.Op != OpMIPSADDconst {
  3728  			break
  3729  		}
  3730  		off2 := auxIntToInt32(x.AuxInt)
  3731  		ptr := x.Args[0]
  3732  		val := v_1
  3733  		mem := v_2
  3734  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3735  			break
  3736  		}
  3737  		v.reset(OpMIPSMOVHstore)
  3738  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3739  		v.Aux = symToAux(sym)
  3740  		v.AddArg3(ptr, val, mem)
  3741  		return true
  3742  	}
  3743  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3744  	// cond: canMergeSym(sym1,sym2)
  3745  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3746  	for {
  3747  		off1 := auxIntToInt32(v.AuxInt)
  3748  		sym1 := auxToSym(v.Aux)
  3749  		if v_0.Op != OpMIPSMOVWaddr {
  3750  			break
  3751  		}
  3752  		off2 := auxIntToInt32(v_0.AuxInt)
  3753  		sym2 := auxToSym(v_0.Aux)
  3754  		ptr := v_0.Args[0]
  3755  		val := v_1
  3756  		mem := v_2
  3757  		if !(canMergeSym(sym1, sym2)) {
  3758  			break
  3759  		}
  3760  		v.reset(OpMIPSMOVHstore)
  3761  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3762  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3763  		v.AddArg3(ptr, val, mem)
  3764  		return true
  3765  	}
  3766  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3767  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3768  	for {
  3769  		off := auxIntToInt32(v.AuxInt)
  3770  		sym := auxToSym(v.Aux)
  3771  		ptr := v_0
  3772  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3773  			break
  3774  		}
  3775  		mem := v_2
  3776  		v.reset(OpMIPSMOVHstorezero)
  3777  		v.AuxInt = int32ToAuxInt(off)
  3778  		v.Aux = symToAux(sym)
  3779  		v.AddArg2(ptr, mem)
  3780  		return true
  3781  	}
  3782  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3783  	// result: (MOVHstore [off] {sym} ptr x mem)
  3784  	for {
  3785  		off := auxIntToInt32(v.AuxInt)
  3786  		sym := auxToSym(v.Aux)
  3787  		ptr := v_0
  3788  		if v_1.Op != OpMIPSMOVHreg {
  3789  			break
  3790  		}
  3791  		x := v_1.Args[0]
  3792  		mem := v_2
  3793  		v.reset(OpMIPSMOVHstore)
  3794  		v.AuxInt = int32ToAuxInt(off)
  3795  		v.Aux = symToAux(sym)
  3796  		v.AddArg3(ptr, x, mem)
  3797  		return true
  3798  	}
  3799  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3800  	// result: (MOVHstore [off] {sym} ptr x mem)
  3801  	for {
  3802  		off := auxIntToInt32(v.AuxInt)
  3803  		sym := auxToSym(v.Aux)
  3804  		ptr := v_0
  3805  		if v_1.Op != OpMIPSMOVHUreg {
  3806  			break
  3807  		}
  3808  		x := v_1.Args[0]
  3809  		mem := v_2
  3810  		v.reset(OpMIPSMOVHstore)
  3811  		v.AuxInt = int32ToAuxInt(off)
  3812  		v.Aux = symToAux(sym)
  3813  		v.AddArg3(ptr, x, mem)
  3814  		return true
  3815  	}
  3816  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3817  	// result: (MOVHstore [off] {sym} ptr x mem)
  3818  	for {
  3819  		off := auxIntToInt32(v.AuxInt)
  3820  		sym := auxToSym(v.Aux)
  3821  		ptr := v_0
  3822  		if v_1.Op != OpMIPSMOVWreg {
  3823  			break
  3824  		}
  3825  		x := v_1.Args[0]
  3826  		mem := v_2
  3827  		v.reset(OpMIPSMOVHstore)
  3828  		v.AuxInt = int32ToAuxInt(off)
  3829  		v.Aux = symToAux(sym)
  3830  		v.AddArg3(ptr, x, mem)
  3831  		return true
  3832  	}
  3833  	return false
  3834  }
  3835  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3836  	v_1 := v.Args[1]
  3837  	v_0 := v.Args[0]
  3838  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3839  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3840  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3841  	for {
  3842  		off1 := auxIntToInt32(v.AuxInt)
  3843  		sym := auxToSym(v.Aux)
  3844  		x := v_0
  3845  		if x.Op != OpMIPSADDconst {
  3846  			break
  3847  		}
  3848  		off2 := auxIntToInt32(x.AuxInt)
  3849  		ptr := x.Args[0]
  3850  		mem := v_1
  3851  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3852  			break
  3853  		}
  3854  		v.reset(OpMIPSMOVHstorezero)
  3855  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3856  		v.Aux = symToAux(sym)
  3857  		v.AddArg2(ptr, mem)
  3858  		return true
  3859  	}
  3860  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3861  	// cond: canMergeSym(sym1,sym2)
  3862  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3863  	for {
  3864  		off1 := auxIntToInt32(v.AuxInt)
  3865  		sym1 := auxToSym(v.Aux)
  3866  		if v_0.Op != OpMIPSMOVWaddr {
  3867  			break
  3868  		}
  3869  		off2 := auxIntToInt32(v_0.AuxInt)
  3870  		sym2 := auxToSym(v_0.Aux)
  3871  		ptr := v_0.Args[0]
  3872  		mem := v_1
  3873  		if !(canMergeSym(sym1, sym2)) {
  3874  			break
  3875  		}
  3876  		v.reset(OpMIPSMOVHstorezero)
  3877  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3878  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3879  		v.AddArg2(ptr, mem)
  3880  		return true
  3881  	}
  3882  	return false
  3883  }
  3884  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3885  	v_1 := v.Args[1]
  3886  	v_0 := v.Args[0]
  3887  	// match: (MOVWload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  3888  	// result: (MOVWfpgp val)
  3889  	for {
  3890  		off := auxIntToInt32(v.AuxInt)
  3891  		sym := auxToSym(v.Aux)
  3892  		ptr := v_0
  3893  		if v_1.Op != OpMIPSMOVFstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3894  			break
  3895  		}
  3896  		val := v_1.Args[1]
  3897  		if ptr != v_1.Args[0] {
  3898  			break
  3899  		}
  3900  		v.reset(OpMIPSMOVWfpgp)
  3901  		v.AddArg(val)
  3902  		return true
  3903  	}
  3904  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3905  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3906  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3907  	for {
  3908  		off1 := auxIntToInt32(v.AuxInt)
  3909  		sym := auxToSym(v.Aux)
  3910  		x := v_0
  3911  		if x.Op != OpMIPSADDconst {
  3912  			break
  3913  		}
  3914  		off2 := auxIntToInt32(x.AuxInt)
  3915  		ptr := x.Args[0]
  3916  		mem := v_1
  3917  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3918  			break
  3919  		}
  3920  		v.reset(OpMIPSMOVWload)
  3921  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3922  		v.Aux = symToAux(sym)
  3923  		v.AddArg2(ptr, mem)
  3924  		return true
  3925  	}
  3926  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3927  	// cond: canMergeSym(sym1,sym2)
  3928  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3929  	for {
  3930  		off1 := auxIntToInt32(v.AuxInt)
  3931  		sym1 := auxToSym(v.Aux)
  3932  		if v_0.Op != OpMIPSMOVWaddr {
  3933  			break
  3934  		}
  3935  		off2 := auxIntToInt32(v_0.AuxInt)
  3936  		sym2 := auxToSym(v_0.Aux)
  3937  		ptr := v_0.Args[0]
  3938  		mem := v_1
  3939  		if !(canMergeSym(sym1, sym2)) {
  3940  			break
  3941  		}
  3942  		v.reset(OpMIPSMOVWload)
  3943  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3944  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3945  		v.AddArg2(ptr, mem)
  3946  		return true
  3947  	}
  3948  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3949  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3950  	// result: x
  3951  	for {
  3952  		off := auxIntToInt32(v.AuxInt)
  3953  		sym := auxToSym(v.Aux)
  3954  		ptr := v_0
  3955  		if v_1.Op != OpMIPSMOVWstore {
  3956  			break
  3957  		}
  3958  		off2 := auxIntToInt32(v_1.AuxInt)
  3959  		sym2 := auxToSym(v_1.Aux)
  3960  		x := v_1.Args[1]
  3961  		ptr2 := v_1.Args[0]
  3962  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3963  			break
  3964  		}
  3965  		v.copyOf(x)
  3966  		return true
  3967  	}
  3968  	return false
  3969  }
  3970  func rewriteValueMIPS_OpMIPSMOVWnop(v *Value) bool {
  3971  	v_0 := v.Args[0]
  3972  	// match: (MOVWnop (MOVWconst [c]))
  3973  	// result: (MOVWconst [c])
  3974  	for {
  3975  		if v_0.Op != OpMIPSMOVWconst {
  3976  			break
  3977  		}
  3978  		c := auxIntToInt32(v_0.AuxInt)
  3979  		v.reset(OpMIPSMOVWconst)
  3980  		v.AuxInt = int32ToAuxInt(c)
  3981  		return true
  3982  	}
  3983  	return false
  3984  }
  3985  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3986  	v_0 := v.Args[0]
  3987  	// match: (MOVWreg x)
  3988  	// cond: x.Uses == 1
  3989  	// result: (MOVWnop x)
  3990  	for {
  3991  		x := v_0
  3992  		if !(x.Uses == 1) {
  3993  			break
  3994  		}
  3995  		v.reset(OpMIPSMOVWnop)
  3996  		v.AddArg(x)
  3997  		return true
  3998  	}
  3999  	// match: (MOVWreg (MOVWconst [c]))
  4000  	// result: (MOVWconst [c])
  4001  	for {
  4002  		if v_0.Op != OpMIPSMOVWconst {
  4003  			break
  4004  		}
  4005  		c := auxIntToInt32(v_0.AuxInt)
  4006  		v.reset(OpMIPSMOVWconst)
  4007  		v.AuxInt = int32ToAuxInt(c)
  4008  		return true
  4009  	}
  4010  	return false
  4011  }
  4012  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  4013  	v_2 := v.Args[2]
  4014  	v_1 := v.Args[1]
  4015  	v_0 := v.Args[0]
  4016  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  4017  	// result: (MOVFstore [off] {sym} ptr val mem)
  4018  	for {
  4019  		off := auxIntToInt32(v.AuxInt)
  4020  		sym := auxToSym(v.Aux)
  4021  		ptr := v_0
  4022  		if v_1.Op != OpMIPSMOVWfpgp {
  4023  			break
  4024  		}
  4025  		val := v_1.Args[0]
  4026  		mem := v_2
  4027  		v.reset(OpMIPSMOVFstore)
  4028  		v.AuxInt = int32ToAuxInt(off)
  4029  		v.Aux = symToAux(sym)
  4030  		v.AddArg3(ptr, val, mem)
  4031  		return true
  4032  	}
  4033  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  4034  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  4035  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  4036  	for {
  4037  		off1 := auxIntToInt32(v.AuxInt)
  4038  		sym := auxToSym(v.Aux)
  4039  		x := v_0
  4040  		if x.Op != OpMIPSADDconst {
  4041  			break
  4042  		}
  4043  		off2 := auxIntToInt32(x.AuxInt)
  4044  		ptr := x.Args[0]
  4045  		val := v_1
  4046  		mem := v_2
  4047  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  4048  			break
  4049  		}
  4050  		v.reset(OpMIPSMOVWstore)
  4051  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4052  		v.Aux = symToAux(sym)
  4053  		v.AddArg3(ptr, val, mem)
  4054  		return true
  4055  	}
  4056  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  4057  	// cond: canMergeSym(sym1,sym2)
  4058  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4059  	for {
  4060  		off1 := auxIntToInt32(v.AuxInt)
  4061  		sym1 := auxToSym(v.Aux)
  4062  		if v_0.Op != OpMIPSMOVWaddr {
  4063  			break
  4064  		}
  4065  		off2 := auxIntToInt32(v_0.AuxInt)
  4066  		sym2 := auxToSym(v_0.Aux)
  4067  		ptr := v_0.Args[0]
  4068  		val := v_1
  4069  		mem := v_2
  4070  		if !(canMergeSym(sym1, sym2)) {
  4071  			break
  4072  		}
  4073  		v.reset(OpMIPSMOVWstore)
  4074  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4075  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4076  		v.AddArg3(ptr, val, mem)
  4077  		return true
  4078  	}
  4079  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  4080  	// result: (MOVWstorezero [off] {sym} ptr mem)
  4081  	for {
  4082  		off := auxIntToInt32(v.AuxInt)
  4083  		sym := auxToSym(v.Aux)
  4084  		ptr := v_0
  4085  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4086  			break
  4087  		}
  4088  		mem := v_2
  4089  		v.reset(OpMIPSMOVWstorezero)
  4090  		v.AuxInt = int32ToAuxInt(off)
  4091  		v.Aux = symToAux(sym)
  4092  		v.AddArg2(ptr, mem)
  4093  		return true
  4094  	}
  4095  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4096  	// result: (MOVWstore [off] {sym} ptr x mem)
  4097  	for {
  4098  		off := auxIntToInt32(v.AuxInt)
  4099  		sym := auxToSym(v.Aux)
  4100  		ptr := v_0
  4101  		if v_1.Op != OpMIPSMOVWreg {
  4102  			break
  4103  		}
  4104  		x := v_1.Args[0]
  4105  		mem := v_2
  4106  		v.reset(OpMIPSMOVWstore)
  4107  		v.AuxInt = int32ToAuxInt(off)
  4108  		v.Aux = symToAux(sym)
  4109  		v.AddArg3(ptr, x, mem)
  4110  		return true
  4111  	}
  4112  	return false
  4113  }
  4114  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  4115  	v_1 := v.Args[1]
  4116  	v_0 := v.Args[0]
  4117  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4118  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  4119  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  4120  	for {
  4121  		off1 := auxIntToInt32(v.AuxInt)
  4122  		sym := auxToSym(v.Aux)
  4123  		x := v_0
  4124  		if x.Op != OpMIPSADDconst {
  4125  			break
  4126  		}
  4127  		off2 := auxIntToInt32(x.AuxInt)
  4128  		ptr := x.Args[0]
  4129  		mem := v_1
  4130  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  4131  			break
  4132  		}
  4133  		v.reset(OpMIPSMOVWstorezero)
  4134  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4135  		v.Aux = symToAux(sym)
  4136  		v.AddArg2(ptr, mem)
  4137  		return true
  4138  	}
  4139  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4140  	// cond: canMergeSym(sym1,sym2)
  4141  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4142  	for {
  4143  		off1 := auxIntToInt32(v.AuxInt)
  4144  		sym1 := auxToSym(v.Aux)
  4145  		if v_0.Op != OpMIPSMOVWaddr {
  4146  			break
  4147  		}
  4148  		off2 := auxIntToInt32(v_0.AuxInt)
  4149  		sym2 := auxToSym(v_0.Aux)
  4150  		ptr := v_0.Args[0]
  4151  		mem := v_1
  4152  		if !(canMergeSym(sym1, sym2)) {
  4153  			break
  4154  		}
  4155  		v.reset(OpMIPSMOVWstorezero)
  4156  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4157  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4158  		v.AddArg2(ptr, mem)
  4159  		return true
  4160  	}
  4161  	return false
  4162  }
  4163  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  4164  	v_1 := v.Args[1]
  4165  	v_0 := v.Args[0]
  4166  	// match: (MUL (MOVWconst [0]) _ )
  4167  	// result: (MOVWconst [0])
  4168  	for {
  4169  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4170  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4171  				continue
  4172  			}
  4173  			v.reset(OpMIPSMOVWconst)
  4174  			v.AuxInt = int32ToAuxInt(0)
  4175  			return true
  4176  		}
  4177  		break
  4178  	}
  4179  	// match: (MUL (MOVWconst [1]) x )
  4180  	// result: x
  4181  	for {
  4182  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4183  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  4184  				continue
  4185  			}
  4186  			x := v_1
  4187  			v.copyOf(x)
  4188  			return true
  4189  		}
  4190  		break
  4191  	}
  4192  	// match: (MUL (MOVWconst [-1]) x )
  4193  	// result: (NEG x)
  4194  	for {
  4195  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4196  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  4197  				continue
  4198  			}
  4199  			x := v_1
  4200  			v.reset(OpMIPSNEG)
  4201  			v.AddArg(x)
  4202  			return true
  4203  		}
  4204  		break
  4205  	}
  4206  	// match: (MUL (MOVWconst [c]) x )
  4207  	// cond: isPowerOfTwo(uint32(c))
  4208  	// result: (SLLconst [int32(log32u(uint32(c)))] x)
  4209  	for {
  4210  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4211  			if v_0.Op != OpMIPSMOVWconst {
  4212  				continue
  4213  			}
  4214  			c := auxIntToInt32(v_0.AuxInt)
  4215  			x := v_1
  4216  			if !(isPowerOfTwo(uint32(c))) {
  4217  				continue
  4218  			}
  4219  			v.reset(OpMIPSSLLconst)
  4220  			v.AuxInt = int32ToAuxInt(int32(log32u(uint32(c))))
  4221  			v.AddArg(x)
  4222  			return true
  4223  		}
  4224  		break
  4225  	}
  4226  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  4227  	// result: (MOVWconst [c*d])
  4228  	for {
  4229  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4230  			if v_0.Op != OpMIPSMOVWconst {
  4231  				continue
  4232  			}
  4233  			c := auxIntToInt32(v_0.AuxInt)
  4234  			if v_1.Op != OpMIPSMOVWconst {
  4235  				continue
  4236  			}
  4237  			d := auxIntToInt32(v_1.AuxInt)
  4238  			v.reset(OpMIPSMOVWconst)
  4239  			v.AuxInt = int32ToAuxInt(c * d)
  4240  			return true
  4241  		}
  4242  		break
  4243  	}
  4244  	return false
  4245  }
  4246  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  4247  	v_0 := v.Args[0]
  4248  	// match: (NEG (SUB x y))
  4249  	// result: (SUB y x)
  4250  	for {
  4251  		if v_0.Op != OpMIPSSUB {
  4252  			break
  4253  		}
  4254  		y := v_0.Args[1]
  4255  		x := v_0.Args[0]
  4256  		v.reset(OpMIPSSUB)
  4257  		v.AddArg2(y, x)
  4258  		return true
  4259  	}
  4260  	// match: (NEG (NEG x))
  4261  	// result: x
  4262  	for {
  4263  		if v_0.Op != OpMIPSNEG {
  4264  			break
  4265  		}
  4266  		x := v_0.Args[0]
  4267  		v.copyOf(x)
  4268  		return true
  4269  	}
  4270  	// match: (NEG (MOVWconst [c]))
  4271  	// result: (MOVWconst [-c])
  4272  	for {
  4273  		if v_0.Op != OpMIPSMOVWconst {
  4274  			break
  4275  		}
  4276  		c := auxIntToInt32(v_0.AuxInt)
  4277  		v.reset(OpMIPSMOVWconst)
  4278  		v.AuxInt = int32ToAuxInt(-c)
  4279  		return true
  4280  	}
  4281  	return false
  4282  }
  4283  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  4284  	v_1 := v.Args[1]
  4285  	v_0 := v.Args[0]
  4286  	b := v.Block
  4287  	// match: (OR x (MOVWconst [c]))
  4288  	// result: (ORconst [c] x)
  4289  	for {
  4290  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4291  			x := v_0
  4292  			if v_1.Op != OpMIPSMOVWconst {
  4293  				continue
  4294  			}
  4295  			c := auxIntToInt32(v_1.AuxInt)
  4296  			v.reset(OpMIPSORconst)
  4297  			v.AuxInt = int32ToAuxInt(c)
  4298  			v.AddArg(x)
  4299  			return true
  4300  		}
  4301  		break
  4302  	}
  4303  	// match: (OR x x)
  4304  	// result: x
  4305  	for {
  4306  		x := v_0
  4307  		if x != v_1 {
  4308  			break
  4309  		}
  4310  		v.copyOf(x)
  4311  		return true
  4312  	}
  4313  	// match: (OR (SGTUzero x) (SGTUzero y))
  4314  	// result: (SGTUzero (OR <x.Type> x y))
  4315  	for {
  4316  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4317  			if v_0.Op != OpMIPSSGTUzero {
  4318  				continue
  4319  			}
  4320  			x := v_0.Args[0]
  4321  			if v_1.Op != OpMIPSSGTUzero {
  4322  				continue
  4323  			}
  4324  			y := v_1.Args[0]
  4325  			v.reset(OpMIPSSGTUzero)
  4326  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  4327  			v0.AddArg2(x, y)
  4328  			v.AddArg(v0)
  4329  			return true
  4330  		}
  4331  		break
  4332  	}
  4333  	return false
  4334  }
  4335  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  4336  	v_0 := v.Args[0]
  4337  	// match: (ORconst [0] x)
  4338  	// result: x
  4339  	for {
  4340  		if auxIntToInt32(v.AuxInt) != 0 {
  4341  			break
  4342  		}
  4343  		x := v_0
  4344  		v.copyOf(x)
  4345  		return true
  4346  	}
  4347  	// match: (ORconst [-1] _)
  4348  	// result: (MOVWconst [-1])
  4349  	for {
  4350  		if auxIntToInt32(v.AuxInt) != -1 {
  4351  			break
  4352  		}
  4353  		v.reset(OpMIPSMOVWconst)
  4354  		v.AuxInt = int32ToAuxInt(-1)
  4355  		return true
  4356  	}
  4357  	// match: (ORconst [c] (MOVWconst [d]))
  4358  	// result: (MOVWconst [c|d])
  4359  	for {
  4360  		c := auxIntToInt32(v.AuxInt)
  4361  		if v_0.Op != OpMIPSMOVWconst {
  4362  			break
  4363  		}
  4364  		d := auxIntToInt32(v_0.AuxInt)
  4365  		v.reset(OpMIPSMOVWconst)
  4366  		v.AuxInt = int32ToAuxInt(c | d)
  4367  		return true
  4368  	}
  4369  	// match: (ORconst [c] (ORconst [d] x))
  4370  	// result: (ORconst [c|d] x)
  4371  	for {
  4372  		c := auxIntToInt32(v.AuxInt)
  4373  		if v_0.Op != OpMIPSORconst {
  4374  			break
  4375  		}
  4376  		d := auxIntToInt32(v_0.AuxInt)
  4377  		x := v_0.Args[0]
  4378  		v.reset(OpMIPSORconst)
  4379  		v.AuxInt = int32ToAuxInt(c | d)
  4380  		v.AddArg(x)
  4381  		return true
  4382  	}
  4383  	return false
  4384  }
  4385  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4386  	v_1 := v.Args[1]
  4387  	v_0 := v.Args[0]
  4388  	// match: (SGT (MOVWconst [c]) x)
  4389  	// result: (SGTconst [c] x)
  4390  	for {
  4391  		if v_0.Op != OpMIPSMOVWconst {
  4392  			break
  4393  		}
  4394  		c := auxIntToInt32(v_0.AuxInt)
  4395  		x := v_1
  4396  		v.reset(OpMIPSSGTconst)
  4397  		v.AuxInt = int32ToAuxInt(c)
  4398  		v.AddArg(x)
  4399  		return true
  4400  	}
  4401  	// match: (SGT x (MOVWconst [0]))
  4402  	// result: (SGTzero x)
  4403  	for {
  4404  		x := v_0
  4405  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4406  			break
  4407  		}
  4408  		v.reset(OpMIPSSGTzero)
  4409  		v.AddArg(x)
  4410  		return true
  4411  	}
  4412  	return false
  4413  }
  4414  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4415  	v_1 := v.Args[1]
  4416  	v_0 := v.Args[0]
  4417  	// match: (SGTU (MOVWconst [c]) x)
  4418  	// result: (SGTUconst [c] x)
  4419  	for {
  4420  		if v_0.Op != OpMIPSMOVWconst {
  4421  			break
  4422  		}
  4423  		c := auxIntToInt32(v_0.AuxInt)
  4424  		x := v_1
  4425  		v.reset(OpMIPSSGTUconst)
  4426  		v.AuxInt = int32ToAuxInt(c)
  4427  		v.AddArg(x)
  4428  		return true
  4429  	}
  4430  	// match: (SGTU x (MOVWconst [0]))
  4431  	// result: (SGTUzero x)
  4432  	for {
  4433  		x := v_0
  4434  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4435  			break
  4436  		}
  4437  		v.reset(OpMIPSSGTUzero)
  4438  		v.AddArg(x)
  4439  		return true
  4440  	}
  4441  	return false
  4442  }
  4443  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4444  	v_0 := v.Args[0]
  4445  	// match: (SGTUconst [c] (MOVWconst [d]))
  4446  	// cond: uint32(c) > uint32(d)
  4447  	// result: (MOVWconst [1])
  4448  	for {
  4449  		c := auxIntToInt32(v.AuxInt)
  4450  		if v_0.Op != OpMIPSMOVWconst {
  4451  			break
  4452  		}
  4453  		d := auxIntToInt32(v_0.AuxInt)
  4454  		if !(uint32(c) > uint32(d)) {
  4455  			break
  4456  		}
  4457  		v.reset(OpMIPSMOVWconst)
  4458  		v.AuxInt = int32ToAuxInt(1)
  4459  		return true
  4460  	}
  4461  	// match: (SGTUconst [c] (MOVWconst [d]))
  4462  	// cond: uint32(c) <= uint32(d)
  4463  	// result: (MOVWconst [0])
  4464  	for {
  4465  		c := auxIntToInt32(v.AuxInt)
  4466  		if v_0.Op != OpMIPSMOVWconst {
  4467  			break
  4468  		}
  4469  		d := auxIntToInt32(v_0.AuxInt)
  4470  		if !(uint32(c) <= uint32(d)) {
  4471  			break
  4472  		}
  4473  		v.reset(OpMIPSMOVWconst)
  4474  		v.AuxInt = int32ToAuxInt(0)
  4475  		return true
  4476  	}
  4477  	// match: (SGTUconst [c] (MOVBUreg _))
  4478  	// cond: 0xff < uint32(c)
  4479  	// result: (MOVWconst [1])
  4480  	for {
  4481  		c := auxIntToInt32(v.AuxInt)
  4482  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4483  			break
  4484  		}
  4485  		v.reset(OpMIPSMOVWconst)
  4486  		v.AuxInt = int32ToAuxInt(1)
  4487  		return true
  4488  	}
  4489  	// match: (SGTUconst [c] (MOVHUreg _))
  4490  	// cond: 0xffff < uint32(c)
  4491  	// result: (MOVWconst [1])
  4492  	for {
  4493  		c := auxIntToInt32(v.AuxInt)
  4494  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4495  			break
  4496  		}
  4497  		v.reset(OpMIPSMOVWconst)
  4498  		v.AuxInt = int32ToAuxInt(1)
  4499  		return true
  4500  	}
  4501  	// match: (SGTUconst [c] (ANDconst [m] _))
  4502  	// cond: uint32(m) < uint32(c)
  4503  	// result: (MOVWconst [1])
  4504  	for {
  4505  		c := auxIntToInt32(v.AuxInt)
  4506  		if v_0.Op != OpMIPSANDconst {
  4507  			break
  4508  		}
  4509  		m := auxIntToInt32(v_0.AuxInt)
  4510  		if !(uint32(m) < uint32(c)) {
  4511  			break
  4512  		}
  4513  		v.reset(OpMIPSMOVWconst)
  4514  		v.AuxInt = int32ToAuxInt(1)
  4515  		return true
  4516  	}
  4517  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4518  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4519  	// result: (MOVWconst [1])
  4520  	for {
  4521  		c := auxIntToInt32(v.AuxInt)
  4522  		if v_0.Op != OpMIPSSRLconst {
  4523  			break
  4524  		}
  4525  		d := auxIntToInt32(v_0.AuxInt)
  4526  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4527  			break
  4528  		}
  4529  		v.reset(OpMIPSMOVWconst)
  4530  		v.AuxInt = int32ToAuxInt(1)
  4531  		return true
  4532  	}
  4533  	return false
  4534  }
  4535  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4536  	v_0 := v.Args[0]
  4537  	// match: (SGTUzero (MOVWconst [d]))
  4538  	// cond: d != 0
  4539  	// result: (MOVWconst [1])
  4540  	for {
  4541  		if v_0.Op != OpMIPSMOVWconst {
  4542  			break
  4543  		}
  4544  		d := auxIntToInt32(v_0.AuxInt)
  4545  		if !(d != 0) {
  4546  			break
  4547  		}
  4548  		v.reset(OpMIPSMOVWconst)
  4549  		v.AuxInt = int32ToAuxInt(1)
  4550  		return true
  4551  	}
  4552  	// match: (SGTUzero (MOVWconst [d]))
  4553  	// cond: d == 0
  4554  	// result: (MOVWconst [0])
  4555  	for {
  4556  		if v_0.Op != OpMIPSMOVWconst {
  4557  			break
  4558  		}
  4559  		d := auxIntToInt32(v_0.AuxInt)
  4560  		if !(d == 0) {
  4561  			break
  4562  		}
  4563  		v.reset(OpMIPSMOVWconst)
  4564  		v.AuxInt = int32ToAuxInt(0)
  4565  		return true
  4566  	}
  4567  	return false
  4568  }
  4569  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4570  	v_0 := v.Args[0]
  4571  	// match: (SGTconst [c] (MOVWconst [d]))
  4572  	// cond: c > d
  4573  	// result: (MOVWconst [1])
  4574  	for {
  4575  		c := auxIntToInt32(v.AuxInt)
  4576  		if v_0.Op != OpMIPSMOVWconst {
  4577  			break
  4578  		}
  4579  		d := auxIntToInt32(v_0.AuxInt)
  4580  		if !(c > d) {
  4581  			break
  4582  		}
  4583  		v.reset(OpMIPSMOVWconst)
  4584  		v.AuxInt = int32ToAuxInt(1)
  4585  		return true
  4586  	}
  4587  	// match: (SGTconst [c] (MOVWconst [d]))
  4588  	// cond: c <= d
  4589  	// result: (MOVWconst [0])
  4590  	for {
  4591  		c := auxIntToInt32(v.AuxInt)
  4592  		if v_0.Op != OpMIPSMOVWconst {
  4593  			break
  4594  		}
  4595  		d := auxIntToInt32(v_0.AuxInt)
  4596  		if !(c <= d) {
  4597  			break
  4598  		}
  4599  		v.reset(OpMIPSMOVWconst)
  4600  		v.AuxInt = int32ToAuxInt(0)
  4601  		return true
  4602  	}
  4603  	// match: (SGTconst [c] (MOVBreg _))
  4604  	// cond: 0x7f < c
  4605  	// result: (MOVWconst [1])
  4606  	for {
  4607  		c := auxIntToInt32(v.AuxInt)
  4608  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4609  			break
  4610  		}
  4611  		v.reset(OpMIPSMOVWconst)
  4612  		v.AuxInt = int32ToAuxInt(1)
  4613  		return true
  4614  	}
  4615  	// match: (SGTconst [c] (MOVBreg _))
  4616  	// cond: c <= -0x80
  4617  	// result: (MOVWconst [0])
  4618  	for {
  4619  		c := auxIntToInt32(v.AuxInt)
  4620  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4621  			break
  4622  		}
  4623  		v.reset(OpMIPSMOVWconst)
  4624  		v.AuxInt = int32ToAuxInt(0)
  4625  		return true
  4626  	}
  4627  	// match: (SGTconst [c] (MOVBUreg _))
  4628  	// cond: 0xff < c
  4629  	// result: (MOVWconst [1])
  4630  	for {
  4631  		c := auxIntToInt32(v.AuxInt)
  4632  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4633  			break
  4634  		}
  4635  		v.reset(OpMIPSMOVWconst)
  4636  		v.AuxInt = int32ToAuxInt(1)
  4637  		return true
  4638  	}
  4639  	// match: (SGTconst [c] (MOVBUreg _))
  4640  	// cond: c < 0
  4641  	// result: (MOVWconst [0])
  4642  	for {
  4643  		c := auxIntToInt32(v.AuxInt)
  4644  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4645  			break
  4646  		}
  4647  		v.reset(OpMIPSMOVWconst)
  4648  		v.AuxInt = int32ToAuxInt(0)
  4649  		return true
  4650  	}
  4651  	// match: (SGTconst [c] (MOVHreg _))
  4652  	// cond: 0x7fff < c
  4653  	// result: (MOVWconst [1])
  4654  	for {
  4655  		c := auxIntToInt32(v.AuxInt)
  4656  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4657  			break
  4658  		}
  4659  		v.reset(OpMIPSMOVWconst)
  4660  		v.AuxInt = int32ToAuxInt(1)
  4661  		return true
  4662  	}
  4663  	// match: (SGTconst [c] (MOVHreg _))
  4664  	// cond: c <= -0x8000
  4665  	// result: (MOVWconst [0])
  4666  	for {
  4667  		c := auxIntToInt32(v.AuxInt)
  4668  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4669  			break
  4670  		}
  4671  		v.reset(OpMIPSMOVWconst)
  4672  		v.AuxInt = int32ToAuxInt(0)
  4673  		return true
  4674  	}
  4675  	// match: (SGTconst [c] (MOVHUreg _))
  4676  	// cond: 0xffff < c
  4677  	// result: (MOVWconst [1])
  4678  	for {
  4679  		c := auxIntToInt32(v.AuxInt)
  4680  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4681  			break
  4682  		}
  4683  		v.reset(OpMIPSMOVWconst)
  4684  		v.AuxInt = int32ToAuxInt(1)
  4685  		return true
  4686  	}
  4687  	// match: (SGTconst [c] (MOVHUreg _))
  4688  	// cond: c < 0
  4689  	// result: (MOVWconst [0])
  4690  	for {
  4691  		c := auxIntToInt32(v.AuxInt)
  4692  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4693  			break
  4694  		}
  4695  		v.reset(OpMIPSMOVWconst)
  4696  		v.AuxInt = int32ToAuxInt(0)
  4697  		return true
  4698  	}
  4699  	// match: (SGTconst [c] (ANDconst [m] _))
  4700  	// cond: 0 <= m && m < c
  4701  	// result: (MOVWconst [1])
  4702  	for {
  4703  		c := auxIntToInt32(v.AuxInt)
  4704  		if v_0.Op != OpMIPSANDconst {
  4705  			break
  4706  		}
  4707  		m := auxIntToInt32(v_0.AuxInt)
  4708  		if !(0 <= m && m < c) {
  4709  			break
  4710  		}
  4711  		v.reset(OpMIPSMOVWconst)
  4712  		v.AuxInt = int32ToAuxInt(1)
  4713  		return true
  4714  	}
  4715  	// match: (SGTconst [c] (SRLconst _ [d]))
  4716  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4717  	// result: (MOVWconst [1])
  4718  	for {
  4719  		c := auxIntToInt32(v.AuxInt)
  4720  		if v_0.Op != OpMIPSSRLconst {
  4721  			break
  4722  		}
  4723  		d := auxIntToInt32(v_0.AuxInt)
  4724  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4725  			break
  4726  		}
  4727  		v.reset(OpMIPSMOVWconst)
  4728  		v.AuxInt = int32ToAuxInt(1)
  4729  		return true
  4730  	}
  4731  	return false
  4732  }
  4733  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4734  	v_0 := v.Args[0]
  4735  	// match: (SGTzero (MOVWconst [d]))
  4736  	// cond: d > 0
  4737  	// result: (MOVWconst [1])
  4738  	for {
  4739  		if v_0.Op != OpMIPSMOVWconst {
  4740  			break
  4741  		}
  4742  		d := auxIntToInt32(v_0.AuxInt)
  4743  		if !(d > 0) {
  4744  			break
  4745  		}
  4746  		v.reset(OpMIPSMOVWconst)
  4747  		v.AuxInt = int32ToAuxInt(1)
  4748  		return true
  4749  	}
  4750  	// match: (SGTzero (MOVWconst [d]))
  4751  	// cond: d <= 0
  4752  	// result: (MOVWconst [0])
  4753  	for {
  4754  		if v_0.Op != OpMIPSMOVWconst {
  4755  			break
  4756  		}
  4757  		d := auxIntToInt32(v_0.AuxInt)
  4758  		if !(d <= 0) {
  4759  			break
  4760  		}
  4761  		v.reset(OpMIPSMOVWconst)
  4762  		v.AuxInt = int32ToAuxInt(0)
  4763  		return true
  4764  	}
  4765  	return false
  4766  }
  4767  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4768  	v_1 := v.Args[1]
  4769  	v_0 := v.Args[0]
  4770  	// match: (SLL x (MOVWconst [c]))
  4771  	// result: (SLLconst x [c&31])
  4772  	for {
  4773  		x := v_0
  4774  		if v_1.Op != OpMIPSMOVWconst {
  4775  			break
  4776  		}
  4777  		c := auxIntToInt32(v_1.AuxInt)
  4778  		v.reset(OpMIPSSLLconst)
  4779  		v.AuxInt = int32ToAuxInt(c & 31)
  4780  		v.AddArg(x)
  4781  		return true
  4782  	}
  4783  	return false
  4784  }
  4785  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4786  	v_0 := v.Args[0]
  4787  	// match: (SLLconst [c] (MOVWconst [d]))
  4788  	// result: (MOVWconst [d<<uint32(c)])
  4789  	for {
  4790  		c := auxIntToInt32(v.AuxInt)
  4791  		if v_0.Op != OpMIPSMOVWconst {
  4792  			break
  4793  		}
  4794  		d := auxIntToInt32(v_0.AuxInt)
  4795  		v.reset(OpMIPSMOVWconst)
  4796  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4797  		return true
  4798  	}
  4799  	return false
  4800  }
  4801  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4802  	v_1 := v.Args[1]
  4803  	v_0 := v.Args[0]
  4804  	// match: (SRA x (MOVWconst [c]))
  4805  	// result: (SRAconst x [c&31])
  4806  	for {
  4807  		x := v_0
  4808  		if v_1.Op != OpMIPSMOVWconst {
  4809  			break
  4810  		}
  4811  		c := auxIntToInt32(v_1.AuxInt)
  4812  		v.reset(OpMIPSSRAconst)
  4813  		v.AuxInt = int32ToAuxInt(c & 31)
  4814  		v.AddArg(x)
  4815  		return true
  4816  	}
  4817  	return false
  4818  }
  4819  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4820  	v_0 := v.Args[0]
  4821  	// match: (SRAconst [c] (MOVWconst [d]))
  4822  	// result: (MOVWconst [d>>uint32(c)])
  4823  	for {
  4824  		c := auxIntToInt32(v.AuxInt)
  4825  		if v_0.Op != OpMIPSMOVWconst {
  4826  			break
  4827  		}
  4828  		d := auxIntToInt32(v_0.AuxInt)
  4829  		v.reset(OpMIPSMOVWconst)
  4830  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4831  		return true
  4832  	}
  4833  	return false
  4834  }
  4835  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4836  	v_1 := v.Args[1]
  4837  	v_0 := v.Args[0]
  4838  	// match: (SRL x (MOVWconst [c]))
  4839  	// result: (SRLconst x [c&31])
  4840  	for {
  4841  		x := v_0
  4842  		if v_1.Op != OpMIPSMOVWconst {
  4843  			break
  4844  		}
  4845  		c := auxIntToInt32(v_1.AuxInt)
  4846  		v.reset(OpMIPSSRLconst)
  4847  		v.AuxInt = int32ToAuxInt(c & 31)
  4848  		v.AddArg(x)
  4849  		return true
  4850  	}
  4851  	return false
  4852  }
  4853  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4854  	v_0 := v.Args[0]
  4855  	// match: (SRLconst [c] (MOVWconst [d]))
  4856  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4857  	for {
  4858  		c := auxIntToInt32(v.AuxInt)
  4859  		if v_0.Op != OpMIPSMOVWconst {
  4860  			break
  4861  		}
  4862  		d := auxIntToInt32(v_0.AuxInt)
  4863  		v.reset(OpMIPSMOVWconst)
  4864  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4865  		return true
  4866  	}
  4867  	return false
  4868  }
  4869  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4870  	v_1 := v.Args[1]
  4871  	v_0 := v.Args[0]
  4872  	// match: (SUB x (MOVWconst [c]))
  4873  	// result: (SUBconst [c] x)
  4874  	for {
  4875  		x := v_0
  4876  		if v_1.Op != OpMIPSMOVWconst {
  4877  			break
  4878  		}
  4879  		c := auxIntToInt32(v_1.AuxInt)
  4880  		v.reset(OpMIPSSUBconst)
  4881  		v.AuxInt = int32ToAuxInt(c)
  4882  		v.AddArg(x)
  4883  		return true
  4884  	}
  4885  	// match: (SUB x (NEG y))
  4886  	// result: (ADD x y)
  4887  	for {
  4888  		x := v_0
  4889  		if v_1.Op != OpMIPSNEG {
  4890  			break
  4891  		}
  4892  		y := v_1.Args[0]
  4893  		v.reset(OpMIPSADD)
  4894  		v.AddArg2(x, y)
  4895  		return true
  4896  	}
  4897  	// match: (SUB x x)
  4898  	// result: (MOVWconst [0])
  4899  	for {
  4900  		x := v_0
  4901  		if x != v_1 {
  4902  			break
  4903  		}
  4904  		v.reset(OpMIPSMOVWconst)
  4905  		v.AuxInt = int32ToAuxInt(0)
  4906  		return true
  4907  	}
  4908  	// match: (SUB (MOVWconst [0]) x)
  4909  	// result: (NEG x)
  4910  	for {
  4911  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4912  			break
  4913  		}
  4914  		x := v_1
  4915  		v.reset(OpMIPSNEG)
  4916  		v.AddArg(x)
  4917  		return true
  4918  	}
  4919  	return false
  4920  }
  4921  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4922  	v_0 := v.Args[0]
  4923  	// match: (SUBconst [0] x)
  4924  	// result: x
  4925  	for {
  4926  		if auxIntToInt32(v.AuxInt) != 0 {
  4927  			break
  4928  		}
  4929  		x := v_0
  4930  		v.copyOf(x)
  4931  		return true
  4932  	}
  4933  	// match: (SUBconst [c] (MOVWconst [d]))
  4934  	// result: (MOVWconst [d-c])
  4935  	for {
  4936  		c := auxIntToInt32(v.AuxInt)
  4937  		if v_0.Op != OpMIPSMOVWconst {
  4938  			break
  4939  		}
  4940  		d := auxIntToInt32(v_0.AuxInt)
  4941  		v.reset(OpMIPSMOVWconst)
  4942  		v.AuxInt = int32ToAuxInt(d - c)
  4943  		return true
  4944  	}
  4945  	// match: (SUBconst [c] (SUBconst [d] x))
  4946  	// result: (ADDconst [-c-d] x)
  4947  	for {
  4948  		c := auxIntToInt32(v.AuxInt)
  4949  		if v_0.Op != OpMIPSSUBconst {
  4950  			break
  4951  		}
  4952  		d := auxIntToInt32(v_0.AuxInt)
  4953  		x := v_0.Args[0]
  4954  		v.reset(OpMIPSADDconst)
  4955  		v.AuxInt = int32ToAuxInt(-c - d)
  4956  		v.AddArg(x)
  4957  		return true
  4958  	}
  4959  	// match: (SUBconst [c] (ADDconst [d] x))
  4960  	// result: (ADDconst [-c+d] x)
  4961  	for {
  4962  		c := auxIntToInt32(v.AuxInt)
  4963  		if v_0.Op != OpMIPSADDconst {
  4964  			break
  4965  		}
  4966  		d := auxIntToInt32(v_0.AuxInt)
  4967  		x := v_0.Args[0]
  4968  		v.reset(OpMIPSADDconst)
  4969  		v.AuxInt = int32ToAuxInt(-c + d)
  4970  		v.AddArg(x)
  4971  		return true
  4972  	}
  4973  	return false
  4974  }
  4975  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  4976  	v_1 := v.Args[1]
  4977  	v_0 := v.Args[0]
  4978  	// match: (XOR x (MOVWconst [c]))
  4979  	// result: (XORconst [c] x)
  4980  	for {
  4981  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4982  			x := v_0
  4983  			if v_1.Op != OpMIPSMOVWconst {
  4984  				continue
  4985  			}
  4986  			c := auxIntToInt32(v_1.AuxInt)
  4987  			v.reset(OpMIPSXORconst)
  4988  			v.AuxInt = int32ToAuxInt(c)
  4989  			v.AddArg(x)
  4990  			return true
  4991  		}
  4992  		break
  4993  	}
  4994  	// match: (XOR x x)
  4995  	// result: (MOVWconst [0])
  4996  	for {
  4997  		x := v_0
  4998  		if x != v_1 {
  4999  			break
  5000  		}
  5001  		v.reset(OpMIPSMOVWconst)
  5002  		v.AuxInt = int32ToAuxInt(0)
  5003  		return true
  5004  	}
  5005  	return false
  5006  }
  5007  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  5008  	v_0 := v.Args[0]
  5009  	// match: (XORconst [0] x)
  5010  	// result: x
  5011  	for {
  5012  		if auxIntToInt32(v.AuxInt) != 0 {
  5013  			break
  5014  		}
  5015  		x := v_0
  5016  		v.copyOf(x)
  5017  		return true
  5018  	}
  5019  	// match: (XORconst [c] (MOVWconst [d]))
  5020  	// result: (MOVWconst [c^d])
  5021  	for {
  5022  		c := auxIntToInt32(v.AuxInt)
  5023  		if v_0.Op != OpMIPSMOVWconst {
  5024  			break
  5025  		}
  5026  		d := auxIntToInt32(v_0.AuxInt)
  5027  		v.reset(OpMIPSMOVWconst)
  5028  		v.AuxInt = int32ToAuxInt(c ^ d)
  5029  		return true
  5030  	}
  5031  	// match: (XORconst [c] (XORconst [d] x))
  5032  	// result: (XORconst [c^d] x)
  5033  	for {
  5034  		c := auxIntToInt32(v.AuxInt)
  5035  		if v_0.Op != OpMIPSXORconst {
  5036  			break
  5037  		}
  5038  		d := auxIntToInt32(v_0.AuxInt)
  5039  		x := v_0.Args[0]
  5040  		v.reset(OpMIPSXORconst)
  5041  		v.AuxInt = int32ToAuxInt(c ^ d)
  5042  		v.AddArg(x)
  5043  		return true
  5044  	}
  5045  	return false
  5046  }
  5047  func rewriteValueMIPS_OpMod16(v *Value) bool {
  5048  	v_1 := v.Args[1]
  5049  	v_0 := v.Args[0]
  5050  	b := v.Block
  5051  	typ := &b.Func.Config.Types
  5052  	// match: (Mod16 x y)
  5053  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  5054  	for {
  5055  		x := v_0
  5056  		y := v_1
  5057  		v.reset(OpSelect0)
  5058  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5059  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5060  		v1.AddArg(x)
  5061  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5062  		v2.AddArg(y)
  5063  		v0.AddArg2(v1, v2)
  5064  		v.AddArg(v0)
  5065  		return true
  5066  	}
  5067  }
  5068  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  5069  	v_1 := v.Args[1]
  5070  	v_0 := v.Args[0]
  5071  	b := v.Block
  5072  	typ := &b.Func.Config.Types
  5073  	// match: (Mod16u x y)
  5074  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  5075  	for {
  5076  		x := v_0
  5077  		y := v_1
  5078  		v.reset(OpSelect0)
  5079  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5080  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5081  		v1.AddArg(x)
  5082  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5083  		v2.AddArg(y)
  5084  		v0.AddArg2(v1, v2)
  5085  		v.AddArg(v0)
  5086  		return true
  5087  	}
  5088  }
  5089  func rewriteValueMIPS_OpMod32(v *Value) bool {
  5090  	v_1 := v.Args[1]
  5091  	v_0 := v.Args[0]
  5092  	b := v.Block
  5093  	typ := &b.Func.Config.Types
  5094  	// match: (Mod32 x y)
  5095  	// result: (Select0 (DIV x y))
  5096  	for {
  5097  		x := v_0
  5098  		y := v_1
  5099  		v.reset(OpSelect0)
  5100  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5101  		v0.AddArg2(x, y)
  5102  		v.AddArg(v0)
  5103  		return true
  5104  	}
  5105  }
  5106  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  5107  	v_1 := v.Args[1]
  5108  	v_0 := v.Args[0]
  5109  	b := v.Block
  5110  	typ := &b.Func.Config.Types
  5111  	// match: (Mod32u x y)
  5112  	// result: (Select0 (DIVU x y))
  5113  	for {
  5114  		x := v_0
  5115  		y := v_1
  5116  		v.reset(OpSelect0)
  5117  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5118  		v0.AddArg2(x, y)
  5119  		v.AddArg(v0)
  5120  		return true
  5121  	}
  5122  }
  5123  func rewriteValueMIPS_OpMod8(v *Value) bool {
  5124  	v_1 := v.Args[1]
  5125  	v_0 := v.Args[0]
  5126  	b := v.Block
  5127  	typ := &b.Func.Config.Types
  5128  	// match: (Mod8 x y)
  5129  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  5130  	for {
  5131  		x := v_0
  5132  		y := v_1
  5133  		v.reset(OpSelect0)
  5134  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5135  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5136  		v1.AddArg(x)
  5137  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5138  		v2.AddArg(y)
  5139  		v0.AddArg2(v1, v2)
  5140  		v.AddArg(v0)
  5141  		return true
  5142  	}
  5143  }
  5144  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  5145  	v_1 := v.Args[1]
  5146  	v_0 := v.Args[0]
  5147  	b := v.Block
  5148  	typ := &b.Func.Config.Types
  5149  	// match: (Mod8u x y)
  5150  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5151  	for {
  5152  		x := v_0
  5153  		y := v_1
  5154  		v.reset(OpSelect0)
  5155  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5156  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5157  		v1.AddArg(x)
  5158  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5159  		v2.AddArg(y)
  5160  		v0.AddArg2(v1, v2)
  5161  		v.AddArg(v0)
  5162  		return true
  5163  	}
  5164  }
  5165  func rewriteValueMIPS_OpMove(v *Value) bool {
  5166  	v_2 := v.Args[2]
  5167  	v_1 := v.Args[1]
  5168  	v_0 := v.Args[0]
  5169  	b := v.Block
  5170  	config := b.Func.Config
  5171  	typ := &b.Func.Config.Types
  5172  	// match: (Move [0] _ _ mem)
  5173  	// result: mem
  5174  	for {
  5175  		if auxIntToInt64(v.AuxInt) != 0 {
  5176  			break
  5177  		}
  5178  		mem := v_2
  5179  		v.copyOf(mem)
  5180  		return true
  5181  	}
  5182  	// match: (Move [1] dst src mem)
  5183  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  5184  	for {
  5185  		if auxIntToInt64(v.AuxInt) != 1 {
  5186  			break
  5187  		}
  5188  		dst := v_0
  5189  		src := v_1
  5190  		mem := v_2
  5191  		v.reset(OpMIPSMOVBstore)
  5192  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5193  		v0.AddArg2(src, mem)
  5194  		v.AddArg3(dst, v0, mem)
  5195  		return true
  5196  	}
  5197  	// match: (Move [2] {t} dst src mem)
  5198  	// cond: t.Alignment()%2 == 0
  5199  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  5200  	for {
  5201  		if auxIntToInt64(v.AuxInt) != 2 {
  5202  			break
  5203  		}
  5204  		t := auxToType(v.Aux)
  5205  		dst := v_0
  5206  		src := v_1
  5207  		mem := v_2
  5208  		if !(t.Alignment()%2 == 0) {
  5209  			break
  5210  		}
  5211  		v.reset(OpMIPSMOVHstore)
  5212  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5213  		v0.AddArg2(src, mem)
  5214  		v.AddArg3(dst, v0, mem)
  5215  		return true
  5216  	}
  5217  	// match: (Move [2] dst src mem)
  5218  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  5219  	for {
  5220  		if auxIntToInt64(v.AuxInt) != 2 {
  5221  			break
  5222  		}
  5223  		dst := v_0
  5224  		src := v_1
  5225  		mem := v_2
  5226  		v.reset(OpMIPSMOVBstore)
  5227  		v.AuxInt = int32ToAuxInt(1)
  5228  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5229  		v0.AuxInt = int32ToAuxInt(1)
  5230  		v0.AddArg2(src, mem)
  5231  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5232  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5233  		v2.AddArg2(src, mem)
  5234  		v1.AddArg3(dst, v2, mem)
  5235  		v.AddArg3(dst, v0, v1)
  5236  		return true
  5237  	}
  5238  	// match: (Move [4] {t} dst src mem)
  5239  	// cond: t.Alignment()%4 == 0
  5240  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5241  	for {
  5242  		if auxIntToInt64(v.AuxInt) != 4 {
  5243  			break
  5244  		}
  5245  		t := auxToType(v.Aux)
  5246  		dst := v_0
  5247  		src := v_1
  5248  		mem := v_2
  5249  		if !(t.Alignment()%4 == 0) {
  5250  			break
  5251  		}
  5252  		v.reset(OpMIPSMOVWstore)
  5253  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5254  		v0.AddArg2(src, mem)
  5255  		v.AddArg3(dst, v0, mem)
  5256  		return true
  5257  	}
  5258  	// match: (Move [4] {t} dst src mem)
  5259  	// cond: t.Alignment()%2 == 0
  5260  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  5261  	for {
  5262  		if auxIntToInt64(v.AuxInt) != 4 {
  5263  			break
  5264  		}
  5265  		t := auxToType(v.Aux)
  5266  		dst := v_0
  5267  		src := v_1
  5268  		mem := v_2
  5269  		if !(t.Alignment()%2 == 0) {
  5270  			break
  5271  		}
  5272  		v.reset(OpMIPSMOVHstore)
  5273  		v.AuxInt = int32ToAuxInt(2)
  5274  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5275  		v0.AuxInt = int32ToAuxInt(2)
  5276  		v0.AddArg2(src, mem)
  5277  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5278  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5279  		v2.AddArg2(src, mem)
  5280  		v1.AddArg3(dst, v2, mem)
  5281  		v.AddArg3(dst, v0, v1)
  5282  		return true
  5283  	}
  5284  	// match: (Move [4] dst src mem)
  5285  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  5286  	for {
  5287  		if auxIntToInt64(v.AuxInt) != 4 {
  5288  			break
  5289  		}
  5290  		dst := v_0
  5291  		src := v_1
  5292  		mem := v_2
  5293  		v.reset(OpMIPSMOVBstore)
  5294  		v.AuxInt = int32ToAuxInt(3)
  5295  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5296  		v0.AuxInt = int32ToAuxInt(3)
  5297  		v0.AddArg2(src, mem)
  5298  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5299  		v1.AuxInt = int32ToAuxInt(2)
  5300  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5301  		v2.AuxInt = int32ToAuxInt(2)
  5302  		v2.AddArg2(src, mem)
  5303  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5304  		v3.AuxInt = int32ToAuxInt(1)
  5305  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5306  		v4.AuxInt = int32ToAuxInt(1)
  5307  		v4.AddArg2(src, mem)
  5308  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5309  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5310  		v6.AddArg2(src, mem)
  5311  		v5.AddArg3(dst, v6, mem)
  5312  		v3.AddArg3(dst, v4, v5)
  5313  		v1.AddArg3(dst, v2, v3)
  5314  		v.AddArg3(dst, v0, v1)
  5315  		return true
  5316  	}
  5317  	// match: (Move [3] dst src mem)
  5318  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  5319  	for {
  5320  		if auxIntToInt64(v.AuxInt) != 3 {
  5321  			break
  5322  		}
  5323  		dst := v_0
  5324  		src := v_1
  5325  		mem := v_2
  5326  		v.reset(OpMIPSMOVBstore)
  5327  		v.AuxInt = int32ToAuxInt(2)
  5328  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5329  		v0.AuxInt = int32ToAuxInt(2)
  5330  		v0.AddArg2(src, mem)
  5331  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5332  		v1.AuxInt = int32ToAuxInt(1)
  5333  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5334  		v2.AuxInt = int32ToAuxInt(1)
  5335  		v2.AddArg2(src, mem)
  5336  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5337  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5338  		v4.AddArg2(src, mem)
  5339  		v3.AddArg3(dst, v4, mem)
  5340  		v1.AddArg3(dst, v2, v3)
  5341  		v.AddArg3(dst, v0, v1)
  5342  		return true
  5343  	}
  5344  	// match: (Move [8] {t} dst src mem)
  5345  	// cond: t.Alignment()%4 == 0
  5346  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5347  	for {
  5348  		if auxIntToInt64(v.AuxInt) != 8 {
  5349  			break
  5350  		}
  5351  		t := auxToType(v.Aux)
  5352  		dst := v_0
  5353  		src := v_1
  5354  		mem := v_2
  5355  		if !(t.Alignment()%4 == 0) {
  5356  			break
  5357  		}
  5358  		v.reset(OpMIPSMOVWstore)
  5359  		v.AuxInt = int32ToAuxInt(4)
  5360  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5361  		v0.AuxInt = int32ToAuxInt(4)
  5362  		v0.AddArg2(src, mem)
  5363  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5364  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5365  		v2.AddArg2(src, mem)
  5366  		v1.AddArg3(dst, v2, mem)
  5367  		v.AddArg3(dst, v0, v1)
  5368  		return true
  5369  	}
  5370  	// match: (Move [8] {t} dst src mem)
  5371  	// cond: t.Alignment()%2 == 0
  5372  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5373  	for {
  5374  		if auxIntToInt64(v.AuxInt) != 8 {
  5375  			break
  5376  		}
  5377  		t := auxToType(v.Aux)
  5378  		dst := v_0
  5379  		src := v_1
  5380  		mem := v_2
  5381  		if !(t.Alignment()%2 == 0) {
  5382  			break
  5383  		}
  5384  		v.reset(OpMIPSMOVHstore)
  5385  		v.AuxInt = int32ToAuxInt(6)
  5386  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5387  		v0.AuxInt = int32ToAuxInt(6)
  5388  		v0.AddArg2(src, mem)
  5389  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5390  		v1.AuxInt = int32ToAuxInt(4)
  5391  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5392  		v2.AuxInt = int32ToAuxInt(4)
  5393  		v2.AddArg2(src, mem)
  5394  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5395  		v3.AuxInt = int32ToAuxInt(2)
  5396  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5397  		v4.AuxInt = int32ToAuxInt(2)
  5398  		v4.AddArg2(src, mem)
  5399  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5400  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5401  		v6.AddArg2(src, mem)
  5402  		v5.AddArg3(dst, v6, mem)
  5403  		v3.AddArg3(dst, v4, v5)
  5404  		v1.AddArg3(dst, v2, v3)
  5405  		v.AddArg3(dst, v0, v1)
  5406  		return true
  5407  	}
  5408  	// match: (Move [6] {t} dst src mem)
  5409  	// cond: t.Alignment()%2 == 0
  5410  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5411  	for {
  5412  		if auxIntToInt64(v.AuxInt) != 6 {
  5413  			break
  5414  		}
  5415  		t := auxToType(v.Aux)
  5416  		dst := v_0
  5417  		src := v_1
  5418  		mem := v_2
  5419  		if !(t.Alignment()%2 == 0) {
  5420  			break
  5421  		}
  5422  		v.reset(OpMIPSMOVHstore)
  5423  		v.AuxInt = int32ToAuxInt(4)
  5424  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5425  		v0.AuxInt = int32ToAuxInt(4)
  5426  		v0.AddArg2(src, mem)
  5427  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5428  		v1.AuxInt = int32ToAuxInt(2)
  5429  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5430  		v2.AuxInt = int32ToAuxInt(2)
  5431  		v2.AddArg2(src, mem)
  5432  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5433  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5434  		v4.AddArg2(src, mem)
  5435  		v3.AddArg3(dst, v4, mem)
  5436  		v1.AddArg3(dst, v2, v3)
  5437  		v.AddArg3(dst, v0, v1)
  5438  		return true
  5439  	}
  5440  	// match: (Move [12] {t} dst src mem)
  5441  	// cond: t.Alignment()%4 == 0
  5442  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5443  	for {
  5444  		if auxIntToInt64(v.AuxInt) != 12 {
  5445  			break
  5446  		}
  5447  		t := auxToType(v.Aux)
  5448  		dst := v_0
  5449  		src := v_1
  5450  		mem := v_2
  5451  		if !(t.Alignment()%4 == 0) {
  5452  			break
  5453  		}
  5454  		v.reset(OpMIPSMOVWstore)
  5455  		v.AuxInt = int32ToAuxInt(8)
  5456  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5457  		v0.AuxInt = int32ToAuxInt(8)
  5458  		v0.AddArg2(src, mem)
  5459  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5460  		v1.AuxInt = int32ToAuxInt(4)
  5461  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5462  		v2.AuxInt = int32ToAuxInt(4)
  5463  		v2.AddArg2(src, mem)
  5464  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5465  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5466  		v4.AddArg2(src, mem)
  5467  		v3.AddArg3(dst, v4, mem)
  5468  		v1.AddArg3(dst, v2, v3)
  5469  		v.AddArg3(dst, v0, v1)
  5470  		return true
  5471  	}
  5472  	// match: (Move [16] {t} dst src mem)
  5473  	// cond: t.Alignment()%4 == 0
  5474  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5475  	for {
  5476  		if auxIntToInt64(v.AuxInt) != 16 {
  5477  			break
  5478  		}
  5479  		t := auxToType(v.Aux)
  5480  		dst := v_0
  5481  		src := v_1
  5482  		mem := v_2
  5483  		if !(t.Alignment()%4 == 0) {
  5484  			break
  5485  		}
  5486  		v.reset(OpMIPSMOVWstore)
  5487  		v.AuxInt = int32ToAuxInt(12)
  5488  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5489  		v0.AuxInt = int32ToAuxInt(12)
  5490  		v0.AddArg2(src, mem)
  5491  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5492  		v1.AuxInt = int32ToAuxInt(8)
  5493  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5494  		v2.AuxInt = int32ToAuxInt(8)
  5495  		v2.AddArg2(src, mem)
  5496  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5497  		v3.AuxInt = int32ToAuxInt(4)
  5498  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5499  		v4.AuxInt = int32ToAuxInt(4)
  5500  		v4.AddArg2(src, mem)
  5501  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5502  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5503  		v6.AddArg2(src, mem)
  5504  		v5.AddArg3(dst, v6, mem)
  5505  		v3.AddArg3(dst, v4, v5)
  5506  		v1.AddArg3(dst, v2, v3)
  5507  		v.AddArg3(dst, v0, v1)
  5508  		return true
  5509  	}
  5510  	// match: (Move [s] {t} dst src mem)
  5511  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5512  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5513  	for {
  5514  		s := auxIntToInt64(v.AuxInt)
  5515  		t := auxToType(v.Aux)
  5516  		dst := v_0
  5517  		src := v_1
  5518  		mem := v_2
  5519  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5520  			break
  5521  		}
  5522  		v.reset(OpMIPSLoweredMove)
  5523  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5524  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5525  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5526  		v0.AddArg(src)
  5527  		v.AddArg4(dst, src, v0, mem)
  5528  		return true
  5529  	}
  5530  	return false
  5531  }
  5532  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5533  	v_1 := v.Args[1]
  5534  	v_0 := v.Args[0]
  5535  	b := v.Block
  5536  	typ := &b.Func.Config.Types
  5537  	// match: (Neq16 x y)
  5538  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5539  	for {
  5540  		x := v_0
  5541  		y := v_1
  5542  		v.reset(OpMIPSSGTU)
  5543  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5544  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5545  		v1.AddArg(x)
  5546  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5547  		v2.AddArg(y)
  5548  		v0.AddArg2(v1, v2)
  5549  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5550  		v3.AuxInt = int32ToAuxInt(0)
  5551  		v.AddArg2(v0, v3)
  5552  		return true
  5553  	}
  5554  }
  5555  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5556  	v_1 := v.Args[1]
  5557  	v_0 := v.Args[0]
  5558  	b := v.Block
  5559  	typ := &b.Func.Config.Types
  5560  	// match: (Neq32 x y)
  5561  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5562  	for {
  5563  		x := v_0
  5564  		y := v_1
  5565  		v.reset(OpMIPSSGTU)
  5566  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5567  		v0.AddArg2(x, y)
  5568  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5569  		v1.AuxInt = int32ToAuxInt(0)
  5570  		v.AddArg2(v0, v1)
  5571  		return true
  5572  	}
  5573  }
  5574  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5575  	v_1 := v.Args[1]
  5576  	v_0 := v.Args[0]
  5577  	b := v.Block
  5578  	// match: (Neq32F x y)
  5579  	// result: (FPFlagFalse (CMPEQF x y))
  5580  	for {
  5581  		x := v_0
  5582  		y := v_1
  5583  		v.reset(OpMIPSFPFlagFalse)
  5584  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5585  		v0.AddArg2(x, y)
  5586  		v.AddArg(v0)
  5587  		return true
  5588  	}
  5589  }
  5590  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5591  	v_1 := v.Args[1]
  5592  	v_0 := v.Args[0]
  5593  	b := v.Block
  5594  	// match: (Neq64F x y)
  5595  	// result: (FPFlagFalse (CMPEQD x y))
  5596  	for {
  5597  		x := v_0
  5598  		y := v_1
  5599  		v.reset(OpMIPSFPFlagFalse)
  5600  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5601  		v0.AddArg2(x, y)
  5602  		v.AddArg(v0)
  5603  		return true
  5604  	}
  5605  }
  5606  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5607  	v_1 := v.Args[1]
  5608  	v_0 := v.Args[0]
  5609  	b := v.Block
  5610  	typ := &b.Func.Config.Types
  5611  	// match: (Neq8 x y)
  5612  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5613  	for {
  5614  		x := v_0
  5615  		y := v_1
  5616  		v.reset(OpMIPSSGTU)
  5617  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5618  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5619  		v1.AddArg(x)
  5620  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5621  		v2.AddArg(y)
  5622  		v0.AddArg2(v1, v2)
  5623  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5624  		v3.AuxInt = int32ToAuxInt(0)
  5625  		v.AddArg2(v0, v3)
  5626  		return true
  5627  	}
  5628  }
  5629  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5630  	v_1 := v.Args[1]
  5631  	v_0 := v.Args[0]
  5632  	b := v.Block
  5633  	typ := &b.Func.Config.Types
  5634  	// match: (NeqPtr x y)
  5635  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5636  	for {
  5637  		x := v_0
  5638  		y := v_1
  5639  		v.reset(OpMIPSSGTU)
  5640  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5641  		v0.AddArg2(x, y)
  5642  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5643  		v1.AuxInt = int32ToAuxInt(0)
  5644  		v.AddArg2(v0, v1)
  5645  		return true
  5646  	}
  5647  }
  5648  func rewriteValueMIPS_OpNot(v *Value) bool {
  5649  	v_0 := v.Args[0]
  5650  	// match: (Not x)
  5651  	// result: (XORconst [1] x)
  5652  	for {
  5653  		x := v_0
  5654  		v.reset(OpMIPSXORconst)
  5655  		v.AuxInt = int32ToAuxInt(1)
  5656  		v.AddArg(x)
  5657  		return true
  5658  	}
  5659  }
  5660  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5661  	v_0 := v.Args[0]
  5662  	// match: (OffPtr [off] ptr:(SP))
  5663  	// result: (MOVWaddr [int32(off)] ptr)
  5664  	for {
  5665  		off := auxIntToInt64(v.AuxInt)
  5666  		ptr := v_0
  5667  		if ptr.Op != OpSP {
  5668  			break
  5669  		}
  5670  		v.reset(OpMIPSMOVWaddr)
  5671  		v.AuxInt = int32ToAuxInt(int32(off))
  5672  		v.AddArg(ptr)
  5673  		return true
  5674  	}
  5675  	// match: (OffPtr [off] ptr)
  5676  	// result: (ADDconst [int32(off)] ptr)
  5677  	for {
  5678  		off := auxIntToInt64(v.AuxInt)
  5679  		ptr := v_0
  5680  		v.reset(OpMIPSADDconst)
  5681  		v.AuxInt = int32ToAuxInt(int32(off))
  5682  		v.AddArg(ptr)
  5683  		return true
  5684  	}
  5685  }
  5686  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5687  	v_1 := v.Args[1]
  5688  	v_0 := v.Args[0]
  5689  	b := v.Block
  5690  	typ := &b.Func.Config.Types
  5691  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5692  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5693  	for {
  5694  		t := v.Type
  5695  		x := v_0
  5696  		if v_1.Op != OpMIPSMOVWconst {
  5697  			break
  5698  		}
  5699  		c := auxIntToInt32(v_1.AuxInt)
  5700  		v.reset(OpOr16)
  5701  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5702  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5703  		v1.AuxInt = int32ToAuxInt(c & 15)
  5704  		v0.AddArg2(x, v1)
  5705  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5706  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5707  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5708  		v2.AddArg2(x, v3)
  5709  		v.AddArg2(v0, v2)
  5710  		return true
  5711  	}
  5712  	return false
  5713  }
  5714  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5715  	v_1 := v.Args[1]
  5716  	v_0 := v.Args[0]
  5717  	b := v.Block
  5718  	typ := &b.Func.Config.Types
  5719  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5720  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5721  	for {
  5722  		t := v.Type
  5723  		x := v_0
  5724  		if v_1.Op != OpMIPSMOVWconst {
  5725  			break
  5726  		}
  5727  		c := auxIntToInt32(v_1.AuxInt)
  5728  		v.reset(OpOr32)
  5729  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5730  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5731  		v1.AuxInt = int32ToAuxInt(c & 31)
  5732  		v0.AddArg2(x, v1)
  5733  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5734  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5735  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5736  		v2.AddArg2(x, v3)
  5737  		v.AddArg2(v0, v2)
  5738  		return true
  5739  	}
  5740  	return false
  5741  }
  5742  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5743  	v_1 := v.Args[1]
  5744  	v_0 := v.Args[0]
  5745  	b := v.Block
  5746  	typ := &b.Func.Config.Types
  5747  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5748  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5749  	for {
  5750  		t := v.Type
  5751  		x := v_0
  5752  		if v_1.Op != OpMIPSMOVWconst {
  5753  			break
  5754  		}
  5755  		c := auxIntToInt32(v_1.AuxInt)
  5756  		v.reset(OpOr64)
  5757  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5758  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5759  		v1.AuxInt = int32ToAuxInt(c & 63)
  5760  		v0.AddArg2(x, v1)
  5761  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5762  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5763  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5764  		v2.AddArg2(x, v3)
  5765  		v.AddArg2(v0, v2)
  5766  		return true
  5767  	}
  5768  	return false
  5769  }
  5770  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5771  	v_1 := v.Args[1]
  5772  	v_0 := v.Args[0]
  5773  	b := v.Block
  5774  	typ := &b.Func.Config.Types
  5775  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5776  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5777  	for {
  5778  		t := v.Type
  5779  		x := v_0
  5780  		if v_1.Op != OpMIPSMOVWconst {
  5781  			break
  5782  		}
  5783  		c := auxIntToInt32(v_1.AuxInt)
  5784  		v.reset(OpOr8)
  5785  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5786  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5787  		v1.AuxInt = int32ToAuxInt(c & 7)
  5788  		v0.AddArg2(x, v1)
  5789  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5790  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5791  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5792  		v2.AddArg2(x, v3)
  5793  		v.AddArg2(v0, v2)
  5794  		return true
  5795  	}
  5796  	return false
  5797  }
  5798  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5799  	v_1 := v.Args[1]
  5800  	v_0 := v.Args[0]
  5801  	b := v.Block
  5802  	typ := &b.Func.Config.Types
  5803  	// match: (Rsh16Ux16 <t> x y)
  5804  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5805  	for {
  5806  		t := v.Type
  5807  		x := v_0
  5808  		y := v_1
  5809  		v.reset(OpMIPSCMOVZ)
  5810  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5811  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5812  		v1.AddArg(x)
  5813  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5814  		v2.AddArg(y)
  5815  		v0.AddArg2(v1, v2)
  5816  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5817  		v3.AuxInt = int32ToAuxInt(0)
  5818  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5819  		v4.AuxInt = int32ToAuxInt(32)
  5820  		v4.AddArg(v2)
  5821  		v.AddArg3(v0, v3, v4)
  5822  		return true
  5823  	}
  5824  }
  5825  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5826  	v_1 := v.Args[1]
  5827  	v_0 := v.Args[0]
  5828  	b := v.Block
  5829  	typ := &b.Func.Config.Types
  5830  	// match: (Rsh16Ux32 <t> x y)
  5831  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5832  	for {
  5833  		t := v.Type
  5834  		x := v_0
  5835  		y := v_1
  5836  		v.reset(OpMIPSCMOVZ)
  5837  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5838  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5839  		v1.AddArg(x)
  5840  		v0.AddArg2(v1, y)
  5841  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5842  		v2.AuxInt = int32ToAuxInt(0)
  5843  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5844  		v3.AuxInt = int32ToAuxInt(32)
  5845  		v3.AddArg(y)
  5846  		v.AddArg3(v0, v2, v3)
  5847  		return true
  5848  	}
  5849  }
  5850  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5851  	v_1 := v.Args[1]
  5852  	v_0 := v.Args[0]
  5853  	b := v.Block
  5854  	typ := &b.Func.Config.Types
  5855  	// match: (Rsh16Ux64 x (Const64 [c]))
  5856  	// cond: uint32(c) < 16
  5857  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5858  	for {
  5859  		x := v_0
  5860  		if v_1.Op != OpConst64 {
  5861  			break
  5862  		}
  5863  		c := auxIntToInt64(v_1.AuxInt)
  5864  		if !(uint32(c) < 16) {
  5865  			break
  5866  		}
  5867  		v.reset(OpMIPSSRLconst)
  5868  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5869  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5870  		v0.AuxInt = int32ToAuxInt(16)
  5871  		v0.AddArg(x)
  5872  		v.AddArg(v0)
  5873  		return true
  5874  	}
  5875  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5876  	// cond: uint32(c) >= 16
  5877  	// result: (MOVWconst [0])
  5878  	for {
  5879  		if v_1.Op != OpConst64 {
  5880  			break
  5881  		}
  5882  		c := auxIntToInt64(v_1.AuxInt)
  5883  		if !(uint32(c) >= 16) {
  5884  			break
  5885  		}
  5886  		v.reset(OpMIPSMOVWconst)
  5887  		v.AuxInt = int32ToAuxInt(0)
  5888  		return true
  5889  	}
  5890  	return false
  5891  }
  5892  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5893  	v_1 := v.Args[1]
  5894  	v_0 := v.Args[0]
  5895  	b := v.Block
  5896  	typ := &b.Func.Config.Types
  5897  	// match: (Rsh16Ux8 <t> x y)
  5898  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5899  	for {
  5900  		t := v.Type
  5901  		x := v_0
  5902  		y := v_1
  5903  		v.reset(OpMIPSCMOVZ)
  5904  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5905  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5906  		v1.AddArg(x)
  5907  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5908  		v2.AddArg(y)
  5909  		v0.AddArg2(v1, v2)
  5910  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5911  		v3.AuxInt = int32ToAuxInt(0)
  5912  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5913  		v4.AuxInt = int32ToAuxInt(32)
  5914  		v4.AddArg(v2)
  5915  		v.AddArg3(v0, v3, v4)
  5916  		return true
  5917  	}
  5918  }
  5919  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5920  	v_1 := v.Args[1]
  5921  	v_0 := v.Args[0]
  5922  	b := v.Block
  5923  	typ := &b.Func.Config.Types
  5924  	// match: (Rsh16x16 x y)
  5925  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5926  	for {
  5927  		x := v_0
  5928  		y := v_1
  5929  		v.reset(OpMIPSSRA)
  5930  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5931  		v0.AddArg(x)
  5932  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5933  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5934  		v2.AddArg(y)
  5935  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5936  		v3.AuxInt = int32ToAuxInt(31)
  5937  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5938  		v4.AuxInt = int32ToAuxInt(32)
  5939  		v4.AddArg(v2)
  5940  		v1.AddArg3(v2, v3, v4)
  5941  		v.AddArg2(v0, v1)
  5942  		return true
  5943  	}
  5944  }
  5945  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5946  	v_1 := v.Args[1]
  5947  	v_0 := v.Args[0]
  5948  	b := v.Block
  5949  	typ := &b.Func.Config.Types
  5950  	// match: (Rsh16x32 x y)
  5951  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5952  	for {
  5953  		x := v_0
  5954  		y := v_1
  5955  		v.reset(OpMIPSSRA)
  5956  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5957  		v0.AddArg(x)
  5958  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5959  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5960  		v2.AuxInt = int32ToAuxInt(31)
  5961  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5962  		v3.AuxInt = int32ToAuxInt(32)
  5963  		v3.AddArg(y)
  5964  		v1.AddArg3(y, v2, v3)
  5965  		v.AddArg2(v0, v1)
  5966  		return true
  5967  	}
  5968  }
  5969  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  5970  	v_1 := v.Args[1]
  5971  	v_0 := v.Args[0]
  5972  	b := v.Block
  5973  	typ := &b.Func.Config.Types
  5974  	// match: (Rsh16x64 x (Const64 [c]))
  5975  	// cond: uint32(c) < 16
  5976  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5977  	for {
  5978  		x := v_0
  5979  		if v_1.Op != OpConst64 {
  5980  			break
  5981  		}
  5982  		c := auxIntToInt64(v_1.AuxInt)
  5983  		if !(uint32(c) < 16) {
  5984  			break
  5985  		}
  5986  		v.reset(OpMIPSSRAconst)
  5987  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5988  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5989  		v0.AuxInt = int32ToAuxInt(16)
  5990  		v0.AddArg(x)
  5991  		v.AddArg(v0)
  5992  		return true
  5993  	}
  5994  	// match: (Rsh16x64 x (Const64 [c]))
  5995  	// cond: uint32(c) >= 16
  5996  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  5997  	for {
  5998  		x := v_0
  5999  		if v_1.Op != OpConst64 {
  6000  			break
  6001  		}
  6002  		c := auxIntToInt64(v_1.AuxInt)
  6003  		if !(uint32(c) >= 16) {
  6004  			break
  6005  		}
  6006  		v.reset(OpMIPSSRAconst)
  6007  		v.AuxInt = int32ToAuxInt(31)
  6008  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6009  		v0.AuxInt = int32ToAuxInt(16)
  6010  		v0.AddArg(x)
  6011  		v.AddArg(v0)
  6012  		return true
  6013  	}
  6014  	return false
  6015  }
  6016  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  6017  	v_1 := v.Args[1]
  6018  	v_0 := v.Args[0]
  6019  	b := v.Block
  6020  	typ := &b.Func.Config.Types
  6021  	// match: (Rsh16x8 x y)
  6022  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6023  	for {
  6024  		x := v_0
  6025  		y := v_1
  6026  		v.reset(OpMIPSSRA)
  6027  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6028  		v0.AddArg(x)
  6029  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6030  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6031  		v2.AddArg(y)
  6032  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6033  		v3.AuxInt = int32ToAuxInt(31)
  6034  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6035  		v4.AuxInt = int32ToAuxInt(32)
  6036  		v4.AddArg(v2)
  6037  		v1.AddArg3(v2, v3, v4)
  6038  		v.AddArg2(v0, v1)
  6039  		return true
  6040  	}
  6041  }
  6042  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  6043  	v_1 := v.Args[1]
  6044  	v_0 := v.Args[0]
  6045  	b := v.Block
  6046  	typ := &b.Func.Config.Types
  6047  	// match: (Rsh32Ux16 <t> x y)
  6048  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6049  	for {
  6050  		t := v.Type
  6051  		x := v_0
  6052  		y := v_1
  6053  		v.reset(OpMIPSCMOVZ)
  6054  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6055  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6056  		v1.AddArg(y)
  6057  		v0.AddArg2(x, v1)
  6058  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6059  		v2.AuxInt = int32ToAuxInt(0)
  6060  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6061  		v3.AuxInt = int32ToAuxInt(32)
  6062  		v3.AddArg(v1)
  6063  		v.AddArg3(v0, v2, v3)
  6064  		return true
  6065  	}
  6066  }
  6067  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  6068  	v_1 := v.Args[1]
  6069  	v_0 := v.Args[0]
  6070  	b := v.Block
  6071  	typ := &b.Func.Config.Types
  6072  	// match: (Rsh32Ux32 <t> x y)
  6073  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  6074  	for {
  6075  		t := v.Type
  6076  		x := v_0
  6077  		y := v_1
  6078  		v.reset(OpMIPSCMOVZ)
  6079  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6080  		v0.AddArg2(x, y)
  6081  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6082  		v1.AuxInt = int32ToAuxInt(0)
  6083  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6084  		v2.AuxInt = int32ToAuxInt(32)
  6085  		v2.AddArg(y)
  6086  		v.AddArg3(v0, v1, v2)
  6087  		return true
  6088  	}
  6089  }
  6090  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  6091  	v_1 := v.Args[1]
  6092  	v_0 := v.Args[0]
  6093  	// match: (Rsh32Ux64 x (Const64 [c]))
  6094  	// cond: uint32(c) < 32
  6095  	// result: (SRLconst x [int32(c)])
  6096  	for {
  6097  		x := v_0
  6098  		if v_1.Op != OpConst64 {
  6099  			break
  6100  		}
  6101  		c := auxIntToInt64(v_1.AuxInt)
  6102  		if !(uint32(c) < 32) {
  6103  			break
  6104  		}
  6105  		v.reset(OpMIPSSRLconst)
  6106  		v.AuxInt = int32ToAuxInt(int32(c))
  6107  		v.AddArg(x)
  6108  		return true
  6109  	}
  6110  	// match: (Rsh32Ux64 _ (Const64 [c]))
  6111  	// cond: uint32(c) >= 32
  6112  	// result: (MOVWconst [0])
  6113  	for {
  6114  		if v_1.Op != OpConst64 {
  6115  			break
  6116  		}
  6117  		c := auxIntToInt64(v_1.AuxInt)
  6118  		if !(uint32(c) >= 32) {
  6119  			break
  6120  		}
  6121  		v.reset(OpMIPSMOVWconst)
  6122  		v.AuxInt = int32ToAuxInt(0)
  6123  		return true
  6124  	}
  6125  	return false
  6126  }
  6127  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  6128  	v_1 := v.Args[1]
  6129  	v_0 := v.Args[0]
  6130  	b := v.Block
  6131  	typ := &b.Func.Config.Types
  6132  	// match: (Rsh32Ux8 <t> x y)
  6133  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6134  	for {
  6135  		t := v.Type
  6136  		x := v_0
  6137  		y := v_1
  6138  		v.reset(OpMIPSCMOVZ)
  6139  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6140  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6141  		v1.AddArg(y)
  6142  		v0.AddArg2(x, v1)
  6143  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6144  		v2.AuxInt = int32ToAuxInt(0)
  6145  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6146  		v3.AuxInt = int32ToAuxInt(32)
  6147  		v3.AddArg(v1)
  6148  		v.AddArg3(v0, v2, v3)
  6149  		return true
  6150  	}
  6151  }
  6152  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  6153  	v_1 := v.Args[1]
  6154  	v_0 := v.Args[0]
  6155  	b := v.Block
  6156  	typ := &b.Func.Config.Types
  6157  	// match: (Rsh32x16 x y)
  6158  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6159  	for {
  6160  		x := v_0
  6161  		y := v_1
  6162  		v.reset(OpMIPSSRA)
  6163  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6164  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6165  		v1.AddArg(y)
  6166  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6167  		v2.AuxInt = int32ToAuxInt(31)
  6168  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6169  		v3.AuxInt = int32ToAuxInt(32)
  6170  		v3.AddArg(v1)
  6171  		v0.AddArg3(v1, v2, v3)
  6172  		v.AddArg2(x, v0)
  6173  		return true
  6174  	}
  6175  }
  6176  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  6177  	v_1 := v.Args[1]
  6178  	v_0 := v.Args[0]
  6179  	b := v.Block
  6180  	typ := &b.Func.Config.Types
  6181  	// match: (Rsh32x32 x y)
  6182  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6183  	for {
  6184  		x := v_0
  6185  		y := v_1
  6186  		v.reset(OpMIPSSRA)
  6187  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6188  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6189  		v1.AuxInt = int32ToAuxInt(31)
  6190  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6191  		v2.AuxInt = int32ToAuxInt(32)
  6192  		v2.AddArg(y)
  6193  		v0.AddArg3(y, v1, v2)
  6194  		v.AddArg2(x, v0)
  6195  		return true
  6196  	}
  6197  }
  6198  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  6199  	v_1 := v.Args[1]
  6200  	v_0 := v.Args[0]
  6201  	// match: (Rsh32x64 x (Const64 [c]))
  6202  	// cond: uint32(c) < 32
  6203  	// result: (SRAconst x [int32(c)])
  6204  	for {
  6205  		x := v_0
  6206  		if v_1.Op != OpConst64 {
  6207  			break
  6208  		}
  6209  		c := auxIntToInt64(v_1.AuxInt)
  6210  		if !(uint32(c) < 32) {
  6211  			break
  6212  		}
  6213  		v.reset(OpMIPSSRAconst)
  6214  		v.AuxInt = int32ToAuxInt(int32(c))
  6215  		v.AddArg(x)
  6216  		return true
  6217  	}
  6218  	// match: (Rsh32x64 x (Const64 [c]))
  6219  	// cond: uint32(c) >= 32
  6220  	// result: (SRAconst x [31])
  6221  	for {
  6222  		x := v_0
  6223  		if v_1.Op != OpConst64 {
  6224  			break
  6225  		}
  6226  		c := auxIntToInt64(v_1.AuxInt)
  6227  		if !(uint32(c) >= 32) {
  6228  			break
  6229  		}
  6230  		v.reset(OpMIPSSRAconst)
  6231  		v.AuxInt = int32ToAuxInt(31)
  6232  		v.AddArg(x)
  6233  		return true
  6234  	}
  6235  	return false
  6236  }
  6237  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6238  	v_1 := v.Args[1]
  6239  	v_0 := v.Args[0]
  6240  	b := v.Block
  6241  	typ := &b.Func.Config.Types
  6242  	// match: (Rsh32x8 x y)
  6243  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6244  	for {
  6245  		x := v_0
  6246  		y := v_1
  6247  		v.reset(OpMIPSSRA)
  6248  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6249  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6250  		v1.AddArg(y)
  6251  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6252  		v2.AuxInt = int32ToAuxInt(31)
  6253  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6254  		v3.AuxInt = int32ToAuxInt(32)
  6255  		v3.AddArg(v1)
  6256  		v0.AddArg3(v1, v2, v3)
  6257  		v.AddArg2(x, v0)
  6258  		return true
  6259  	}
  6260  }
  6261  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6262  	v_1 := v.Args[1]
  6263  	v_0 := v.Args[0]
  6264  	b := v.Block
  6265  	typ := &b.Func.Config.Types
  6266  	// match: (Rsh8Ux16 <t> x y)
  6267  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6268  	for {
  6269  		t := v.Type
  6270  		x := v_0
  6271  		y := v_1
  6272  		v.reset(OpMIPSCMOVZ)
  6273  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6274  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6275  		v1.AddArg(x)
  6276  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6277  		v2.AddArg(y)
  6278  		v0.AddArg2(v1, v2)
  6279  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6280  		v3.AuxInt = int32ToAuxInt(0)
  6281  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6282  		v4.AuxInt = int32ToAuxInt(32)
  6283  		v4.AddArg(v2)
  6284  		v.AddArg3(v0, v3, v4)
  6285  		return true
  6286  	}
  6287  }
  6288  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6289  	v_1 := v.Args[1]
  6290  	v_0 := v.Args[0]
  6291  	b := v.Block
  6292  	typ := &b.Func.Config.Types
  6293  	// match: (Rsh8Ux32 <t> x y)
  6294  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6295  	for {
  6296  		t := v.Type
  6297  		x := v_0
  6298  		y := v_1
  6299  		v.reset(OpMIPSCMOVZ)
  6300  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6301  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6302  		v1.AddArg(x)
  6303  		v0.AddArg2(v1, y)
  6304  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6305  		v2.AuxInt = int32ToAuxInt(0)
  6306  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6307  		v3.AuxInt = int32ToAuxInt(32)
  6308  		v3.AddArg(y)
  6309  		v.AddArg3(v0, v2, v3)
  6310  		return true
  6311  	}
  6312  }
  6313  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6314  	v_1 := v.Args[1]
  6315  	v_0 := v.Args[0]
  6316  	b := v.Block
  6317  	typ := &b.Func.Config.Types
  6318  	// match: (Rsh8Ux64 x (Const64 [c]))
  6319  	// cond: uint32(c) < 8
  6320  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6321  	for {
  6322  		x := v_0
  6323  		if v_1.Op != OpConst64 {
  6324  			break
  6325  		}
  6326  		c := auxIntToInt64(v_1.AuxInt)
  6327  		if !(uint32(c) < 8) {
  6328  			break
  6329  		}
  6330  		v.reset(OpMIPSSRLconst)
  6331  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6332  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6333  		v0.AuxInt = int32ToAuxInt(24)
  6334  		v0.AddArg(x)
  6335  		v.AddArg(v0)
  6336  		return true
  6337  	}
  6338  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6339  	// cond: uint32(c) >= 8
  6340  	// result: (MOVWconst [0])
  6341  	for {
  6342  		if v_1.Op != OpConst64 {
  6343  			break
  6344  		}
  6345  		c := auxIntToInt64(v_1.AuxInt)
  6346  		if !(uint32(c) >= 8) {
  6347  			break
  6348  		}
  6349  		v.reset(OpMIPSMOVWconst)
  6350  		v.AuxInt = int32ToAuxInt(0)
  6351  		return true
  6352  	}
  6353  	return false
  6354  }
  6355  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6356  	v_1 := v.Args[1]
  6357  	v_0 := v.Args[0]
  6358  	b := v.Block
  6359  	typ := &b.Func.Config.Types
  6360  	// match: (Rsh8Ux8 <t> x y)
  6361  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6362  	for {
  6363  		t := v.Type
  6364  		x := v_0
  6365  		y := v_1
  6366  		v.reset(OpMIPSCMOVZ)
  6367  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6368  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6369  		v1.AddArg(x)
  6370  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6371  		v2.AddArg(y)
  6372  		v0.AddArg2(v1, v2)
  6373  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6374  		v3.AuxInt = int32ToAuxInt(0)
  6375  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6376  		v4.AuxInt = int32ToAuxInt(32)
  6377  		v4.AddArg(v2)
  6378  		v.AddArg3(v0, v3, v4)
  6379  		return true
  6380  	}
  6381  }
  6382  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6383  	v_1 := v.Args[1]
  6384  	v_0 := v.Args[0]
  6385  	b := v.Block
  6386  	typ := &b.Func.Config.Types
  6387  	// match: (Rsh8x16 x y)
  6388  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6389  	for {
  6390  		x := v_0
  6391  		y := v_1
  6392  		v.reset(OpMIPSSRA)
  6393  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6394  		v0.AddArg(x)
  6395  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6396  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6397  		v2.AddArg(y)
  6398  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6399  		v3.AuxInt = int32ToAuxInt(31)
  6400  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6401  		v4.AuxInt = int32ToAuxInt(32)
  6402  		v4.AddArg(v2)
  6403  		v1.AddArg3(v2, v3, v4)
  6404  		v.AddArg2(v0, v1)
  6405  		return true
  6406  	}
  6407  }
  6408  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6409  	v_1 := v.Args[1]
  6410  	v_0 := v.Args[0]
  6411  	b := v.Block
  6412  	typ := &b.Func.Config.Types
  6413  	// match: (Rsh8x32 x y)
  6414  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6415  	for {
  6416  		x := v_0
  6417  		y := v_1
  6418  		v.reset(OpMIPSSRA)
  6419  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6420  		v0.AddArg(x)
  6421  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6422  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6423  		v2.AuxInt = int32ToAuxInt(31)
  6424  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6425  		v3.AuxInt = int32ToAuxInt(32)
  6426  		v3.AddArg(y)
  6427  		v1.AddArg3(y, v2, v3)
  6428  		v.AddArg2(v0, v1)
  6429  		return true
  6430  	}
  6431  }
  6432  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6433  	v_1 := v.Args[1]
  6434  	v_0 := v.Args[0]
  6435  	b := v.Block
  6436  	typ := &b.Func.Config.Types
  6437  	// match: (Rsh8x64 x (Const64 [c]))
  6438  	// cond: uint32(c) < 8
  6439  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6440  	for {
  6441  		x := v_0
  6442  		if v_1.Op != OpConst64 {
  6443  			break
  6444  		}
  6445  		c := auxIntToInt64(v_1.AuxInt)
  6446  		if !(uint32(c) < 8) {
  6447  			break
  6448  		}
  6449  		v.reset(OpMIPSSRAconst)
  6450  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6451  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6452  		v0.AuxInt = int32ToAuxInt(24)
  6453  		v0.AddArg(x)
  6454  		v.AddArg(v0)
  6455  		return true
  6456  	}
  6457  	// match: (Rsh8x64 x (Const64 [c]))
  6458  	// cond: uint32(c) >= 8
  6459  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6460  	for {
  6461  		x := v_0
  6462  		if v_1.Op != OpConst64 {
  6463  			break
  6464  		}
  6465  		c := auxIntToInt64(v_1.AuxInt)
  6466  		if !(uint32(c) >= 8) {
  6467  			break
  6468  		}
  6469  		v.reset(OpMIPSSRAconst)
  6470  		v.AuxInt = int32ToAuxInt(31)
  6471  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6472  		v0.AuxInt = int32ToAuxInt(24)
  6473  		v0.AddArg(x)
  6474  		v.AddArg(v0)
  6475  		return true
  6476  	}
  6477  	return false
  6478  }
  6479  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6480  	v_1 := v.Args[1]
  6481  	v_0 := v.Args[0]
  6482  	b := v.Block
  6483  	typ := &b.Func.Config.Types
  6484  	// match: (Rsh8x8 x y)
  6485  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6486  	for {
  6487  		x := v_0
  6488  		y := v_1
  6489  		v.reset(OpMIPSSRA)
  6490  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6491  		v0.AddArg(x)
  6492  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6493  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6494  		v2.AddArg(y)
  6495  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6496  		v3.AuxInt = int32ToAuxInt(31)
  6497  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6498  		v4.AuxInt = int32ToAuxInt(32)
  6499  		v4.AddArg(v2)
  6500  		v1.AddArg3(v2, v3, v4)
  6501  		v.AddArg2(v0, v1)
  6502  		return true
  6503  	}
  6504  }
  6505  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6506  	v_0 := v.Args[0]
  6507  	b := v.Block
  6508  	typ := &b.Func.Config.Types
  6509  	// match: (Select0 (Add32carry <t> x y))
  6510  	// result: (ADD <t.FieldType(0)> x y)
  6511  	for {
  6512  		if v_0.Op != OpAdd32carry {
  6513  			break
  6514  		}
  6515  		t := v_0.Type
  6516  		y := v_0.Args[1]
  6517  		x := v_0.Args[0]
  6518  		v.reset(OpMIPSADD)
  6519  		v.Type = t.FieldType(0)
  6520  		v.AddArg2(x, y)
  6521  		return true
  6522  	}
  6523  	// match: (Select0 (Add32carrywithcarry <t> x y c))
  6524  	// result: (ADD <t.FieldType(0)> c (ADD <t.FieldType(0)> x y))
  6525  	for {
  6526  		if v_0.Op != OpAdd32carrywithcarry {
  6527  			break
  6528  		}
  6529  		t := v_0.Type
  6530  		c := v_0.Args[2]
  6531  		x := v_0.Args[0]
  6532  		y := v_0.Args[1]
  6533  		v.reset(OpMIPSADD)
  6534  		v.Type = t.FieldType(0)
  6535  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6536  		v0.AddArg2(x, y)
  6537  		v.AddArg2(c, v0)
  6538  		return true
  6539  	}
  6540  	// match: (Select0 (Sub32carry <t> x y))
  6541  	// result: (SUB <t.FieldType(0)> x y)
  6542  	for {
  6543  		if v_0.Op != OpSub32carry {
  6544  			break
  6545  		}
  6546  		t := v_0.Type
  6547  		y := v_0.Args[1]
  6548  		x := v_0.Args[0]
  6549  		v.reset(OpMIPSSUB)
  6550  		v.Type = t.FieldType(0)
  6551  		v.AddArg2(x, y)
  6552  		return true
  6553  	}
  6554  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6555  	// result: (MOVWconst [0])
  6556  	for {
  6557  		if v_0.Op != OpMIPSMULTU {
  6558  			break
  6559  		}
  6560  		v_0_0 := v_0.Args[0]
  6561  		v_0_1 := v_0.Args[1]
  6562  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6563  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6564  				continue
  6565  			}
  6566  			v.reset(OpMIPSMOVWconst)
  6567  			v.AuxInt = int32ToAuxInt(0)
  6568  			return true
  6569  		}
  6570  		break
  6571  	}
  6572  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6573  	// result: (MOVWconst [0])
  6574  	for {
  6575  		if v_0.Op != OpMIPSMULTU {
  6576  			break
  6577  		}
  6578  		v_0_0 := v_0.Args[0]
  6579  		v_0_1 := v_0.Args[1]
  6580  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6581  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6582  				continue
  6583  			}
  6584  			v.reset(OpMIPSMOVWconst)
  6585  			v.AuxInt = int32ToAuxInt(0)
  6586  			return true
  6587  		}
  6588  		break
  6589  	}
  6590  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6591  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6592  	for {
  6593  		if v_0.Op != OpMIPSMULTU {
  6594  			break
  6595  		}
  6596  		_ = v_0.Args[1]
  6597  		v_0_0 := v_0.Args[0]
  6598  		v_0_1 := v_0.Args[1]
  6599  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6600  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6601  				continue
  6602  			}
  6603  			x := v_0_1
  6604  			v.reset(OpMIPSCMOVZ)
  6605  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6606  			v0.AuxInt = int32ToAuxInt(-1)
  6607  			v0.AddArg(x)
  6608  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6609  			v1.AuxInt = int32ToAuxInt(0)
  6610  			v.AddArg3(v0, v1, x)
  6611  			return true
  6612  		}
  6613  		break
  6614  	}
  6615  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6616  	// cond: isPowerOfTwo(uint32(c))
  6617  	// result: (SRLconst [int32(32-log32u(uint32(c)))] x)
  6618  	for {
  6619  		if v_0.Op != OpMIPSMULTU {
  6620  			break
  6621  		}
  6622  		_ = v_0.Args[1]
  6623  		v_0_0 := v_0.Args[0]
  6624  		v_0_1 := v_0.Args[1]
  6625  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6626  			if v_0_0.Op != OpMIPSMOVWconst {
  6627  				continue
  6628  			}
  6629  			c := auxIntToInt32(v_0_0.AuxInt)
  6630  			x := v_0_1
  6631  			if !(isPowerOfTwo(uint32(c))) {
  6632  				continue
  6633  			}
  6634  			v.reset(OpMIPSSRLconst)
  6635  			v.AuxInt = int32ToAuxInt(int32(32 - log32u(uint32(c))))
  6636  			v.AddArg(x)
  6637  			return true
  6638  		}
  6639  		break
  6640  	}
  6641  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6642  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6643  	for {
  6644  		if v_0.Op != OpMIPSMULTU {
  6645  			break
  6646  		}
  6647  		_ = v_0.Args[1]
  6648  		v_0_0 := v_0.Args[0]
  6649  		v_0_1 := v_0.Args[1]
  6650  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6651  			if v_0_0.Op != OpMIPSMOVWconst {
  6652  				continue
  6653  			}
  6654  			c := auxIntToInt32(v_0_0.AuxInt)
  6655  			if v_0_1.Op != OpMIPSMOVWconst {
  6656  				continue
  6657  			}
  6658  			d := auxIntToInt32(v_0_1.AuxInt)
  6659  			v.reset(OpMIPSMOVWconst)
  6660  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6661  			return true
  6662  		}
  6663  		break
  6664  	}
  6665  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6666  	// cond: d != 0
  6667  	// result: (MOVWconst [c%d])
  6668  	for {
  6669  		if v_0.Op != OpMIPSDIV {
  6670  			break
  6671  		}
  6672  		_ = v_0.Args[1]
  6673  		v_0_0 := v_0.Args[0]
  6674  		if v_0_0.Op != OpMIPSMOVWconst {
  6675  			break
  6676  		}
  6677  		c := auxIntToInt32(v_0_0.AuxInt)
  6678  		v_0_1 := v_0.Args[1]
  6679  		if v_0_1.Op != OpMIPSMOVWconst {
  6680  			break
  6681  		}
  6682  		d := auxIntToInt32(v_0_1.AuxInt)
  6683  		if !(d != 0) {
  6684  			break
  6685  		}
  6686  		v.reset(OpMIPSMOVWconst)
  6687  		v.AuxInt = int32ToAuxInt(c % d)
  6688  		return true
  6689  	}
  6690  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6691  	// cond: d != 0
  6692  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6693  	for {
  6694  		if v_0.Op != OpMIPSDIVU {
  6695  			break
  6696  		}
  6697  		_ = v_0.Args[1]
  6698  		v_0_0 := v_0.Args[0]
  6699  		if v_0_0.Op != OpMIPSMOVWconst {
  6700  			break
  6701  		}
  6702  		c := auxIntToInt32(v_0_0.AuxInt)
  6703  		v_0_1 := v_0.Args[1]
  6704  		if v_0_1.Op != OpMIPSMOVWconst {
  6705  			break
  6706  		}
  6707  		d := auxIntToInt32(v_0_1.AuxInt)
  6708  		if !(d != 0) {
  6709  			break
  6710  		}
  6711  		v.reset(OpMIPSMOVWconst)
  6712  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6713  		return true
  6714  	}
  6715  	return false
  6716  }
  6717  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6718  	v_0 := v.Args[0]
  6719  	b := v.Block
  6720  	typ := &b.Func.Config.Types
  6721  	// match: (Select1 (Add32carry <t> x y))
  6722  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6723  	for {
  6724  		if v_0.Op != OpAdd32carry {
  6725  			break
  6726  		}
  6727  		t := v_0.Type
  6728  		y := v_0.Args[1]
  6729  		x := v_0.Args[0]
  6730  		v.reset(OpMIPSSGTU)
  6731  		v.Type = typ.Bool
  6732  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6733  		v0.AddArg2(x, y)
  6734  		v.AddArg2(x, v0)
  6735  		return true
  6736  	}
  6737  	// match: (Select1 (Add32carrywithcarry <t> x y c))
  6738  	// result: (OR <typ.Bool> (SGTU <typ.Bool> x xy:(ADD <t.FieldType(0)> x y)) (SGTU <typ.Bool> xy (ADD <t.FieldType(0)> c xy)))
  6739  	for {
  6740  		if v_0.Op != OpAdd32carrywithcarry {
  6741  			break
  6742  		}
  6743  		t := v_0.Type
  6744  		c := v_0.Args[2]
  6745  		x := v_0.Args[0]
  6746  		y := v_0.Args[1]
  6747  		v.reset(OpMIPSOR)
  6748  		v.Type = typ.Bool
  6749  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  6750  		xy := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6751  		xy.AddArg2(x, y)
  6752  		v0.AddArg2(x, xy)
  6753  		v2 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  6754  		v3 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6755  		v3.AddArg2(c, xy)
  6756  		v2.AddArg2(xy, v3)
  6757  		v.AddArg2(v0, v2)
  6758  		return true
  6759  	}
  6760  	// match: (Select1 (Sub32carry <t> x y))
  6761  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6762  	for {
  6763  		if v_0.Op != OpSub32carry {
  6764  			break
  6765  		}
  6766  		t := v_0.Type
  6767  		y := v_0.Args[1]
  6768  		x := v_0.Args[0]
  6769  		v.reset(OpMIPSSGTU)
  6770  		v.Type = typ.Bool
  6771  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6772  		v0.AddArg2(x, y)
  6773  		v.AddArg2(v0, x)
  6774  		return true
  6775  	}
  6776  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6777  	// result: (MOVWconst [0])
  6778  	for {
  6779  		if v_0.Op != OpMIPSMULTU {
  6780  			break
  6781  		}
  6782  		v_0_0 := v_0.Args[0]
  6783  		v_0_1 := v_0.Args[1]
  6784  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6785  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6786  				continue
  6787  			}
  6788  			v.reset(OpMIPSMOVWconst)
  6789  			v.AuxInt = int32ToAuxInt(0)
  6790  			return true
  6791  		}
  6792  		break
  6793  	}
  6794  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6795  	// result: x
  6796  	for {
  6797  		if v_0.Op != OpMIPSMULTU {
  6798  			break
  6799  		}
  6800  		_ = v_0.Args[1]
  6801  		v_0_0 := v_0.Args[0]
  6802  		v_0_1 := v_0.Args[1]
  6803  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6804  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6805  				continue
  6806  			}
  6807  			x := v_0_1
  6808  			v.copyOf(x)
  6809  			return true
  6810  		}
  6811  		break
  6812  	}
  6813  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6814  	// result: (NEG <x.Type> x)
  6815  	for {
  6816  		if v_0.Op != OpMIPSMULTU {
  6817  			break
  6818  		}
  6819  		_ = v_0.Args[1]
  6820  		v_0_0 := v_0.Args[0]
  6821  		v_0_1 := v_0.Args[1]
  6822  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6823  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6824  				continue
  6825  			}
  6826  			x := v_0_1
  6827  			v.reset(OpMIPSNEG)
  6828  			v.Type = x.Type
  6829  			v.AddArg(x)
  6830  			return true
  6831  		}
  6832  		break
  6833  	}
  6834  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6835  	// cond: isPowerOfTwo(uint32(c))
  6836  	// result: (SLLconst [int32(log32u(uint32(c)))] x)
  6837  	for {
  6838  		if v_0.Op != OpMIPSMULTU {
  6839  			break
  6840  		}
  6841  		_ = v_0.Args[1]
  6842  		v_0_0 := v_0.Args[0]
  6843  		v_0_1 := v_0.Args[1]
  6844  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6845  			if v_0_0.Op != OpMIPSMOVWconst {
  6846  				continue
  6847  			}
  6848  			c := auxIntToInt32(v_0_0.AuxInt)
  6849  			x := v_0_1
  6850  			if !(isPowerOfTwo(uint32(c))) {
  6851  				continue
  6852  			}
  6853  			v.reset(OpMIPSSLLconst)
  6854  			v.AuxInt = int32ToAuxInt(int32(log32u(uint32(c))))
  6855  			v.AddArg(x)
  6856  			return true
  6857  		}
  6858  		break
  6859  	}
  6860  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6861  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6862  	for {
  6863  		if v_0.Op != OpMIPSMULTU {
  6864  			break
  6865  		}
  6866  		_ = v_0.Args[1]
  6867  		v_0_0 := v_0.Args[0]
  6868  		v_0_1 := v_0.Args[1]
  6869  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6870  			if v_0_0.Op != OpMIPSMOVWconst {
  6871  				continue
  6872  			}
  6873  			c := auxIntToInt32(v_0_0.AuxInt)
  6874  			if v_0_1.Op != OpMIPSMOVWconst {
  6875  				continue
  6876  			}
  6877  			d := auxIntToInt32(v_0_1.AuxInt)
  6878  			v.reset(OpMIPSMOVWconst)
  6879  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6880  			return true
  6881  		}
  6882  		break
  6883  	}
  6884  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6885  	// cond: d != 0
  6886  	// result: (MOVWconst [c/d])
  6887  	for {
  6888  		if v_0.Op != OpMIPSDIV {
  6889  			break
  6890  		}
  6891  		_ = v_0.Args[1]
  6892  		v_0_0 := v_0.Args[0]
  6893  		if v_0_0.Op != OpMIPSMOVWconst {
  6894  			break
  6895  		}
  6896  		c := auxIntToInt32(v_0_0.AuxInt)
  6897  		v_0_1 := v_0.Args[1]
  6898  		if v_0_1.Op != OpMIPSMOVWconst {
  6899  			break
  6900  		}
  6901  		d := auxIntToInt32(v_0_1.AuxInt)
  6902  		if !(d != 0) {
  6903  			break
  6904  		}
  6905  		v.reset(OpMIPSMOVWconst)
  6906  		v.AuxInt = int32ToAuxInt(c / d)
  6907  		return true
  6908  	}
  6909  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6910  	// cond: d != 0
  6911  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6912  	for {
  6913  		if v_0.Op != OpMIPSDIVU {
  6914  			break
  6915  		}
  6916  		_ = v_0.Args[1]
  6917  		v_0_0 := v_0.Args[0]
  6918  		if v_0_0.Op != OpMIPSMOVWconst {
  6919  			break
  6920  		}
  6921  		c := auxIntToInt32(v_0_0.AuxInt)
  6922  		v_0_1 := v_0.Args[1]
  6923  		if v_0_1.Op != OpMIPSMOVWconst {
  6924  			break
  6925  		}
  6926  		d := auxIntToInt32(v_0_1.AuxInt)
  6927  		if !(d != 0) {
  6928  			break
  6929  		}
  6930  		v.reset(OpMIPSMOVWconst)
  6931  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6932  		return true
  6933  	}
  6934  	return false
  6935  }
  6936  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6937  	v_0 := v.Args[0]
  6938  	// match: (Signmask x)
  6939  	// result: (SRAconst x [31])
  6940  	for {
  6941  		x := v_0
  6942  		v.reset(OpMIPSSRAconst)
  6943  		v.AuxInt = int32ToAuxInt(31)
  6944  		v.AddArg(x)
  6945  		return true
  6946  	}
  6947  }
  6948  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6949  	v_0 := v.Args[0]
  6950  	b := v.Block
  6951  	// match: (Slicemask <t> x)
  6952  	// result: (SRAconst (NEG <t> x) [31])
  6953  	for {
  6954  		t := v.Type
  6955  		x := v_0
  6956  		v.reset(OpMIPSSRAconst)
  6957  		v.AuxInt = int32ToAuxInt(31)
  6958  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6959  		v0.AddArg(x)
  6960  		v.AddArg(v0)
  6961  		return true
  6962  	}
  6963  }
  6964  func rewriteValueMIPS_OpStore(v *Value) bool {
  6965  	v_2 := v.Args[2]
  6966  	v_1 := v.Args[1]
  6967  	v_0 := v.Args[0]
  6968  	// match: (Store {t} ptr val mem)
  6969  	// cond: t.Size() == 1
  6970  	// result: (MOVBstore ptr val mem)
  6971  	for {
  6972  		t := auxToType(v.Aux)
  6973  		ptr := v_0
  6974  		val := v_1
  6975  		mem := v_2
  6976  		if !(t.Size() == 1) {
  6977  			break
  6978  		}
  6979  		v.reset(OpMIPSMOVBstore)
  6980  		v.AddArg3(ptr, val, mem)
  6981  		return true
  6982  	}
  6983  	// match: (Store {t} ptr val mem)
  6984  	// cond: t.Size() == 2
  6985  	// result: (MOVHstore ptr val mem)
  6986  	for {
  6987  		t := auxToType(v.Aux)
  6988  		ptr := v_0
  6989  		val := v_1
  6990  		mem := v_2
  6991  		if !(t.Size() == 2) {
  6992  			break
  6993  		}
  6994  		v.reset(OpMIPSMOVHstore)
  6995  		v.AddArg3(ptr, val, mem)
  6996  		return true
  6997  	}
  6998  	// match: (Store {t} ptr val mem)
  6999  	// cond: t.Size() == 4 && !t.IsFloat()
  7000  	// result: (MOVWstore ptr val mem)
  7001  	for {
  7002  		t := auxToType(v.Aux)
  7003  		ptr := v_0
  7004  		val := v_1
  7005  		mem := v_2
  7006  		if !(t.Size() == 4 && !t.IsFloat()) {
  7007  			break
  7008  		}
  7009  		v.reset(OpMIPSMOVWstore)
  7010  		v.AddArg3(ptr, val, mem)
  7011  		return true
  7012  	}
  7013  	// match: (Store {t} ptr val mem)
  7014  	// cond: t.Size() == 4 && t.IsFloat()
  7015  	// result: (MOVFstore ptr val mem)
  7016  	for {
  7017  		t := auxToType(v.Aux)
  7018  		ptr := v_0
  7019  		val := v_1
  7020  		mem := v_2
  7021  		if !(t.Size() == 4 && t.IsFloat()) {
  7022  			break
  7023  		}
  7024  		v.reset(OpMIPSMOVFstore)
  7025  		v.AddArg3(ptr, val, mem)
  7026  		return true
  7027  	}
  7028  	// match: (Store {t} ptr val mem)
  7029  	// cond: t.Size() == 8 && t.IsFloat()
  7030  	// result: (MOVDstore ptr val mem)
  7031  	for {
  7032  		t := auxToType(v.Aux)
  7033  		ptr := v_0
  7034  		val := v_1
  7035  		mem := v_2
  7036  		if !(t.Size() == 8 && t.IsFloat()) {
  7037  			break
  7038  		}
  7039  		v.reset(OpMIPSMOVDstore)
  7040  		v.AddArg3(ptr, val, mem)
  7041  		return true
  7042  	}
  7043  	return false
  7044  }
  7045  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  7046  	v_2 := v.Args[2]
  7047  	v_1 := v.Args[1]
  7048  	v_0 := v.Args[0]
  7049  	b := v.Block
  7050  	// match: (Sub32withcarry <t> x y c)
  7051  	// result: (SUB (SUB <t> x y) c)
  7052  	for {
  7053  		t := v.Type
  7054  		x := v_0
  7055  		y := v_1
  7056  		c := v_2
  7057  		v.reset(OpMIPSSUB)
  7058  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  7059  		v0.AddArg2(x, y)
  7060  		v.AddArg2(v0, c)
  7061  		return true
  7062  	}
  7063  }
  7064  func rewriteValueMIPS_OpZero(v *Value) bool {
  7065  	v_1 := v.Args[1]
  7066  	v_0 := v.Args[0]
  7067  	b := v.Block
  7068  	config := b.Func.Config
  7069  	typ := &b.Func.Config.Types
  7070  	// match: (Zero [0] _ mem)
  7071  	// result: mem
  7072  	for {
  7073  		if auxIntToInt64(v.AuxInt) != 0 {
  7074  			break
  7075  		}
  7076  		mem := v_1
  7077  		v.copyOf(mem)
  7078  		return true
  7079  	}
  7080  	// match: (Zero [1] ptr mem)
  7081  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  7082  	for {
  7083  		if auxIntToInt64(v.AuxInt) != 1 {
  7084  			break
  7085  		}
  7086  		ptr := v_0
  7087  		mem := v_1
  7088  		v.reset(OpMIPSMOVBstore)
  7089  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7090  		v0.AuxInt = int32ToAuxInt(0)
  7091  		v.AddArg3(ptr, v0, mem)
  7092  		return true
  7093  	}
  7094  	// match: (Zero [2] {t} ptr mem)
  7095  	// cond: t.Alignment()%2 == 0
  7096  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  7097  	for {
  7098  		if auxIntToInt64(v.AuxInt) != 2 {
  7099  			break
  7100  		}
  7101  		t := auxToType(v.Aux)
  7102  		ptr := v_0
  7103  		mem := v_1
  7104  		if !(t.Alignment()%2 == 0) {
  7105  			break
  7106  		}
  7107  		v.reset(OpMIPSMOVHstore)
  7108  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7109  		v0.AuxInt = int32ToAuxInt(0)
  7110  		v.AddArg3(ptr, v0, mem)
  7111  		return true
  7112  	}
  7113  	// match: (Zero [2] ptr mem)
  7114  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  7115  	for {
  7116  		if auxIntToInt64(v.AuxInt) != 2 {
  7117  			break
  7118  		}
  7119  		ptr := v_0
  7120  		mem := v_1
  7121  		v.reset(OpMIPSMOVBstore)
  7122  		v.AuxInt = int32ToAuxInt(1)
  7123  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7124  		v0.AuxInt = int32ToAuxInt(0)
  7125  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7126  		v1.AuxInt = int32ToAuxInt(0)
  7127  		v1.AddArg3(ptr, v0, mem)
  7128  		v.AddArg3(ptr, v0, v1)
  7129  		return true
  7130  	}
  7131  	// match: (Zero [4] {t} ptr mem)
  7132  	// cond: t.Alignment()%4 == 0
  7133  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  7134  	for {
  7135  		if auxIntToInt64(v.AuxInt) != 4 {
  7136  			break
  7137  		}
  7138  		t := auxToType(v.Aux)
  7139  		ptr := v_0
  7140  		mem := v_1
  7141  		if !(t.Alignment()%4 == 0) {
  7142  			break
  7143  		}
  7144  		v.reset(OpMIPSMOVWstore)
  7145  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7146  		v0.AuxInt = int32ToAuxInt(0)
  7147  		v.AddArg3(ptr, v0, mem)
  7148  		return true
  7149  	}
  7150  	// match: (Zero [4] {t} ptr mem)
  7151  	// cond: t.Alignment()%2 == 0
  7152  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  7153  	for {
  7154  		if auxIntToInt64(v.AuxInt) != 4 {
  7155  			break
  7156  		}
  7157  		t := auxToType(v.Aux)
  7158  		ptr := v_0
  7159  		mem := v_1
  7160  		if !(t.Alignment()%2 == 0) {
  7161  			break
  7162  		}
  7163  		v.reset(OpMIPSMOVHstore)
  7164  		v.AuxInt = int32ToAuxInt(2)
  7165  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7166  		v0.AuxInt = int32ToAuxInt(0)
  7167  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7168  		v1.AuxInt = int32ToAuxInt(0)
  7169  		v1.AddArg3(ptr, v0, mem)
  7170  		v.AddArg3(ptr, v0, v1)
  7171  		return true
  7172  	}
  7173  	// match: (Zero [4] ptr mem)
  7174  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  7175  	for {
  7176  		if auxIntToInt64(v.AuxInt) != 4 {
  7177  			break
  7178  		}
  7179  		ptr := v_0
  7180  		mem := v_1
  7181  		v.reset(OpMIPSMOVBstore)
  7182  		v.AuxInt = int32ToAuxInt(3)
  7183  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7184  		v0.AuxInt = int32ToAuxInt(0)
  7185  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7186  		v1.AuxInt = int32ToAuxInt(2)
  7187  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7188  		v2.AuxInt = int32ToAuxInt(1)
  7189  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7190  		v3.AuxInt = int32ToAuxInt(0)
  7191  		v3.AddArg3(ptr, v0, mem)
  7192  		v2.AddArg3(ptr, v0, v3)
  7193  		v1.AddArg3(ptr, v0, v2)
  7194  		v.AddArg3(ptr, v0, v1)
  7195  		return true
  7196  	}
  7197  	// match: (Zero [3] ptr mem)
  7198  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  7199  	for {
  7200  		if auxIntToInt64(v.AuxInt) != 3 {
  7201  			break
  7202  		}
  7203  		ptr := v_0
  7204  		mem := v_1
  7205  		v.reset(OpMIPSMOVBstore)
  7206  		v.AuxInt = int32ToAuxInt(2)
  7207  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7208  		v0.AuxInt = int32ToAuxInt(0)
  7209  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7210  		v1.AuxInt = int32ToAuxInt(1)
  7211  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7212  		v2.AuxInt = int32ToAuxInt(0)
  7213  		v2.AddArg3(ptr, v0, mem)
  7214  		v1.AddArg3(ptr, v0, v2)
  7215  		v.AddArg3(ptr, v0, v1)
  7216  		return true
  7217  	}
  7218  	// match: (Zero [6] {t} ptr mem)
  7219  	// cond: t.Alignment()%2 == 0
  7220  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  7221  	for {
  7222  		if auxIntToInt64(v.AuxInt) != 6 {
  7223  			break
  7224  		}
  7225  		t := auxToType(v.Aux)
  7226  		ptr := v_0
  7227  		mem := v_1
  7228  		if !(t.Alignment()%2 == 0) {
  7229  			break
  7230  		}
  7231  		v.reset(OpMIPSMOVHstore)
  7232  		v.AuxInt = int32ToAuxInt(4)
  7233  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7234  		v0.AuxInt = int32ToAuxInt(0)
  7235  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7236  		v1.AuxInt = int32ToAuxInt(2)
  7237  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7238  		v2.AuxInt = int32ToAuxInt(0)
  7239  		v2.AddArg3(ptr, v0, mem)
  7240  		v1.AddArg3(ptr, v0, v2)
  7241  		v.AddArg3(ptr, v0, v1)
  7242  		return true
  7243  	}
  7244  	// match: (Zero [8] {t} ptr mem)
  7245  	// cond: t.Alignment()%4 == 0
  7246  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  7247  	for {
  7248  		if auxIntToInt64(v.AuxInt) != 8 {
  7249  			break
  7250  		}
  7251  		t := auxToType(v.Aux)
  7252  		ptr := v_0
  7253  		mem := v_1
  7254  		if !(t.Alignment()%4 == 0) {
  7255  			break
  7256  		}
  7257  		v.reset(OpMIPSMOVWstore)
  7258  		v.AuxInt = int32ToAuxInt(4)
  7259  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7260  		v0.AuxInt = int32ToAuxInt(0)
  7261  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7262  		v1.AuxInt = int32ToAuxInt(0)
  7263  		v1.AddArg3(ptr, v0, mem)
  7264  		v.AddArg3(ptr, v0, v1)
  7265  		return true
  7266  	}
  7267  	// match: (Zero [12] {t} ptr mem)
  7268  	// cond: t.Alignment()%4 == 0
  7269  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7270  	for {
  7271  		if auxIntToInt64(v.AuxInt) != 12 {
  7272  			break
  7273  		}
  7274  		t := auxToType(v.Aux)
  7275  		ptr := v_0
  7276  		mem := v_1
  7277  		if !(t.Alignment()%4 == 0) {
  7278  			break
  7279  		}
  7280  		v.reset(OpMIPSMOVWstore)
  7281  		v.AuxInt = int32ToAuxInt(8)
  7282  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7283  		v0.AuxInt = int32ToAuxInt(0)
  7284  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7285  		v1.AuxInt = int32ToAuxInt(4)
  7286  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7287  		v2.AuxInt = int32ToAuxInt(0)
  7288  		v2.AddArg3(ptr, v0, mem)
  7289  		v1.AddArg3(ptr, v0, v2)
  7290  		v.AddArg3(ptr, v0, v1)
  7291  		return true
  7292  	}
  7293  	// match: (Zero [16] {t} ptr mem)
  7294  	// cond: t.Alignment()%4 == 0
  7295  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7296  	for {
  7297  		if auxIntToInt64(v.AuxInt) != 16 {
  7298  			break
  7299  		}
  7300  		t := auxToType(v.Aux)
  7301  		ptr := v_0
  7302  		mem := v_1
  7303  		if !(t.Alignment()%4 == 0) {
  7304  			break
  7305  		}
  7306  		v.reset(OpMIPSMOVWstore)
  7307  		v.AuxInt = int32ToAuxInt(12)
  7308  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7309  		v0.AuxInt = int32ToAuxInt(0)
  7310  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7311  		v1.AuxInt = int32ToAuxInt(8)
  7312  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7313  		v2.AuxInt = int32ToAuxInt(4)
  7314  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7315  		v3.AuxInt = int32ToAuxInt(0)
  7316  		v3.AddArg3(ptr, v0, mem)
  7317  		v2.AddArg3(ptr, v0, v3)
  7318  		v1.AddArg3(ptr, v0, v2)
  7319  		v.AddArg3(ptr, v0, v1)
  7320  		return true
  7321  	}
  7322  	// match: (Zero [s] {t} ptr mem)
  7323  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7324  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7325  	for {
  7326  		s := auxIntToInt64(v.AuxInt)
  7327  		t := auxToType(v.Aux)
  7328  		ptr := v_0
  7329  		mem := v_1
  7330  		if !(s > 16 || t.Alignment()%4 != 0) {
  7331  			break
  7332  		}
  7333  		v.reset(OpMIPSLoweredZero)
  7334  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7335  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7336  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7337  		v0.AddArg(ptr)
  7338  		v.AddArg3(ptr, v0, mem)
  7339  		return true
  7340  	}
  7341  	return false
  7342  }
  7343  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7344  	v_0 := v.Args[0]
  7345  	b := v.Block
  7346  	typ := &b.Func.Config.Types
  7347  	// match: (Zeromask x)
  7348  	// result: (NEG (SGTU x (MOVWconst [0])))
  7349  	for {
  7350  		x := v_0
  7351  		v.reset(OpMIPSNEG)
  7352  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7353  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7354  		v1.AuxInt = int32ToAuxInt(0)
  7355  		v0.AddArg2(x, v1)
  7356  		v.AddArg(v0)
  7357  		return true
  7358  	}
  7359  }
  7360  func rewriteBlockMIPS(b *Block) bool {
  7361  	switch b.Kind {
  7362  	case BlockMIPSEQ:
  7363  		// match: (EQ (FPFlagTrue cmp) yes no)
  7364  		// result: (FPF cmp yes no)
  7365  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7366  			v_0 := b.Controls[0]
  7367  			cmp := v_0.Args[0]
  7368  			b.resetWithControl(BlockMIPSFPF, cmp)
  7369  			return true
  7370  		}
  7371  		// match: (EQ (FPFlagFalse cmp) yes no)
  7372  		// result: (FPT cmp yes no)
  7373  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7374  			v_0 := b.Controls[0]
  7375  			cmp := v_0.Args[0]
  7376  			b.resetWithControl(BlockMIPSFPT, cmp)
  7377  			return true
  7378  		}
  7379  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7380  		// result: (NE cmp yes no)
  7381  		for b.Controls[0].Op == OpMIPSXORconst {
  7382  			v_0 := b.Controls[0]
  7383  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7384  				break
  7385  			}
  7386  			cmp := v_0.Args[0]
  7387  			if cmp.Op != OpMIPSSGT {
  7388  				break
  7389  			}
  7390  			b.resetWithControl(BlockMIPSNE, cmp)
  7391  			return true
  7392  		}
  7393  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7394  		// result: (NE cmp yes no)
  7395  		for b.Controls[0].Op == OpMIPSXORconst {
  7396  			v_0 := b.Controls[0]
  7397  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7398  				break
  7399  			}
  7400  			cmp := v_0.Args[0]
  7401  			if cmp.Op != OpMIPSSGTU {
  7402  				break
  7403  			}
  7404  			b.resetWithControl(BlockMIPSNE, cmp)
  7405  			return true
  7406  		}
  7407  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7408  		// result: (NE cmp yes no)
  7409  		for b.Controls[0].Op == OpMIPSXORconst {
  7410  			v_0 := b.Controls[0]
  7411  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7412  				break
  7413  			}
  7414  			cmp := v_0.Args[0]
  7415  			if cmp.Op != OpMIPSSGTconst {
  7416  				break
  7417  			}
  7418  			b.resetWithControl(BlockMIPSNE, cmp)
  7419  			return true
  7420  		}
  7421  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7422  		// result: (NE cmp yes no)
  7423  		for b.Controls[0].Op == OpMIPSXORconst {
  7424  			v_0 := b.Controls[0]
  7425  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7426  				break
  7427  			}
  7428  			cmp := v_0.Args[0]
  7429  			if cmp.Op != OpMIPSSGTUconst {
  7430  				break
  7431  			}
  7432  			b.resetWithControl(BlockMIPSNE, cmp)
  7433  			return true
  7434  		}
  7435  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7436  		// result: (NE cmp yes no)
  7437  		for b.Controls[0].Op == OpMIPSXORconst {
  7438  			v_0 := b.Controls[0]
  7439  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7440  				break
  7441  			}
  7442  			cmp := v_0.Args[0]
  7443  			if cmp.Op != OpMIPSSGTzero {
  7444  				break
  7445  			}
  7446  			b.resetWithControl(BlockMIPSNE, cmp)
  7447  			return true
  7448  		}
  7449  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7450  		// result: (NE cmp yes no)
  7451  		for b.Controls[0].Op == OpMIPSXORconst {
  7452  			v_0 := b.Controls[0]
  7453  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7454  				break
  7455  			}
  7456  			cmp := v_0.Args[0]
  7457  			if cmp.Op != OpMIPSSGTUzero {
  7458  				break
  7459  			}
  7460  			b.resetWithControl(BlockMIPSNE, cmp)
  7461  			return true
  7462  		}
  7463  		// match: (EQ (SGTUconst [1] x) yes no)
  7464  		// result: (NE x yes no)
  7465  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7466  			v_0 := b.Controls[0]
  7467  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7468  				break
  7469  			}
  7470  			x := v_0.Args[0]
  7471  			b.resetWithControl(BlockMIPSNE, x)
  7472  			return true
  7473  		}
  7474  		// match: (EQ (SGTUzero x) yes no)
  7475  		// result: (EQ x yes no)
  7476  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7477  			v_0 := b.Controls[0]
  7478  			x := v_0.Args[0]
  7479  			b.resetWithControl(BlockMIPSEQ, x)
  7480  			return true
  7481  		}
  7482  		// match: (EQ (SGTconst [0] x) yes no)
  7483  		// result: (GEZ x yes no)
  7484  		for b.Controls[0].Op == OpMIPSSGTconst {
  7485  			v_0 := b.Controls[0]
  7486  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7487  				break
  7488  			}
  7489  			x := v_0.Args[0]
  7490  			b.resetWithControl(BlockMIPSGEZ, x)
  7491  			return true
  7492  		}
  7493  		// match: (EQ (SGTzero x) yes no)
  7494  		// result: (LEZ x yes no)
  7495  		for b.Controls[0].Op == OpMIPSSGTzero {
  7496  			v_0 := b.Controls[0]
  7497  			x := v_0.Args[0]
  7498  			b.resetWithControl(BlockMIPSLEZ, x)
  7499  			return true
  7500  		}
  7501  		// match: (EQ (MOVWconst [0]) yes no)
  7502  		// result: (First yes no)
  7503  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7504  			v_0 := b.Controls[0]
  7505  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7506  				break
  7507  			}
  7508  			b.Reset(BlockFirst)
  7509  			return true
  7510  		}
  7511  		// match: (EQ (MOVWconst [c]) yes no)
  7512  		// cond: c != 0
  7513  		// result: (First no yes)
  7514  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7515  			v_0 := b.Controls[0]
  7516  			c := auxIntToInt32(v_0.AuxInt)
  7517  			if !(c != 0) {
  7518  				break
  7519  			}
  7520  			b.Reset(BlockFirst)
  7521  			b.swapSuccessors()
  7522  			return true
  7523  		}
  7524  	case BlockMIPSGEZ:
  7525  		// match: (GEZ (MOVWconst [c]) yes no)
  7526  		// cond: c >= 0
  7527  		// result: (First yes no)
  7528  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7529  			v_0 := b.Controls[0]
  7530  			c := auxIntToInt32(v_0.AuxInt)
  7531  			if !(c >= 0) {
  7532  				break
  7533  			}
  7534  			b.Reset(BlockFirst)
  7535  			return true
  7536  		}
  7537  		// match: (GEZ (MOVWconst [c]) yes no)
  7538  		// cond: c < 0
  7539  		// result: (First no yes)
  7540  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7541  			v_0 := b.Controls[0]
  7542  			c := auxIntToInt32(v_0.AuxInt)
  7543  			if !(c < 0) {
  7544  				break
  7545  			}
  7546  			b.Reset(BlockFirst)
  7547  			b.swapSuccessors()
  7548  			return true
  7549  		}
  7550  	case BlockMIPSGTZ:
  7551  		// match: (GTZ (MOVWconst [c]) yes no)
  7552  		// cond: c > 0
  7553  		// result: (First yes no)
  7554  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7555  			v_0 := b.Controls[0]
  7556  			c := auxIntToInt32(v_0.AuxInt)
  7557  			if !(c > 0) {
  7558  				break
  7559  			}
  7560  			b.Reset(BlockFirst)
  7561  			return true
  7562  		}
  7563  		// match: (GTZ (MOVWconst [c]) yes no)
  7564  		// cond: c <= 0
  7565  		// result: (First no yes)
  7566  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7567  			v_0 := b.Controls[0]
  7568  			c := auxIntToInt32(v_0.AuxInt)
  7569  			if !(c <= 0) {
  7570  				break
  7571  			}
  7572  			b.Reset(BlockFirst)
  7573  			b.swapSuccessors()
  7574  			return true
  7575  		}
  7576  	case BlockIf:
  7577  		// match: (If cond yes no)
  7578  		// result: (NE cond yes no)
  7579  		for {
  7580  			cond := b.Controls[0]
  7581  			b.resetWithControl(BlockMIPSNE, cond)
  7582  			return true
  7583  		}
  7584  	case BlockMIPSLEZ:
  7585  		// match: (LEZ (MOVWconst [c]) yes no)
  7586  		// cond: c <= 0
  7587  		// result: (First yes no)
  7588  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7589  			v_0 := b.Controls[0]
  7590  			c := auxIntToInt32(v_0.AuxInt)
  7591  			if !(c <= 0) {
  7592  				break
  7593  			}
  7594  			b.Reset(BlockFirst)
  7595  			return true
  7596  		}
  7597  		// match: (LEZ (MOVWconst [c]) yes no)
  7598  		// cond: c > 0
  7599  		// result: (First no yes)
  7600  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7601  			v_0 := b.Controls[0]
  7602  			c := auxIntToInt32(v_0.AuxInt)
  7603  			if !(c > 0) {
  7604  				break
  7605  			}
  7606  			b.Reset(BlockFirst)
  7607  			b.swapSuccessors()
  7608  			return true
  7609  		}
  7610  	case BlockMIPSLTZ:
  7611  		// match: (LTZ (MOVWconst [c]) yes no)
  7612  		// cond: c < 0
  7613  		// result: (First yes no)
  7614  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7615  			v_0 := b.Controls[0]
  7616  			c := auxIntToInt32(v_0.AuxInt)
  7617  			if !(c < 0) {
  7618  				break
  7619  			}
  7620  			b.Reset(BlockFirst)
  7621  			return true
  7622  		}
  7623  		// match: (LTZ (MOVWconst [c]) yes no)
  7624  		// cond: c >= 0
  7625  		// result: (First no yes)
  7626  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7627  			v_0 := b.Controls[0]
  7628  			c := auxIntToInt32(v_0.AuxInt)
  7629  			if !(c >= 0) {
  7630  				break
  7631  			}
  7632  			b.Reset(BlockFirst)
  7633  			b.swapSuccessors()
  7634  			return true
  7635  		}
  7636  	case BlockMIPSNE:
  7637  		// match: (NE (FPFlagTrue cmp) yes no)
  7638  		// result: (FPT cmp yes no)
  7639  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7640  			v_0 := b.Controls[0]
  7641  			cmp := v_0.Args[0]
  7642  			b.resetWithControl(BlockMIPSFPT, cmp)
  7643  			return true
  7644  		}
  7645  		// match: (NE (FPFlagFalse cmp) yes no)
  7646  		// result: (FPF cmp yes no)
  7647  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7648  			v_0 := b.Controls[0]
  7649  			cmp := v_0.Args[0]
  7650  			b.resetWithControl(BlockMIPSFPF, cmp)
  7651  			return true
  7652  		}
  7653  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7654  		// result: (EQ cmp yes no)
  7655  		for b.Controls[0].Op == OpMIPSXORconst {
  7656  			v_0 := b.Controls[0]
  7657  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7658  				break
  7659  			}
  7660  			cmp := v_0.Args[0]
  7661  			if cmp.Op != OpMIPSSGT {
  7662  				break
  7663  			}
  7664  			b.resetWithControl(BlockMIPSEQ, cmp)
  7665  			return true
  7666  		}
  7667  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7668  		// result: (EQ cmp yes no)
  7669  		for b.Controls[0].Op == OpMIPSXORconst {
  7670  			v_0 := b.Controls[0]
  7671  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7672  				break
  7673  			}
  7674  			cmp := v_0.Args[0]
  7675  			if cmp.Op != OpMIPSSGTU {
  7676  				break
  7677  			}
  7678  			b.resetWithControl(BlockMIPSEQ, cmp)
  7679  			return true
  7680  		}
  7681  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7682  		// result: (EQ cmp yes no)
  7683  		for b.Controls[0].Op == OpMIPSXORconst {
  7684  			v_0 := b.Controls[0]
  7685  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7686  				break
  7687  			}
  7688  			cmp := v_0.Args[0]
  7689  			if cmp.Op != OpMIPSSGTconst {
  7690  				break
  7691  			}
  7692  			b.resetWithControl(BlockMIPSEQ, cmp)
  7693  			return true
  7694  		}
  7695  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7696  		// result: (EQ cmp yes no)
  7697  		for b.Controls[0].Op == OpMIPSXORconst {
  7698  			v_0 := b.Controls[0]
  7699  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7700  				break
  7701  			}
  7702  			cmp := v_0.Args[0]
  7703  			if cmp.Op != OpMIPSSGTUconst {
  7704  				break
  7705  			}
  7706  			b.resetWithControl(BlockMIPSEQ, cmp)
  7707  			return true
  7708  		}
  7709  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7710  		// result: (EQ cmp yes no)
  7711  		for b.Controls[0].Op == OpMIPSXORconst {
  7712  			v_0 := b.Controls[0]
  7713  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7714  				break
  7715  			}
  7716  			cmp := v_0.Args[0]
  7717  			if cmp.Op != OpMIPSSGTzero {
  7718  				break
  7719  			}
  7720  			b.resetWithControl(BlockMIPSEQ, cmp)
  7721  			return true
  7722  		}
  7723  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7724  		// result: (EQ cmp yes no)
  7725  		for b.Controls[0].Op == OpMIPSXORconst {
  7726  			v_0 := b.Controls[0]
  7727  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7728  				break
  7729  			}
  7730  			cmp := v_0.Args[0]
  7731  			if cmp.Op != OpMIPSSGTUzero {
  7732  				break
  7733  			}
  7734  			b.resetWithControl(BlockMIPSEQ, cmp)
  7735  			return true
  7736  		}
  7737  		// match: (NE (SGTUconst [1] x) yes no)
  7738  		// result: (EQ x yes no)
  7739  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7740  			v_0 := b.Controls[0]
  7741  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7742  				break
  7743  			}
  7744  			x := v_0.Args[0]
  7745  			b.resetWithControl(BlockMIPSEQ, x)
  7746  			return true
  7747  		}
  7748  		// match: (NE (SGTUzero x) yes no)
  7749  		// result: (NE x yes no)
  7750  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7751  			v_0 := b.Controls[0]
  7752  			x := v_0.Args[0]
  7753  			b.resetWithControl(BlockMIPSNE, x)
  7754  			return true
  7755  		}
  7756  		// match: (NE (SGTconst [0] x) yes no)
  7757  		// result: (LTZ x yes no)
  7758  		for b.Controls[0].Op == OpMIPSSGTconst {
  7759  			v_0 := b.Controls[0]
  7760  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7761  				break
  7762  			}
  7763  			x := v_0.Args[0]
  7764  			b.resetWithControl(BlockMIPSLTZ, x)
  7765  			return true
  7766  		}
  7767  		// match: (NE (SGTzero x) yes no)
  7768  		// result: (GTZ x yes no)
  7769  		for b.Controls[0].Op == OpMIPSSGTzero {
  7770  			v_0 := b.Controls[0]
  7771  			x := v_0.Args[0]
  7772  			b.resetWithControl(BlockMIPSGTZ, x)
  7773  			return true
  7774  		}
  7775  		// match: (NE (MOVWconst [0]) yes no)
  7776  		// result: (First no yes)
  7777  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7778  			v_0 := b.Controls[0]
  7779  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7780  				break
  7781  			}
  7782  			b.Reset(BlockFirst)
  7783  			b.swapSuccessors()
  7784  			return true
  7785  		}
  7786  		// match: (NE (MOVWconst [c]) yes no)
  7787  		// cond: c != 0
  7788  		// result: (First yes no)
  7789  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7790  			v_0 := b.Controls[0]
  7791  			c := auxIntToInt32(v_0.AuxInt)
  7792  			if !(c != 0) {
  7793  				break
  7794  			}
  7795  			b.Reset(BlockFirst)
  7796  			return true
  7797  		}
  7798  	}
  7799  	return false
  7800  }
  7801