Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

     1  // Code generated from _gen/MIPS.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueMIPS(v *Value) bool {
     8  	switch v.Op {
     9  	case OpAbs:
    10  		v.Op = OpMIPSABSD
    11  		return true
    12  	case OpAdd16:
    13  		v.Op = OpMIPSADD
    14  		return true
    15  	case OpAdd32:
    16  		v.Op = OpMIPSADD
    17  		return true
    18  	case OpAdd32F:
    19  		v.Op = OpMIPSADDF
    20  		return true
    21  	case OpAdd32withcarry:
    22  		return rewriteValueMIPS_OpAdd32withcarry(v)
    23  	case OpAdd64F:
    24  		v.Op = OpMIPSADDD
    25  		return true
    26  	case OpAdd8:
    27  		v.Op = OpMIPSADD
    28  		return true
    29  	case OpAddPtr:
    30  		v.Op = OpMIPSADD
    31  		return true
    32  	case OpAddr:
    33  		return rewriteValueMIPS_OpAddr(v)
    34  	case OpAnd16:
    35  		v.Op = OpMIPSAND
    36  		return true
    37  	case OpAnd32:
    38  		v.Op = OpMIPSAND
    39  		return true
    40  	case OpAnd8:
    41  		v.Op = OpMIPSAND
    42  		return true
    43  	case OpAndB:
    44  		v.Op = OpMIPSAND
    45  		return true
    46  	case OpAtomicAdd32:
    47  		v.Op = OpMIPSLoweredAtomicAdd
    48  		return true
    49  	case OpAtomicAnd32:
    50  		v.Op = OpMIPSLoweredAtomicAnd
    51  		return true
    52  	case OpAtomicAnd8:
    53  		return rewriteValueMIPS_OpAtomicAnd8(v)
    54  	case OpAtomicCompareAndSwap32:
    55  		v.Op = OpMIPSLoweredAtomicCas
    56  		return true
    57  	case OpAtomicExchange32:
    58  		v.Op = OpMIPSLoweredAtomicExchange
    59  		return true
    60  	case OpAtomicLoad32:
    61  		v.Op = OpMIPSLoweredAtomicLoad32
    62  		return true
    63  	case OpAtomicLoad8:
    64  		v.Op = OpMIPSLoweredAtomicLoad8
    65  		return true
    66  	case OpAtomicLoadPtr:
    67  		v.Op = OpMIPSLoweredAtomicLoad32
    68  		return true
    69  	case OpAtomicOr32:
    70  		v.Op = OpMIPSLoweredAtomicOr
    71  		return true
    72  	case OpAtomicOr8:
    73  		return rewriteValueMIPS_OpAtomicOr8(v)
    74  	case OpAtomicStore32:
    75  		v.Op = OpMIPSLoweredAtomicStore32
    76  		return true
    77  	case OpAtomicStore8:
    78  		v.Op = OpMIPSLoweredAtomicStore8
    79  		return true
    80  	case OpAtomicStorePtrNoWB:
    81  		v.Op = OpMIPSLoweredAtomicStore32
    82  		return true
    83  	case OpAvg32u:
    84  		return rewriteValueMIPS_OpAvg32u(v)
    85  	case OpBitLen16:
    86  		return rewriteValueMIPS_OpBitLen16(v)
    87  	case OpBitLen32:
    88  		return rewriteValueMIPS_OpBitLen32(v)
    89  	case OpBitLen8:
    90  		return rewriteValueMIPS_OpBitLen8(v)
    91  	case OpClosureCall:
    92  		v.Op = OpMIPSCALLclosure
    93  		return true
    94  	case OpCom16:
    95  		return rewriteValueMIPS_OpCom16(v)
    96  	case OpCom32:
    97  		return rewriteValueMIPS_OpCom32(v)
    98  	case OpCom8:
    99  		return rewriteValueMIPS_OpCom8(v)
   100  	case OpConst16:
   101  		return rewriteValueMIPS_OpConst16(v)
   102  	case OpConst32:
   103  		return rewriteValueMIPS_OpConst32(v)
   104  	case OpConst32F:
   105  		v.Op = OpMIPSMOVFconst
   106  		return true
   107  	case OpConst64F:
   108  		v.Op = OpMIPSMOVDconst
   109  		return true
   110  	case OpConst8:
   111  		return rewriteValueMIPS_OpConst8(v)
   112  	case OpConstBool:
   113  		return rewriteValueMIPS_OpConstBool(v)
   114  	case OpConstNil:
   115  		return rewriteValueMIPS_OpConstNil(v)
   116  	case OpCtz16:
   117  		return rewriteValueMIPS_OpCtz16(v)
   118  	case OpCtz16NonZero:
   119  		v.Op = OpCtz32
   120  		return true
   121  	case OpCtz32:
   122  		return rewriteValueMIPS_OpCtz32(v)
   123  	case OpCtz32NonZero:
   124  		v.Op = OpCtz32
   125  		return true
   126  	case OpCtz8:
   127  		return rewriteValueMIPS_OpCtz8(v)
   128  	case OpCtz8NonZero:
   129  		v.Op = OpCtz32
   130  		return true
   131  	case OpCvt32Fto32:
   132  		v.Op = OpMIPSTRUNCFW
   133  		return true
   134  	case OpCvt32Fto64F:
   135  		v.Op = OpMIPSMOVFD
   136  		return true
   137  	case OpCvt32to32F:
   138  		v.Op = OpMIPSMOVWF
   139  		return true
   140  	case OpCvt32to64F:
   141  		v.Op = OpMIPSMOVWD
   142  		return true
   143  	case OpCvt64Fto32:
   144  		v.Op = OpMIPSTRUNCDW
   145  		return true
   146  	case OpCvt64Fto32F:
   147  		v.Op = OpMIPSMOVDF
   148  		return true
   149  	case OpCvtBoolToUint8:
   150  		v.Op = OpCopy
   151  		return true
   152  	case OpDiv16:
   153  		return rewriteValueMIPS_OpDiv16(v)
   154  	case OpDiv16u:
   155  		return rewriteValueMIPS_OpDiv16u(v)
   156  	case OpDiv32:
   157  		return rewriteValueMIPS_OpDiv32(v)
   158  	case OpDiv32F:
   159  		v.Op = OpMIPSDIVF
   160  		return true
   161  	case OpDiv32u:
   162  		return rewriteValueMIPS_OpDiv32u(v)
   163  	case OpDiv64F:
   164  		v.Op = OpMIPSDIVD
   165  		return true
   166  	case OpDiv8:
   167  		return rewriteValueMIPS_OpDiv8(v)
   168  	case OpDiv8u:
   169  		return rewriteValueMIPS_OpDiv8u(v)
   170  	case OpEq16:
   171  		return rewriteValueMIPS_OpEq16(v)
   172  	case OpEq32:
   173  		return rewriteValueMIPS_OpEq32(v)
   174  	case OpEq32F:
   175  		return rewriteValueMIPS_OpEq32F(v)
   176  	case OpEq64F:
   177  		return rewriteValueMIPS_OpEq64F(v)
   178  	case OpEq8:
   179  		return rewriteValueMIPS_OpEq8(v)
   180  	case OpEqB:
   181  		return rewriteValueMIPS_OpEqB(v)
   182  	case OpEqPtr:
   183  		return rewriteValueMIPS_OpEqPtr(v)
   184  	case OpGetCallerPC:
   185  		v.Op = OpMIPSLoweredGetCallerPC
   186  		return true
   187  	case OpGetCallerSP:
   188  		v.Op = OpMIPSLoweredGetCallerSP
   189  		return true
   190  	case OpGetClosurePtr:
   191  		v.Op = OpMIPSLoweredGetClosurePtr
   192  		return true
   193  	case OpHmul32:
   194  		return rewriteValueMIPS_OpHmul32(v)
   195  	case OpHmul32u:
   196  		return rewriteValueMIPS_OpHmul32u(v)
   197  	case OpInterCall:
   198  		v.Op = OpMIPSCALLinter
   199  		return true
   200  	case OpIsInBounds:
   201  		return rewriteValueMIPS_OpIsInBounds(v)
   202  	case OpIsNonNil:
   203  		return rewriteValueMIPS_OpIsNonNil(v)
   204  	case OpIsSliceInBounds:
   205  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   206  	case OpLeq16:
   207  		return rewriteValueMIPS_OpLeq16(v)
   208  	case OpLeq16U:
   209  		return rewriteValueMIPS_OpLeq16U(v)
   210  	case OpLeq32:
   211  		return rewriteValueMIPS_OpLeq32(v)
   212  	case OpLeq32F:
   213  		return rewriteValueMIPS_OpLeq32F(v)
   214  	case OpLeq32U:
   215  		return rewriteValueMIPS_OpLeq32U(v)
   216  	case OpLeq64F:
   217  		return rewriteValueMIPS_OpLeq64F(v)
   218  	case OpLeq8:
   219  		return rewriteValueMIPS_OpLeq8(v)
   220  	case OpLeq8U:
   221  		return rewriteValueMIPS_OpLeq8U(v)
   222  	case OpLess16:
   223  		return rewriteValueMIPS_OpLess16(v)
   224  	case OpLess16U:
   225  		return rewriteValueMIPS_OpLess16U(v)
   226  	case OpLess32:
   227  		return rewriteValueMIPS_OpLess32(v)
   228  	case OpLess32F:
   229  		return rewriteValueMIPS_OpLess32F(v)
   230  	case OpLess32U:
   231  		return rewriteValueMIPS_OpLess32U(v)
   232  	case OpLess64F:
   233  		return rewriteValueMIPS_OpLess64F(v)
   234  	case OpLess8:
   235  		return rewriteValueMIPS_OpLess8(v)
   236  	case OpLess8U:
   237  		return rewriteValueMIPS_OpLess8U(v)
   238  	case OpLoad:
   239  		return rewriteValueMIPS_OpLoad(v)
   240  	case OpLocalAddr:
   241  		return rewriteValueMIPS_OpLocalAddr(v)
   242  	case OpLsh16x16:
   243  		return rewriteValueMIPS_OpLsh16x16(v)
   244  	case OpLsh16x32:
   245  		return rewriteValueMIPS_OpLsh16x32(v)
   246  	case OpLsh16x64:
   247  		return rewriteValueMIPS_OpLsh16x64(v)
   248  	case OpLsh16x8:
   249  		return rewriteValueMIPS_OpLsh16x8(v)
   250  	case OpLsh32x16:
   251  		return rewriteValueMIPS_OpLsh32x16(v)
   252  	case OpLsh32x32:
   253  		return rewriteValueMIPS_OpLsh32x32(v)
   254  	case OpLsh32x64:
   255  		return rewriteValueMIPS_OpLsh32x64(v)
   256  	case OpLsh32x8:
   257  		return rewriteValueMIPS_OpLsh32x8(v)
   258  	case OpLsh8x16:
   259  		return rewriteValueMIPS_OpLsh8x16(v)
   260  	case OpLsh8x32:
   261  		return rewriteValueMIPS_OpLsh8x32(v)
   262  	case OpLsh8x64:
   263  		return rewriteValueMIPS_OpLsh8x64(v)
   264  	case OpLsh8x8:
   265  		return rewriteValueMIPS_OpLsh8x8(v)
   266  	case OpMIPSADD:
   267  		return rewriteValueMIPS_OpMIPSADD(v)
   268  	case OpMIPSADDconst:
   269  		return rewriteValueMIPS_OpMIPSADDconst(v)
   270  	case OpMIPSAND:
   271  		return rewriteValueMIPS_OpMIPSAND(v)
   272  	case OpMIPSANDconst:
   273  		return rewriteValueMIPS_OpMIPSANDconst(v)
   274  	case OpMIPSCMOVZ:
   275  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   276  	case OpMIPSCMOVZzero:
   277  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   278  	case OpMIPSLoweredAtomicAdd:
   279  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   280  	case OpMIPSLoweredAtomicStore32:
   281  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   282  	case OpMIPSMOVBUload:
   283  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   284  	case OpMIPSMOVBUreg:
   285  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   286  	case OpMIPSMOVBload:
   287  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   288  	case OpMIPSMOVBreg:
   289  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   290  	case OpMIPSMOVBstore:
   291  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   292  	case OpMIPSMOVBstorezero:
   293  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   294  	case OpMIPSMOVDload:
   295  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   296  	case OpMIPSMOVDstore:
   297  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   298  	case OpMIPSMOVFload:
   299  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   300  	case OpMIPSMOVFstore:
   301  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   302  	case OpMIPSMOVHUload:
   303  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   304  	case OpMIPSMOVHUreg:
   305  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   306  	case OpMIPSMOVHload:
   307  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   308  	case OpMIPSMOVHreg:
   309  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   310  	case OpMIPSMOVHstore:
   311  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   312  	case OpMIPSMOVHstorezero:
   313  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   314  	case OpMIPSMOVWload:
   315  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   316  	case OpMIPSMOVWnop:
   317  		return rewriteValueMIPS_OpMIPSMOVWnop(v)
   318  	case OpMIPSMOVWreg:
   319  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   320  	case OpMIPSMOVWstore:
   321  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   322  	case OpMIPSMOVWstorezero:
   323  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   324  	case OpMIPSMUL:
   325  		return rewriteValueMIPS_OpMIPSMUL(v)
   326  	case OpMIPSNEG:
   327  		return rewriteValueMIPS_OpMIPSNEG(v)
   328  	case OpMIPSNOR:
   329  		return rewriteValueMIPS_OpMIPSNOR(v)
   330  	case OpMIPSNORconst:
   331  		return rewriteValueMIPS_OpMIPSNORconst(v)
   332  	case OpMIPSOR:
   333  		return rewriteValueMIPS_OpMIPSOR(v)
   334  	case OpMIPSORconst:
   335  		return rewriteValueMIPS_OpMIPSORconst(v)
   336  	case OpMIPSSGT:
   337  		return rewriteValueMIPS_OpMIPSSGT(v)
   338  	case OpMIPSSGTU:
   339  		return rewriteValueMIPS_OpMIPSSGTU(v)
   340  	case OpMIPSSGTUconst:
   341  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   342  	case OpMIPSSGTUzero:
   343  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   344  	case OpMIPSSGTconst:
   345  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   346  	case OpMIPSSGTzero:
   347  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   348  	case OpMIPSSLL:
   349  		return rewriteValueMIPS_OpMIPSSLL(v)
   350  	case OpMIPSSLLconst:
   351  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   352  	case OpMIPSSRA:
   353  		return rewriteValueMIPS_OpMIPSSRA(v)
   354  	case OpMIPSSRAconst:
   355  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   356  	case OpMIPSSRL:
   357  		return rewriteValueMIPS_OpMIPSSRL(v)
   358  	case OpMIPSSRLconst:
   359  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   360  	case OpMIPSSUB:
   361  		return rewriteValueMIPS_OpMIPSSUB(v)
   362  	case OpMIPSSUBconst:
   363  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   364  	case OpMIPSXOR:
   365  		return rewriteValueMIPS_OpMIPSXOR(v)
   366  	case OpMIPSXORconst:
   367  		return rewriteValueMIPS_OpMIPSXORconst(v)
   368  	case OpMod16:
   369  		return rewriteValueMIPS_OpMod16(v)
   370  	case OpMod16u:
   371  		return rewriteValueMIPS_OpMod16u(v)
   372  	case OpMod32:
   373  		return rewriteValueMIPS_OpMod32(v)
   374  	case OpMod32u:
   375  		return rewriteValueMIPS_OpMod32u(v)
   376  	case OpMod8:
   377  		return rewriteValueMIPS_OpMod8(v)
   378  	case OpMod8u:
   379  		return rewriteValueMIPS_OpMod8u(v)
   380  	case OpMove:
   381  		return rewriteValueMIPS_OpMove(v)
   382  	case OpMul16:
   383  		v.Op = OpMIPSMUL
   384  		return true
   385  	case OpMul32:
   386  		v.Op = OpMIPSMUL
   387  		return true
   388  	case OpMul32F:
   389  		v.Op = OpMIPSMULF
   390  		return true
   391  	case OpMul32uhilo:
   392  		v.Op = OpMIPSMULTU
   393  		return true
   394  	case OpMul64F:
   395  		v.Op = OpMIPSMULD
   396  		return true
   397  	case OpMul8:
   398  		v.Op = OpMIPSMUL
   399  		return true
   400  	case OpNeg16:
   401  		v.Op = OpMIPSNEG
   402  		return true
   403  	case OpNeg32:
   404  		v.Op = OpMIPSNEG
   405  		return true
   406  	case OpNeg32F:
   407  		v.Op = OpMIPSNEGF
   408  		return true
   409  	case OpNeg64F:
   410  		v.Op = OpMIPSNEGD
   411  		return true
   412  	case OpNeg8:
   413  		v.Op = OpMIPSNEG
   414  		return true
   415  	case OpNeq16:
   416  		return rewriteValueMIPS_OpNeq16(v)
   417  	case OpNeq32:
   418  		return rewriteValueMIPS_OpNeq32(v)
   419  	case OpNeq32F:
   420  		return rewriteValueMIPS_OpNeq32F(v)
   421  	case OpNeq64F:
   422  		return rewriteValueMIPS_OpNeq64F(v)
   423  	case OpNeq8:
   424  		return rewriteValueMIPS_OpNeq8(v)
   425  	case OpNeqB:
   426  		v.Op = OpMIPSXOR
   427  		return true
   428  	case OpNeqPtr:
   429  		return rewriteValueMIPS_OpNeqPtr(v)
   430  	case OpNilCheck:
   431  		v.Op = OpMIPSLoweredNilCheck
   432  		return true
   433  	case OpNot:
   434  		return rewriteValueMIPS_OpNot(v)
   435  	case OpOffPtr:
   436  		return rewriteValueMIPS_OpOffPtr(v)
   437  	case OpOr16:
   438  		v.Op = OpMIPSOR
   439  		return true
   440  	case OpOr32:
   441  		v.Op = OpMIPSOR
   442  		return true
   443  	case OpOr8:
   444  		v.Op = OpMIPSOR
   445  		return true
   446  	case OpOrB:
   447  		v.Op = OpMIPSOR
   448  		return true
   449  	case OpPanicBounds:
   450  		return rewriteValueMIPS_OpPanicBounds(v)
   451  	case OpPanicExtend:
   452  		return rewriteValueMIPS_OpPanicExtend(v)
   453  	case OpRotateLeft16:
   454  		return rewriteValueMIPS_OpRotateLeft16(v)
   455  	case OpRotateLeft32:
   456  		return rewriteValueMIPS_OpRotateLeft32(v)
   457  	case OpRotateLeft64:
   458  		return rewriteValueMIPS_OpRotateLeft64(v)
   459  	case OpRotateLeft8:
   460  		return rewriteValueMIPS_OpRotateLeft8(v)
   461  	case OpRound32F:
   462  		v.Op = OpCopy
   463  		return true
   464  	case OpRound64F:
   465  		v.Op = OpCopy
   466  		return true
   467  	case OpRsh16Ux16:
   468  		return rewriteValueMIPS_OpRsh16Ux16(v)
   469  	case OpRsh16Ux32:
   470  		return rewriteValueMIPS_OpRsh16Ux32(v)
   471  	case OpRsh16Ux64:
   472  		return rewriteValueMIPS_OpRsh16Ux64(v)
   473  	case OpRsh16Ux8:
   474  		return rewriteValueMIPS_OpRsh16Ux8(v)
   475  	case OpRsh16x16:
   476  		return rewriteValueMIPS_OpRsh16x16(v)
   477  	case OpRsh16x32:
   478  		return rewriteValueMIPS_OpRsh16x32(v)
   479  	case OpRsh16x64:
   480  		return rewriteValueMIPS_OpRsh16x64(v)
   481  	case OpRsh16x8:
   482  		return rewriteValueMIPS_OpRsh16x8(v)
   483  	case OpRsh32Ux16:
   484  		return rewriteValueMIPS_OpRsh32Ux16(v)
   485  	case OpRsh32Ux32:
   486  		return rewriteValueMIPS_OpRsh32Ux32(v)
   487  	case OpRsh32Ux64:
   488  		return rewriteValueMIPS_OpRsh32Ux64(v)
   489  	case OpRsh32Ux8:
   490  		return rewriteValueMIPS_OpRsh32Ux8(v)
   491  	case OpRsh32x16:
   492  		return rewriteValueMIPS_OpRsh32x16(v)
   493  	case OpRsh32x32:
   494  		return rewriteValueMIPS_OpRsh32x32(v)
   495  	case OpRsh32x64:
   496  		return rewriteValueMIPS_OpRsh32x64(v)
   497  	case OpRsh32x8:
   498  		return rewriteValueMIPS_OpRsh32x8(v)
   499  	case OpRsh8Ux16:
   500  		return rewriteValueMIPS_OpRsh8Ux16(v)
   501  	case OpRsh8Ux32:
   502  		return rewriteValueMIPS_OpRsh8Ux32(v)
   503  	case OpRsh8Ux64:
   504  		return rewriteValueMIPS_OpRsh8Ux64(v)
   505  	case OpRsh8Ux8:
   506  		return rewriteValueMIPS_OpRsh8Ux8(v)
   507  	case OpRsh8x16:
   508  		return rewriteValueMIPS_OpRsh8x16(v)
   509  	case OpRsh8x32:
   510  		return rewriteValueMIPS_OpRsh8x32(v)
   511  	case OpRsh8x64:
   512  		return rewriteValueMIPS_OpRsh8x64(v)
   513  	case OpRsh8x8:
   514  		return rewriteValueMIPS_OpRsh8x8(v)
   515  	case OpSelect0:
   516  		return rewriteValueMIPS_OpSelect0(v)
   517  	case OpSelect1:
   518  		return rewriteValueMIPS_OpSelect1(v)
   519  	case OpSignExt16to32:
   520  		v.Op = OpMIPSMOVHreg
   521  		return true
   522  	case OpSignExt8to16:
   523  		v.Op = OpMIPSMOVBreg
   524  		return true
   525  	case OpSignExt8to32:
   526  		v.Op = OpMIPSMOVBreg
   527  		return true
   528  	case OpSignmask:
   529  		return rewriteValueMIPS_OpSignmask(v)
   530  	case OpSlicemask:
   531  		return rewriteValueMIPS_OpSlicemask(v)
   532  	case OpSqrt:
   533  		v.Op = OpMIPSSQRTD
   534  		return true
   535  	case OpSqrt32:
   536  		v.Op = OpMIPSSQRTF
   537  		return true
   538  	case OpStaticCall:
   539  		v.Op = OpMIPSCALLstatic
   540  		return true
   541  	case OpStore:
   542  		return rewriteValueMIPS_OpStore(v)
   543  	case OpSub16:
   544  		v.Op = OpMIPSSUB
   545  		return true
   546  	case OpSub32:
   547  		v.Op = OpMIPSSUB
   548  		return true
   549  	case OpSub32F:
   550  		v.Op = OpMIPSSUBF
   551  		return true
   552  	case OpSub32withcarry:
   553  		return rewriteValueMIPS_OpSub32withcarry(v)
   554  	case OpSub64F:
   555  		v.Op = OpMIPSSUBD
   556  		return true
   557  	case OpSub8:
   558  		v.Op = OpMIPSSUB
   559  		return true
   560  	case OpSubPtr:
   561  		v.Op = OpMIPSSUB
   562  		return true
   563  	case OpTailCall:
   564  		v.Op = OpMIPSCALLtail
   565  		return true
   566  	case OpTrunc16to8:
   567  		v.Op = OpCopy
   568  		return true
   569  	case OpTrunc32to16:
   570  		v.Op = OpCopy
   571  		return true
   572  	case OpTrunc32to8:
   573  		v.Op = OpCopy
   574  		return true
   575  	case OpWB:
   576  		v.Op = OpMIPSLoweredWB
   577  		return true
   578  	case OpXor16:
   579  		v.Op = OpMIPSXOR
   580  		return true
   581  	case OpXor32:
   582  		v.Op = OpMIPSXOR
   583  		return true
   584  	case OpXor8:
   585  		v.Op = OpMIPSXOR
   586  		return true
   587  	case OpZero:
   588  		return rewriteValueMIPS_OpZero(v)
   589  	case OpZeroExt16to32:
   590  		v.Op = OpMIPSMOVHUreg
   591  		return true
   592  	case OpZeroExt8to16:
   593  		v.Op = OpMIPSMOVBUreg
   594  		return true
   595  	case OpZeroExt8to32:
   596  		v.Op = OpMIPSMOVBUreg
   597  		return true
   598  	case OpZeromask:
   599  		return rewriteValueMIPS_OpZeromask(v)
   600  	}
   601  	return false
   602  }
   603  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   604  	v_2 := v.Args[2]
   605  	v_1 := v.Args[1]
   606  	v_0 := v.Args[0]
   607  	b := v.Block
   608  	// match: (Add32withcarry <t> x y c)
   609  	// result: (ADD c (ADD <t> x y))
   610  	for {
   611  		t := v.Type
   612  		x := v_0
   613  		y := v_1
   614  		c := v_2
   615  		v.reset(OpMIPSADD)
   616  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   617  		v0.AddArg2(x, y)
   618  		v.AddArg2(c, v0)
   619  		return true
   620  	}
   621  }
   622  func rewriteValueMIPS_OpAddr(v *Value) bool {
   623  	v_0 := v.Args[0]
   624  	// match: (Addr {sym} base)
   625  	// result: (MOVWaddr {sym} base)
   626  	for {
   627  		sym := auxToSym(v.Aux)
   628  		base := v_0
   629  		v.reset(OpMIPSMOVWaddr)
   630  		v.Aux = symToAux(sym)
   631  		v.AddArg(base)
   632  		return true
   633  	}
   634  }
   635  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   636  	v_2 := v.Args[2]
   637  	v_1 := v.Args[1]
   638  	v_0 := v.Args[0]
   639  	b := v.Block
   640  	config := b.Func.Config
   641  	typ := &b.Func.Config.Types
   642  	// match: (AtomicAnd8 ptr val mem)
   643  	// cond: !config.BigEndian
   644  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   645  	for {
   646  		ptr := v_0
   647  		val := v_1
   648  		mem := v_2
   649  		if !(!config.BigEndian) {
   650  			break
   651  		}
   652  		v.reset(OpMIPSLoweredAtomicAnd)
   653  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   654  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   655  		v1.AuxInt = int32ToAuxInt(^3)
   656  		v0.AddArg2(v1, ptr)
   657  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   658  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   659  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   660  		v4.AddArg(val)
   661  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   662  		v5.AuxInt = int32ToAuxInt(3)
   663  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   664  		v6.AuxInt = int32ToAuxInt(3)
   665  		v6.AddArg(ptr)
   666  		v5.AddArg(v6)
   667  		v3.AddArg2(v4, v5)
   668  		v7 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   669  		v7.AuxInt = int32ToAuxInt(0)
   670  		v8 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   671  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   672  		v9.AuxInt = int32ToAuxInt(0xff)
   673  		v8.AddArg2(v9, v5)
   674  		v7.AddArg(v8)
   675  		v2.AddArg2(v3, v7)
   676  		v.AddArg3(v0, v2, mem)
   677  		return true
   678  	}
   679  	// match: (AtomicAnd8 ptr val mem)
   680  	// cond: config.BigEndian
   681  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   682  	for {
   683  		ptr := v_0
   684  		val := v_1
   685  		mem := v_2
   686  		if !(config.BigEndian) {
   687  			break
   688  		}
   689  		v.reset(OpMIPSLoweredAtomicAnd)
   690  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   691  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   692  		v1.AuxInt = int32ToAuxInt(^3)
   693  		v0.AddArg2(v1, ptr)
   694  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   695  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   696  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   697  		v4.AddArg(val)
   698  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   699  		v5.AuxInt = int32ToAuxInt(3)
   700  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   701  		v6.AuxInt = int32ToAuxInt(3)
   702  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   703  		v7.AuxInt = int32ToAuxInt(3)
   704  		v7.AddArg(ptr)
   705  		v6.AddArg(v7)
   706  		v5.AddArg(v6)
   707  		v3.AddArg2(v4, v5)
   708  		v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   709  		v8.AuxInt = int32ToAuxInt(0)
   710  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   711  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   712  		v10.AuxInt = int32ToAuxInt(0xff)
   713  		v9.AddArg2(v10, v5)
   714  		v8.AddArg(v9)
   715  		v2.AddArg2(v3, v8)
   716  		v.AddArg3(v0, v2, mem)
   717  		return true
   718  	}
   719  	return false
   720  }
   721  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   722  	v_2 := v.Args[2]
   723  	v_1 := v.Args[1]
   724  	v_0 := v.Args[0]
   725  	b := v.Block
   726  	config := b.Func.Config
   727  	typ := &b.Func.Config.Types
   728  	// match: (AtomicOr8 ptr val mem)
   729  	// cond: !config.BigEndian
   730  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   731  	for {
   732  		ptr := v_0
   733  		val := v_1
   734  		mem := v_2
   735  		if !(!config.BigEndian) {
   736  			break
   737  		}
   738  		v.reset(OpMIPSLoweredAtomicOr)
   739  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   740  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   741  		v1.AuxInt = int32ToAuxInt(^3)
   742  		v0.AddArg2(v1, ptr)
   743  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   744  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   745  		v3.AddArg(val)
   746  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   747  		v4.AuxInt = int32ToAuxInt(3)
   748  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   749  		v5.AuxInt = int32ToAuxInt(3)
   750  		v5.AddArg(ptr)
   751  		v4.AddArg(v5)
   752  		v2.AddArg2(v3, v4)
   753  		v.AddArg3(v0, v2, mem)
   754  		return true
   755  	}
   756  	// match: (AtomicOr8 ptr val mem)
   757  	// cond: config.BigEndian
   758  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   759  	for {
   760  		ptr := v_0
   761  		val := v_1
   762  		mem := v_2
   763  		if !(config.BigEndian) {
   764  			break
   765  		}
   766  		v.reset(OpMIPSLoweredAtomicOr)
   767  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   768  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   769  		v1.AuxInt = int32ToAuxInt(^3)
   770  		v0.AddArg2(v1, ptr)
   771  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   772  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   773  		v3.AddArg(val)
   774  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   775  		v4.AuxInt = int32ToAuxInt(3)
   776  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   777  		v5.AuxInt = int32ToAuxInt(3)
   778  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   779  		v6.AuxInt = int32ToAuxInt(3)
   780  		v6.AddArg(ptr)
   781  		v5.AddArg(v6)
   782  		v4.AddArg(v5)
   783  		v2.AddArg2(v3, v4)
   784  		v.AddArg3(v0, v2, mem)
   785  		return true
   786  	}
   787  	return false
   788  }
   789  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   790  	v_1 := v.Args[1]
   791  	v_0 := v.Args[0]
   792  	b := v.Block
   793  	// match: (Avg32u <t> x y)
   794  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   795  	for {
   796  		t := v.Type
   797  		x := v_0
   798  		y := v_1
   799  		v.reset(OpMIPSADD)
   800  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   801  		v0.AuxInt = int32ToAuxInt(1)
   802  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   803  		v1.AddArg2(x, y)
   804  		v0.AddArg(v1)
   805  		v.AddArg2(v0, y)
   806  		return true
   807  	}
   808  }
   809  func rewriteValueMIPS_OpBitLen16(v *Value) bool {
   810  	v_0 := v.Args[0]
   811  	b := v.Block
   812  	typ := &b.Func.Config.Types
   813  	// match: (BitLen16 x)
   814  	// result: (BitLen32 (ZeroExt16to32 x))
   815  	for {
   816  		x := v_0
   817  		v.reset(OpBitLen32)
   818  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   819  		v0.AddArg(x)
   820  		v.AddArg(v0)
   821  		return true
   822  	}
   823  }
   824  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   825  	v_0 := v.Args[0]
   826  	b := v.Block
   827  	typ := &b.Func.Config.Types
   828  	// match: (BitLen32 <t> x)
   829  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   830  	for {
   831  		t := v.Type
   832  		x := v_0
   833  		v.reset(OpMIPSSUB)
   834  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   835  		v0.AuxInt = int32ToAuxInt(32)
   836  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   837  		v1.AddArg(x)
   838  		v.AddArg2(v0, v1)
   839  		return true
   840  	}
   841  }
   842  func rewriteValueMIPS_OpBitLen8(v *Value) bool {
   843  	v_0 := v.Args[0]
   844  	b := v.Block
   845  	typ := &b.Func.Config.Types
   846  	// match: (BitLen8 x)
   847  	// result: (BitLen32 (ZeroExt8to32 x))
   848  	for {
   849  		x := v_0
   850  		v.reset(OpBitLen32)
   851  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   852  		v0.AddArg(x)
   853  		v.AddArg(v0)
   854  		return true
   855  	}
   856  }
   857  func rewriteValueMIPS_OpCom16(v *Value) bool {
   858  	v_0 := v.Args[0]
   859  	// match: (Com16 x)
   860  	// result: (NORconst [0] x)
   861  	for {
   862  		x := v_0
   863  		v.reset(OpMIPSNORconst)
   864  		v.AuxInt = int32ToAuxInt(0)
   865  		v.AddArg(x)
   866  		return true
   867  	}
   868  }
   869  func rewriteValueMIPS_OpCom32(v *Value) bool {
   870  	v_0 := v.Args[0]
   871  	// match: (Com32 x)
   872  	// result: (NORconst [0] x)
   873  	for {
   874  		x := v_0
   875  		v.reset(OpMIPSNORconst)
   876  		v.AuxInt = int32ToAuxInt(0)
   877  		v.AddArg(x)
   878  		return true
   879  	}
   880  }
   881  func rewriteValueMIPS_OpCom8(v *Value) bool {
   882  	v_0 := v.Args[0]
   883  	// match: (Com8 x)
   884  	// result: (NORconst [0] x)
   885  	for {
   886  		x := v_0
   887  		v.reset(OpMIPSNORconst)
   888  		v.AuxInt = int32ToAuxInt(0)
   889  		v.AddArg(x)
   890  		return true
   891  	}
   892  }
   893  func rewriteValueMIPS_OpConst16(v *Value) bool {
   894  	// match: (Const16 [val])
   895  	// result: (MOVWconst [int32(val)])
   896  	for {
   897  		val := auxIntToInt16(v.AuxInt)
   898  		v.reset(OpMIPSMOVWconst)
   899  		v.AuxInt = int32ToAuxInt(int32(val))
   900  		return true
   901  	}
   902  }
   903  func rewriteValueMIPS_OpConst32(v *Value) bool {
   904  	// match: (Const32 [val])
   905  	// result: (MOVWconst [int32(val)])
   906  	for {
   907  		val := auxIntToInt32(v.AuxInt)
   908  		v.reset(OpMIPSMOVWconst)
   909  		v.AuxInt = int32ToAuxInt(int32(val))
   910  		return true
   911  	}
   912  }
   913  func rewriteValueMIPS_OpConst8(v *Value) bool {
   914  	// match: (Const8 [val])
   915  	// result: (MOVWconst [int32(val)])
   916  	for {
   917  		val := auxIntToInt8(v.AuxInt)
   918  		v.reset(OpMIPSMOVWconst)
   919  		v.AuxInt = int32ToAuxInt(int32(val))
   920  		return true
   921  	}
   922  }
   923  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   924  	// match: (ConstBool [t])
   925  	// result: (MOVWconst [b2i32(t)])
   926  	for {
   927  		t := auxIntToBool(v.AuxInt)
   928  		v.reset(OpMIPSMOVWconst)
   929  		v.AuxInt = int32ToAuxInt(b2i32(t))
   930  		return true
   931  	}
   932  }
   933  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   934  	// match: (ConstNil)
   935  	// result: (MOVWconst [0])
   936  	for {
   937  		v.reset(OpMIPSMOVWconst)
   938  		v.AuxInt = int32ToAuxInt(0)
   939  		return true
   940  	}
   941  }
   942  func rewriteValueMIPS_OpCtz16(v *Value) bool {
   943  	v_0 := v.Args[0]
   944  	b := v.Block
   945  	typ := &b.Func.Config.Types
   946  	// match: (Ctz16 x)
   947  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<16])))
   948  	for {
   949  		x := v_0
   950  		v.reset(OpCtz32)
   951  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   952  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   953  		v1.AuxInt = int32ToAuxInt(1 << 16)
   954  		v0.AddArg2(x, v1)
   955  		v.AddArg(v0)
   956  		return true
   957  	}
   958  }
   959  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   960  	v_0 := v.Args[0]
   961  	b := v.Block
   962  	typ := &b.Func.Config.Types
   963  	// match: (Ctz32 <t> x)
   964  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   965  	for {
   966  		t := v.Type
   967  		x := v_0
   968  		v.reset(OpMIPSSUB)
   969  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   970  		v0.AuxInt = int32ToAuxInt(32)
   971  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   972  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   973  		v2.AuxInt = int32ToAuxInt(1)
   974  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   975  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   976  		v4.AddArg(x)
   977  		v3.AddArg2(x, v4)
   978  		v2.AddArg(v3)
   979  		v1.AddArg(v2)
   980  		v.AddArg2(v0, v1)
   981  		return true
   982  	}
   983  }
   984  func rewriteValueMIPS_OpCtz8(v *Value) bool {
   985  	v_0 := v.Args[0]
   986  	b := v.Block
   987  	typ := &b.Func.Config.Types
   988  	// match: (Ctz8 x)
   989  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<8])))
   990  	for {
   991  		x := v_0
   992  		v.reset(OpCtz32)
   993  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   994  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   995  		v1.AuxInt = int32ToAuxInt(1 << 8)
   996  		v0.AddArg2(x, v1)
   997  		v.AddArg(v0)
   998  		return true
   999  	}
  1000  }
  1001  func rewriteValueMIPS_OpDiv16(v *Value) bool {
  1002  	v_1 := v.Args[1]
  1003  	v_0 := v.Args[0]
  1004  	b := v.Block
  1005  	typ := &b.Func.Config.Types
  1006  	// match: (Div16 x y)
  1007  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  1008  	for {
  1009  		x := v_0
  1010  		y := v_1
  1011  		v.reset(OpSelect1)
  1012  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1013  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1014  		v1.AddArg(x)
  1015  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1016  		v2.AddArg(y)
  1017  		v0.AddArg2(v1, v2)
  1018  		v.AddArg(v0)
  1019  		return true
  1020  	}
  1021  }
  1022  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
  1023  	v_1 := v.Args[1]
  1024  	v_0 := v.Args[0]
  1025  	b := v.Block
  1026  	typ := &b.Func.Config.Types
  1027  	// match: (Div16u x y)
  1028  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1029  	for {
  1030  		x := v_0
  1031  		y := v_1
  1032  		v.reset(OpSelect1)
  1033  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1034  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1035  		v1.AddArg(x)
  1036  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1037  		v2.AddArg(y)
  1038  		v0.AddArg2(v1, v2)
  1039  		v.AddArg(v0)
  1040  		return true
  1041  	}
  1042  }
  1043  func rewriteValueMIPS_OpDiv32(v *Value) bool {
  1044  	v_1 := v.Args[1]
  1045  	v_0 := v.Args[0]
  1046  	b := v.Block
  1047  	typ := &b.Func.Config.Types
  1048  	// match: (Div32 x y)
  1049  	// result: (Select1 (DIV x y))
  1050  	for {
  1051  		x := v_0
  1052  		y := v_1
  1053  		v.reset(OpSelect1)
  1054  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1055  		v0.AddArg2(x, y)
  1056  		v.AddArg(v0)
  1057  		return true
  1058  	}
  1059  }
  1060  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
  1061  	v_1 := v.Args[1]
  1062  	v_0 := v.Args[0]
  1063  	b := v.Block
  1064  	typ := &b.Func.Config.Types
  1065  	// match: (Div32u x y)
  1066  	// result: (Select1 (DIVU x y))
  1067  	for {
  1068  		x := v_0
  1069  		y := v_1
  1070  		v.reset(OpSelect1)
  1071  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1072  		v0.AddArg2(x, y)
  1073  		v.AddArg(v0)
  1074  		return true
  1075  	}
  1076  }
  1077  func rewriteValueMIPS_OpDiv8(v *Value) bool {
  1078  	v_1 := v.Args[1]
  1079  	v_0 := v.Args[0]
  1080  	b := v.Block
  1081  	typ := &b.Func.Config.Types
  1082  	// match: (Div8 x y)
  1083  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1084  	for {
  1085  		x := v_0
  1086  		y := v_1
  1087  		v.reset(OpSelect1)
  1088  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1089  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1090  		v1.AddArg(x)
  1091  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1092  		v2.AddArg(y)
  1093  		v0.AddArg2(v1, v2)
  1094  		v.AddArg(v0)
  1095  		return true
  1096  	}
  1097  }
  1098  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1099  	v_1 := v.Args[1]
  1100  	v_0 := v.Args[0]
  1101  	b := v.Block
  1102  	typ := &b.Func.Config.Types
  1103  	// match: (Div8u x y)
  1104  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1105  	for {
  1106  		x := v_0
  1107  		y := v_1
  1108  		v.reset(OpSelect1)
  1109  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1110  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1111  		v1.AddArg(x)
  1112  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1113  		v2.AddArg(y)
  1114  		v0.AddArg2(v1, v2)
  1115  		v.AddArg(v0)
  1116  		return true
  1117  	}
  1118  }
  1119  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1120  	v_1 := v.Args[1]
  1121  	v_0 := v.Args[0]
  1122  	b := v.Block
  1123  	typ := &b.Func.Config.Types
  1124  	// match: (Eq16 x y)
  1125  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1126  	for {
  1127  		x := v_0
  1128  		y := v_1
  1129  		v.reset(OpMIPSSGTUconst)
  1130  		v.AuxInt = int32ToAuxInt(1)
  1131  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1132  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1133  		v1.AddArg(x)
  1134  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1135  		v2.AddArg(y)
  1136  		v0.AddArg2(v1, v2)
  1137  		v.AddArg(v0)
  1138  		return true
  1139  	}
  1140  }
  1141  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1142  	v_1 := v.Args[1]
  1143  	v_0 := v.Args[0]
  1144  	b := v.Block
  1145  	typ := &b.Func.Config.Types
  1146  	// match: (Eq32 x y)
  1147  	// result: (SGTUconst [1] (XOR x y))
  1148  	for {
  1149  		x := v_0
  1150  		y := v_1
  1151  		v.reset(OpMIPSSGTUconst)
  1152  		v.AuxInt = int32ToAuxInt(1)
  1153  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1154  		v0.AddArg2(x, y)
  1155  		v.AddArg(v0)
  1156  		return true
  1157  	}
  1158  }
  1159  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1160  	v_1 := v.Args[1]
  1161  	v_0 := v.Args[0]
  1162  	b := v.Block
  1163  	// match: (Eq32F x y)
  1164  	// result: (FPFlagTrue (CMPEQF x y))
  1165  	for {
  1166  		x := v_0
  1167  		y := v_1
  1168  		v.reset(OpMIPSFPFlagTrue)
  1169  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1170  		v0.AddArg2(x, y)
  1171  		v.AddArg(v0)
  1172  		return true
  1173  	}
  1174  }
  1175  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1176  	v_1 := v.Args[1]
  1177  	v_0 := v.Args[0]
  1178  	b := v.Block
  1179  	// match: (Eq64F x y)
  1180  	// result: (FPFlagTrue (CMPEQD x y))
  1181  	for {
  1182  		x := v_0
  1183  		y := v_1
  1184  		v.reset(OpMIPSFPFlagTrue)
  1185  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1186  		v0.AddArg2(x, y)
  1187  		v.AddArg(v0)
  1188  		return true
  1189  	}
  1190  }
  1191  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1192  	v_1 := v.Args[1]
  1193  	v_0 := v.Args[0]
  1194  	b := v.Block
  1195  	typ := &b.Func.Config.Types
  1196  	// match: (Eq8 x y)
  1197  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1198  	for {
  1199  		x := v_0
  1200  		y := v_1
  1201  		v.reset(OpMIPSSGTUconst)
  1202  		v.AuxInt = int32ToAuxInt(1)
  1203  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1204  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1205  		v1.AddArg(x)
  1206  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1207  		v2.AddArg(y)
  1208  		v0.AddArg2(v1, v2)
  1209  		v.AddArg(v0)
  1210  		return true
  1211  	}
  1212  }
  1213  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1214  	v_1 := v.Args[1]
  1215  	v_0 := v.Args[0]
  1216  	b := v.Block
  1217  	typ := &b.Func.Config.Types
  1218  	// match: (EqB x y)
  1219  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1220  	for {
  1221  		x := v_0
  1222  		y := v_1
  1223  		v.reset(OpMIPSXORconst)
  1224  		v.AuxInt = int32ToAuxInt(1)
  1225  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1226  		v0.AddArg2(x, y)
  1227  		v.AddArg(v0)
  1228  		return true
  1229  	}
  1230  }
  1231  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1232  	v_1 := v.Args[1]
  1233  	v_0 := v.Args[0]
  1234  	b := v.Block
  1235  	typ := &b.Func.Config.Types
  1236  	// match: (EqPtr x y)
  1237  	// result: (SGTUconst [1] (XOR x y))
  1238  	for {
  1239  		x := v_0
  1240  		y := v_1
  1241  		v.reset(OpMIPSSGTUconst)
  1242  		v.AuxInt = int32ToAuxInt(1)
  1243  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1244  		v0.AddArg2(x, y)
  1245  		v.AddArg(v0)
  1246  		return true
  1247  	}
  1248  }
  1249  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1250  	v_1 := v.Args[1]
  1251  	v_0 := v.Args[0]
  1252  	b := v.Block
  1253  	typ := &b.Func.Config.Types
  1254  	// match: (Hmul32 x y)
  1255  	// result: (Select0 (MULT x y))
  1256  	for {
  1257  		x := v_0
  1258  		y := v_1
  1259  		v.reset(OpSelect0)
  1260  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1261  		v0.AddArg2(x, y)
  1262  		v.AddArg(v0)
  1263  		return true
  1264  	}
  1265  }
  1266  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1267  	v_1 := v.Args[1]
  1268  	v_0 := v.Args[0]
  1269  	b := v.Block
  1270  	typ := &b.Func.Config.Types
  1271  	// match: (Hmul32u x y)
  1272  	// result: (Select0 (MULTU x y))
  1273  	for {
  1274  		x := v_0
  1275  		y := v_1
  1276  		v.reset(OpSelect0)
  1277  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1278  		v0.AddArg2(x, y)
  1279  		v.AddArg(v0)
  1280  		return true
  1281  	}
  1282  }
  1283  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1284  	v_1 := v.Args[1]
  1285  	v_0 := v.Args[0]
  1286  	// match: (IsInBounds idx len)
  1287  	// result: (SGTU len idx)
  1288  	for {
  1289  		idx := v_0
  1290  		len := v_1
  1291  		v.reset(OpMIPSSGTU)
  1292  		v.AddArg2(len, idx)
  1293  		return true
  1294  	}
  1295  }
  1296  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1297  	v_0 := v.Args[0]
  1298  	b := v.Block
  1299  	typ := &b.Func.Config.Types
  1300  	// match: (IsNonNil ptr)
  1301  	// result: (SGTU ptr (MOVWconst [0]))
  1302  	for {
  1303  		ptr := v_0
  1304  		v.reset(OpMIPSSGTU)
  1305  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1306  		v0.AuxInt = int32ToAuxInt(0)
  1307  		v.AddArg2(ptr, v0)
  1308  		return true
  1309  	}
  1310  }
  1311  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1312  	v_1 := v.Args[1]
  1313  	v_0 := v.Args[0]
  1314  	b := v.Block
  1315  	typ := &b.Func.Config.Types
  1316  	// match: (IsSliceInBounds idx len)
  1317  	// result: (XORconst [1] (SGTU idx len))
  1318  	for {
  1319  		idx := v_0
  1320  		len := v_1
  1321  		v.reset(OpMIPSXORconst)
  1322  		v.AuxInt = int32ToAuxInt(1)
  1323  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1324  		v0.AddArg2(idx, len)
  1325  		v.AddArg(v0)
  1326  		return true
  1327  	}
  1328  }
  1329  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1330  	v_1 := v.Args[1]
  1331  	v_0 := v.Args[0]
  1332  	b := v.Block
  1333  	typ := &b.Func.Config.Types
  1334  	// match: (Leq16 x y)
  1335  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1336  	for {
  1337  		x := v_0
  1338  		y := v_1
  1339  		v.reset(OpMIPSXORconst)
  1340  		v.AuxInt = int32ToAuxInt(1)
  1341  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1342  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1343  		v1.AddArg(x)
  1344  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1345  		v2.AddArg(y)
  1346  		v0.AddArg2(v1, v2)
  1347  		v.AddArg(v0)
  1348  		return true
  1349  	}
  1350  }
  1351  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1352  	v_1 := v.Args[1]
  1353  	v_0 := v.Args[0]
  1354  	b := v.Block
  1355  	typ := &b.Func.Config.Types
  1356  	// match: (Leq16U x y)
  1357  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1358  	for {
  1359  		x := v_0
  1360  		y := v_1
  1361  		v.reset(OpMIPSXORconst)
  1362  		v.AuxInt = int32ToAuxInt(1)
  1363  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1364  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1365  		v1.AddArg(x)
  1366  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1367  		v2.AddArg(y)
  1368  		v0.AddArg2(v1, v2)
  1369  		v.AddArg(v0)
  1370  		return true
  1371  	}
  1372  }
  1373  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1374  	v_1 := v.Args[1]
  1375  	v_0 := v.Args[0]
  1376  	b := v.Block
  1377  	typ := &b.Func.Config.Types
  1378  	// match: (Leq32 x y)
  1379  	// result: (XORconst [1] (SGT x y))
  1380  	for {
  1381  		x := v_0
  1382  		y := v_1
  1383  		v.reset(OpMIPSXORconst)
  1384  		v.AuxInt = int32ToAuxInt(1)
  1385  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1386  		v0.AddArg2(x, y)
  1387  		v.AddArg(v0)
  1388  		return true
  1389  	}
  1390  }
  1391  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1392  	v_1 := v.Args[1]
  1393  	v_0 := v.Args[0]
  1394  	b := v.Block
  1395  	// match: (Leq32F x y)
  1396  	// result: (FPFlagTrue (CMPGEF y x))
  1397  	for {
  1398  		x := v_0
  1399  		y := v_1
  1400  		v.reset(OpMIPSFPFlagTrue)
  1401  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1402  		v0.AddArg2(y, x)
  1403  		v.AddArg(v0)
  1404  		return true
  1405  	}
  1406  }
  1407  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1408  	v_1 := v.Args[1]
  1409  	v_0 := v.Args[0]
  1410  	b := v.Block
  1411  	typ := &b.Func.Config.Types
  1412  	// match: (Leq32U x y)
  1413  	// result: (XORconst [1] (SGTU x y))
  1414  	for {
  1415  		x := v_0
  1416  		y := v_1
  1417  		v.reset(OpMIPSXORconst)
  1418  		v.AuxInt = int32ToAuxInt(1)
  1419  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1420  		v0.AddArg2(x, y)
  1421  		v.AddArg(v0)
  1422  		return true
  1423  	}
  1424  }
  1425  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1426  	v_1 := v.Args[1]
  1427  	v_0 := v.Args[0]
  1428  	b := v.Block
  1429  	// match: (Leq64F x y)
  1430  	// result: (FPFlagTrue (CMPGED y x))
  1431  	for {
  1432  		x := v_0
  1433  		y := v_1
  1434  		v.reset(OpMIPSFPFlagTrue)
  1435  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1436  		v0.AddArg2(y, x)
  1437  		v.AddArg(v0)
  1438  		return true
  1439  	}
  1440  }
  1441  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1442  	v_1 := v.Args[1]
  1443  	v_0 := v.Args[0]
  1444  	b := v.Block
  1445  	typ := &b.Func.Config.Types
  1446  	// match: (Leq8 x y)
  1447  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1448  	for {
  1449  		x := v_0
  1450  		y := v_1
  1451  		v.reset(OpMIPSXORconst)
  1452  		v.AuxInt = int32ToAuxInt(1)
  1453  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1454  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1455  		v1.AddArg(x)
  1456  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1457  		v2.AddArg(y)
  1458  		v0.AddArg2(v1, v2)
  1459  		v.AddArg(v0)
  1460  		return true
  1461  	}
  1462  }
  1463  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1464  	v_1 := v.Args[1]
  1465  	v_0 := v.Args[0]
  1466  	b := v.Block
  1467  	typ := &b.Func.Config.Types
  1468  	// match: (Leq8U x y)
  1469  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1470  	for {
  1471  		x := v_0
  1472  		y := v_1
  1473  		v.reset(OpMIPSXORconst)
  1474  		v.AuxInt = int32ToAuxInt(1)
  1475  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1476  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1477  		v1.AddArg(x)
  1478  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1479  		v2.AddArg(y)
  1480  		v0.AddArg2(v1, v2)
  1481  		v.AddArg(v0)
  1482  		return true
  1483  	}
  1484  }
  1485  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1486  	v_1 := v.Args[1]
  1487  	v_0 := v.Args[0]
  1488  	b := v.Block
  1489  	typ := &b.Func.Config.Types
  1490  	// match: (Less16 x y)
  1491  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1492  	for {
  1493  		x := v_0
  1494  		y := v_1
  1495  		v.reset(OpMIPSSGT)
  1496  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1497  		v0.AddArg(y)
  1498  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1499  		v1.AddArg(x)
  1500  		v.AddArg2(v0, v1)
  1501  		return true
  1502  	}
  1503  }
  1504  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1505  	v_1 := v.Args[1]
  1506  	v_0 := v.Args[0]
  1507  	b := v.Block
  1508  	typ := &b.Func.Config.Types
  1509  	// match: (Less16U x y)
  1510  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1511  	for {
  1512  		x := v_0
  1513  		y := v_1
  1514  		v.reset(OpMIPSSGTU)
  1515  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1516  		v0.AddArg(y)
  1517  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1518  		v1.AddArg(x)
  1519  		v.AddArg2(v0, v1)
  1520  		return true
  1521  	}
  1522  }
  1523  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1524  	v_1 := v.Args[1]
  1525  	v_0 := v.Args[0]
  1526  	// match: (Less32 x y)
  1527  	// result: (SGT y x)
  1528  	for {
  1529  		x := v_0
  1530  		y := v_1
  1531  		v.reset(OpMIPSSGT)
  1532  		v.AddArg2(y, x)
  1533  		return true
  1534  	}
  1535  }
  1536  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1537  	v_1 := v.Args[1]
  1538  	v_0 := v.Args[0]
  1539  	b := v.Block
  1540  	// match: (Less32F x y)
  1541  	// result: (FPFlagTrue (CMPGTF y x))
  1542  	for {
  1543  		x := v_0
  1544  		y := v_1
  1545  		v.reset(OpMIPSFPFlagTrue)
  1546  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1547  		v0.AddArg2(y, x)
  1548  		v.AddArg(v0)
  1549  		return true
  1550  	}
  1551  }
  1552  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1553  	v_1 := v.Args[1]
  1554  	v_0 := v.Args[0]
  1555  	// match: (Less32U x y)
  1556  	// result: (SGTU y x)
  1557  	for {
  1558  		x := v_0
  1559  		y := v_1
  1560  		v.reset(OpMIPSSGTU)
  1561  		v.AddArg2(y, x)
  1562  		return true
  1563  	}
  1564  }
  1565  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1566  	v_1 := v.Args[1]
  1567  	v_0 := v.Args[0]
  1568  	b := v.Block
  1569  	// match: (Less64F x y)
  1570  	// result: (FPFlagTrue (CMPGTD y x))
  1571  	for {
  1572  		x := v_0
  1573  		y := v_1
  1574  		v.reset(OpMIPSFPFlagTrue)
  1575  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1576  		v0.AddArg2(y, x)
  1577  		v.AddArg(v0)
  1578  		return true
  1579  	}
  1580  }
  1581  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1582  	v_1 := v.Args[1]
  1583  	v_0 := v.Args[0]
  1584  	b := v.Block
  1585  	typ := &b.Func.Config.Types
  1586  	// match: (Less8 x y)
  1587  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1588  	for {
  1589  		x := v_0
  1590  		y := v_1
  1591  		v.reset(OpMIPSSGT)
  1592  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1593  		v0.AddArg(y)
  1594  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1595  		v1.AddArg(x)
  1596  		v.AddArg2(v0, v1)
  1597  		return true
  1598  	}
  1599  }
  1600  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1601  	v_1 := v.Args[1]
  1602  	v_0 := v.Args[0]
  1603  	b := v.Block
  1604  	typ := &b.Func.Config.Types
  1605  	// match: (Less8U x y)
  1606  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1607  	for {
  1608  		x := v_0
  1609  		y := v_1
  1610  		v.reset(OpMIPSSGTU)
  1611  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1612  		v0.AddArg(y)
  1613  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1614  		v1.AddArg(x)
  1615  		v.AddArg2(v0, v1)
  1616  		return true
  1617  	}
  1618  }
  1619  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1620  	v_1 := v.Args[1]
  1621  	v_0 := v.Args[0]
  1622  	// match: (Load <t> ptr mem)
  1623  	// cond: t.IsBoolean()
  1624  	// result: (MOVBUload ptr mem)
  1625  	for {
  1626  		t := v.Type
  1627  		ptr := v_0
  1628  		mem := v_1
  1629  		if !(t.IsBoolean()) {
  1630  			break
  1631  		}
  1632  		v.reset(OpMIPSMOVBUload)
  1633  		v.AddArg2(ptr, mem)
  1634  		return true
  1635  	}
  1636  	// match: (Load <t> ptr mem)
  1637  	// cond: (is8BitInt(t) && t.IsSigned())
  1638  	// result: (MOVBload ptr mem)
  1639  	for {
  1640  		t := v.Type
  1641  		ptr := v_0
  1642  		mem := v_1
  1643  		if !(is8BitInt(t) && t.IsSigned()) {
  1644  			break
  1645  		}
  1646  		v.reset(OpMIPSMOVBload)
  1647  		v.AddArg2(ptr, mem)
  1648  		return true
  1649  	}
  1650  	// match: (Load <t> ptr mem)
  1651  	// cond: (is8BitInt(t) && !t.IsSigned())
  1652  	// result: (MOVBUload ptr mem)
  1653  	for {
  1654  		t := v.Type
  1655  		ptr := v_0
  1656  		mem := v_1
  1657  		if !(is8BitInt(t) && !t.IsSigned()) {
  1658  			break
  1659  		}
  1660  		v.reset(OpMIPSMOVBUload)
  1661  		v.AddArg2(ptr, mem)
  1662  		return true
  1663  	}
  1664  	// match: (Load <t> ptr mem)
  1665  	// cond: (is16BitInt(t) && t.IsSigned())
  1666  	// result: (MOVHload ptr mem)
  1667  	for {
  1668  		t := v.Type
  1669  		ptr := v_0
  1670  		mem := v_1
  1671  		if !(is16BitInt(t) && t.IsSigned()) {
  1672  			break
  1673  		}
  1674  		v.reset(OpMIPSMOVHload)
  1675  		v.AddArg2(ptr, mem)
  1676  		return true
  1677  	}
  1678  	// match: (Load <t> ptr mem)
  1679  	// cond: (is16BitInt(t) && !t.IsSigned())
  1680  	// result: (MOVHUload ptr mem)
  1681  	for {
  1682  		t := v.Type
  1683  		ptr := v_0
  1684  		mem := v_1
  1685  		if !(is16BitInt(t) && !t.IsSigned()) {
  1686  			break
  1687  		}
  1688  		v.reset(OpMIPSMOVHUload)
  1689  		v.AddArg2(ptr, mem)
  1690  		return true
  1691  	}
  1692  	// match: (Load <t> ptr mem)
  1693  	// cond: (is32BitInt(t) || isPtr(t))
  1694  	// result: (MOVWload ptr mem)
  1695  	for {
  1696  		t := v.Type
  1697  		ptr := v_0
  1698  		mem := v_1
  1699  		if !(is32BitInt(t) || isPtr(t)) {
  1700  			break
  1701  		}
  1702  		v.reset(OpMIPSMOVWload)
  1703  		v.AddArg2(ptr, mem)
  1704  		return true
  1705  	}
  1706  	// match: (Load <t> ptr mem)
  1707  	// cond: is32BitFloat(t)
  1708  	// result: (MOVFload ptr mem)
  1709  	for {
  1710  		t := v.Type
  1711  		ptr := v_0
  1712  		mem := v_1
  1713  		if !(is32BitFloat(t)) {
  1714  			break
  1715  		}
  1716  		v.reset(OpMIPSMOVFload)
  1717  		v.AddArg2(ptr, mem)
  1718  		return true
  1719  	}
  1720  	// match: (Load <t> ptr mem)
  1721  	// cond: is64BitFloat(t)
  1722  	// result: (MOVDload ptr mem)
  1723  	for {
  1724  		t := v.Type
  1725  		ptr := v_0
  1726  		mem := v_1
  1727  		if !(is64BitFloat(t)) {
  1728  			break
  1729  		}
  1730  		v.reset(OpMIPSMOVDload)
  1731  		v.AddArg2(ptr, mem)
  1732  		return true
  1733  	}
  1734  	return false
  1735  }
  1736  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1737  	v_1 := v.Args[1]
  1738  	v_0 := v.Args[0]
  1739  	b := v.Block
  1740  	typ := &b.Func.Config.Types
  1741  	// match: (LocalAddr <t> {sym} base mem)
  1742  	// cond: t.Elem().HasPointers()
  1743  	// result: (MOVWaddr {sym} (SPanchored base mem))
  1744  	for {
  1745  		t := v.Type
  1746  		sym := auxToSym(v.Aux)
  1747  		base := v_0
  1748  		mem := v_1
  1749  		if !(t.Elem().HasPointers()) {
  1750  			break
  1751  		}
  1752  		v.reset(OpMIPSMOVWaddr)
  1753  		v.Aux = symToAux(sym)
  1754  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
  1755  		v0.AddArg2(base, mem)
  1756  		v.AddArg(v0)
  1757  		return true
  1758  	}
  1759  	// match: (LocalAddr <t> {sym} base _)
  1760  	// cond: !t.Elem().HasPointers()
  1761  	// result: (MOVWaddr {sym} base)
  1762  	for {
  1763  		t := v.Type
  1764  		sym := auxToSym(v.Aux)
  1765  		base := v_0
  1766  		if !(!t.Elem().HasPointers()) {
  1767  			break
  1768  		}
  1769  		v.reset(OpMIPSMOVWaddr)
  1770  		v.Aux = symToAux(sym)
  1771  		v.AddArg(base)
  1772  		return true
  1773  	}
  1774  	return false
  1775  }
  1776  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1777  	v_1 := v.Args[1]
  1778  	v_0 := v.Args[0]
  1779  	b := v.Block
  1780  	typ := &b.Func.Config.Types
  1781  	// match: (Lsh16x16 <t> x y)
  1782  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1783  	for {
  1784  		t := v.Type
  1785  		x := v_0
  1786  		y := v_1
  1787  		v.reset(OpMIPSCMOVZ)
  1788  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1789  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1790  		v1.AddArg(y)
  1791  		v0.AddArg2(x, v1)
  1792  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1793  		v2.AuxInt = int32ToAuxInt(0)
  1794  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1795  		v3.AuxInt = int32ToAuxInt(32)
  1796  		v3.AddArg(v1)
  1797  		v.AddArg3(v0, v2, v3)
  1798  		return true
  1799  	}
  1800  }
  1801  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1802  	v_1 := v.Args[1]
  1803  	v_0 := v.Args[0]
  1804  	b := v.Block
  1805  	typ := &b.Func.Config.Types
  1806  	// match: (Lsh16x32 <t> x y)
  1807  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1808  	for {
  1809  		t := v.Type
  1810  		x := v_0
  1811  		y := v_1
  1812  		v.reset(OpMIPSCMOVZ)
  1813  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1814  		v0.AddArg2(x, y)
  1815  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1816  		v1.AuxInt = int32ToAuxInt(0)
  1817  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1818  		v2.AuxInt = int32ToAuxInt(32)
  1819  		v2.AddArg(y)
  1820  		v.AddArg3(v0, v1, v2)
  1821  		return true
  1822  	}
  1823  }
  1824  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1825  	v_1 := v.Args[1]
  1826  	v_0 := v.Args[0]
  1827  	// match: (Lsh16x64 x (Const64 [c]))
  1828  	// cond: uint32(c) < 16
  1829  	// result: (SLLconst x [int32(c)])
  1830  	for {
  1831  		x := v_0
  1832  		if v_1.Op != OpConst64 {
  1833  			break
  1834  		}
  1835  		c := auxIntToInt64(v_1.AuxInt)
  1836  		if !(uint32(c) < 16) {
  1837  			break
  1838  		}
  1839  		v.reset(OpMIPSSLLconst)
  1840  		v.AuxInt = int32ToAuxInt(int32(c))
  1841  		v.AddArg(x)
  1842  		return true
  1843  	}
  1844  	// match: (Lsh16x64 _ (Const64 [c]))
  1845  	// cond: uint32(c) >= 16
  1846  	// result: (MOVWconst [0])
  1847  	for {
  1848  		if v_1.Op != OpConst64 {
  1849  			break
  1850  		}
  1851  		c := auxIntToInt64(v_1.AuxInt)
  1852  		if !(uint32(c) >= 16) {
  1853  			break
  1854  		}
  1855  		v.reset(OpMIPSMOVWconst)
  1856  		v.AuxInt = int32ToAuxInt(0)
  1857  		return true
  1858  	}
  1859  	return false
  1860  }
  1861  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1862  	v_1 := v.Args[1]
  1863  	v_0 := v.Args[0]
  1864  	b := v.Block
  1865  	typ := &b.Func.Config.Types
  1866  	// match: (Lsh16x8 <t> x y)
  1867  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1868  	for {
  1869  		t := v.Type
  1870  		x := v_0
  1871  		y := v_1
  1872  		v.reset(OpMIPSCMOVZ)
  1873  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1874  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1875  		v1.AddArg(y)
  1876  		v0.AddArg2(x, v1)
  1877  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1878  		v2.AuxInt = int32ToAuxInt(0)
  1879  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1880  		v3.AuxInt = int32ToAuxInt(32)
  1881  		v3.AddArg(v1)
  1882  		v.AddArg3(v0, v2, v3)
  1883  		return true
  1884  	}
  1885  }
  1886  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1887  	v_1 := v.Args[1]
  1888  	v_0 := v.Args[0]
  1889  	b := v.Block
  1890  	typ := &b.Func.Config.Types
  1891  	// match: (Lsh32x16 <t> x y)
  1892  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1893  	for {
  1894  		t := v.Type
  1895  		x := v_0
  1896  		y := v_1
  1897  		v.reset(OpMIPSCMOVZ)
  1898  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1899  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1900  		v1.AddArg(y)
  1901  		v0.AddArg2(x, v1)
  1902  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1903  		v2.AuxInt = int32ToAuxInt(0)
  1904  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1905  		v3.AuxInt = int32ToAuxInt(32)
  1906  		v3.AddArg(v1)
  1907  		v.AddArg3(v0, v2, v3)
  1908  		return true
  1909  	}
  1910  }
  1911  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1912  	v_1 := v.Args[1]
  1913  	v_0 := v.Args[0]
  1914  	b := v.Block
  1915  	typ := &b.Func.Config.Types
  1916  	// match: (Lsh32x32 <t> x y)
  1917  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1918  	for {
  1919  		t := v.Type
  1920  		x := v_0
  1921  		y := v_1
  1922  		v.reset(OpMIPSCMOVZ)
  1923  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1924  		v0.AddArg2(x, y)
  1925  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1926  		v1.AuxInt = int32ToAuxInt(0)
  1927  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1928  		v2.AuxInt = int32ToAuxInt(32)
  1929  		v2.AddArg(y)
  1930  		v.AddArg3(v0, v1, v2)
  1931  		return true
  1932  	}
  1933  }
  1934  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1935  	v_1 := v.Args[1]
  1936  	v_0 := v.Args[0]
  1937  	// match: (Lsh32x64 x (Const64 [c]))
  1938  	// cond: uint32(c) < 32
  1939  	// result: (SLLconst x [int32(c)])
  1940  	for {
  1941  		x := v_0
  1942  		if v_1.Op != OpConst64 {
  1943  			break
  1944  		}
  1945  		c := auxIntToInt64(v_1.AuxInt)
  1946  		if !(uint32(c) < 32) {
  1947  			break
  1948  		}
  1949  		v.reset(OpMIPSSLLconst)
  1950  		v.AuxInt = int32ToAuxInt(int32(c))
  1951  		v.AddArg(x)
  1952  		return true
  1953  	}
  1954  	// match: (Lsh32x64 _ (Const64 [c]))
  1955  	// cond: uint32(c) >= 32
  1956  	// result: (MOVWconst [0])
  1957  	for {
  1958  		if v_1.Op != OpConst64 {
  1959  			break
  1960  		}
  1961  		c := auxIntToInt64(v_1.AuxInt)
  1962  		if !(uint32(c) >= 32) {
  1963  			break
  1964  		}
  1965  		v.reset(OpMIPSMOVWconst)
  1966  		v.AuxInt = int32ToAuxInt(0)
  1967  		return true
  1968  	}
  1969  	return false
  1970  }
  1971  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1972  	v_1 := v.Args[1]
  1973  	v_0 := v.Args[0]
  1974  	b := v.Block
  1975  	typ := &b.Func.Config.Types
  1976  	// match: (Lsh32x8 <t> x y)
  1977  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1978  	for {
  1979  		t := v.Type
  1980  		x := v_0
  1981  		y := v_1
  1982  		v.reset(OpMIPSCMOVZ)
  1983  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1984  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1985  		v1.AddArg(y)
  1986  		v0.AddArg2(x, v1)
  1987  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1988  		v2.AuxInt = int32ToAuxInt(0)
  1989  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1990  		v3.AuxInt = int32ToAuxInt(32)
  1991  		v3.AddArg(v1)
  1992  		v.AddArg3(v0, v2, v3)
  1993  		return true
  1994  	}
  1995  }
  1996  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  1997  	v_1 := v.Args[1]
  1998  	v_0 := v.Args[0]
  1999  	b := v.Block
  2000  	typ := &b.Func.Config.Types
  2001  	// match: (Lsh8x16 <t> x y)
  2002  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2003  	for {
  2004  		t := v.Type
  2005  		x := v_0
  2006  		y := v_1
  2007  		v.reset(OpMIPSCMOVZ)
  2008  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2009  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2010  		v1.AddArg(y)
  2011  		v0.AddArg2(x, v1)
  2012  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2013  		v2.AuxInt = int32ToAuxInt(0)
  2014  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2015  		v3.AuxInt = int32ToAuxInt(32)
  2016  		v3.AddArg(v1)
  2017  		v.AddArg3(v0, v2, v3)
  2018  		return true
  2019  	}
  2020  }
  2021  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  2022  	v_1 := v.Args[1]
  2023  	v_0 := v.Args[0]
  2024  	b := v.Block
  2025  	typ := &b.Func.Config.Types
  2026  	// match: (Lsh8x32 <t> x y)
  2027  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2028  	for {
  2029  		t := v.Type
  2030  		x := v_0
  2031  		y := v_1
  2032  		v.reset(OpMIPSCMOVZ)
  2033  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2034  		v0.AddArg2(x, y)
  2035  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2036  		v1.AuxInt = int32ToAuxInt(0)
  2037  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2038  		v2.AuxInt = int32ToAuxInt(32)
  2039  		v2.AddArg(y)
  2040  		v.AddArg3(v0, v1, v2)
  2041  		return true
  2042  	}
  2043  }
  2044  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  2045  	v_1 := v.Args[1]
  2046  	v_0 := v.Args[0]
  2047  	// match: (Lsh8x64 x (Const64 [c]))
  2048  	// cond: uint32(c) < 8
  2049  	// result: (SLLconst x [int32(c)])
  2050  	for {
  2051  		x := v_0
  2052  		if v_1.Op != OpConst64 {
  2053  			break
  2054  		}
  2055  		c := auxIntToInt64(v_1.AuxInt)
  2056  		if !(uint32(c) < 8) {
  2057  			break
  2058  		}
  2059  		v.reset(OpMIPSSLLconst)
  2060  		v.AuxInt = int32ToAuxInt(int32(c))
  2061  		v.AddArg(x)
  2062  		return true
  2063  	}
  2064  	// match: (Lsh8x64 _ (Const64 [c]))
  2065  	// cond: uint32(c) >= 8
  2066  	// result: (MOVWconst [0])
  2067  	for {
  2068  		if v_1.Op != OpConst64 {
  2069  			break
  2070  		}
  2071  		c := auxIntToInt64(v_1.AuxInt)
  2072  		if !(uint32(c) >= 8) {
  2073  			break
  2074  		}
  2075  		v.reset(OpMIPSMOVWconst)
  2076  		v.AuxInt = int32ToAuxInt(0)
  2077  		return true
  2078  	}
  2079  	return false
  2080  }
  2081  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  2082  	v_1 := v.Args[1]
  2083  	v_0 := v.Args[0]
  2084  	b := v.Block
  2085  	typ := &b.Func.Config.Types
  2086  	// match: (Lsh8x8 <t> x y)
  2087  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2088  	for {
  2089  		t := v.Type
  2090  		x := v_0
  2091  		y := v_1
  2092  		v.reset(OpMIPSCMOVZ)
  2093  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2094  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2095  		v1.AddArg(y)
  2096  		v0.AddArg2(x, v1)
  2097  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2098  		v2.AuxInt = int32ToAuxInt(0)
  2099  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2100  		v3.AuxInt = int32ToAuxInt(32)
  2101  		v3.AddArg(v1)
  2102  		v.AddArg3(v0, v2, v3)
  2103  		return true
  2104  	}
  2105  }
  2106  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2107  	v_1 := v.Args[1]
  2108  	v_0 := v.Args[0]
  2109  	// match: (ADD x (MOVWconst <t> [c]))
  2110  	// cond: !t.IsPtr()
  2111  	// result: (ADDconst [c] x)
  2112  	for {
  2113  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2114  			x := v_0
  2115  			if v_1.Op != OpMIPSMOVWconst {
  2116  				continue
  2117  			}
  2118  			t := v_1.Type
  2119  			c := auxIntToInt32(v_1.AuxInt)
  2120  			if !(!t.IsPtr()) {
  2121  				continue
  2122  			}
  2123  			v.reset(OpMIPSADDconst)
  2124  			v.AuxInt = int32ToAuxInt(c)
  2125  			v.AddArg(x)
  2126  			return true
  2127  		}
  2128  		break
  2129  	}
  2130  	// match: (ADD x (NEG y))
  2131  	// result: (SUB x y)
  2132  	for {
  2133  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2134  			x := v_0
  2135  			if v_1.Op != OpMIPSNEG {
  2136  				continue
  2137  			}
  2138  			y := v_1.Args[0]
  2139  			v.reset(OpMIPSSUB)
  2140  			v.AddArg2(x, y)
  2141  			return true
  2142  		}
  2143  		break
  2144  	}
  2145  	return false
  2146  }
  2147  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2148  	v_0 := v.Args[0]
  2149  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2150  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2151  	for {
  2152  		off1 := auxIntToInt32(v.AuxInt)
  2153  		if v_0.Op != OpMIPSMOVWaddr {
  2154  			break
  2155  		}
  2156  		off2 := auxIntToInt32(v_0.AuxInt)
  2157  		sym := auxToSym(v_0.Aux)
  2158  		ptr := v_0.Args[0]
  2159  		v.reset(OpMIPSMOVWaddr)
  2160  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2161  		v.Aux = symToAux(sym)
  2162  		v.AddArg(ptr)
  2163  		return true
  2164  	}
  2165  	// match: (ADDconst [0] x)
  2166  	// result: x
  2167  	for {
  2168  		if auxIntToInt32(v.AuxInt) != 0 {
  2169  			break
  2170  		}
  2171  		x := v_0
  2172  		v.copyOf(x)
  2173  		return true
  2174  	}
  2175  	// match: (ADDconst [c] (MOVWconst [d]))
  2176  	// result: (MOVWconst [int32(c+d)])
  2177  	for {
  2178  		c := auxIntToInt32(v.AuxInt)
  2179  		if v_0.Op != OpMIPSMOVWconst {
  2180  			break
  2181  		}
  2182  		d := auxIntToInt32(v_0.AuxInt)
  2183  		v.reset(OpMIPSMOVWconst)
  2184  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2185  		return true
  2186  	}
  2187  	// match: (ADDconst [c] (ADDconst [d] x))
  2188  	// result: (ADDconst [c+d] x)
  2189  	for {
  2190  		c := auxIntToInt32(v.AuxInt)
  2191  		if v_0.Op != OpMIPSADDconst {
  2192  			break
  2193  		}
  2194  		d := auxIntToInt32(v_0.AuxInt)
  2195  		x := v_0.Args[0]
  2196  		v.reset(OpMIPSADDconst)
  2197  		v.AuxInt = int32ToAuxInt(c + d)
  2198  		v.AddArg(x)
  2199  		return true
  2200  	}
  2201  	// match: (ADDconst [c] (SUBconst [d] x))
  2202  	// result: (ADDconst [c-d] x)
  2203  	for {
  2204  		c := auxIntToInt32(v.AuxInt)
  2205  		if v_0.Op != OpMIPSSUBconst {
  2206  			break
  2207  		}
  2208  		d := auxIntToInt32(v_0.AuxInt)
  2209  		x := v_0.Args[0]
  2210  		v.reset(OpMIPSADDconst)
  2211  		v.AuxInt = int32ToAuxInt(c - d)
  2212  		v.AddArg(x)
  2213  		return true
  2214  	}
  2215  	return false
  2216  }
  2217  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2218  	v_1 := v.Args[1]
  2219  	v_0 := v.Args[0]
  2220  	b := v.Block
  2221  	// match: (AND x (MOVWconst [c]))
  2222  	// result: (ANDconst [c] x)
  2223  	for {
  2224  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2225  			x := v_0
  2226  			if v_1.Op != OpMIPSMOVWconst {
  2227  				continue
  2228  			}
  2229  			c := auxIntToInt32(v_1.AuxInt)
  2230  			v.reset(OpMIPSANDconst)
  2231  			v.AuxInt = int32ToAuxInt(c)
  2232  			v.AddArg(x)
  2233  			return true
  2234  		}
  2235  		break
  2236  	}
  2237  	// match: (AND x x)
  2238  	// result: x
  2239  	for {
  2240  		x := v_0
  2241  		if x != v_1 {
  2242  			break
  2243  		}
  2244  		v.copyOf(x)
  2245  		return true
  2246  	}
  2247  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2248  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2249  	for {
  2250  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2251  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2252  				continue
  2253  			}
  2254  			x := v_0.Args[0]
  2255  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2256  				continue
  2257  			}
  2258  			y := v_1.Args[0]
  2259  			v.reset(OpMIPSSGTUconst)
  2260  			v.AuxInt = int32ToAuxInt(1)
  2261  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2262  			v0.AddArg2(x, y)
  2263  			v.AddArg(v0)
  2264  			return true
  2265  		}
  2266  		break
  2267  	}
  2268  	return false
  2269  }
  2270  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2271  	v_0 := v.Args[0]
  2272  	// match: (ANDconst [0] _)
  2273  	// result: (MOVWconst [0])
  2274  	for {
  2275  		if auxIntToInt32(v.AuxInt) != 0 {
  2276  			break
  2277  		}
  2278  		v.reset(OpMIPSMOVWconst)
  2279  		v.AuxInt = int32ToAuxInt(0)
  2280  		return true
  2281  	}
  2282  	// match: (ANDconst [-1] x)
  2283  	// result: x
  2284  	for {
  2285  		if auxIntToInt32(v.AuxInt) != -1 {
  2286  			break
  2287  		}
  2288  		x := v_0
  2289  		v.copyOf(x)
  2290  		return true
  2291  	}
  2292  	// match: (ANDconst [c] (MOVWconst [d]))
  2293  	// result: (MOVWconst [c&d])
  2294  	for {
  2295  		c := auxIntToInt32(v.AuxInt)
  2296  		if v_0.Op != OpMIPSMOVWconst {
  2297  			break
  2298  		}
  2299  		d := auxIntToInt32(v_0.AuxInt)
  2300  		v.reset(OpMIPSMOVWconst)
  2301  		v.AuxInt = int32ToAuxInt(c & d)
  2302  		return true
  2303  	}
  2304  	// match: (ANDconst [c] (ANDconst [d] x))
  2305  	// result: (ANDconst [c&d] x)
  2306  	for {
  2307  		c := auxIntToInt32(v.AuxInt)
  2308  		if v_0.Op != OpMIPSANDconst {
  2309  			break
  2310  		}
  2311  		d := auxIntToInt32(v_0.AuxInt)
  2312  		x := v_0.Args[0]
  2313  		v.reset(OpMIPSANDconst)
  2314  		v.AuxInt = int32ToAuxInt(c & d)
  2315  		v.AddArg(x)
  2316  		return true
  2317  	}
  2318  	return false
  2319  }
  2320  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2321  	v_2 := v.Args[2]
  2322  	v_1 := v.Args[1]
  2323  	v_0 := v.Args[0]
  2324  	// match: (CMOVZ _ f (MOVWconst [0]))
  2325  	// result: f
  2326  	for {
  2327  		f := v_1
  2328  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2329  			break
  2330  		}
  2331  		v.copyOf(f)
  2332  		return true
  2333  	}
  2334  	// match: (CMOVZ a _ (MOVWconst [c]))
  2335  	// cond: c!=0
  2336  	// result: a
  2337  	for {
  2338  		a := v_0
  2339  		if v_2.Op != OpMIPSMOVWconst {
  2340  			break
  2341  		}
  2342  		c := auxIntToInt32(v_2.AuxInt)
  2343  		if !(c != 0) {
  2344  			break
  2345  		}
  2346  		v.copyOf(a)
  2347  		return true
  2348  	}
  2349  	// match: (CMOVZ a (MOVWconst [0]) c)
  2350  	// result: (CMOVZzero a c)
  2351  	for {
  2352  		a := v_0
  2353  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2354  			break
  2355  		}
  2356  		c := v_2
  2357  		v.reset(OpMIPSCMOVZzero)
  2358  		v.AddArg2(a, c)
  2359  		return true
  2360  	}
  2361  	return false
  2362  }
  2363  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2364  	v_1 := v.Args[1]
  2365  	v_0 := v.Args[0]
  2366  	// match: (CMOVZzero _ (MOVWconst [0]))
  2367  	// result: (MOVWconst [0])
  2368  	for {
  2369  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2370  			break
  2371  		}
  2372  		v.reset(OpMIPSMOVWconst)
  2373  		v.AuxInt = int32ToAuxInt(0)
  2374  		return true
  2375  	}
  2376  	// match: (CMOVZzero a (MOVWconst [c]))
  2377  	// cond: c!=0
  2378  	// result: a
  2379  	for {
  2380  		a := v_0
  2381  		if v_1.Op != OpMIPSMOVWconst {
  2382  			break
  2383  		}
  2384  		c := auxIntToInt32(v_1.AuxInt)
  2385  		if !(c != 0) {
  2386  			break
  2387  		}
  2388  		v.copyOf(a)
  2389  		return true
  2390  	}
  2391  	return false
  2392  }
  2393  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2394  	v_2 := v.Args[2]
  2395  	v_1 := v.Args[1]
  2396  	v_0 := v.Args[0]
  2397  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2398  	// cond: is16Bit(int64(c))
  2399  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2400  	for {
  2401  		ptr := v_0
  2402  		if v_1.Op != OpMIPSMOVWconst {
  2403  			break
  2404  		}
  2405  		c := auxIntToInt32(v_1.AuxInt)
  2406  		mem := v_2
  2407  		if !(is16Bit(int64(c))) {
  2408  			break
  2409  		}
  2410  		v.reset(OpMIPSLoweredAtomicAddconst)
  2411  		v.AuxInt = int32ToAuxInt(c)
  2412  		v.AddArg2(ptr, mem)
  2413  		return true
  2414  	}
  2415  	return false
  2416  }
  2417  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2418  	v_2 := v.Args[2]
  2419  	v_1 := v.Args[1]
  2420  	v_0 := v.Args[0]
  2421  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2422  	// result: (LoweredAtomicStorezero ptr mem)
  2423  	for {
  2424  		ptr := v_0
  2425  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2426  			break
  2427  		}
  2428  		mem := v_2
  2429  		v.reset(OpMIPSLoweredAtomicStorezero)
  2430  		v.AddArg2(ptr, mem)
  2431  		return true
  2432  	}
  2433  	return false
  2434  }
  2435  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2436  	v_1 := v.Args[1]
  2437  	v_0 := v.Args[0]
  2438  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2439  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2440  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2441  	for {
  2442  		off1 := auxIntToInt32(v.AuxInt)
  2443  		sym := auxToSym(v.Aux)
  2444  		x := v_0
  2445  		if x.Op != OpMIPSADDconst {
  2446  			break
  2447  		}
  2448  		off2 := auxIntToInt32(x.AuxInt)
  2449  		ptr := x.Args[0]
  2450  		mem := v_1
  2451  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2452  			break
  2453  		}
  2454  		v.reset(OpMIPSMOVBUload)
  2455  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2456  		v.Aux = symToAux(sym)
  2457  		v.AddArg2(ptr, mem)
  2458  		return true
  2459  	}
  2460  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2461  	// cond: canMergeSym(sym1,sym2)
  2462  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2463  	for {
  2464  		off1 := auxIntToInt32(v.AuxInt)
  2465  		sym1 := auxToSym(v.Aux)
  2466  		if v_0.Op != OpMIPSMOVWaddr {
  2467  			break
  2468  		}
  2469  		off2 := auxIntToInt32(v_0.AuxInt)
  2470  		sym2 := auxToSym(v_0.Aux)
  2471  		ptr := v_0.Args[0]
  2472  		mem := v_1
  2473  		if !(canMergeSym(sym1, sym2)) {
  2474  			break
  2475  		}
  2476  		v.reset(OpMIPSMOVBUload)
  2477  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2478  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2479  		v.AddArg2(ptr, mem)
  2480  		return true
  2481  	}
  2482  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2483  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2484  	// result: (MOVBUreg x)
  2485  	for {
  2486  		off := auxIntToInt32(v.AuxInt)
  2487  		sym := auxToSym(v.Aux)
  2488  		ptr := v_0
  2489  		if v_1.Op != OpMIPSMOVBstore {
  2490  			break
  2491  		}
  2492  		off2 := auxIntToInt32(v_1.AuxInt)
  2493  		sym2 := auxToSym(v_1.Aux)
  2494  		x := v_1.Args[1]
  2495  		ptr2 := v_1.Args[0]
  2496  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2497  			break
  2498  		}
  2499  		v.reset(OpMIPSMOVBUreg)
  2500  		v.AddArg(x)
  2501  		return true
  2502  	}
  2503  	return false
  2504  }
  2505  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2506  	v_0 := v.Args[0]
  2507  	b := v.Block
  2508  	// match: (MOVBUreg x:(MOVBUload _ _))
  2509  	// result: (MOVWreg x)
  2510  	for {
  2511  		x := v_0
  2512  		if x.Op != OpMIPSMOVBUload {
  2513  			break
  2514  		}
  2515  		v.reset(OpMIPSMOVWreg)
  2516  		v.AddArg(x)
  2517  		return true
  2518  	}
  2519  	// match: (MOVBUreg x:(MOVBUreg _))
  2520  	// result: (MOVWreg x)
  2521  	for {
  2522  		x := v_0
  2523  		if x.Op != OpMIPSMOVBUreg {
  2524  			break
  2525  		}
  2526  		v.reset(OpMIPSMOVWreg)
  2527  		v.AddArg(x)
  2528  		return true
  2529  	}
  2530  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2531  	// cond: x.Uses == 1 && clobber(x)
  2532  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2533  	for {
  2534  		t := v.Type
  2535  		x := v_0
  2536  		if x.Op != OpMIPSMOVBload {
  2537  			break
  2538  		}
  2539  		off := auxIntToInt32(x.AuxInt)
  2540  		sym := auxToSym(x.Aux)
  2541  		mem := x.Args[1]
  2542  		ptr := x.Args[0]
  2543  		if !(x.Uses == 1 && clobber(x)) {
  2544  			break
  2545  		}
  2546  		b = x.Block
  2547  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2548  		v.copyOf(v0)
  2549  		v0.AuxInt = int32ToAuxInt(off)
  2550  		v0.Aux = symToAux(sym)
  2551  		v0.AddArg2(ptr, mem)
  2552  		return true
  2553  	}
  2554  	// match: (MOVBUreg (ANDconst [c] x))
  2555  	// result: (ANDconst [c&0xff] x)
  2556  	for {
  2557  		if v_0.Op != OpMIPSANDconst {
  2558  			break
  2559  		}
  2560  		c := auxIntToInt32(v_0.AuxInt)
  2561  		x := v_0.Args[0]
  2562  		v.reset(OpMIPSANDconst)
  2563  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2564  		v.AddArg(x)
  2565  		return true
  2566  	}
  2567  	// match: (MOVBUreg (MOVWconst [c]))
  2568  	// result: (MOVWconst [int32(uint8(c))])
  2569  	for {
  2570  		if v_0.Op != OpMIPSMOVWconst {
  2571  			break
  2572  		}
  2573  		c := auxIntToInt32(v_0.AuxInt)
  2574  		v.reset(OpMIPSMOVWconst)
  2575  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2576  		return true
  2577  	}
  2578  	return false
  2579  }
  2580  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2581  	v_1 := v.Args[1]
  2582  	v_0 := v.Args[0]
  2583  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2584  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2585  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2586  	for {
  2587  		off1 := auxIntToInt32(v.AuxInt)
  2588  		sym := auxToSym(v.Aux)
  2589  		x := v_0
  2590  		if x.Op != OpMIPSADDconst {
  2591  			break
  2592  		}
  2593  		off2 := auxIntToInt32(x.AuxInt)
  2594  		ptr := x.Args[0]
  2595  		mem := v_1
  2596  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2597  			break
  2598  		}
  2599  		v.reset(OpMIPSMOVBload)
  2600  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2601  		v.Aux = symToAux(sym)
  2602  		v.AddArg2(ptr, mem)
  2603  		return true
  2604  	}
  2605  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2606  	// cond: canMergeSym(sym1,sym2)
  2607  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2608  	for {
  2609  		off1 := auxIntToInt32(v.AuxInt)
  2610  		sym1 := auxToSym(v.Aux)
  2611  		if v_0.Op != OpMIPSMOVWaddr {
  2612  			break
  2613  		}
  2614  		off2 := auxIntToInt32(v_0.AuxInt)
  2615  		sym2 := auxToSym(v_0.Aux)
  2616  		ptr := v_0.Args[0]
  2617  		mem := v_1
  2618  		if !(canMergeSym(sym1, sym2)) {
  2619  			break
  2620  		}
  2621  		v.reset(OpMIPSMOVBload)
  2622  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2623  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2624  		v.AddArg2(ptr, mem)
  2625  		return true
  2626  	}
  2627  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2628  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2629  	// result: (MOVBreg x)
  2630  	for {
  2631  		off := auxIntToInt32(v.AuxInt)
  2632  		sym := auxToSym(v.Aux)
  2633  		ptr := v_0
  2634  		if v_1.Op != OpMIPSMOVBstore {
  2635  			break
  2636  		}
  2637  		off2 := auxIntToInt32(v_1.AuxInt)
  2638  		sym2 := auxToSym(v_1.Aux)
  2639  		x := v_1.Args[1]
  2640  		ptr2 := v_1.Args[0]
  2641  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2642  			break
  2643  		}
  2644  		v.reset(OpMIPSMOVBreg)
  2645  		v.AddArg(x)
  2646  		return true
  2647  	}
  2648  	return false
  2649  }
  2650  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2651  	v_0 := v.Args[0]
  2652  	b := v.Block
  2653  	// match: (MOVBreg x:(MOVBload _ _))
  2654  	// result: (MOVWreg x)
  2655  	for {
  2656  		x := v_0
  2657  		if x.Op != OpMIPSMOVBload {
  2658  			break
  2659  		}
  2660  		v.reset(OpMIPSMOVWreg)
  2661  		v.AddArg(x)
  2662  		return true
  2663  	}
  2664  	// match: (MOVBreg x:(MOVBreg _))
  2665  	// result: (MOVWreg x)
  2666  	for {
  2667  		x := v_0
  2668  		if x.Op != OpMIPSMOVBreg {
  2669  			break
  2670  		}
  2671  		v.reset(OpMIPSMOVWreg)
  2672  		v.AddArg(x)
  2673  		return true
  2674  	}
  2675  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2676  	// cond: x.Uses == 1 && clobber(x)
  2677  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2678  	for {
  2679  		t := v.Type
  2680  		x := v_0
  2681  		if x.Op != OpMIPSMOVBUload {
  2682  			break
  2683  		}
  2684  		off := auxIntToInt32(x.AuxInt)
  2685  		sym := auxToSym(x.Aux)
  2686  		mem := x.Args[1]
  2687  		ptr := x.Args[0]
  2688  		if !(x.Uses == 1 && clobber(x)) {
  2689  			break
  2690  		}
  2691  		b = x.Block
  2692  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2693  		v.copyOf(v0)
  2694  		v0.AuxInt = int32ToAuxInt(off)
  2695  		v0.Aux = symToAux(sym)
  2696  		v0.AddArg2(ptr, mem)
  2697  		return true
  2698  	}
  2699  	// match: (MOVBreg (ANDconst [c] x))
  2700  	// cond: c & 0x80 == 0
  2701  	// result: (ANDconst [c&0x7f] x)
  2702  	for {
  2703  		if v_0.Op != OpMIPSANDconst {
  2704  			break
  2705  		}
  2706  		c := auxIntToInt32(v_0.AuxInt)
  2707  		x := v_0.Args[0]
  2708  		if !(c&0x80 == 0) {
  2709  			break
  2710  		}
  2711  		v.reset(OpMIPSANDconst)
  2712  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2713  		v.AddArg(x)
  2714  		return true
  2715  	}
  2716  	// match: (MOVBreg (MOVWconst [c]))
  2717  	// result: (MOVWconst [int32(int8(c))])
  2718  	for {
  2719  		if v_0.Op != OpMIPSMOVWconst {
  2720  			break
  2721  		}
  2722  		c := auxIntToInt32(v_0.AuxInt)
  2723  		v.reset(OpMIPSMOVWconst)
  2724  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2725  		return true
  2726  	}
  2727  	return false
  2728  }
  2729  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2730  	v_2 := v.Args[2]
  2731  	v_1 := v.Args[1]
  2732  	v_0 := v.Args[0]
  2733  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2734  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2735  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2736  	for {
  2737  		off1 := auxIntToInt32(v.AuxInt)
  2738  		sym := auxToSym(v.Aux)
  2739  		x := v_0
  2740  		if x.Op != OpMIPSADDconst {
  2741  			break
  2742  		}
  2743  		off2 := auxIntToInt32(x.AuxInt)
  2744  		ptr := x.Args[0]
  2745  		val := v_1
  2746  		mem := v_2
  2747  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2748  			break
  2749  		}
  2750  		v.reset(OpMIPSMOVBstore)
  2751  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2752  		v.Aux = symToAux(sym)
  2753  		v.AddArg3(ptr, val, mem)
  2754  		return true
  2755  	}
  2756  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2757  	// cond: canMergeSym(sym1,sym2)
  2758  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2759  	for {
  2760  		off1 := auxIntToInt32(v.AuxInt)
  2761  		sym1 := auxToSym(v.Aux)
  2762  		if v_0.Op != OpMIPSMOVWaddr {
  2763  			break
  2764  		}
  2765  		off2 := auxIntToInt32(v_0.AuxInt)
  2766  		sym2 := auxToSym(v_0.Aux)
  2767  		ptr := v_0.Args[0]
  2768  		val := v_1
  2769  		mem := v_2
  2770  		if !(canMergeSym(sym1, sym2)) {
  2771  			break
  2772  		}
  2773  		v.reset(OpMIPSMOVBstore)
  2774  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2775  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2776  		v.AddArg3(ptr, val, mem)
  2777  		return true
  2778  	}
  2779  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2780  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2781  	for {
  2782  		off := auxIntToInt32(v.AuxInt)
  2783  		sym := auxToSym(v.Aux)
  2784  		ptr := v_0
  2785  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2786  			break
  2787  		}
  2788  		mem := v_2
  2789  		v.reset(OpMIPSMOVBstorezero)
  2790  		v.AuxInt = int32ToAuxInt(off)
  2791  		v.Aux = symToAux(sym)
  2792  		v.AddArg2(ptr, mem)
  2793  		return true
  2794  	}
  2795  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2796  	// result: (MOVBstore [off] {sym} ptr x mem)
  2797  	for {
  2798  		off := auxIntToInt32(v.AuxInt)
  2799  		sym := auxToSym(v.Aux)
  2800  		ptr := v_0
  2801  		if v_1.Op != OpMIPSMOVBreg {
  2802  			break
  2803  		}
  2804  		x := v_1.Args[0]
  2805  		mem := v_2
  2806  		v.reset(OpMIPSMOVBstore)
  2807  		v.AuxInt = int32ToAuxInt(off)
  2808  		v.Aux = symToAux(sym)
  2809  		v.AddArg3(ptr, x, mem)
  2810  		return true
  2811  	}
  2812  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2813  	// result: (MOVBstore [off] {sym} ptr x mem)
  2814  	for {
  2815  		off := auxIntToInt32(v.AuxInt)
  2816  		sym := auxToSym(v.Aux)
  2817  		ptr := v_0
  2818  		if v_1.Op != OpMIPSMOVBUreg {
  2819  			break
  2820  		}
  2821  		x := v_1.Args[0]
  2822  		mem := v_2
  2823  		v.reset(OpMIPSMOVBstore)
  2824  		v.AuxInt = int32ToAuxInt(off)
  2825  		v.Aux = symToAux(sym)
  2826  		v.AddArg3(ptr, x, mem)
  2827  		return true
  2828  	}
  2829  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2830  	// result: (MOVBstore [off] {sym} ptr x mem)
  2831  	for {
  2832  		off := auxIntToInt32(v.AuxInt)
  2833  		sym := auxToSym(v.Aux)
  2834  		ptr := v_0
  2835  		if v_1.Op != OpMIPSMOVHreg {
  2836  			break
  2837  		}
  2838  		x := v_1.Args[0]
  2839  		mem := v_2
  2840  		v.reset(OpMIPSMOVBstore)
  2841  		v.AuxInt = int32ToAuxInt(off)
  2842  		v.Aux = symToAux(sym)
  2843  		v.AddArg3(ptr, x, mem)
  2844  		return true
  2845  	}
  2846  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2847  	// result: (MOVBstore [off] {sym} ptr x mem)
  2848  	for {
  2849  		off := auxIntToInt32(v.AuxInt)
  2850  		sym := auxToSym(v.Aux)
  2851  		ptr := v_0
  2852  		if v_1.Op != OpMIPSMOVHUreg {
  2853  			break
  2854  		}
  2855  		x := v_1.Args[0]
  2856  		mem := v_2
  2857  		v.reset(OpMIPSMOVBstore)
  2858  		v.AuxInt = int32ToAuxInt(off)
  2859  		v.Aux = symToAux(sym)
  2860  		v.AddArg3(ptr, x, mem)
  2861  		return true
  2862  	}
  2863  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  2864  	// result: (MOVBstore [off] {sym} ptr x mem)
  2865  	for {
  2866  		off := auxIntToInt32(v.AuxInt)
  2867  		sym := auxToSym(v.Aux)
  2868  		ptr := v_0
  2869  		if v_1.Op != OpMIPSMOVWreg {
  2870  			break
  2871  		}
  2872  		x := v_1.Args[0]
  2873  		mem := v_2
  2874  		v.reset(OpMIPSMOVBstore)
  2875  		v.AuxInt = int32ToAuxInt(off)
  2876  		v.Aux = symToAux(sym)
  2877  		v.AddArg3(ptr, x, mem)
  2878  		return true
  2879  	}
  2880  	return false
  2881  }
  2882  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  2883  	v_1 := v.Args[1]
  2884  	v_0 := v.Args[0]
  2885  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2886  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2887  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  2888  	for {
  2889  		off1 := auxIntToInt32(v.AuxInt)
  2890  		sym := auxToSym(v.Aux)
  2891  		x := v_0
  2892  		if x.Op != OpMIPSADDconst {
  2893  			break
  2894  		}
  2895  		off2 := auxIntToInt32(x.AuxInt)
  2896  		ptr := x.Args[0]
  2897  		mem := v_1
  2898  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2899  			break
  2900  		}
  2901  		v.reset(OpMIPSMOVBstorezero)
  2902  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2903  		v.Aux = symToAux(sym)
  2904  		v.AddArg2(ptr, mem)
  2905  		return true
  2906  	}
  2907  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2908  	// cond: canMergeSym(sym1,sym2)
  2909  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2910  	for {
  2911  		off1 := auxIntToInt32(v.AuxInt)
  2912  		sym1 := auxToSym(v.Aux)
  2913  		if v_0.Op != OpMIPSMOVWaddr {
  2914  			break
  2915  		}
  2916  		off2 := auxIntToInt32(v_0.AuxInt)
  2917  		sym2 := auxToSym(v_0.Aux)
  2918  		ptr := v_0.Args[0]
  2919  		mem := v_1
  2920  		if !(canMergeSym(sym1, sym2)) {
  2921  			break
  2922  		}
  2923  		v.reset(OpMIPSMOVBstorezero)
  2924  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2925  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2926  		v.AddArg2(ptr, mem)
  2927  		return true
  2928  	}
  2929  	return false
  2930  }
  2931  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  2932  	v_1 := v.Args[1]
  2933  	v_0 := v.Args[0]
  2934  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2935  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2936  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  2937  	for {
  2938  		off1 := auxIntToInt32(v.AuxInt)
  2939  		sym := auxToSym(v.Aux)
  2940  		x := v_0
  2941  		if x.Op != OpMIPSADDconst {
  2942  			break
  2943  		}
  2944  		off2 := auxIntToInt32(x.AuxInt)
  2945  		ptr := x.Args[0]
  2946  		mem := v_1
  2947  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2948  			break
  2949  		}
  2950  		v.reset(OpMIPSMOVDload)
  2951  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2952  		v.Aux = symToAux(sym)
  2953  		v.AddArg2(ptr, mem)
  2954  		return true
  2955  	}
  2956  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2957  	// cond: canMergeSym(sym1,sym2)
  2958  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2959  	for {
  2960  		off1 := auxIntToInt32(v.AuxInt)
  2961  		sym1 := auxToSym(v.Aux)
  2962  		if v_0.Op != OpMIPSMOVWaddr {
  2963  			break
  2964  		}
  2965  		off2 := auxIntToInt32(v_0.AuxInt)
  2966  		sym2 := auxToSym(v_0.Aux)
  2967  		ptr := v_0.Args[0]
  2968  		mem := v_1
  2969  		if !(canMergeSym(sym1, sym2)) {
  2970  			break
  2971  		}
  2972  		v.reset(OpMIPSMOVDload)
  2973  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2974  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2975  		v.AddArg2(ptr, mem)
  2976  		return true
  2977  	}
  2978  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  2979  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2980  	// result: x
  2981  	for {
  2982  		off := auxIntToInt32(v.AuxInt)
  2983  		sym := auxToSym(v.Aux)
  2984  		ptr := v_0
  2985  		if v_1.Op != OpMIPSMOVDstore {
  2986  			break
  2987  		}
  2988  		off2 := auxIntToInt32(v_1.AuxInt)
  2989  		sym2 := auxToSym(v_1.Aux)
  2990  		x := v_1.Args[1]
  2991  		ptr2 := v_1.Args[0]
  2992  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2993  			break
  2994  		}
  2995  		v.copyOf(x)
  2996  		return true
  2997  	}
  2998  	return false
  2999  }
  3000  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  3001  	v_2 := v.Args[2]
  3002  	v_1 := v.Args[1]
  3003  	v_0 := v.Args[0]
  3004  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3005  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3006  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  3007  	for {
  3008  		off1 := auxIntToInt32(v.AuxInt)
  3009  		sym := auxToSym(v.Aux)
  3010  		x := v_0
  3011  		if x.Op != OpMIPSADDconst {
  3012  			break
  3013  		}
  3014  		off2 := auxIntToInt32(x.AuxInt)
  3015  		ptr := x.Args[0]
  3016  		val := v_1
  3017  		mem := v_2
  3018  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3019  			break
  3020  		}
  3021  		v.reset(OpMIPSMOVDstore)
  3022  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3023  		v.Aux = symToAux(sym)
  3024  		v.AddArg3(ptr, val, mem)
  3025  		return true
  3026  	}
  3027  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3028  	// cond: canMergeSym(sym1,sym2)
  3029  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3030  	for {
  3031  		off1 := auxIntToInt32(v.AuxInt)
  3032  		sym1 := auxToSym(v.Aux)
  3033  		if v_0.Op != OpMIPSMOVWaddr {
  3034  			break
  3035  		}
  3036  		off2 := auxIntToInt32(v_0.AuxInt)
  3037  		sym2 := auxToSym(v_0.Aux)
  3038  		ptr := v_0.Args[0]
  3039  		val := v_1
  3040  		mem := v_2
  3041  		if !(canMergeSym(sym1, sym2)) {
  3042  			break
  3043  		}
  3044  		v.reset(OpMIPSMOVDstore)
  3045  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3046  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3047  		v.AddArg3(ptr, val, mem)
  3048  		return true
  3049  	}
  3050  	return false
  3051  }
  3052  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  3053  	v_1 := v.Args[1]
  3054  	v_0 := v.Args[0]
  3055  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3056  	// result: (MOVWgpfp val)
  3057  	for {
  3058  		off := auxIntToInt32(v.AuxInt)
  3059  		sym := auxToSym(v.Aux)
  3060  		ptr := v_0
  3061  		if v_1.Op != OpMIPSMOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3062  			break
  3063  		}
  3064  		val := v_1.Args[1]
  3065  		if ptr != v_1.Args[0] {
  3066  			break
  3067  		}
  3068  		v.reset(OpMIPSMOVWgpfp)
  3069  		v.AddArg(val)
  3070  		return true
  3071  	}
  3072  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3073  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3074  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  3075  	for {
  3076  		off1 := auxIntToInt32(v.AuxInt)
  3077  		sym := auxToSym(v.Aux)
  3078  		x := v_0
  3079  		if x.Op != OpMIPSADDconst {
  3080  			break
  3081  		}
  3082  		off2 := auxIntToInt32(x.AuxInt)
  3083  		ptr := x.Args[0]
  3084  		mem := v_1
  3085  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3086  			break
  3087  		}
  3088  		v.reset(OpMIPSMOVFload)
  3089  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3090  		v.Aux = symToAux(sym)
  3091  		v.AddArg2(ptr, mem)
  3092  		return true
  3093  	}
  3094  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3095  	// cond: canMergeSym(sym1,sym2)
  3096  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3097  	for {
  3098  		off1 := auxIntToInt32(v.AuxInt)
  3099  		sym1 := auxToSym(v.Aux)
  3100  		if v_0.Op != OpMIPSMOVWaddr {
  3101  			break
  3102  		}
  3103  		off2 := auxIntToInt32(v_0.AuxInt)
  3104  		sym2 := auxToSym(v_0.Aux)
  3105  		ptr := v_0.Args[0]
  3106  		mem := v_1
  3107  		if !(canMergeSym(sym1, sym2)) {
  3108  			break
  3109  		}
  3110  		v.reset(OpMIPSMOVFload)
  3111  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3112  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3113  		v.AddArg2(ptr, mem)
  3114  		return true
  3115  	}
  3116  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  3117  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3118  	// result: x
  3119  	for {
  3120  		off := auxIntToInt32(v.AuxInt)
  3121  		sym := auxToSym(v.Aux)
  3122  		ptr := v_0
  3123  		if v_1.Op != OpMIPSMOVFstore {
  3124  			break
  3125  		}
  3126  		off2 := auxIntToInt32(v_1.AuxInt)
  3127  		sym2 := auxToSym(v_1.Aux)
  3128  		x := v_1.Args[1]
  3129  		ptr2 := v_1.Args[0]
  3130  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3131  			break
  3132  		}
  3133  		v.copyOf(x)
  3134  		return true
  3135  	}
  3136  	return false
  3137  }
  3138  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3139  	v_2 := v.Args[2]
  3140  	v_1 := v.Args[1]
  3141  	v_0 := v.Args[0]
  3142  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3143  	// result: (MOVWstore [off] {sym} ptr val mem)
  3144  	for {
  3145  		off := auxIntToInt32(v.AuxInt)
  3146  		sym := auxToSym(v.Aux)
  3147  		ptr := v_0
  3148  		if v_1.Op != OpMIPSMOVWgpfp {
  3149  			break
  3150  		}
  3151  		val := v_1.Args[0]
  3152  		mem := v_2
  3153  		v.reset(OpMIPSMOVWstore)
  3154  		v.AuxInt = int32ToAuxInt(off)
  3155  		v.Aux = symToAux(sym)
  3156  		v.AddArg3(ptr, val, mem)
  3157  		return true
  3158  	}
  3159  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3160  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3161  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3162  	for {
  3163  		off1 := auxIntToInt32(v.AuxInt)
  3164  		sym := auxToSym(v.Aux)
  3165  		x := v_0
  3166  		if x.Op != OpMIPSADDconst {
  3167  			break
  3168  		}
  3169  		off2 := auxIntToInt32(x.AuxInt)
  3170  		ptr := x.Args[0]
  3171  		val := v_1
  3172  		mem := v_2
  3173  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3174  			break
  3175  		}
  3176  		v.reset(OpMIPSMOVFstore)
  3177  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3178  		v.Aux = symToAux(sym)
  3179  		v.AddArg3(ptr, val, mem)
  3180  		return true
  3181  	}
  3182  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3183  	// cond: canMergeSym(sym1,sym2)
  3184  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3185  	for {
  3186  		off1 := auxIntToInt32(v.AuxInt)
  3187  		sym1 := auxToSym(v.Aux)
  3188  		if v_0.Op != OpMIPSMOVWaddr {
  3189  			break
  3190  		}
  3191  		off2 := auxIntToInt32(v_0.AuxInt)
  3192  		sym2 := auxToSym(v_0.Aux)
  3193  		ptr := v_0.Args[0]
  3194  		val := v_1
  3195  		mem := v_2
  3196  		if !(canMergeSym(sym1, sym2)) {
  3197  			break
  3198  		}
  3199  		v.reset(OpMIPSMOVFstore)
  3200  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3201  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3202  		v.AddArg3(ptr, val, mem)
  3203  		return true
  3204  	}
  3205  	return false
  3206  }
  3207  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3208  	v_1 := v.Args[1]
  3209  	v_0 := v.Args[0]
  3210  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3211  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3212  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3213  	for {
  3214  		off1 := auxIntToInt32(v.AuxInt)
  3215  		sym := auxToSym(v.Aux)
  3216  		x := v_0
  3217  		if x.Op != OpMIPSADDconst {
  3218  			break
  3219  		}
  3220  		off2 := auxIntToInt32(x.AuxInt)
  3221  		ptr := x.Args[0]
  3222  		mem := v_1
  3223  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3224  			break
  3225  		}
  3226  		v.reset(OpMIPSMOVHUload)
  3227  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3228  		v.Aux = symToAux(sym)
  3229  		v.AddArg2(ptr, mem)
  3230  		return true
  3231  	}
  3232  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3233  	// cond: canMergeSym(sym1,sym2)
  3234  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3235  	for {
  3236  		off1 := auxIntToInt32(v.AuxInt)
  3237  		sym1 := auxToSym(v.Aux)
  3238  		if v_0.Op != OpMIPSMOVWaddr {
  3239  			break
  3240  		}
  3241  		off2 := auxIntToInt32(v_0.AuxInt)
  3242  		sym2 := auxToSym(v_0.Aux)
  3243  		ptr := v_0.Args[0]
  3244  		mem := v_1
  3245  		if !(canMergeSym(sym1, sym2)) {
  3246  			break
  3247  		}
  3248  		v.reset(OpMIPSMOVHUload)
  3249  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3250  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3251  		v.AddArg2(ptr, mem)
  3252  		return true
  3253  	}
  3254  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3255  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3256  	// result: (MOVHUreg x)
  3257  	for {
  3258  		off := auxIntToInt32(v.AuxInt)
  3259  		sym := auxToSym(v.Aux)
  3260  		ptr := v_0
  3261  		if v_1.Op != OpMIPSMOVHstore {
  3262  			break
  3263  		}
  3264  		off2 := auxIntToInt32(v_1.AuxInt)
  3265  		sym2 := auxToSym(v_1.Aux)
  3266  		x := v_1.Args[1]
  3267  		ptr2 := v_1.Args[0]
  3268  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3269  			break
  3270  		}
  3271  		v.reset(OpMIPSMOVHUreg)
  3272  		v.AddArg(x)
  3273  		return true
  3274  	}
  3275  	return false
  3276  }
  3277  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3278  	v_0 := v.Args[0]
  3279  	b := v.Block
  3280  	// match: (MOVHUreg x:(MOVBUload _ _))
  3281  	// result: (MOVWreg x)
  3282  	for {
  3283  		x := v_0
  3284  		if x.Op != OpMIPSMOVBUload {
  3285  			break
  3286  		}
  3287  		v.reset(OpMIPSMOVWreg)
  3288  		v.AddArg(x)
  3289  		return true
  3290  	}
  3291  	// match: (MOVHUreg x:(MOVHUload _ _))
  3292  	// result: (MOVWreg x)
  3293  	for {
  3294  		x := v_0
  3295  		if x.Op != OpMIPSMOVHUload {
  3296  			break
  3297  		}
  3298  		v.reset(OpMIPSMOVWreg)
  3299  		v.AddArg(x)
  3300  		return true
  3301  	}
  3302  	// match: (MOVHUreg x:(MOVBUreg _))
  3303  	// result: (MOVWreg x)
  3304  	for {
  3305  		x := v_0
  3306  		if x.Op != OpMIPSMOVBUreg {
  3307  			break
  3308  		}
  3309  		v.reset(OpMIPSMOVWreg)
  3310  		v.AddArg(x)
  3311  		return true
  3312  	}
  3313  	// match: (MOVHUreg x:(MOVHUreg _))
  3314  	// result: (MOVWreg x)
  3315  	for {
  3316  		x := v_0
  3317  		if x.Op != OpMIPSMOVHUreg {
  3318  			break
  3319  		}
  3320  		v.reset(OpMIPSMOVWreg)
  3321  		v.AddArg(x)
  3322  		return true
  3323  	}
  3324  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3325  	// cond: x.Uses == 1 && clobber(x)
  3326  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3327  	for {
  3328  		t := v.Type
  3329  		x := v_0
  3330  		if x.Op != OpMIPSMOVHload {
  3331  			break
  3332  		}
  3333  		off := auxIntToInt32(x.AuxInt)
  3334  		sym := auxToSym(x.Aux)
  3335  		mem := x.Args[1]
  3336  		ptr := x.Args[0]
  3337  		if !(x.Uses == 1 && clobber(x)) {
  3338  			break
  3339  		}
  3340  		b = x.Block
  3341  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3342  		v.copyOf(v0)
  3343  		v0.AuxInt = int32ToAuxInt(off)
  3344  		v0.Aux = symToAux(sym)
  3345  		v0.AddArg2(ptr, mem)
  3346  		return true
  3347  	}
  3348  	// match: (MOVHUreg (ANDconst [c] x))
  3349  	// result: (ANDconst [c&0xffff] x)
  3350  	for {
  3351  		if v_0.Op != OpMIPSANDconst {
  3352  			break
  3353  		}
  3354  		c := auxIntToInt32(v_0.AuxInt)
  3355  		x := v_0.Args[0]
  3356  		v.reset(OpMIPSANDconst)
  3357  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3358  		v.AddArg(x)
  3359  		return true
  3360  	}
  3361  	// match: (MOVHUreg (MOVWconst [c]))
  3362  	// result: (MOVWconst [int32(uint16(c))])
  3363  	for {
  3364  		if v_0.Op != OpMIPSMOVWconst {
  3365  			break
  3366  		}
  3367  		c := auxIntToInt32(v_0.AuxInt)
  3368  		v.reset(OpMIPSMOVWconst)
  3369  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3370  		return true
  3371  	}
  3372  	return false
  3373  }
  3374  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3375  	v_1 := v.Args[1]
  3376  	v_0 := v.Args[0]
  3377  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3378  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3379  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3380  	for {
  3381  		off1 := auxIntToInt32(v.AuxInt)
  3382  		sym := auxToSym(v.Aux)
  3383  		x := v_0
  3384  		if x.Op != OpMIPSADDconst {
  3385  			break
  3386  		}
  3387  		off2 := auxIntToInt32(x.AuxInt)
  3388  		ptr := x.Args[0]
  3389  		mem := v_1
  3390  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3391  			break
  3392  		}
  3393  		v.reset(OpMIPSMOVHload)
  3394  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3395  		v.Aux = symToAux(sym)
  3396  		v.AddArg2(ptr, mem)
  3397  		return true
  3398  	}
  3399  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3400  	// cond: canMergeSym(sym1,sym2)
  3401  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3402  	for {
  3403  		off1 := auxIntToInt32(v.AuxInt)
  3404  		sym1 := auxToSym(v.Aux)
  3405  		if v_0.Op != OpMIPSMOVWaddr {
  3406  			break
  3407  		}
  3408  		off2 := auxIntToInt32(v_0.AuxInt)
  3409  		sym2 := auxToSym(v_0.Aux)
  3410  		ptr := v_0.Args[0]
  3411  		mem := v_1
  3412  		if !(canMergeSym(sym1, sym2)) {
  3413  			break
  3414  		}
  3415  		v.reset(OpMIPSMOVHload)
  3416  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3417  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3418  		v.AddArg2(ptr, mem)
  3419  		return true
  3420  	}
  3421  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3422  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3423  	// result: (MOVHreg x)
  3424  	for {
  3425  		off := auxIntToInt32(v.AuxInt)
  3426  		sym := auxToSym(v.Aux)
  3427  		ptr := v_0
  3428  		if v_1.Op != OpMIPSMOVHstore {
  3429  			break
  3430  		}
  3431  		off2 := auxIntToInt32(v_1.AuxInt)
  3432  		sym2 := auxToSym(v_1.Aux)
  3433  		x := v_1.Args[1]
  3434  		ptr2 := v_1.Args[0]
  3435  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3436  			break
  3437  		}
  3438  		v.reset(OpMIPSMOVHreg)
  3439  		v.AddArg(x)
  3440  		return true
  3441  	}
  3442  	return false
  3443  }
  3444  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3445  	v_0 := v.Args[0]
  3446  	b := v.Block
  3447  	// match: (MOVHreg x:(MOVBload _ _))
  3448  	// result: (MOVWreg x)
  3449  	for {
  3450  		x := v_0
  3451  		if x.Op != OpMIPSMOVBload {
  3452  			break
  3453  		}
  3454  		v.reset(OpMIPSMOVWreg)
  3455  		v.AddArg(x)
  3456  		return true
  3457  	}
  3458  	// match: (MOVHreg x:(MOVBUload _ _))
  3459  	// result: (MOVWreg x)
  3460  	for {
  3461  		x := v_0
  3462  		if x.Op != OpMIPSMOVBUload {
  3463  			break
  3464  		}
  3465  		v.reset(OpMIPSMOVWreg)
  3466  		v.AddArg(x)
  3467  		return true
  3468  	}
  3469  	// match: (MOVHreg x:(MOVHload _ _))
  3470  	// result: (MOVWreg x)
  3471  	for {
  3472  		x := v_0
  3473  		if x.Op != OpMIPSMOVHload {
  3474  			break
  3475  		}
  3476  		v.reset(OpMIPSMOVWreg)
  3477  		v.AddArg(x)
  3478  		return true
  3479  	}
  3480  	// match: (MOVHreg x:(MOVBreg _))
  3481  	// result: (MOVWreg x)
  3482  	for {
  3483  		x := v_0
  3484  		if x.Op != OpMIPSMOVBreg {
  3485  			break
  3486  		}
  3487  		v.reset(OpMIPSMOVWreg)
  3488  		v.AddArg(x)
  3489  		return true
  3490  	}
  3491  	// match: (MOVHreg x:(MOVBUreg _))
  3492  	// result: (MOVWreg x)
  3493  	for {
  3494  		x := v_0
  3495  		if x.Op != OpMIPSMOVBUreg {
  3496  			break
  3497  		}
  3498  		v.reset(OpMIPSMOVWreg)
  3499  		v.AddArg(x)
  3500  		return true
  3501  	}
  3502  	// match: (MOVHreg x:(MOVHreg _))
  3503  	// result: (MOVWreg x)
  3504  	for {
  3505  		x := v_0
  3506  		if x.Op != OpMIPSMOVHreg {
  3507  			break
  3508  		}
  3509  		v.reset(OpMIPSMOVWreg)
  3510  		v.AddArg(x)
  3511  		return true
  3512  	}
  3513  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3514  	// cond: x.Uses == 1 && clobber(x)
  3515  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3516  	for {
  3517  		t := v.Type
  3518  		x := v_0
  3519  		if x.Op != OpMIPSMOVHUload {
  3520  			break
  3521  		}
  3522  		off := auxIntToInt32(x.AuxInt)
  3523  		sym := auxToSym(x.Aux)
  3524  		mem := x.Args[1]
  3525  		ptr := x.Args[0]
  3526  		if !(x.Uses == 1 && clobber(x)) {
  3527  			break
  3528  		}
  3529  		b = x.Block
  3530  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3531  		v.copyOf(v0)
  3532  		v0.AuxInt = int32ToAuxInt(off)
  3533  		v0.Aux = symToAux(sym)
  3534  		v0.AddArg2(ptr, mem)
  3535  		return true
  3536  	}
  3537  	// match: (MOVHreg (ANDconst [c] x))
  3538  	// cond: c & 0x8000 == 0
  3539  	// result: (ANDconst [c&0x7fff] x)
  3540  	for {
  3541  		if v_0.Op != OpMIPSANDconst {
  3542  			break
  3543  		}
  3544  		c := auxIntToInt32(v_0.AuxInt)
  3545  		x := v_0.Args[0]
  3546  		if !(c&0x8000 == 0) {
  3547  			break
  3548  		}
  3549  		v.reset(OpMIPSANDconst)
  3550  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3551  		v.AddArg(x)
  3552  		return true
  3553  	}
  3554  	// match: (MOVHreg (MOVWconst [c]))
  3555  	// result: (MOVWconst [int32(int16(c))])
  3556  	for {
  3557  		if v_0.Op != OpMIPSMOVWconst {
  3558  			break
  3559  		}
  3560  		c := auxIntToInt32(v_0.AuxInt)
  3561  		v.reset(OpMIPSMOVWconst)
  3562  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3563  		return true
  3564  	}
  3565  	return false
  3566  }
  3567  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3568  	v_2 := v.Args[2]
  3569  	v_1 := v.Args[1]
  3570  	v_0 := v.Args[0]
  3571  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3572  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3573  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3574  	for {
  3575  		off1 := auxIntToInt32(v.AuxInt)
  3576  		sym := auxToSym(v.Aux)
  3577  		x := v_0
  3578  		if x.Op != OpMIPSADDconst {
  3579  			break
  3580  		}
  3581  		off2 := auxIntToInt32(x.AuxInt)
  3582  		ptr := x.Args[0]
  3583  		val := v_1
  3584  		mem := v_2
  3585  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3586  			break
  3587  		}
  3588  		v.reset(OpMIPSMOVHstore)
  3589  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3590  		v.Aux = symToAux(sym)
  3591  		v.AddArg3(ptr, val, mem)
  3592  		return true
  3593  	}
  3594  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3595  	// cond: canMergeSym(sym1,sym2)
  3596  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3597  	for {
  3598  		off1 := auxIntToInt32(v.AuxInt)
  3599  		sym1 := auxToSym(v.Aux)
  3600  		if v_0.Op != OpMIPSMOVWaddr {
  3601  			break
  3602  		}
  3603  		off2 := auxIntToInt32(v_0.AuxInt)
  3604  		sym2 := auxToSym(v_0.Aux)
  3605  		ptr := v_0.Args[0]
  3606  		val := v_1
  3607  		mem := v_2
  3608  		if !(canMergeSym(sym1, sym2)) {
  3609  			break
  3610  		}
  3611  		v.reset(OpMIPSMOVHstore)
  3612  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3613  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3614  		v.AddArg3(ptr, val, mem)
  3615  		return true
  3616  	}
  3617  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3618  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3619  	for {
  3620  		off := auxIntToInt32(v.AuxInt)
  3621  		sym := auxToSym(v.Aux)
  3622  		ptr := v_0
  3623  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3624  			break
  3625  		}
  3626  		mem := v_2
  3627  		v.reset(OpMIPSMOVHstorezero)
  3628  		v.AuxInt = int32ToAuxInt(off)
  3629  		v.Aux = symToAux(sym)
  3630  		v.AddArg2(ptr, mem)
  3631  		return true
  3632  	}
  3633  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3634  	// result: (MOVHstore [off] {sym} ptr x mem)
  3635  	for {
  3636  		off := auxIntToInt32(v.AuxInt)
  3637  		sym := auxToSym(v.Aux)
  3638  		ptr := v_0
  3639  		if v_1.Op != OpMIPSMOVHreg {
  3640  			break
  3641  		}
  3642  		x := v_1.Args[0]
  3643  		mem := v_2
  3644  		v.reset(OpMIPSMOVHstore)
  3645  		v.AuxInt = int32ToAuxInt(off)
  3646  		v.Aux = symToAux(sym)
  3647  		v.AddArg3(ptr, x, mem)
  3648  		return true
  3649  	}
  3650  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3651  	// result: (MOVHstore [off] {sym} ptr x mem)
  3652  	for {
  3653  		off := auxIntToInt32(v.AuxInt)
  3654  		sym := auxToSym(v.Aux)
  3655  		ptr := v_0
  3656  		if v_1.Op != OpMIPSMOVHUreg {
  3657  			break
  3658  		}
  3659  		x := v_1.Args[0]
  3660  		mem := v_2
  3661  		v.reset(OpMIPSMOVHstore)
  3662  		v.AuxInt = int32ToAuxInt(off)
  3663  		v.Aux = symToAux(sym)
  3664  		v.AddArg3(ptr, x, mem)
  3665  		return true
  3666  	}
  3667  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3668  	// result: (MOVHstore [off] {sym} ptr x mem)
  3669  	for {
  3670  		off := auxIntToInt32(v.AuxInt)
  3671  		sym := auxToSym(v.Aux)
  3672  		ptr := v_0
  3673  		if v_1.Op != OpMIPSMOVWreg {
  3674  			break
  3675  		}
  3676  		x := v_1.Args[0]
  3677  		mem := v_2
  3678  		v.reset(OpMIPSMOVHstore)
  3679  		v.AuxInt = int32ToAuxInt(off)
  3680  		v.Aux = symToAux(sym)
  3681  		v.AddArg3(ptr, x, mem)
  3682  		return true
  3683  	}
  3684  	return false
  3685  }
  3686  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3687  	v_1 := v.Args[1]
  3688  	v_0 := v.Args[0]
  3689  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3690  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3691  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3692  	for {
  3693  		off1 := auxIntToInt32(v.AuxInt)
  3694  		sym := auxToSym(v.Aux)
  3695  		x := v_0
  3696  		if x.Op != OpMIPSADDconst {
  3697  			break
  3698  		}
  3699  		off2 := auxIntToInt32(x.AuxInt)
  3700  		ptr := x.Args[0]
  3701  		mem := v_1
  3702  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3703  			break
  3704  		}
  3705  		v.reset(OpMIPSMOVHstorezero)
  3706  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3707  		v.Aux = symToAux(sym)
  3708  		v.AddArg2(ptr, mem)
  3709  		return true
  3710  	}
  3711  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3712  	// cond: canMergeSym(sym1,sym2)
  3713  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3714  	for {
  3715  		off1 := auxIntToInt32(v.AuxInt)
  3716  		sym1 := auxToSym(v.Aux)
  3717  		if v_0.Op != OpMIPSMOVWaddr {
  3718  			break
  3719  		}
  3720  		off2 := auxIntToInt32(v_0.AuxInt)
  3721  		sym2 := auxToSym(v_0.Aux)
  3722  		ptr := v_0.Args[0]
  3723  		mem := v_1
  3724  		if !(canMergeSym(sym1, sym2)) {
  3725  			break
  3726  		}
  3727  		v.reset(OpMIPSMOVHstorezero)
  3728  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3729  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3730  		v.AddArg2(ptr, mem)
  3731  		return true
  3732  	}
  3733  	return false
  3734  }
  3735  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3736  	v_1 := v.Args[1]
  3737  	v_0 := v.Args[0]
  3738  	// match: (MOVWload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  3739  	// result: (MOVWfpgp val)
  3740  	for {
  3741  		off := auxIntToInt32(v.AuxInt)
  3742  		sym := auxToSym(v.Aux)
  3743  		ptr := v_0
  3744  		if v_1.Op != OpMIPSMOVFstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3745  			break
  3746  		}
  3747  		val := v_1.Args[1]
  3748  		if ptr != v_1.Args[0] {
  3749  			break
  3750  		}
  3751  		v.reset(OpMIPSMOVWfpgp)
  3752  		v.AddArg(val)
  3753  		return true
  3754  	}
  3755  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3756  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3757  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3758  	for {
  3759  		off1 := auxIntToInt32(v.AuxInt)
  3760  		sym := auxToSym(v.Aux)
  3761  		x := v_0
  3762  		if x.Op != OpMIPSADDconst {
  3763  			break
  3764  		}
  3765  		off2 := auxIntToInt32(x.AuxInt)
  3766  		ptr := x.Args[0]
  3767  		mem := v_1
  3768  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3769  			break
  3770  		}
  3771  		v.reset(OpMIPSMOVWload)
  3772  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3773  		v.Aux = symToAux(sym)
  3774  		v.AddArg2(ptr, mem)
  3775  		return true
  3776  	}
  3777  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3778  	// cond: canMergeSym(sym1,sym2)
  3779  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3780  	for {
  3781  		off1 := auxIntToInt32(v.AuxInt)
  3782  		sym1 := auxToSym(v.Aux)
  3783  		if v_0.Op != OpMIPSMOVWaddr {
  3784  			break
  3785  		}
  3786  		off2 := auxIntToInt32(v_0.AuxInt)
  3787  		sym2 := auxToSym(v_0.Aux)
  3788  		ptr := v_0.Args[0]
  3789  		mem := v_1
  3790  		if !(canMergeSym(sym1, sym2)) {
  3791  			break
  3792  		}
  3793  		v.reset(OpMIPSMOVWload)
  3794  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3795  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3796  		v.AddArg2(ptr, mem)
  3797  		return true
  3798  	}
  3799  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3800  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3801  	// result: x
  3802  	for {
  3803  		off := auxIntToInt32(v.AuxInt)
  3804  		sym := auxToSym(v.Aux)
  3805  		ptr := v_0
  3806  		if v_1.Op != OpMIPSMOVWstore {
  3807  			break
  3808  		}
  3809  		off2 := auxIntToInt32(v_1.AuxInt)
  3810  		sym2 := auxToSym(v_1.Aux)
  3811  		x := v_1.Args[1]
  3812  		ptr2 := v_1.Args[0]
  3813  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3814  			break
  3815  		}
  3816  		v.copyOf(x)
  3817  		return true
  3818  	}
  3819  	return false
  3820  }
  3821  func rewriteValueMIPS_OpMIPSMOVWnop(v *Value) bool {
  3822  	v_0 := v.Args[0]
  3823  	// match: (MOVWnop (MOVWconst [c]))
  3824  	// result: (MOVWconst [c])
  3825  	for {
  3826  		if v_0.Op != OpMIPSMOVWconst {
  3827  			break
  3828  		}
  3829  		c := auxIntToInt32(v_0.AuxInt)
  3830  		v.reset(OpMIPSMOVWconst)
  3831  		v.AuxInt = int32ToAuxInt(c)
  3832  		return true
  3833  	}
  3834  	return false
  3835  }
  3836  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3837  	v_0 := v.Args[0]
  3838  	// match: (MOVWreg x)
  3839  	// cond: x.Uses == 1
  3840  	// result: (MOVWnop x)
  3841  	for {
  3842  		x := v_0
  3843  		if !(x.Uses == 1) {
  3844  			break
  3845  		}
  3846  		v.reset(OpMIPSMOVWnop)
  3847  		v.AddArg(x)
  3848  		return true
  3849  	}
  3850  	// match: (MOVWreg (MOVWconst [c]))
  3851  	// result: (MOVWconst [c])
  3852  	for {
  3853  		if v_0.Op != OpMIPSMOVWconst {
  3854  			break
  3855  		}
  3856  		c := auxIntToInt32(v_0.AuxInt)
  3857  		v.reset(OpMIPSMOVWconst)
  3858  		v.AuxInt = int32ToAuxInt(c)
  3859  		return true
  3860  	}
  3861  	return false
  3862  }
  3863  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  3864  	v_2 := v.Args[2]
  3865  	v_1 := v.Args[1]
  3866  	v_0 := v.Args[0]
  3867  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  3868  	// result: (MOVFstore [off] {sym} ptr val mem)
  3869  	for {
  3870  		off := auxIntToInt32(v.AuxInt)
  3871  		sym := auxToSym(v.Aux)
  3872  		ptr := v_0
  3873  		if v_1.Op != OpMIPSMOVWfpgp {
  3874  			break
  3875  		}
  3876  		val := v_1.Args[0]
  3877  		mem := v_2
  3878  		v.reset(OpMIPSMOVFstore)
  3879  		v.AuxInt = int32ToAuxInt(off)
  3880  		v.Aux = symToAux(sym)
  3881  		v.AddArg3(ptr, val, mem)
  3882  		return true
  3883  	}
  3884  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3885  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3886  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  3887  	for {
  3888  		off1 := auxIntToInt32(v.AuxInt)
  3889  		sym := auxToSym(v.Aux)
  3890  		x := v_0
  3891  		if x.Op != OpMIPSADDconst {
  3892  			break
  3893  		}
  3894  		off2 := auxIntToInt32(x.AuxInt)
  3895  		ptr := x.Args[0]
  3896  		val := v_1
  3897  		mem := v_2
  3898  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3899  			break
  3900  		}
  3901  		v.reset(OpMIPSMOVWstore)
  3902  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3903  		v.Aux = symToAux(sym)
  3904  		v.AddArg3(ptr, val, mem)
  3905  		return true
  3906  	}
  3907  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3908  	// cond: canMergeSym(sym1,sym2)
  3909  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3910  	for {
  3911  		off1 := auxIntToInt32(v.AuxInt)
  3912  		sym1 := auxToSym(v.Aux)
  3913  		if v_0.Op != OpMIPSMOVWaddr {
  3914  			break
  3915  		}
  3916  		off2 := auxIntToInt32(v_0.AuxInt)
  3917  		sym2 := auxToSym(v_0.Aux)
  3918  		ptr := v_0.Args[0]
  3919  		val := v_1
  3920  		mem := v_2
  3921  		if !(canMergeSym(sym1, sym2)) {
  3922  			break
  3923  		}
  3924  		v.reset(OpMIPSMOVWstore)
  3925  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3926  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3927  		v.AddArg3(ptr, val, mem)
  3928  		return true
  3929  	}
  3930  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  3931  	// result: (MOVWstorezero [off] {sym} ptr mem)
  3932  	for {
  3933  		off := auxIntToInt32(v.AuxInt)
  3934  		sym := auxToSym(v.Aux)
  3935  		ptr := v_0
  3936  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3937  			break
  3938  		}
  3939  		mem := v_2
  3940  		v.reset(OpMIPSMOVWstorezero)
  3941  		v.AuxInt = int32ToAuxInt(off)
  3942  		v.Aux = symToAux(sym)
  3943  		v.AddArg2(ptr, mem)
  3944  		return true
  3945  	}
  3946  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  3947  	// result: (MOVWstore [off] {sym} ptr x mem)
  3948  	for {
  3949  		off := auxIntToInt32(v.AuxInt)
  3950  		sym := auxToSym(v.Aux)
  3951  		ptr := v_0
  3952  		if v_1.Op != OpMIPSMOVWreg {
  3953  			break
  3954  		}
  3955  		x := v_1.Args[0]
  3956  		mem := v_2
  3957  		v.reset(OpMIPSMOVWstore)
  3958  		v.AuxInt = int32ToAuxInt(off)
  3959  		v.Aux = symToAux(sym)
  3960  		v.AddArg3(ptr, x, mem)
  3961  		return true
  3962  	}
  3963  	return false
  3964  }
  3965  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  3966  	v_1 := v.Args[1]
  3967  	v_0 := v.Args[0]
  3968  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3969  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3970  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  3971  	for {
  3972  		off1 := auxIntToInt32(v.AuxInt)
  3973  		sym := auxToSym(v.Aux)
  3974  		x := v_0
  3975  		if x.Op != OpMIPSADDconst {
  3976  			break
  3977  		}
  3978  		off2 := auxIntToInt32(x.AuxInt)
  3979  		ptr := x.Args[0]
  3980  		mem := v_1
  3981  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3982  			break
  3983  		}
  3984  		v.reset(OpMIPSMOVWstorezero)
  3985  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3986  		v.Aux = symToAux(sym)
  3987  		v.AddArg2(ptr, mem)
  3988  		return true
  3989  	}
  3990  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3991  	// cond: canMergeSym(sym1,sym2)
  3992  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3993  	for {
  3994  		off1 := auxIntToInt32(v.AuxInt)
  3995  		sym1 := auxToSym(v.Aux)
  3996  		if v_0.Op != OpMIPSMOVWaddr {
  3997  			break
  3998  		}
  3999  		off2 := auxIntToInt32(v_0.AuxInt)
  4000  		sym2 := auxToSym(v_0.Aux)
  4001  		ptr := v_0.Args[0]
  4002  		mem := v_1
  4003  		if !(canMergeSym(sym1, sym2)) {
  4004  			break
  4005  		}
  4006  		v.reset(OpMIPSMOVWstorezero)
  4007  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4008  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4009  		v.AddArg2(ptr, mem)
  4010  		return true
  4011  	}
  4012  	return false
  4013  }
  4014  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  4015  	v_1 := v.Args[1]
  4016  	v_0 := v.Args[0]
  4017  	// match: (MUL (MOVWconst [0]) _ )
  4018  	// result: (MOVWconst [0])
  4019  	for {
  4020  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4021  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4022  				continue
  4023  			}
  4024  			v.reset(OpMIPSMOVWconst)
  4025  			v.AuxInt = int32ToAuxInt(0)
  4026  			return true
  4027  		}
  4028  		break
  4029  	}
  4030  	// match: (MUL (MOVWconst [1]) x )
  4031  	// result: x
  4032  	for {
  4033  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4034  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  4035  				continue
  4036  			}
  4037  			x := v_1
  4038  			v.copyOf(x)
  4039  			return true
  4040  		}
  4041  		break
  4042  	}
  4043  	// match: (MUL (MOVWconst [-1]) x )
  4044  	// result: (NEG x)
  4045  	for {
  4046  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4047  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  4048  				continue
  4049  			}
  4050  			x := v_1
  4051  			v.reset(OpMIPSNEG)
  4052  			v.AddArg(x)
  4053  			return true
  4054  		}
  4055  		break
  4056  	}
  4057  	// match: (MUL (MOVWconst [c]) x )
  4058  	// cond: isPowerOfTwo(int64(uint32(c)))
  4059  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  4060  	for {
  4061  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4062  			if v_0.Op != OpMIPSMOVWconst {
  4063  				continue
  4064  			}
  4065  			c := auxIntToInt32(v_0.AuxInt)
  4066  			x := v_1
  4067  			if !(isPowerOfTwo(int64(uint32(c)))) {
  4068  				continue
  4069  			}
  4070  			v.reset(OpMIPSSLLconst)
  4071  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  4072  			v.AddArg(x)
  4073  			return true
  4074  		}
  4075  		break
  4076  	}
  4077  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  4078  	// result: (MOVWconst [c*d])
  4079  	for {
  4080  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4081  			if v_0.Op != OpMIPSMOVWconst {
  4082  				continue
  4083  			}
  4084  			c := auxIntToInt32(v_0.AuxInt)
  4085  			if v_1.Op != OpMIPSMOVWconst {
  4086  				continue
  4087  			}
  4088  			d := auxIntToInt32(v_1.AuxInt)
  4089  			v.reset(OpMIPSMOVWconst)
  4090  			v.AuxInt = int32ToAuxInt(c * d)
  4091  			return true
  4092  		}
  4093  		break
  4094  	}
  4095  	return false
  4096  }
  4097  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  4098  	v_0 := v.Args[0]
  4099  	// match: (NEG (MOVWconst [c]))
  4100  	// result: (MOVWconst [-c])
  4101  	for {
  4102  		if v_0.Op != OpMIPSMOVWconst {
  4103  			break
  4104  		}
  4105  		c := auxIntToInt32(v_0.AuxInt)
  4106  		v.reset(OpMIPSMOVWconst)
  4107  		v.AuxInt = int32ToAuxInt(-c)
  4108  		return true
  4109  	}
  4110  	return false
  4111  }
  4112  func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
  4113  	v_1 := v.Args[1]
  4114  	v_0 := v.Args[0]
  4115  	// match: (NOR x (MOVWconst [c]))
  4116  	// result: (NORconst [c] x)
  4117  	for {
  4118  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4119  			x := v_0
  4120  			if v_1.Op != OpMIPSMOVWconst {
  4121  				continue
  4122  			}
  4123  			c := auxIntToInt32(v_1.AuxInt)
  4124  			v.reset(OpMIPSNORconst)
  4125  			v.AuxInt = int32ToAuxInt(c)
  4126  			v.AddArg(x)
  4127  			return true
  4128  		}
  4129  		break
  4130  	}
  4131  	return false
  4132  }
  4133  func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
  4134  	v_0 := v.Args[0]
  4135  	// match: (NORconst [c] (MOVWconst [d]))
  4136  	// result: (MOVWconst [^(c|d)])
  4137  	for {
  4138  		c := auxIntToInt32(v.AuxInt)
  4139  		if v_0.Op != OpMIPSMOVWconst {
  4140  			break
  4141  		}
  4142  		d := auxIntToInt32(v_0.AuxInt)
  4143  		v.reset(OpMIPSMOVWconst)
  4144  		v.AuxInt = int32ToAuxInt(^(c | d))
  4145  		return true
  4146  	}
  4147  	return false
  4148  }
  4149  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  4150  	v_1 := v.Args[1]
  4151  	v_0 := v.Args[0]
  4152  	b := v.Block
  4153  	// match: (OR x (MOVWconst [c]))
  4154  	// result: (ORconst [c] x)
  4155  	for {
  4156  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4157  			x := v_0
  4158  			if v_1.Op != OpMIPSMOVWconst {
  4159  				continue
  4160  			}
  4161  			c := auxIntToInt32(v_1.AuxInt)
  4162  			v.reset(OpMIPSORconst)
  4163  			v.AuxInt = int32ToAuxInt(c)
  4164  			v.AddArg(x)
  4165  			return true
  4166  		}
  4167  		break
  4168  	}
  4169  	// match: (OR x x)
  4170  	// result: x
  4171  	for {
  4172  		x := v_0
  4173  		if x != v_1 {
  4174  			break
  4175  		}
  4176  		v.copyOf(x)
  4177  		return true
  4178  	}
  4179  	// match: (OR (SGTUzero x) (SGTUzero y))
  4180  	// result: (SGTUzero (OR <x.Type> x y))
  4181  	for {
  4182  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4183  			if v_0.Op != OpMIPSSGTUzero {
  4184  				continue
  4185  			}
  4186  			x := v_0.Args[0]
  4187  			if v_1.Op != OpMIPSSGTUzero {
  4188  				continue
  4189  			}
  4190  			y := v_1.Args[0]
  4191  			v.reset(OpMIPSSGTUzero)
  4192  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  4193  			v0.AddArg2(x, y)
  4194  			v.AddArg(v0)
  4195  			return true
  4196  		}
  4197  		break
  4198  	}
  4199  	return false
  4200  }
  4201  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  4202  	v_0 := v.Args[0]
  4203  	// match: (ORconst [0] x)
  4204  	// result: x
  4205  	for {
  4206  		if auxIntToInt32(v.AuxInt) != 0 {
  4207  			break
  4208  		}
  4209  		x := v_0
  4210  		v.copyOf(x)
  4211  		return true
  4212  	}
  4213  	// match: (ORconst [-1] _)
  4214  	// result: (MOVWconst [-1])
  4215  	for {
  4216  		if auxIntToInt32(v.AuxInt) != -1 {
  4217  			break
  4218  		}
  4219  		v.reset(OpMIPSMOVWconst)
  4220  		v.AuxInt = int32ToAuxInt(-1)
  4221  		return true
  4222  	}
  4223  	// match: (ORconst [c] (MOVWconst [d]))
  4224  	// result: (MOVWconst [c|d])
  4225  	for {
  4226  		c := auxIntToInt32(v.AuxInt)
  4227  		if v_0.Op != OpMIPSMOVWconst {
  4228  			break
  4229  		}
  4230  		d := auxIntToInt32(v_0.AuxInt)
  4231  		v.reset(OpMIPSMOVWconst)
  4232  		v.AuxInt = int32ToAuxInt(c | d)
  4233  		return true
  4234  	}
  4235  	// match: (ORconst [c] (ORconst [d] x))
  4236  	// result: (ORconst [c|d] x)
  4237  	for {
  4238  		c := auxIntToInt32(v.AuxInt)
  4239  		if v_0.Op != OpMIPSORconst {
  4240  			break
  4241  		}
  4242  		d := auxIntToInt32(v_0.AuxInt)
  4243  		x := v_0.Args[0]
  4244  		v.reset(OpMIPSORconst)
  4245  		v.AuxInt = int32ToAuxInt(c | d)
  4246  		v.AddArg(x)
  4247  		return true
  4248  	}
  4249  	return false
  4250  }
  4251  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4252  	v_1 := v.Args[1]
  4253  	v_0 := v.Args[0]
  4254  	// match: (SGT (MOVWconst [c]) x)
  4255  	// result: (SGTconst [c] x)
  4256  	for {
  4257  		if v_0.Op != OpMIPSMOVWconst {
  4258  			break
  4259  		}
  4260  		c := auxIntToInt32(v_0.AuxInt)
  4261  		x := v_1
  4262  		v.reset(OpMIPSSGTconst)
  4263  		v.AuxInt = int32ToAuxInt(c)
  4264  		v.AddArg(x)
  4265  		return true
  4266  	}
  4267  	// match: (SGT x (MOVWconst [0]))
  4268  	// result: (SGTzero x)
  4269  	for {
  4270  		x := v_0
  4271  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4272  			break
  4273  		}
  4274  		v.reset(OpMIPSSGTzero)
  4275  		v.AddArg(x)
  4276  		return true
  4277  	}
  4278  	return false
  4279  }
  4280  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4281  	v_1 := v.Args[1]
  4282  	v_0 := v.Args[0]
  4283  	// match: (SGTU (MOVWconst [c]) x)
  4284  	// result: (SGTUconst [c] x)
  4285  	for {
  4286  		if v_0.Op != OpMIPSMOVWconst {
  4287  			break
  4288  		}
  4289  		c := auxIntToInt32(v_0.AuxInt)
  4290  		x := v_1
  4291  		v.reset(OpMIPSSGTUconst)
  4292  		v.AuxInt = int32ToAuxInt(c)
  4293  		v.AddArg(x)
  4294  		return true
  4295  	}
  4296  	// match: (SGTU x (MOVWconst [0]))
  4297  	// result: (SGTUzero x)
  4298  	for {
  4299  		x := v_0
  4300  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4301  			break
  4302  		}
  4303  		v.reset(OpMIPSSGTUzero)
  4304  		v.AddArg(x)
  4305  		return true
  4306  	}
  4307  	return false
  4308  }
  4309  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4310  	v_0 := v.Args[0]
  4311  	// match: (SGTUconst [c] (MOVWconst [d]))
  4312  	// cond: uint32(c) > uint32(d)
  4313  	// result: (MOVWconst [1])
  4314  	for {
  4315  		c := auxIntToInt32(v.AuxInt)
  4316  		if v_0.Op != OpMIPSMOVWconst {
  4317  			break
  4318  		}
  4319  		d := auxIntToInt32(v_0.AuxInt)
  4320  		if !(uint32(c) > uint32(d)) {
  4321  			break
  4322  		}
  4323  		v.reset(OpMIPSMOVWconst)
  4324  		v.AuxInt = int32ToAuxInt(1)
  4325  		return true
  4326  	}
  4327  	// match: (SGTUconst [c] (MOVWconst [d]))
  4328  	// cond: uint32(c) <= uint32(d)
  4329  	// result: (MOVWconst [0])
  4330  	for {
  4331  		c := auxIntToInt32(v.AuxInt)
  4332  		if v_0.Op != OpMIPSMOVWconst {
  4333  			break
  4334  		}
  4335  		d := auxIntToInt32(v_0.AuxInt)
  4336  		if !(uint32(c) <= uint32(d)) {
  4337  			break
  4338  		}
  4339  		v.reset(OpMIPSMOVWconst)
  4340  		v.AuxInt = int32ToAuxInt(0)
  4341  		return true
  4342  	}
  4343  	// match: (SGTUconst [c] (MOVBUreg _))
  4344  	// cond: 0xff < uint32(c)
  4345  	// result: (MOVWconst [1])
  4346  	for {
  4347  		c := auxIntToInt32(v.AuxInt)
  4348  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4349  			break
  4350  		}
  4351  		v.reset(OpMIPSMOVWconst)
  4352  		v.AuxInt = int32ToAuxInt(1)
  4353  		return true
  4354  	}
  4355  	// match: (SGTUconst [c] (MOVHUreg _))
  4356  	// cond: 0xffff < uint32(c)
  4357  	// result: (MOVWconst [1])
  4358  	for {
  4359  		c := auxIntToInt32(v.AuxInt)
  4360  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4361  			break
  4362  		}
  4363  		v.reset(OpMIPSMOVWconst)
  4364  		v.AuxInt = int32ToAuxInt(1)
  4365  		return true
  4366  	}
  4367  	// match: (SGTUconst [c] (ANDconst [m] _))
  4368  	// cond: uint32(m) < uint32(c)
  4369  	// result: (MOVWconst [1])
  4370  	for {
  4371  		c := auxIntToInt32(v.AuxInt)
  4372  		if v_0.Op != OpMIPSANDconst {
  4373  			break
  4374  		}
  4375  		m := auxIntToInt32(v_0.AuxInt)
  4376  		if !(uint32(m) < uint32(c)) {
  4377  			break
  4378  		}
  4379  		v.reset(OpMIPSMOVWconst)
  4380  		v.AuxInt = int32ToAuxInt(1)
  4381  		return true
  4382  	}
  4383  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4384  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4385  	// result: (MOVWconst [1])
  4386  	for {
  4387  		c := auxIntToInt32(v.AuxInt)
  4388  		if v_0.Op != OpMIPSSRLconst {
  4389  			break
  4390  		}
  4391  		d := auxIntToInt32(v_0.AuxInt)
  4392  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4393  			break
  4394  		}
  4395  		v.reset(OpMIPSMOVWconst)
  4396  		v.AuxInt = int32ToAuxInt(1)
  4397  		return true
  4398  	}
  4399  	return false
  4400  }
  4401  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4402  	v_0 := v.Args[0]
  4403  	// match: (SGTUzero (MOVWconst [d]))
  4404  	// cond: d != 0
  4405  	// result: (MOVWconst [1])
  4406  	for {
  4407  		if v_0.Op != OpMIPSMOVWconst {
  4408  			break
  4409  		}
  4410  		d := auxIntToInt32(v_0.AuxInt)
  4411  		if !(d != 0) {
  4412  			break
  4413  		}
  4414  		v.reset(OpMIPSMOVWconst)
  4415  		v.AuxInt = int32ToAuxInt(1)
  4416  		return true
  4417  	}
  4418  	// match: (SGTUzero (MOVWconst [d]))
  4419  	// cond: d == 0
  4420  	// result: (MOVWconst [0])
  4421  	for {
  4422  		if v_0.Op != OpMIPSMOVWconst {
  4423  			break
  4424  		}
  4425  		d := auxIntToInt32(v_0.AuxInt)
  4426  		if !(d == 0) {
  4427  			break
  4428  		}
  4429  		v.reset(OpMIPSMOVWconst)
  4430  		v.AuxInt = int32ToAuxInt(0)
  4431  		return true
  4432  	}
  4433  	return false
  4434  }
  4435  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4436  	v_0 := v.Args[0]
  4437  	// match: (SGTconst [c] (MOVWconst [d]))
  4438  	// cond: c > d
  4439  	// result: (MOVWconst [1])
  4440  	for {
  4441  		c := auxIntToInt32(v.AuxInt)
  4442  		if v_0.Op != OpMIPSMOVWconst {
  4443  			break
  4444  		}
  4445  		d := auxIntToInt32(v_0.AuxInt)
  4446  		if !(c > d) {
  4447  			break
  4448  		}
  4449  		v.reset(OpMIPSMOVWconst)
  4450  		v.AuxInt = int32ToAuxInt(1)
  4451  		return true
  4452  	}
  4453  	// match: (SGTconst [c] (MOVWconst [d]))
  4454  	// cond: c <= d
  4455  	// result: (MOVWconst [0])
  4456  	for {
  4457  		c := auxIntToInt32(v.AuxInt)
  4458  		if v_0.Op != OpMIPSMOVWconst {
  4459  			break
  4460  		}
  4461  		d := auxIntToInt32(v_0.AuxInt)
  4462  		if !(c <= d) {
  4463  			break
  4464  		}
  4465  		v.reset(OpMIPSMOVWconst)
  4466  		v.AuxInt = int32ToAuxInt(0)
  4467  		return true
  4468  	}
  4469  	// match: (SGTconst [c] (MOVBreg _))
  4470  	// cond: 0x7f < c
  4471  	// result: (MOVWconst [1])
  4472  	for {
  4473  		c := auxIntToInt32(v.AuxInt)
  4474  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4475  			break
  4476  		}
  4477  		v.reset(OpMIPSMOVWconst)
  4478  		v.AuxInt = int32ToAuxInt(1)
  4479  		return true
  4480  	}
  4481  	// match: (SGTconst [c] (MOVBreg _))
  4482  	// cond: c <= -0x80
  4483  	// result: (MOVWconst [0])
  4484  	for {
  4485  		c := auxIntToInt32(v.AuxInt)
  4486  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4487  			break
  4488  		}
  4489  		v.reset(OpMIPSMOVWconst)
  4490  		v.AuxInt = int32ToAuxInt(0)
  4491  		return true
  4492  	}
  4493  	// match: (SGTconst [c] (MOVBUreg _))
  4494  	// cond: 0xff < c
  4495  	// result: (MOVWconst [1])
  4496  	for {
  4497  		c := auxIntToInt32(v.AuxInt)
  4498  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4499  			break
  4500  		}
  4501  		v.reset(OpMIPSMOVWconst)
  4502  		v.AuxInt = int32ToAuxInt(1)
  4503  		return true
  4504  	}
  4505  	// match: (SGTconst [c] (MOVBUreg _))
  4506  	// cond: c < 0
  4507  	// result: (MOVWconst [0])
  4508  	for {
  4509  		c := auxIntToInt32(v.AuxInt)
  4510  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4511  			break
  4512  		}
  4513  		v.reset(OpMIPSMOVWconst)
  4514  		v.AuxInt = int32ToAuxInt(0)
  4515  		return true
  4516  	}
  4517  	// match: (SGTconst [c] (MOVHreg _))
  4518  	// cond: 0x7fff < c
  4519  	// result: (MOVWconst [1])
  4520  	for {
  4521  		c := auxIntToInt32(v.AuxInt)
  4522  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4523  			break
  4524  		}
  4525  		v.reset(OpMIPSMOVWconst)
  4526  		v.AuxInt = int32ToAuxInt(1)
  4527  		return true
  4528  	}
  4529  	// match: (SGTconst [c] (MOVHreg _))
  4530  	// cond: c <= -0x8000
  4531  	// result: (MOVWconst [0])
  4532  	for {
  4533  		c := auxIntToInt32(v.AuxInt)
  4534  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4535  			break
  4536  		}
  4537  		v.reset(OpMIPSMOVWconst)
  4538  		v.AuxInt = int32ToAuxInt(0)
  4539  		return true
  4540  	}
  4541  	// match: (SGTconst [c] (MOVHUreg _))
  4542  	// cond: 0xffff < c
  4543  	// result: (MOVWconst [1])
  4544  	for {
  4545  		c := auxIntToInt32(v.AuxInt)
  4546  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4547  			break
  4548  		}
  4549  		v.reset(OpMIPSMOVWconst)
  4550  		v.AuxInt = int32ToAuxInt(1)
  4551  		return true
  4552  	}
  4553  	// match: (SGTconst [c] (MOVHUreg _))
  4554  	// cond: c < 0
  4555  	// result: (MOVWconst [0])
  4556  	for {
  4557  		c := auxIntToInt32(v.AuxInt)
  4558  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4559  			break
  4560  		}
  4561  		v.reset(OpMIPSMOVWconst)
  4562  		v.AuxInt = int32ToAuxInt(0)
  4563  		return true
  4564  	}
  4565  	// match: (SGTconst [c] (ANDconst [m] _))
  4566  	// cond: 0 <= m && m < c
  4567  	// result: (MOVWconst [1])
  4568  	for {
  4569  		c := auxIntToInt32(v.AuxInt)
  4570  		if v_0.Op != OpMIPSANDconst {
  4571  			break
  4572  		}
  4573  		m := auxIntToInt32(v_0.AuxInt)
  4574  		if !(0 <= m && m < c) {
  4575  			break
  4576  		}
  4577  		v.reset(OpMIPSMOVWconst)
  4578  		v.AuxInt = int32ToAuxInt(1)
  4579  		return true
  4580  	}
  4581  	// match: (SGTconst [c] (SRLconst _ [d]))
  4582  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4583  	// result: (MOVWconst [1])
  4584  	for {
  4585  		c := auxIntToInt32(v.AuxInt)
  4586  		if v_0.Op != OpMIPSSRLconst {
  4587  			break
  4588  		}
  4589  		d := auxIntToInt32(v_0.AuxInt)
  4590  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4591  			break
  4592  		}
  4593  		v.reset(OpMIPSMOVWconst)
  4594  		v.AuxInt = int32ToAuxInt(1)
  4595  		return true
  4596  	}
  4597  	return false
  4598  }
  4599  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4600  	v_0 := v.Args[0]
  4601  	// match: (SGTzero (MOVWconst [d]))
  4602  	// cond: d > 0
  4603  	// result: (MOVWconst [1])
  4604  	for {
  4605  		if v_0.Op != OpMIPSMOVWconst {
  4606  			break
  4607  		}
  4608  		d := auxIntToInt32(v_0.AuxInt)
  4609  		if !(d > 0) {
  4610  			break
  4611  		}
  4612  		v.reset(OpMIPSMOVWconst)
  4613  		v.AuxInt = int32ToAuxInt(1)
  4614  		return true
  4615  	}
  4616  	// match: (SGTzero (MOVWconst [d]))
  4617  	// cond: d <= 0
  4618  	// result: (MOVWconst [0])
  4619  	for {
  4620  		if v_0.Op != OpMIPSMOVWconst {
  4621  			break
  4622  		}
  4623  		d := auxIntToInt32(v_0.AuxInt)
  4624  		if !(d <= 0) {
  4625  			break
  4626  		}
  4627  		v.reset(OpMIPSMOVWconst)
  4628  		v.AuxInt = int32ToAuxInt(0)
  4629  		return true
  4630  	}
  4631  	return false
  4632  }
  4633  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4634  	v_1 := v.Args[1]
  4635  	v_0 := v.Args[0]
  4636  	// match: (SLL x (MOVWconst [c]))
  4637  	// result: (SLLconst x [c&31])
  4638  	for {
  4639  		x := v_0
  4640  		if v_1.Op != OpMIPSMOVWconst {
  4641  			break
  4642  		}
  4643  		c := auxIntToInt32(v_1.AuxInt)
  4644  		v.reset(OpMIPSSLLconst)
  4645  		v.AuxInt = int32ToAuxInt(c & 31)
  4646  		v.AddArg(x)
  4647  		return true
  4648  	}
  4649  	return false
  4650  }
  4651  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4652  	v_0 := v.Args[0]
  4653  	// match: (SLLconst [c] (MOVWconst [d]))
  4654  	// result: (MOVWconst [d<<uint32(c)])
  4655  	for {
  4656  		c := auxIntToInt32(v.AuxInt)
  4657  		if v_0.Op != OpMIPSMOVWconst {
  4658  			break
  4659  		}
  4660  		d := auxIntToInt32(v_0.AuxInt)
  4661  		v.reset(OpMIPSMOVWconst)
  4662  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4663  		return true
  4664  	}
  4665  	return false
  4666  }
  4667  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4668  	v_1 := v.Args[1]
  4669  	v_0 := v.Args[0]
  4670  	// match: (SRA x (MOVWconst [c]))
  4671  	// result: (SRAconst x [c&31])
  4672  	for {
  4673  		x := v_0
  4674  		if v_1.Op != OpMIPSMOVWconst {
  4675  			break
  4676  		}
  4677  		c := auxIntToInt32(v_1.AuxInt)
  4678  		v.reset(OpMIPSSRAconst)
  4679  		v.AuxInt = int32ToAuxInt(c & 31)
  4680  		v.AddArg(x)
  4681  		return true
  4682  	}
  4683  	return false
  4684  }
  4685  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4686  	v_0 := v.Args[0]
  4687  	// match: (SRAconst [c] (MOVWconst [d]))
  4688  	// result: (MOVWconst [d>>uint32(c)])
  4689  	for {
  4690  		c := auxIntToInt32(v.AuxInt)
  4691  		if v_0.Op != OpMIPSMOVWconst {
  4692  			break
  4693  		}
  4694  		d := auxIntToInt32(v_0.AuxInt)
  4695  		v.reset(OpMIPSMOVWconst)
  4696  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4697  		return true
  4698  	}
  4699  	return false
  4700  }
  4701  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4702  	v_1 := v.Args[1]
  4703  	v_0 := v.Args[0]
  4704  	// match: (SRL x (MOVWconst [c]))
  4705  	// result: (SRLconst x [c&31])
  4706  	for {
  4707  		x := v_0
  4708  		if v_1.Op != OpMIPSMOVWconst {
  4709  			break
  4710  		}
  4711  		c := auxIntToInt32(v_1.AuxInt)
  4712  		v.reset(OpMIPSSRLconst)
  4713  		v.AuxInt = int32ToAuxInt(c & 31)
  4714  		v.AddArg(x)
  4715  		return true
  4716  	}
  4717  	return false
  4718  }
  4719  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4720  	v_0 := v.Args[0]
  4721  	// match: (SRLconst [c] (MOVWconst [d]))
  4722  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4723  	for {
  4724  		c := auxIntToInt32(v.AuxInt)
  4725  		if v_0.Op != OpMIPSMOVWconst {
  4726  			break
  4727  		}
  4728  		d := auxIntToInt32(v_0.AuxInt)
  4729  		v.reset(OpMIPSMOVWconst)
  4730  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4731  		return true
  4732  	}
  4733  	return false
  4734  }
  4735  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4736  	v_1 := v.Args[1]
  4737  	v_0 := v.Args[0]
  4738  	// match: (SUB x (MOVWconst [c]))
  4739  	// result: (SUBconst [c] x)
  4740  	for {
  4741  		x := v_0
  4742  		if v_1.Op != OpMIPSMOVWconst {
  4743  			break
  4744  		}
  4745  		c := auxIntToInt32(v_1.AuxInt)
  4746  		v.reset(OpMIPSSUBconst)
  4747  		v.AuxInt = int32ToAuxInt(c)
  4748  		v.AddArg(x)
  4749  		return true
  4750  	}
  4751  	// match: (SUB x x)
  4752  	// result: (MOVWconst [0])
  4753  	for {
  4754  		x := v_0
  4755  		if x != v_1 {
  4756  			break
  4757  		}
  4758  		v.reset(OpMIPSMOVWconst)
  4759  		v.AuxInt = int32ToAuxInt(0)
  4760  		return true
  4761  	}
  4762  	// match: (SUB (MOVWconst [0]) x)
  4763  	// result: (NEG x)
  4764  	for {
  4765  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4766  			break
  4767  		}
  4768  		x := v_1
  4769  		v.reset(OpMIPSNEG)
  4770  		v.AddArg(x)
  4771  		return true
  4772  	}
  4773  	return false
  4774  }
  4775  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4776  	v_0 := v.Args[0]
  4777  	// match: (SUBconst [0] x)
  4778  	// result: x
  4779  	for {
  4780  		if auxIntToInt32(v.AuxInt) != 0 {
  4781  			break
  4782  		}
  4783  		x := v_0
  4784  		v.copyOf(x)
  4785  		return true
  4786  	}
  4787  	// match: (SUBconst [c] (MOVWconst [d]))
  4788  	// result: (MOVWconst [d-c])
  4789  	for {
  4790  		c := auxIntToInt32(v.AuxInt)
  4791  		if v_0.Op != OpMIPSMOVWconst {
  4792  			break
  4793  		}
  4794  		d := auxIntToInt32(v_0.AuxInt)
  4795  		v.reset(OpMIPSMOVWconst)
  4796  		v.AuxInt = int32ToAuxInt(d - c)
  4797  		return true
  4798  	}
  4799  	// match: (SUBconst [c] (SUBconst [d] x))
  4800  	// result: (ADDconst [-c-d] x)
  4801  	for {
  4802  		c := auxIntToInt32(v.AuxInt)
  4803  		if v_0.Op != OpMIPSSUBconst {
  4804  			break
  4805  		}
  4806  		d := auxIntToInt32(v_0.AuxInt)
  4807  		x := v_0.Args[0]
  4808  		v.reset(OpMIPSADDconst)
  4809  		v.AuxInt = int32ToAuxInt(-c - d)
  4810  		v.AddArg(x)
  4811  		return true
  4812  	}
  4813  	// match: (SUBconst [c] (ADDconst [d] x))
  4814  	// result: (ADDconst [-c+d] x)
  4815  	for {
  4816  		c := auxIntToInt32(v.AuxInt)
  4817  		if v_0.Op != OpMIPSADDconst {
  4818  			break
  4819  		}
  4820  		d := auxIntToInt32(v_0.AuxInt)
  4821  		x := v_0.Args[0]
  4822  		v.reset(OpMIPSADDconst)
  4823  		v.AuxInt = int32ToAuxInt(-c + d)
  4824  		v.AddArg(x)
  4825  		return true
  4826  	}
  4827  	return false
  4828  }
  4829  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  4830  	v_1 := v.Args[1]
  4831  	v_0 := v.Args[0]
  4832  	// match: (XOR x (MOVWconst [c]))
  4833  	// result: (XORconst [c] x)
  4834  	for {
  4835  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4836  			x := v_0
  4837  			if v_1.Op != OpMIPSMOVWconst {
  4838  				continue
  4839  			}
  4840  			c := auxIntToInt32(v_1.AuxInt)
  4841  			v.reset(OpMIPSXORconst)
  4842  			v.AuxInt = int32ToAuxInt(c)
  4843  			v.AddArg(x)
  4844  			return true
  4845  		}
  4846  		break
  4847  	}
  4848  	// match: (XOR x x)
  4849  	// result: (MOVWconst [0])
  4850  	for {
  4851  		x := v_0
  4852  		if x != v_1 {
  4853  			break
  4854  		}
  4855  		v.reset(OpMIPSMOVWconst)
  4856  		v.AuxInt = int32ToAuxInt(0)
  4857  		return true
  4858  	}
  4859  	return false
  4860  }
  4861  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  4862  	v_0 := v.Args[0]
  4863  	// match: (XORconst [0] x)
  4864  	// result: x
  4865  	for {
  4866  		if auxIntToInt32(v.AuxInt) != 0 {
  4867  			break
  4868  		}
  4869  		x := v_0
  4870  		v.copyOf(x)
  4871  		return true
  4872  	}
  4873  	// match: (XORconst [-1] x)
  4874  	// result: (NORconst [0] x)
  4875  	for {
  4876  		if auxIntToInt32(v.AuxInt) != -1 {
  4877  			break
  4878  		}
  4879  		x := v_0
  4880  		v.reset(OpMIPSNORconst)
  4881  		v.AuxInt = int32ToAuxInt(0)
  4882  		v.AddArg(x)
  4883  		return true
  4884  	}
  4885  	// match: (XORconst [c] (MOVWconst [d]))
  4886  	// result: (MOVWconst [c^d])
  4887  	for {
  4888  		c := auxIntToInt32(v.AuxInt)
  4889  		if v_0.Op != OpMIPSMOVWconst {
  4890  			break
  4891  		}
  4892  		d := auxIntToInt32(v_0.AuxInt)
  4893  		v.reset(OpMIPSMOVWconst)
  4894  		v.AuxInt = int32ToAuxInt(c ^ d)
  4895  		return true
  4896  	}
  4897  	// match: (XORconst [c] (XORconst [d] x))
  4898  	// result: (XORconst [c^d] x)
  4899  	for {
  4900  		c := auxIntToInt32(v.AuxInt)
  4901  		if v_0.Op != OpMIPSXORconst {
  4902  			break
  4903  		}
  4904  		d := auxIntToInt32(v_0.AuxInt)
  4905  		x := v_0.Args[0]
  4906  		v.reset(OpMIPSXORconst)
  4907  		v.AuxInt = int32ToAuxInt(c ^ d)
  4908  		v.AddArg(x)
  4909  		return true
  4910  	}
  4911  	return false
  4912  }
  4913  func rewriteValueMIPS_OpMod16(v *Value) bool {
  4914  	v_1 := v.Args[1]
  4915  	v_0 := v.Args[0]
  4916  	b := v.Block
  4917  	typ := &b.Func.Config.Types
  4918  	// match: (Mod16 x y)
  4919  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  4920  	for {
  4921  		x := v_0
  4922  		y := v_1
  4923  		v.reset(OpSelect0)
  4924  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4925  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4926  		v1.AddArg(x)
  4927  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4928  		v2.AddArg(y)
  4929  		v0.AddArg2(v1, v2)
  4930  		v.AddArg(v0)
  4931  		return true
  4932  	}
  4933  }
  4934  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  4935  	v_1 := v.Args[1]
  4936  	v_0 := v.Args[0]
  4937  	b := v.Block
  4938  	typ := &b.Func.Config.Types
  4939  	// match: (Mod16u x y)
  4940  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4941  	for {
  4942  		x := v_0
  4943  		y := v_1
  4944  		v.reset(OpSelect0)
  4945  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4946  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4947  		v1.AddArg(x)
  4948  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4949  		v2.AddArg(y)
  4950  		v0.AddArg2(v1, v2)
  4951  		v.AddArg(v0)
  4952  		return true
  4953  	}
  4954  }
  4955  func rewriteValueMIPS_OpMod32(v *Value) bool {
  4956  	v_1 := v.Args[1]
  4957  	v_0 := v.Args[0]
  4958  	b := v.Block
  4959  	typ := &b.Func.Config.Types
  4960  	// match: (Mod32 x y)
  4961  	// result: (Select0 (DIV x y))
  4962  	for {
  4963  		x := v_0
  4964  		y := v_1
  4965  		v.reset(OpSelect0)
  4966  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4967  		v0.AddArg2(x, y)
  4968  		v.AddArg(v0)
  4969  		return true
  4970  	}
  4971  }
  4972  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  4973  	v_1 := v.Args[1]
  4974  	v_0 := v.Args[0]
  4975  	b := v.Block
  4976  	typ := &b.Func.Config.Types
  4977  	// match: (Mod32u x y)
  4978  	// result: (Select0 (DIVU x y))
  4979  	for {
  4980  		x := v_0
  4981  		y := v_1
  4982  		v.reset(OpSelect0)
  4983  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4984  		v0.AddArg2(x, y)
  4985  		v.AddArg(v0)
  4986  		return true
  4987  	}
  4988  }
  4989  func rewriteValueMIPS_OpMod8(v *Value) bool {
  4990  	v_1 := v.Args[1]
  4991  	v_0 := v.Args[0]
  4992  	b := v.Block
  4993  	typ := &b.Func.Config.Types
  4994  	// match: (Mod8 x y)
  4995  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  4996  	for {
  4997  		x := v_0
  4998  		y := v_1
  4999  		v.reset(OpSelect0)
  5000  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5001  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5002  		v1.AddArg(x)
  5003  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5004  		v2.AddArg(y)
  5005  		v0.AddArg2(v1, v2)
  5006  		v.AddArg(v0)
  5007  		return true
  5008  	}
  5009  }
  5010  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  5011  	v_1 := v.Args[1]
  5012  	v_0 := v.Args[0]
  5013  	b := v.Block
  5014  	typ := &b.Func.Config.Types
  5015  	// match: (Mod8u x y)
  5016  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5017  	for {
  5018  		x := v_0
  5019  		y := v_1
  5020  		v.reset(OpSelect0)
  5021  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5022  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5023  		v1.AddArg(x)
  5024  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5025  		v2.AddArg(y)
  5026  		v0.AddArg2(v1, v2)
  5027  		v.AddArg(v0)
  5028  		return true
  5029  	}
  5030  }
  5031  func rewriteValueMIPS_OpMove(v *Value) bool {
  5032  	v_2 := v.Args[2]
  5033  	v_1 := v.Args[1]
  5034  	v_0 := v.Args[0]
  5035  	b := v.Block
  5036  	config := b.Func.Config
  5037  	typ := &b.Func.Config.Types
  5038  	// match: (Move [0] _ _ mem)
  5039  	// result: mem
  5040  	for {
  5041  		if auxIntToInt64(v.AuxInt) != 0 {
  5042  			break
  5043  		}
  5044  		mem := v_2
  5045  		v.copyOf(mem)
  5046  		return true
  5047  	}
  5048  	// match: (Move [1] dst src mem)
  5049  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  5050  	for {
  5051  		if auxIntToInt64(v.AuxInt) != 1 {
  5052  			break
  5053  		}
  5054  		dst := v_0
  5055  		src := v_1
  5056  		mem := v_2
  5057  		v.reset(OpMIPSMOVBstore)
  5058  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5059  		v0.AddArg2(src, mem)
  5060  		v.AddArg3(dst, v0, mem)
  5061  		return true
  5062  	}
  5063  	// match: (Move [2] {t} dst src mem)
  5064  	// cond: t.Alignment()%2 == 0
  5065  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  5066  	for {
  5067  		if auxIntToInt64(v.AuxInt) != 2 {
  5068  			break
  5069  		}
  5070  		t := auxToType(v.Aux)
  5071  		dst := v_0
  5072  		src := v_1
  5073  		mem := v_2
  5074  		if !(t.Alignment()%2 == 0) {
  5075  			break
  5076  		}
  5077  		v.reset(OpMIPSMOVHstore)
  5078  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5079  		v0.AddArg2(src, mem)
  5080  		v.AddArg3(dst, v0, mem)
  5081  		return true
  5082  	}
  5083  	// match: (Move [2] dst src mem)
  5084  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  5085  	for {
  5086  		if auxIntToInt64(v.AuxInt) != 2 {
  5087  			break
  5088  		}
  5089  		dst := v_0
  5090  		src := v_1
  5091  		mem := v_2
  5092  		v.reset(OpMIPSMOVBstore)
  5093  		v.AuxInt = int32ToAuxInt(1)
  5094  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5095  		v0.AuxInt = int32ToAuxInt(1)
  5096  		v0.AddArg2(src, mem)
  5097  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5098  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5099  		v2.AddArg2(src, mem)
  5100  		v1.AddArg3(dst, v2, mem)
  5101  		v.AddArg3(dst, v0, v1)
  5102  		return true
  5103  	}
  5104  	// match: (Move [4] {t} dst src mem)
  5105  	// cond: t.Alignment()%4 == 0
  5106  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5107  	for {
  5108  		if auxIntToInt64(v.AuxInt) != 4 {
  5109  			break
  5110  		}
  5111  		t := auxToType(v.Aux)
  5112  		dst := v_0
  5113  		src := v_1
  5114  		mem := v_2
  5115  		if !(t.Alignment()%4 == 0) {
  5116  			break
  5117  		}
  5118  		v.reset(OpMIPSMOVWstore)
  5119  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5120  		v0.AddArg2(src, mem)
  5121  		v.AddArg3(dst, v0, mem)
  5122  		return true
  5123  	}
  5124  	// match: (Move [4] {t} dst src mem)
  5125  	// cond: t.Alignment()%2 == 0
  5126  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  5127  	for {
  5128  		if auxIntToInt64(v.AuxInt) != 4 {
  5129  			break
  5130  		}
  5131  		t := auxToType(v.Aux)
  5132  		dst := v_0
  5133  		src := v_1
  5134  		mem := v_2
  5135  		if !(t.Alignment()%2 == 0) {
  5136  			break
  5137  		}
  5138  		v.reset(OpMIPSMOVHstore)
  5139  		v.AuxInt = int32ToAuxInt(2)
  5140  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5141  		v0.AuxInt = int32ToAuxInt(2)
  5142  		v0.AddArg2(src, mem)
  5143  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5144  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5145  		v2.AddArg2(src, mem)
  5146  		v1.AddArg3(dst, v2, mem)
  5147  		v.AddArg3(dst, v0, v1)
  5148  		return true
  5149  	}
  5150  	// match: (Move [4] dst src mem)
  5151  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  5152  	for {
  5153  		if auxIntToInt64(v.AuxInt) != 4 {
  5154  			break
  5155  		}
  5156  		dst := v_0
  5157  		src := v_1
  5158  		mem := v_2
  5159  		v.reset(OpMIPSMOVBstore)
  5160  		v.AuxInt = int32ToAuxInt(3)
  5161  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5162  		v0.AuxInt = int32ToAuxInt(3)
  5163  		v0.AddArg2(src, mem)
  5164  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5165  		v1.AuxInt = int32ToAuxInt(2)
  5166  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5167  		v2.AuxInt = int32ToAuxInt(2)
  5168  		v2.AddArg2(src, mem)
  5169  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5170  		v3.AuxInt = int32ToAuxInt(1)
  5171  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5172  		v4.AuxInt = int32ToAuxInt(1)
  5173  		v4.AddArg2(src, mem)
  5174  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5175  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5176  		v6.AddArg2(src, mem)
  5177  		v5.AddArg3(dst, v6, mem)
  5178  		v3.AddArg3(dst, v4, v5)
  5179  		v1.AddArg3(dst, v2, v3)
  5180  		v.AddArg3(dst, v0, v1)
  5181  		return true
  5182  	}
  5183  	// match: (Move [3] dst src mem)
  5184  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  5185  	for {
  5186  		if auxIntToInt64(v.AuxInt) != 3 {
  5187  			break
  5188  		}
  5189  		dst := v_0
  5190  		src := v_1
  5191  		mem := v_2
  5192  		v.reset(OpMIPSMOVBstore)
  5193  		v.AuxInt = int32ToAuxInt(2)
  5194  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5195  		v0.AuxInt = int32ToAuxInt(2)
  5196  		v0.AddArg2(src, mem)
  5197  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5198  		v1.AuxInt = int32ToAuxInt(1)
  5199  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5200  		v2.AuxInt = int32ToAuxInt(1)
  5201  		v2.AddArg2(src, mem)
  5202  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5203  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5204  		v4.AddArg2(src, mem)
  5205  		v3.AddArg3(dst, v4, mem)
  5206  		v1.AddArg3(dst, v2, v3)
  5207  		v.AddArg3(dst, v0, v1)
  5208  		return true
  5209  	}
  5210  	// match: (Move [8] {t} dst src mem)
  5211  	// cond: t.Alignment()%4 == 0
  5212  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5213  	for {
  5214  		if auxIntToInt64(v.AuxInt) != 8 {
  5215  			break
  5216  		}
  5217  		t := auxToType(v.Aux)
  5218  		dst := v_0
  5219  		src := v_1
  5220  		mem := v_2
  5221  		if !(t.Alignment()%4 == 0) {
  5222  			break
  5223  		}
  5224  		v.reset(OpMIPSMOVWstore)
  5225  		v.AuxInt = int32ToAuxInt(4)
  5226  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5227  		v0.AuxInt = int32ToAuxInt(4)
  5228  		v0.AddArg2(src, mem)
  5229  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5230  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5231  		v2.AddArg2(src, mem)
  5232  		v1.AddArg3(dst, v2, mem)
  5233  		v.AddArg3(dst, v0, v1)
  5234  		return true
  5235  	}
  5236  	// match: (Move [8] {t} dst src mem)
  5237  	// cond: t.Alignment()%2 == 0
  5238  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5239  	for {
  5240  		if auxIntToInt64(v.AuxInt) != 8 {
  5241  			break
  5242  		}
  5243  		t := auxToType(v.Aux)
  5244  		dst := v_0
  5245  		src := v_1
  5246  		mem := v_2
  5247  		if !(t.Alignment()%2 == 0) {
  5248  			break
  5249  		}
  5250  		v.reset(OpMIPSMOVHstore)
  5251  		v.AuxInt = int32ToAuxInt(6)
  5252  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5253  		v0.AuxInt = int32ToAuxInt(6)
  5254  		v0.AddArg2(src, mem)
  5255  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5256  		v1.AuxInt = int32ToAuxInt(4)
  5257  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5258  		v2.AuxInt = int32ToAuxInt(4)
  5259  		v2.AddArg2(src, mem)
  5260  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5261  		v3.AuxInt = int32ToAuxInt(2)
  5262  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5263  		v4.AuxInt = int32ToAuxInt(2)
  5264  		v4.AddArg2(src, mem)
  5265  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5266  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5267  		v6.AddArg2(src, mem)
  5268  		v5.AddArg3(dst, v6, mem)
  5269  		v3.AddArg3(dst, v4, v5)
  5270  		v1.AddArg3(dst, v2, v3)
  5271  		v.AddArg3(dst, v0, v1)
  5272  		return true
  5273  	}
  5274  	// match: (Move [6] {t} dst src mem)
  5275  	// cond: t.Alignment()%2 == 0
  5276  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5277  	for {
  5278  		if auxIntToInt64(v.AuxInt) != 6 {
  5279  			break
  5280  		}
  5281  		t := auxToType(v.Aux)
  5282  		dst := v_0
  5283  		src := v_1
  5284  		mem := v_2
  5285  		if !(t.Alignment()%2 == 0) {
  5286  			break
  5287  		}
  5288  		v.reset(OpMIPSMOVHstore)
  5289  		v.AuxInt = int32ToAuxInt(4)
  5290  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5291  		v0.AuxInt = int32ToAuxInt(4)
  5292  		v0.AddArg2(src, mem)
  5293  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5294  		v1.AuxInt = int32ToAuxInt(2)
  5295  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5296  		v2.AuxInt = int32ToAuxInt(2)
  5297  		v2.AddArg2(src, mem)
  5298  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5299  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5300  		v4.AddArg2(src, mem)
  5301  		v3.AddArg3(dst, v4, mem)
  5302  		v1.AddArg3(dst, v2, v3)
  5303  		v.AddArg3(dst, v0, v1)
  5304  		return true
  5305  	}
  5306  	// match: (Move [12] {t} dst src mem)
  5307  	// cond: t.Alignment()%4 == 0
  5308  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5309  	for {
  5310  		if auxIntToInt64(v.AuxInt) != 12 {
  5311  			break
  5312  		}
  5313  		t := auxToType(v.Aux)
  5314  		dst := v_0
  5315  		src := v_1
  5316  		mem := v_2
  5317  		if !(t.Alignment()%4 == 0) {
  5318  			break
  5319  		}
  5320  		v.reset(OpMIPSMOVWstore)
  5321  		v.AuxInt = int32ToAuxInt(8)
  5322  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5323  		v0.AuxInt = int32ToAuxInt(8)
  5324  		v0.AddArg2(src, mem)
  5325  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5326  		v1.AuxInt = int32ToAuxInt(4)
  5327  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5328  		v2.AuxInt = int32ToAuxInt(4)
  5329  		v2.AddArg2(src, mem)
  5330  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5331  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5332  		v4.AddArg2(src, mem)
  5333  		v3.AddArg3(dst, v4, mem)
  5334  		v1.AddArg3(dst, v2, v3)
  5335  		v.AddArg3(dst, v0, v1)
  5336  		return true
  5337  	}
  5338  	// match: (Move [16] {t} dst src mem)
  5339  	// cond: t.Alignment()%4 == 0
  5340  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5341  	for {
  5342  		if auxIntToInt64(v.AuxInt) != 16 {
  5343  			break
  5344  		}
  5345  		t := auxToType(v.Aux)
  5346  		dst := v_0
  5347  		src := v_1
  5348  		mem := v_2
  5349  		if !(t.Alignment()%4 == 0) {
  5350  			break
  5351  		}
  5352  		v.reset(OpMIPSMOVWstore)
  5353  		v.AuxInt = int32ToAuxInt(12)
  5354  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5355  		v0.AuxInt = int32ToAuxInt(12)
  5356  		v0.AddArg2(src, mem)
  5357  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5358  		v1.AuxInt = int32ToAuxInt(8)
  5359  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5360  		v2.AuxInt = int32ToAuxInt(8)
  5361  		v2.AddArg2(src, mem)
  5362  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5363  		v3.AuxInt = int32ToAuxInt(4)
  5364  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5365  		v4.AuxInt = int32ToAuxInt(4)
  5366  		v4.AddArg2(src, mem)
  5367  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5368  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5369  		v6.AddArg2(src, mem)
  5370  		v5.AddArg3(dst, v6, mem)
  5371  		v3.AddArg3(dst, v4, v5)
  5372  		v1.AddArg3(dst, v2, v3)
  5373  		v.AddArg3(dst, v0, v1)
  5374  		return true
  5375  	}
  5376  	// match: (Move [s] {t} dst src mem)
  5377  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5378  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5379  	for {
  5380  		s := auxIntToInt64(v.AuxInt)
  5381  		t := auxToType(v.Aux)
  5382  		dst := v_0
  5383  		src := v_1
  5384  		mem := v_2
  5385  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5386  			break
  5387  		}
  5388  		v.reset(OpMIPSLoweredMove)
  5389  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5390  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5391  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5392  		v0.AddArg(src)
  5393  		v.AddArg4(dst, src, v0, mem)
  5394  		return true
  5395  	}
  5396  	return false
  5397  }
  5398  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5399  	v_1 := v.Args[1]
  5400  	v_0 := v.Args[0]
  5401  	b := v.Block
  5402  	typ := &b.Func.Config.Types
  5403  	// match: (Neq16 x y)
  5404  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5405  	for {
  5406  		x := v_0
  5407  		y := v_1
  5408  		v.reset(OpMIPSSGTU)
  5409  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5410  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5411  		v1.AddArg(x)
  5412  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5413  		v2.AddArg(y)
  5414  		v0.AddArg2(v1, v2)
  5415  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5416  		v3.AuxInt = int32ToAuxInt(0)
  5417  		v.AddArg2(v0, v3)
  5418  		return true
  5419  	}
  5420  }
  5421  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5422  	v_1 := v.Args[1]
  5423  	v_0 := v.Args[0]
  5424  	b := v.Block
  5425  	typ := &b.Func.Config.Types
  5426  	// match: (Neq32 x y)
  5427  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5428  	for {
  5429  		x := v_0
  5430  		y := v_1
  5431  		v.reset(OpMIPSSGTU)
  5432  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5433  		v0.AddArg2(x, y)
  5434  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5435  		v1.AuxInt = int32ToAuxInt(0)
  5436  		v.AddArg2(v0, v1)
  5437  		return true
  5438  	}
  5439  }
  5440  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5441  	v_1 := v.Args[1]
  5442  	v_0 := v.Args[0]
  5443  	b := v.Block
  5444  	// match: (Neq32F x y)
  5445  	// result: (FPFlagFalse (CMPEQF x y))
  5446  	for {
  5447  		x := v_0
  5448  		y := v_1
  5449  		v.reset(OpMIPSFPFlagFalse)
  5450  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5451  		v0.AddArg2(x, y)
  5452  		v.AddArg(v0)
  5453  		return true
  5454  	}
  5455  }
  5456  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5457  	v_1 := v.Args[1]
  5458  	v_0 := v.Args[0]
  5459  	b := v.Block
  5460  	// match: (Neq64F x y)
  5461  	// result: (FPFlagFalse (CMPEQD x y))
  5462  	for {
  5463  		x := v_0
  5464  		y := v_1
  5465  		v.reset(OpMIPSFPFlagFalse)
  5466  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5467  		v0.AddArg2(x, y)
  5468  		v.AddArg(v0)
  5469  		return true
  5470  	}
  5471  }
  5472  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5473  	v_1 := v.Args[1]
  5474  	v_0 := v.Args[0]
  5475  	b := v.Block
  5476  	typ := &b.Func.Config.Types
  5477  	// match: (Neq8 x y)
  5478  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5479  	for {
  5480  		x := v_0
  5481  		y := v_1
  5482  		v.reset(OpMIPSSGTU)
  5483  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5484  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5485  		v1.AddArg(x)
  5486  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5487  		v2.AddArg(y)
  5488  		v0.AddArg2(v1, v2)
  5489  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5490  		v3.AuxInt = int32ToAuxInt(0)
  5491  		v.AddArg2(v0, v3)
  5492  		return true
  5493  	}
  5494  }
  5495  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5496  	v_1 := v.Args[1]
  5497  	v_0 := v.Args[0]
  5498  	b := v.Block
  5499  	typ := &b.Func.Config.Types
  5500  	// match: (NeqPtr x y)
  5501  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5502  	for {
  5503  		x := v_0
  5504  		y := v_1
  5505  		v.reset(OpMIPSSGTU)
  5506  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5507  		v0.AddArg2(x, y)
  5508  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5509  		v1.AuxInt = int32ToAuxInt(0)
  5510  		v.AddArg2(v0, v1)
  5511  		return true
  5512  	}
  5513  }
  5514  func rewriteValueMIPS_OpNot(v *Value) bool {
  5515  	v_0 := v.Args[0]
  5516  	// match: (Not x)
  5517  	// result: (XORconst [1] x)
  5518  	for {
  5519  		x := v_0
  5520  		v.reset(OpMIPSXORconst)
  5521  		v.AuxInt = int32ToAuxInt(1)
  5522  		v.AddArg(x)
  5523  		return true
  5524  	}
  5525  }
  5526  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5527  	v_0 := v.Args[0]
  5528  	// match: (OffPtr [off] ptr:(SP))
  5529  	// result: (MOVWaddr [int32(off)] ptr)
  5530  	for {
  5531  		off := auxIntToInt64(v.AuxInt)
  5532  		ptr := v_0
  5533  		if ptr.Op != OpSP {
  5534  			break
  5535  		}
  5536  		v.reset(OpMIPSMOVWaddr)
  5537  		v.AuxInt = int32ToAuxInt(int32(off))
  5538  		v.AddArg(ptr)
  5539  		return true
  5540  	}
  5541  	// match: (OffPtr [off] ptr)
  5542  	// result: (ADDconst [int32(off)] ptr)
  5543  	for {
  5544  		off := auxIntToInt64(v.AuxInt)
  5545  		ptr := v_0
  5546  		v.reset(OpMIPSADDconst)
  5547  		v.AuxInt = int32ToAuxInt(int32(off))
  5548  		v.AddArg(ptr)
  5549  		return true
  5550  	}
  5551  }
  5552  func rewriteValueMIPS_OpPanicBounds(v *Value) bool {
  5553  	v_2 := v.Args[2]
  5554  	v_1 := v.Args[1]
  5555  	v_0 := v.Args[0]
  5556  	// match: (PanicBounds [kind] x y mem)
  5557  	// cond: boundsABI(kind) == 0
  5558  	// result: (LoweredPanicBoundsA [kind] x y mem)
  5559  	for {
  5560  		kind := auxIntToInt64(v.AuxInt)
  5561  		x := v_0
  5562  		y := v_1
  5563  		mem := v_2
  5564  		if !(boundsABI(kind) == 0) {
  5565  			break
  5566  		}
  5567  		v.reset(OpMIPSLoweredPanicBoundsA)
  5568  		v.AuxInt = int64ToAuxInt(kind)
  5569  		v.AddArg3(x, y, mem)
  5570  		return true
  5571  	}
  5572  	// match: (PanicBounds [kind] x y mem)
  5573  	// cond: boundsABI(kind) == 1
  5574  	// result: (LoweredPanicBoundsB [kind] x y mem)
  5575  	for {
  5576  		kind := auxIntToInt64(v.AuxInt)
  5577  		x := v_0
  5578  		y := v_1
  5579  		mem := v_2
  5580  		if !(boundsABI(kind) == 1) {
  5581  			break
  5582  		}
  5583  		v.reset(OpMIPSLoweredPanicBoundsB)
  5584  		v.AuxInt = int64ToAuxInt(kind)
  5585  		v.AddArg3(x, y, mem)
  5586  		return true
  5587  	}
  5588  	// match: (PanicBounds [kind] x y mem)
  5589  	// cond: boundsABI(kind) == 2
  5590  	// result: (LoweredPanicBoundsC [kind] x y mem)
  5591  	for {
  5592  		kind := auxIntToInt64(v.AuxInt)
  5593  		x := v_0
  5594  		y := v_1
  5595  		mem := v_2
  5596  		if !(boundsABI(kind) == 2) {
  5597  			break
  5598  		}
  5599  		v.reset(OpMIPSLoweredPanicBoundsC)
  5600  		v.AuxInt = int64ToAuxInt(kind)
  5601  		v.AddArg3(x, y, mem)
  5602  		return true
  5603  	}
  5604  	return false
  5605  }
  5606  func rewriteValueMIPS_OpPanicExtend(v *Value) bool {
  5607  	v_3 := v.Args[3]
  5608  	v_2 := v.Args[2]
  5609  	v_1 := v.Args[1]
  5610  	v_0 := v.Args[0]
  5611  	// match: (PanicExtend [kind] hi lo y mem)
  5612  	// cond: boundsABI(kind) == 0
  5613  	// result: (LoweredPanicExtendA [kind] hi lo y mem)
  5614  	for {
  5615  		kind := auxIntToInt64(v.AuxInt)
  5616  		hi := v_0
  5617  		lo := v_1
  5618  		y := v_2
  5619  		mem := v_3
  5620  		if !(boundsABI(kind) == 0) {
  5621  			break
  5622  		}
  5623  		v.reset(OpMIPSLoweredPanicExtendA)
  5624  		v.AuxInt = int64ToAuxInt(kind)
  5625  		v.AddArg4(hi, lo, y, mem)
  5626  		return true
  5627  	}
  5628  	// match: (PanicExtend [kind] hi lo y mem)
  5629  	// cond: boundsABI(kind) == 1
  5630  	// result: (LoweredPanicExtendB [kind] hi lo y mem)
  5631  	for {
  5632  		kind := auxIntToInt64(v.AuxInt)
  5633  		hi := v_0
  5634  		lo := v_1
  5635  		y := v_2
  5636  		mem := v_3
  5637  		if !(boundsABI(kind) == 1) {
  5638  			break
  5639  		}
  5640  		v.reset(OpMIPSLoweredPanicExtendB)
  5641  		v.AuxInt = int64ToAuxInt(kind)
  5642  		v.AddArg4(hi, lo, y, mem)
  5643  		return true
  5644  	}
  5645  	// match: (PanicExtend [kind] hi lo y mem)
  5646  	// cond: boundsABI(kind) == 2
  5647  	// result: (LoweredPanicExtendC [kind] hi lo y mem)
  5648  	for {
  5649  		kind := auxIntToInt64(v.AuxInt)
  5650  		hi := v_0
  5651  		lo := v_1
  5652  		y := v_2
  5653  		mem := v_3
  5654  		if !(boundsABI(kind) == 2) {
  5655  			break
  5656  		}
  5657  		v.reset(OpMIPSLoweredPanicExtendC)
  5658  		v.AuxInt = int64ToAuxInt(kind)
  5659  		v.AddArg4(hi, lo, y, mem)
  5660  		return true
  5661  	}
  5662  	return false
  5663  }
  5664  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5665  	v_1 := v.Args[1]
  5666  	v_0 := v.Args[0]
  5667  	b := v.Block
  5668  	typ := &b.Func.Config.Types
  5669  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5670  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5671  	for {
  5672  		t := v.Type
  5673  		x := v_0
  5674  		if v_1.Op != OpMIPSMOVWconst {
  5675  			break
  5676  		}
  5677  		c := auxIntToInt32(v_1.AuxInt)
  5678  		v.reset(OpOr16)
  5679  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5680  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5681  		v1.AuxInt = int32ToAuxInt(c & 15)
  5682  		v0.AddArg2(x, v1)
  5683  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5684  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5685  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5686  		v2.AddArg2(x, v3)
  5687  		v.AddArg2(v0, v2)
  5688  		return true
  5689  	}
  5690  	return false
  5691  }
  5692  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5693  	v_1 := v.Args[1]
  5694  	v_0 := v.Args[0]
  5695  	b := v.Block
  5696  	typ := &b.Func.Config.Types
  5697  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5698  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5699  	for {
  5700  		t := v.Type
  5701  		x := v_0
  5702  		if v_1.Op != OpMIPSMOVWconst {
  5703  			break
  5704  		}
  5705  		c := auxIntToInt32(v_1.AuxInt)
  5706  		v.reset(OpOr32)
  5707  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5708  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5709  		v1.AuxInt = int32ToAuxInt(c & 31)
  5710  		v0.AddArg2(x, v1)
  5711  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5712  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5713  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5714  		v2.AddArg2(x, v3)
  5715  		v.AddArg2(v0, v2)
  5716  		return true
  5717  	}
  5718  	return false
  5719  }
  5720  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5721  	v_1 := v.Args[1]
  5722  	v_0 := v.Args[0]
  5723  	b := v.Block
  5724  	typ := &b.Func.Config.Types
  5725  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5726  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5727  	for {
  5728  		t := v.Type
  5729  		x := v_0
  5730  		if v_1.Op != OpMIPSMOVWconst {
  5731  			break
  5732  		}
  5733  		c := auxIntToInt32(v_1.AuxInt)
  5734  		v.reset(OpOr64)
  5735  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5736  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5737  		v1.AuxInt = int32ToAuxInt(c & 63)
  5738  		v0.AddArg2(x, v1)
  5739  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5740  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5741  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5742  		v2.AddArg2(x, v3)
  5743  		v.AddArg2(v0, v2)
  5744  		return true
  5745  	}
  5746  	return false
  5747  }
  5748  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5749  	v_1 := v.Args[1]
  5750  	v_0 := v.Args[0]
  5751  	b := v.Block
  5752  	typ := &b.Func.Config.Types
  5753  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5754  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5755  	for {
  5756  		t := v.Type
  5757  		x := v_0
  5758  		if v_1.Op != OpMIPSMOVWconst {
  5759  			break
  5760  		}
  5761  		c := auxIntToInt32(v_1.AuxInt)
  5762  		v.reset(OpOr8)
  5763  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5764  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5765  		v1.AuxInt = int32ToAuxInt(c & 7)
  5766  		v0.AddArg2(x, v1)
  5767  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5768  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5769  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5770  		v2.AddArg2(x, v3)
  5771  		v.AddArg2(v0, v2)
  5772  		return true
  5773  	}
  5774  	return false
  5775  }
  5776  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5777  	v_1 := v.Args[1]
  5778  	v_0 := v.Args[0]
  5779  	b := v.Block
  5780  	typ := &b.Func.Config.Types
  5781  	// match: (Rsh16Ux16 <t> x y)
  5782  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5783  	for {
  5784  		t := v.Type
  5785  		x := v_0
  5786  		y := v_1
  5787  		v.reset(OpMIPSCMOVZ)
  5788  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5789  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5790  		v1.AddArg(x)
  5791  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5792  		v2.AddArg(y)
  5793  		v0.AddArg2(v1, v2)
  5794  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5795  		v3.AuxInt = int32ToAuxInt(0)
  5796  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5797  		v4.AuxInt = int32ToAuxInt(32)
  5798  		v4.AddArg(v2)
  5799  		v.AddArg3(v0, v3, v4)
  5800  		return true
  5801  	}
  5802  }
  5803  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5804  	v_1 := v.Args[1]
  5805  	v_0 := v.Args[0]
  5806  	b := v.Block
  5807  	typ := &b.Func.Config.Types
  5808  	// match: (Rsh16Ux32 <t> x y)
  5809  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5810  	for {
  5811  		t := v.Type
  5812  		x := v_0
  5813  		y := v_1
  5814  		v.reset(OpMIPSCMOVZ)
  5815  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5816  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5817  		v1.AddArg(x)
  5818  		v0.AddArg2(v1, y)
  5819  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5820  		v2.AuxInt = int32ToAuxInt(0)
  5821  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5822  		v3.AuxInt = int32ToAuxInt(32)
  5823  		v3.AddArg(y)
  5824  		v.AddArg3(v0, v2, v3)
  5825  		return true
  5826  	}
  5827  }
  5828  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5829  	v_1 := v.Args[1]
  5830  	v_0 := v.Args[0]
  5831  	b := v.Block
  5832  	typ := &b.Func.Config.Types
  5833  	// match: (Rsh16Ux64 x (Const64 [c]))
  5834  	// cond: uint32(c) < 16
  5835  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5836  	for {
  5837  		x := v_0
  5838  		if v_1.Op != OpConst64 {
  5839  			break
  5840  		}
  5841  		c := auxIntToInt64(v_1.AuxInt)
  5842  		if !(uint32(c) < 16) {
  5843  			break
  5844  		}
  5845  		v.reset(OpMIPSSRLconst)
  5846  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5847  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5848  		v0.AuxInt = int32ToAuxInt(16)
  5849  		v0.AddArg(x)
  5850  		v.AddArg(v0)
  5851  		return true
  5852  	}
  5853  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5854  	// cond: uint32(c) >= 16
  5855  	// result: (MOVWconst [0])
  5856  	for {
  5857  		if v_1.Op != OpConst64 {
  5858  			break
  5859  		}
  5860  		c := auxIntToInt64(v_1.AuxInt)
  5861  		if !(uint32(c) >= 16) {
  5862  			break
  5863  		}
  5864  		v.reset(OpMIPSMOVWconst)
  5865  		v.AuxInt = int32ToAuxInt(0)
  5866  		return true
  5867  	}
  5868  	return false
  5869  }
  5870  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5871  	v_1 := v.Args[1]
  5872  	v_0 := v.Args[0]
  5873  	b := v.Block
  5874  	typ := &b.Func.Config.Types
  5875  	// match: (Rsh16Ux8 <t> x y)
  5876  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5877  	for {
  5878  		t := v.Type
  5879  		x := v_0
  5880  		y := v_1
  5881  		v.reset(OpMIPSCMOVZ)
  5882  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5883  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5884  		v1.AddArg(x)
  5885  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5886  		v2.AddArg(y)
  5887  		v0.AddArg2(v1, v2)
  5888  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5889  		v3.AuxInt = int32ToAuxInt(0)
  5890  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5891  		v4.AuxInt = int32ToAuxInt(32)
  5892  		v4.AddArg(v2)
  5893  		v.AddArg3(v0, v3, v4)
  5894  		return true
  5895  	}
  5896  }
  5897  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5898  	v_1 := v.Args[1]
  5899  	v_0 := v.Args[0]
  5900  	b := v.Block
  5901  	typ := &b.Func.Config.Types
  5902  	// match: (Rsh16x16 x y)
  5903  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5904  	for {
  5905  		x := v_0
  5906  		y := v_1
  5907  		v.reset(OpMIPSSRA)
  5908  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5909  		v0.AddArg(x)
  5910  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5911  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5912  		v2.AddArg(y)
  5913  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5914  		v3.AuxInt = int32ToAuxInt(31)
  5915  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5916  		v4.AuxInt = int32ToAuxInt(32)
  5917  		v4.AddArg(v2)
  5918  		v1.AddArg3(v2, v3, v4)
  5919  		v.AddArg2(v0, v1)
  5920  		return true
  5921  	}
  5922  }
  5923  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5924  	v_1 := v.Args[1]
  5925  	v_0 := v.Args[0]
  5926  	b := v.Block
  5927  	typ := &b.Func.Config.Types
  5928  	// match: (Rsh16x32 x y)
  5929  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5930  	for {
  5931  		x := v_0
  5932  		y := v_1
  5933  		v.reset(OpMIPSSRA)
  5934  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5935  		v0.AddArg(x)
  5936  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5937  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5938  		v2.AuxInt = int32ToAuxInt(31)
  5939  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5940  		v3.AuxInt = int32ToAuxInt(32)
  5941  		v3.AddArg(y)
  5942  		v1.AddArg3(y, v2, v3)
  5943  		v.AddArg2(v0, v1)
  5944  		return true
  5945  	}
  5946  }
  5947  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  5948  	v_1 := v.Args[1]
  5949  	v_0 := v.Args[0]
  5950  	b := v.Block
  5951  	typ := &b.Func.Config.Types
  5952  	// match: (Rsh16x64 x (Const64 [c]))
  5953  	// cond: uint32(c) < 16
  5954  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5955  	for {
  5956  		x := v_0
  5957  		if v_1.Op != OpConst64 {
  5958  			break
  5959  		}
  5960  		c := auxIntToInt64(v_1.AuxInt)
  5961  		if !(uint32(c) < 16) {
  5962  			break
  5963  		}
  5964  		v.reset(OpMIPSSRAconst)
  5965  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5966  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5967  		v0.AuxInt = int32ToAuxInt(16)
  5968  		v0.AddArg(x)
  5969  		v.AddArg(v0)
  5970  		return true
  5971  	}
  5972  	// match: (Rsh16x64 x (Const64 [c]))
  5973  	// cond: uint32(c) >= 16
  5974  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  5975  	for {
  5976  		x := v_0
  5977  		if v_1.Op != OpConst64 {
  5978  			break
  5979  		}
  5980  		c := auxIntToInt64(v_1.AuxInt)
  5981  		if !(uint32(c) >= 16) {
  5982  			break
  5983  		}
  5984  		v.reset(OpMIPSSRAconst)
  5985  		v.AuxInt = int32ToAuxInt(31)
  5986  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5987  		v0.AuxInt = int32ToAuxInt(16)
  5988  		v0.AddArg(x)
  5989  		v.AddArg(v0)
  5990  		return true
  5991  	}
  5992  	return false
  5993  }
  5994  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  5995  	v_1 := v.Args[1]
  5996  	v_0 := v.Args[0]
  5997  	b := v.Block
  5998  	typ := &b.Func.Config.Types
  5999  	// match: (Rsh16x8 x y)
  6000  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6001  	for {
  6002  		x := v_0
  6003  		y := v_1
  6004  		v.reset(OpMIPSSRA)
  6005  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6006  		v0.AddArg(x)
  6007  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6008  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6009  		v2.AddArg(y)
  6010  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6011  		v3.AuxInt = int32ToAuxInt(31)
  6012  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6013  		v4.AuxInt = int32ToAuxInt(32)
  6014  		v4.AddArg(v2)
  6015  		v1.AddArg3(v2, v3, v4)
  6016  		v.AddArg2(v0, v1)
  6017  		return true
  6018  	}
  6019  }
  6020  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  6021  	v_1 := v.Args[1]
  6022  	v_0 := v.Args[0]
  6023  	b := v.Block
  6024  	typ := &b.Func.Config.Types
  6025  	// match: (Rsh32Ux16 <t> x y)
  6026  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6027  	for {
  6028  		t := v.Type
  6029  		x := v_0
  6030  		y := v_1
  6031  		v.reset(OpMIPSCMOVZ)
  6032  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6033  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6034  		v1.AddArg(y)
  6035  		v0.AddArg2(x, v1)
  6036  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6037  		v2.AuxInt = int32ToAuxInt(0)
  6038  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6039  		v3.AuxInt = int32ToAuxInt(32)
  6040  		v3.AddArg(v1)
  6041  		v.AddArg3(v0, v2, v3)
  6042  		return true
  6043  	}
  6044  }
  6045  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  6046  	v_1 := v.Args[1]
  6047  	v_0 := v.Args[0]
  6048  	b := v.Block
  6049  	typ := &b.Func.Config.Types
  6050  	// match: (Rsh32Ux32 <t> x y)
  6051  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  6052  	for {
  6053  		t := v.Type
  6054  		x := v_0
  6055  		y := v_1
  6056  		v.reset(OpMIPSCMOVZ)
  6057  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6058  		v0.AddArg2(x, y)
  6059  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6060  		v1.AuxInt = int32ToAuxInt(0)
  6061  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6062  		v2.AuxInt = int32ToAuxInt(32)
  6063  		v2.AddArg(y)
  6064  		v.AddArg3(v0, v1, v2)
  6065  		return true
  6066  	}
  6067  }
  6068  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  6069  	v_1 := v.Args[1]
  6070  	v_0 := v.Args[0]
  6071  	// match: (Rsh32Ux64 x (Const64 [c]))
  6072  	// cond: uint32(c) < 32
  6073  	// result: (SRLconst x [int32(c)])
  6074  	for {
  6075  		x := v_0
  6076  		if v_1.Op != OpConst64 {
  6077  			break
  6078  		}
  6079  		c := auxIntToInt64(v_1.AuxInt)
  6080  		if !(uint32(c) < 32) {
  6081  			break
  6082  		}
  6083  		v.reset(OpMIPSSRLconst)
  6084  		v.AuxInt = int32ToAuxInt(int32(c))
  6085  		v.AddArg(x)
  6086  		return true
  6087  	}
  6088  	// match: (Rsh32Ux64 _ (Const64 [c]))
  6089  	// cond: uint32(c) >= 32
  6090  	// result: (MOVWconst [0])
  6091  	for {
  6092  		if v_1.Op != OpConst64 {
  6093  			break
  6094  		}
  6095  		c := auxIntToInt64(v_1.AuxInt)
  6096  		if !(uint32(c) >= 32) {
  6097  			break
  6098  		}
  6099  		v.reset(OpMIPSMOVWconst)
  6100  		v.AuxInt = int32ToAuxInt(0)
  6101  		return true
  6102  	}
  6103  	return false
  6104  }
  6105  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  6106  	v_1 := v.Args[1]
  6107  	v_0 := v.Args[0]
  6108  	b := v.Block
  6109  	typ := &b.Func.Config.Types
  6110  	// match: (Rsh32Ux8 <t> x y)
  6111  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6112  	for {
  6113  		t := v.Type
  6114  		x := v_0
  6115  		y := v_1
  6116  		v.reset(OpMIPSCMOVZ)
  6117  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6118  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6119  		v1.AddArg(y)
  6120  		v0.AddArg2(x, v1)
  6121  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6122  		v2.AuxInt = int32ToAuxInt(0)
  6123  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6124  		v3.AuxInt = int32ToAuxInt(32)
  6125  		v3.AddArg(v1)
  6126  		v.AddArg3(v0, v2, v3)
  6127  		return true
  6128  	}
  6129  }
  6130  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  6131  	v_1 := v.Args[1]
  6132  	v_0 := v.Args[0]
  6133  	b := v.Block
  6134  	typ := &b.Func.Config.Types
  6135  	// match: (Rsh32x16 x y)
  6136  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6137  	for {
  6138  		x := v_0
  6139  		y := v_1
  6140  		v.reset(OpMIPSSRA)
  6141  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6142  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6143  		v1.AddArg(y)
  6144  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6145  		v2.AuxInt = int32ToAuxInt(31)
  6146  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6147  		v3.AuxInt = int32ToAuxInt(32)
  6148  		v3.AddArg(v1)
  6149  		v0.AddArg3(v1, v2, v3)
  6150  		v.AddArg2(x, v0)
  6151  		return true
  6152  	}
  6153  }
  6154  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  6155  	v_1 := v.Args[1]
  6156  	v_0 := v.Args[0]
  6157  	b := v.Block
  6158  	typ := &b.Func.Config.Types
  6159  	// match: (Rsh32x32 x y)
  6160  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6161  	for {
  6162  		x := v_0
  6163  		y := v_1
  6164  		v.reset(OpMIPSSRA)
  6165  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6166  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6167  		v1.AuxInt = int32ToAuxInt(31)
  6168  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6169  		v2.AuxInt = int32ToAuxInt(32)
  6170  		v2.AddArg(y)
  6171  		v0.AddArg3(y, v1, v2)
  6172  		v.AddArg2(x, v0)
  6173  		return true
  6174  	}
  6175  }
  6176  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  6177  	v_1 := v.Args[1]
  6178  	v_0 := v.Args[0]
  6179  	// match: (Rsh32x64 x (Const64 [c]))
  6180  	// cond: uint32(c) < 32
  6181  	// result: (SRAconst x [int32(c)])
  6182  	for {
  6183  		x := v_0
  6184  		if v_1.Op != OpConst64 {
  6185  			break
  6186  		}
  6187  		c := auxIntToInt64(v_1.AuxInt)
  6188  		if !(uint32(c) < 32) {
  6189  			break
  6190  		}
  6191  		v.reset(OpMIPSSRAconst)
  6192  		v.AuxInt = int32ToAuxInt(int32(c))
  6193  		v.AddArg(x)
  6194  		return true
  6195  	}
  6196  	// match: (Rsh32x64 x (Const64 [c]))
  6197  	// cond: uint32(c) >= 32
  6198  	// result: (SRAconst x [31])
  6199  	for {
  6200  		x := v_0
  6201  		if v_1.Op != OpConst64 {
  6202  			break
  6203  		}
  6204  		c := auxIntToInt64(v_1.AuxInt)
  6205  		if !(uint32(c) >= 32) {
  6206  			break
  6207  		}
  6208  		v.reset(OpMIPSSRAconst)
  6209  		v.AuxInt = int32ToAuxInt(31)
  6210  		v.AddArg(x)
  6211  		return true
  6212  	}
  6213  	return false
  6214  }
  6215  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6216  	v_1 := v.Args[1]
  6217  	v_0 := v.Args[0]
  6218  	b := v.Block
  6219  	typ := &b.Func.Config.Types
  6220  	// match: (Rsh32x8 x y)
  6221  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6222  	for {
  6223  		x := v_0
  6224  		y := v_1
  6225  		v.reset(OpMIPSSRA)
  6226  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6227  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6228  		v1.AddArg(y)
  6229  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6230  		v2.AuxInt = int32ToAuxInt(31)
  6231  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6232  		v3.AuxInt = int32ToAuxInt(32)
  6233  		v3.AddArg(v1)
  6234  		v0.AddArg3(v1, v2, v3)
  6235  		v.AddArg2(x, v0)
  6236  		return true
  6237  	}
  6238  }
  6239  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6240  	v_1 := v.Args[1]
  6241  	v_0 := v.Args[0]
  6242  	b := v.Block
  6243  	typ := &b.Func.Config.Types
  6244  	// match: (Rsh8Ux16 <t> x y)
  6245  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6246  	for {
  6247  		t := v.Type
  6248  		x := v_0
  6249  		y := v_1
  6250  		v.reset(OpMIPSCMOVZ)
  6251  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6252  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6253  		v1.AddArg(x)
  6254  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6255  		v2.AddArg(y)
  6256  		v0.AddArg2(v1, v2)
  6257  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6258  		v3.AuxInt = int32ToAuxInt(0)
  6259  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6260  		v4.AuxInt = int32ToAuxInt(32)
  6261  		v4.AddArg(v2)
  6262  		v.AddArg3(v0, v3, v4)
  6263  		return true
  6264  	}
  6265  }
  6266  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6267  	v_1 := v.Args[1]
  6268  	v_0 := v.Args[0]
  6269  	b := v.Block
  6270  	typ := &b.Func.Config.Types
  6271  	// match: (Rsh8Ux32 <t> x y)
  6272  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6273  	for {
  6274  		t := v.Type
  6275  		x := v_0
  6276  		y := v_1
  6277  		v.reset(OpMIPSCMOVZ)
  6278  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6279  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6280  		v1.AddArg(x)
  6281  		v0.AddArg2(v1, y)
  6282  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6283  		v2.AuxInt = int32ToAuxInt(0)
  6284  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6285  		v3.AuxInt = int32ToAuxInt(32)
  6286  		v3.AddArg(y)
  6287  		v.AddArg3(v0, v2, v3)
  6288  		return true
  6289  	}
  6290  }
  6291  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6292  	v_1 := v.Args[1]
  6293  	v_0 := v.Args[0]
  6294  	b := v.Block
  6295  	typ := &b.Func.Config.Types
  6296  	// match: (Rsh8Ux64 x (Const64 [c]))
  6297  	// cond: uint32(c) < 8
  6298  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6299  	for {
  6300  		x := v_0
  6301  		if v_1.Op != OpConst64 {
  6302  			break
  6303  		}
  6304  		c := auxIntToInt64(v_1.AuxInt)
  6305  		if !(uint32(c) < 8) {
  6306  			break
  6307  		}
  6308  		v.reset(OpMIPSSRLconst)
  6309  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6310  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6311  		v0.AuxInt = int32ToAuxInt(24)
  6312  		v0.AddArg(x)
  6313  		v.AddArg(v0)
  6314  		return true
  6315  	}
  6316  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6317  	// cond: uint32(c) >= 8
  6318  	// result: (MOVWconst [0])
  6319  	for {
  6320  		if v_1.Op != OpConst64 {
  6321  			break
  6322  		}
  6323  		c := auxIntToInt64(v_1.AuxInt)
  6324  		if !(uint32(c) >= 8) {
  6325  			break
  6326  		}
  6327  		v.reset(OpMIPSMOVWconst)
  6328  		v.AuxInt = int32ToAuxInt(0)
  6329  		return true
  6330  	}
  6331  	return false
  6332  }
  6333  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6334  	v_1 := v.Args[1]
  6335  	v_0 := v.Args[0]
  6336  	b := v.Block
  6337  	typ := &b.Func.Config.Types
  6338  	// match: (Rsh8Ux8 <t> x y)
  6339  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6340  	for {
  6341  		t := v.Type
  6342  		x := v_0
  6343  		y := v_1
  6344  		v.reset(OpMIPSCMOVZ)
  6345  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6346  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6347  		v1.AddArg(x)
  6348  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6349  		v2.AddArg(y)
  6350  		v0.AddArg2(v1, v2)
  6351  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6352  		v3.AuxInt = int32ToAuxInt(0)
  6353  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6354  		v4.AuxInt = int32ToAuxInt(32)
  6355  		v4.AddArg(v2)
  6356  		v.AddArg3(v0, v3, v4)
  6357  		return true
  6358  	}
  6359  }
  6360  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6361  	v_1 := v.Args[1]
  6362  	v_0 := v.Args[0]
  6363  	b := v.Block
  6364  	typ := &b.Func.Config.Types
  6365  	// match: (Rsh8x16 x y)
  6366  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6367  	for {
  6368  		x := v_0
  6369  		y := v_1
  6370  		v.reset(OpMIPSSRA)
  6371  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6372  		v0.AddArg(x)
  6373  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6374  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6375  		v2.AddArg(y)
  6376  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6377  		v3.AuxInt = int32ToAuxInt(31)
  6378  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6379  		v4.AuxInt = int32ToAuxInt(32)
  6380  		v4.AddArg(v2)
  6381  		v1.AddArg3(v2, v3, v4)
  6382  		v.AddArg2(v0, v1)
  6383  		return true
  6384  	}
  6385  }
  6386  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6387  	v_1 := v.Args[1]
  6388  	v_0 := v.Args[0]
  6389  	b := v.Block
  6390  	typ := &b.Func.Config.Types
  6391  	// match: (Rsh8x32 x y)
  6392  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6393  	for {
  6394  		x := v_0
  6395  		y := v_1
  6396  		v.reset(OpMIPSSRA)
  6397  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6398  		v0.AddArg(x)
  6399  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6400  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6401  		v2.AuxInt = int32ToAuxInt(31)
  6402  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6403  		v3.AuxInt = int32ToAuxInt(32)
  6404  		v3.AddArg(y)
  6405  		v1.AddArg3(y, v2, v3)
  6406  		v.AddArg2(v0, v1)
  6407  		return true
  6408  	}
  6409  }
  6410  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6411  	v_1 := v.Args[1]
  6412  	v_0 := v.Args[0]
  6413  	b := v.Block
  6414  	typ := &b.Func.Config.Types
  6415  	// match: (Rsh8x64 x (Const64 [c]))
  6416  	// cond: uint32(c) < 8
  6417  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6418  	for {
  6419  		x := v_0
  6420  		if v_1.Op != OpConst64 {
  6421  			break
  6422  		}
  6423  		c := auxIntToInt64(v_1.AuxInt)
  6424  		if !(uint32(c) < 8) {
  6425  			break
  6426  		}
  6427  		v.reset(OpMIPSSRAconst)
  6428  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6429  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6430  		v0.AuxInt = int32ToAuxInt(24)
  6431  		v0.AddArg(x)
  6432  		v.AddArg(v0)
  6433  		return true
  6434  	}
  6435  	// match: (Rsh8x64 x (Const64 [c]))
  6436  	// cond: uint32(c) >= 8
  6437  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6438  	for {
  6439  		x := v_0
  6440  		if v_1.Op != OpConst64 {
  6441  			break
  6442  		}
  6443  		c := auxIntToInt64(v_1.AuxInt)
  6444  		if !(uint32(c) >= 8) {
  6445  			break
  6446  		}
  6447  		v.reset(OpMIPSSRAconst)
  6448  		v.AuxInt = int32ToAuxInt(31)
  6449  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6450  		v0.AuxInt = int32ToAuxInt(24)
  6451  		v0.AddArg(x)
  6452  		v.AddArg(v0)
  6453  		return true
  6454  	}
  6455  	return false
  6456  }
  6457  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6458  	v_1 := v.Args[1]
  6459  	v_0 := v.Args[0]
  6460  	b := v.Block
  6461  	typ := &b.Func.Config.Types
  6462  	// match: (Rsh8x8 x y)
  6463  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6464  	for {
  6465  		x := v_0
  6466  		y := v_1
  6467  		v.reset(OpMIPSSRA)
  6468  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6469  		v0.AddArg(x)
  6470  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6471  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6472  		v2.AddArg(y)
  6473  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6474  		v3.AuxInt = int32ToAuxInt(31)
  6475  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6476  		v4.AuxInt = int32ToAuxInt(32)
  6477  		v4.AddArg(v2)
  6478  		v1.AddArg3(v2, v3, v4)
  6479  		v.AddArg2(v0, v1)
  6480  		return true
  6481  	}
  6482  }
  6483  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6484  	v_0 := v.Args[0]
  6485  	b := v.Block
  6486  	typ := &b.Func.Config.Types
  6487  	// match: (Select0 (Add32carry <t> x y))
  6488  	// result: (ADD <t.FieldType(0)> x y)
  6489  	for {
  6490  		if v_0.Op != OpAdd32carry {
  6491  			break
  6492  		}
  6493  		t := v_0.Type
  6494  		y := v_0.Args[1]
  6495  		x := v_0.Args[0]
  6496  		v.reset(OpMIPSADD)
  6497  		v.Type = t.FieldType(0)
  6498  		v.AddArg2(x, y)
  6499  		return true
  6500  	}
  6501  	// match: (Select0 (Sub32carry <t> x y))
  6502  	// result: (SUB <t.FieldType(0)> x y)
  6503  	for {
  6504  		if v_0.Op != OpSub32carry {
  6505  			break
  6506  		}
  6507  		t := v_0.Type
  6508  		y := v_0.Args[1]
  6509  		x := v_0.Args[0]
  6510  		v.reset(OpMIPSSUB)
  6511  		v.Type = t.FieldType(0)
  6512  		v.AddArg2(x, y)
  6513  		return true
  6514  	}
  6515  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6516  	// result: (MOVWconst [0])
  6517  	for {
  6518  		if v_0.Op != OpMIPSMULTU {
  6519  			break
  6520  		}
  6521  		v_0_0 := v_0.Args[0]
  6522  		v_0_1 := v_0.Args[1]
  6523  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6524  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6525  				continue
  6526  			}
  6527  			v.reset(OpMIPSMOVWconst)
  6528  			v.AuxInt = int32ToAuxInt(0)
  6529  			return true
  6530  		}
  6531  		break
  6532  	}
  6533  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6534  	// result: (MOVWconst [0])
  6535  	for {
  6536  		if v_0.Op != OpMIPSMULTU {
  6537  			break
  6538  		}
  6539  		v_0_0 := v_0.Args[0]
  6540  		v_0_1 := v_0.Args[1]
  6541  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6542  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6543  				continue
  6544  			}
  6545  			v.reset(OpMIPSMOVWconst)
  6546  			v.AuxInt = int32ToAuxInt(0)
  6547  			return true
  6548  		}
  6549  		break
  6550  	}
  6551  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6552  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6553  	for {
  6554  		if v_0.Op != OpMIPSMULTU {
  6555  			break
  6556  		}
  6557  		_ = v_0.Args[1]
  6558  		v_0_0 := v_0.Args[0]
  6559  		v_0_1 := v_0.Args[1]
  6560  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6561  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6562  				continue
  6563  			}
  6564  			x := v_0_1
  6565  			v.reset(OpMIPSCMOVZ)
  6566  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6567  			v0.AuxInt = int32ToAuxInt(-1)
  6568  			v0.AddArg(x)
  6569  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6570  			v1.AuxInt = int32ToAuxInt(0)
  6571  			v.AddArg3(v0, v1, x)
  6572  			return true
  6573  		}
  6574  		break
  6575  	}
  6576  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6577  	// cond: isPowerOfTwo(int64(uint32(c)))
  6578  	// result: (SRLconst [int32(32-log2uint32(int64(c)))] x)
  6579  	for {
  6580  		if v_0.Op != OpMIPSMULTU {
  6581  			break
  6582  		}
  6583  		_ = v_0.Args[1]
  6584  		v_0_0 := v_0.Args[0]
  6585  		v_0_1 := v_0.Args[1]
  6586  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6587  			if v_0_0.Op != OpMIPSMOVWconst {
  6588  				continue
  6589  			}
  6590  			c := auxIntToInt32(v_0_0.AuxInt)
  6591  			x := v_0_1
  6592  			if !(isPowerOfTwo(int64(uint32(c)))) {
  6593  				continue
  6594  			}
  6595  			v.reset(OpMIPSSRLconst)
  6596  			v.AuxInt = int32ToAuxInt(int32(32 - log2uint32(int64(c))))
  6597  			v.AddArg(x)
  6598  			return true
  6599  		}
  6600  		break
  6601  	}
  6602  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6603  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6604  	for {
  6605  		if v_0.Op != OpMIPSMULTU {
  6606  			break
  6607  		}
  6608  		_ = v_0.Args[1]
  6609  		v_0_0 := v_0.Args[0]
  6610  		v_0_1 := v_0.Args[1]
  6611  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6612  			if v_0_0.Op != OpMIPSMOVWconst {
  6613  				continue
  6614  			}
  6615  			c := auxIntToInt32(v_0_0.AuxInt)
  6616  			if v_0_1.Op != OpMIPSMOVWconst {
  6617  				continue
  6618  			}
  6619  			d := auxIntToInt32(v_0_1.AuxInt)
  6620  			v.reset(OpMIPSMOVWconst)
  6621  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6622  			return true
  6623  		}
  6624  		break
  6625  	}
  6626  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6627  	// cond: d != 0
  6628  	// result: (MOVWconst [c%d])
  6629  	for {
  6630  		if v_0.Op != OpMIPSDIV {
  6631  			break
  6632  		}
  6633  		_ = v_0.Args[1]
  6634  		v_0_0 := v_0.Args[0]
  6635  		if v_0_0.Op != OpMIPSMOVWconst {
  6636  			break
  6637  		}
  6638  		c := auxIntToInt32(v_0_0.AuxInt)
  6639  		v_0_1 := v_0.Args[1]
  6640  		if v_0_1.Op != OpMIPSMOVWconst {
  6641  			break
  6642  		}
  6643  		d := auxIntToInt32(v_0_1.AuxInt)
  6644  		if !(d != 0) {
  6645  			break
  6646  		}
  6647  		v.reset(OpMIPSMOVWconst)
  6648  		v.AuxInt = int32ToAuxInt(c % d)
  6649  		return true
  6650  	}
  6651  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6652  	// cond: d != 0
  6653  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6654  	for {
  6655  		if v_0.Op != OpMIPSDIVU {
  6656  			break
  6657  		}
  6658  		_ = v_0.Args[1]
  6659  		v_0_0 := v_0.Args[0]
  6660  		if v_0_0.Op != OpMIPSMOVWconst {
  6661  			break
  6662  		}
  6663  		c := auxIntToInt32(v_0_0.AuxInt)
  6664  		v_0_1 := v_0.Args[1]
  6665  		if v_0_1.Op != OpMIPSMOVWconst {
  6666  			break
  6667  		}
  6668  		d := auxIntToInt32(v_0_1.AuxInt)
  6669  		if !(d != 0) {
  6670  			break
  6671  		}
  6672  		v.reset(OpMIPSMOVWconst)
  6673  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6674  		return true
  6675  	}
  6676  	return false
  6677  }
  6678  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6679  	v_0 := v.Args[0]
  6680  	b := v.Block
  6681  	typ := &b.Func.Config.Types
  6682  	// match: (Select1 (Add32carry <t> x y))
  6683  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6684  	for {
  6685  		if v_0.Op != OpAdd32carry {
  6686  			break
  6687  		}
  6688  		t := v_0.Type
  6689  		y := v_0.Args[1]
  6690  		x := v_0.Args[0]
  6691  		v.reset(OpMIPSSGTU)
  6692  		v.Type = typ.Bool
  6693  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6694  		v0.AddArg2(x, y)
  6695  		v.AddArg2(x, v0)
  6696  		return true
  6697  	}
  6698  	// match: (Select1 (Sub32carry <t> x y))
  6699  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6700  	for {
  6701  		if v_0.Op != OpSub32carry {
  6702  			break
  6703  		}
  6704  		t := v_0.Type
  6705  		y := v_0.Args[1]
  6706  		x := v_0.Args[0]
  6707  		v.reset(OpMIPSSGTU)
  6708  		v.Type = typ.Bool
  6709  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6710  		v0.AddArg2(x, y)
  6711  		v.AddArg2(v0, x)
  6712  		return true
  6713  	}
  6714  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6715  	// result: (MOVWconst [0])
  6716  	for {
  6717  		if v_0.Op != OpMIPSMULTU {
  6718  			break
  6719  		}
  6720  		v_0_0 := v_0.Args[0]
  6721  		v_0_1 := v_0.Args[1]
  6722  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6723  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6724  				continue
  6725  			}
  6726  			v.reset(OpMIPSMOVWconst)
  6727  			v.AuxInt = int32ToAuxInt(0)
  6728  			return true
  6729  		}
  6730  		break
  6731  	}
  6732  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6733  	// result: x
  6734  	for {
  6735  		if v_0.Op != OpMIPSMULTU {
  6736  			break
  6737  		}
  6738  		_ = v_0.Args[1]
  6739  		v_0_0 := v_0.Args[0]
  6740  		v_0_1 := v_0.Args[1]
  6741  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6742  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6743  				continue
  6744  			}
  6745  			x := v_0_1
  6746  			v.copyOf(x)
  6747  			return true
  6748  		}
  6749  		break
  6750  	}
  6751  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6752  	// result: (NEG <x.Type> x)
  6753  	for {
  6754  		if v_0.Op != OpMIPSMULTU {
  6755  			break
  6756  		}
  6757  		_ = v_0.Args[1]
  6758  		v_0_0 := v_0.Args[0]
  6759  		v_0_1 := v_0.Args[1]
  6760  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6761  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6762  				continue
  6763  			}
  6764  			x := v_0_1
  6765  			v.reset(OpMIPSNEG)
  6766  			v.Type = x.Type
  6767  			v.AddArg(x)
  6768  			return true
  6769  		}
  6770  		break
  6771  	}
  6772  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6773  	// cond: isPowerOfTwo(int64(uint32(c)))
  6774  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  6775  	for {
  6776  		if v_0.Op != OpMIPSMULTU {
  6777  			break
  6778  		}
  6779  		_ = v_0.Args[1]
  6780  		v_0_0 := v_0.Args[0]
  6781  		v_0_1 := v_0.Args[1]
  6782  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6783  			if v_0_0.Op != OpMIPSMOVWconst {
  6784  				continue
  6785  			}
  6786  			c := auxIntToInt32(v_0_0.AuxInt)
  6787  			x := v_0_1
  6788  			if !(isPowerOfTwo(int64(uint32(c)))) {
  6789  				continue
  6790  			}
  6791  			v.reset(OpMIPSSLLconst)
  6792  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  6793  			v.AddArg(x)
  6794  			return true
  6795  		}
  6796  		break
  6797  	}
  6798  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6799  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6800  	for {
  6801  		if v_0.Op != OpMIPSMULTU {
  6802  			break
  6803  		}
  6804  		_ = v_0.Args[1]
  6805  		v_0_0 := v_0.Args[0]
  6806  		v_0_1 := v_0.Args[1]
  6807  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6808  			if v_0_0.Op != OpMIPSMOVWconst {
  6809  				continue
  6810  			}
  6811  			c := auxIntToInt32(v_0_0.AuxInt)
  6812  			if v_0_1.Op != OpMIPSMOVWconst {
  6813  				continue
  6814  			}
  6815  			d := auxIntToInt32(v_0_1.AuxInt)
  6816  			v.reset(OpMIPSMOVWconst)
  6817  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6818  			return true
  6819  		}
  6820  		break
  6821  	}
  6822  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6823  	// cond: d != 0
  6824  	// result: (MOVWconst [c/d])
  6825  	for {
  6826  		if v_0.Op != OpMIPSDIV {
  6827  			break
  6828  		}
  6829  		_ = v_0.Args[1]
  6830  		v_0_0 := v_0.Args[0]
  6831  		if v_0_0.Op != OpMIPSMOVWconst {
  6832  			break
  6833  		}
  6834  		c := auxIntToInt32(v_0_0.AuxInt)
  6835  		v_0_1 := v_0.Args[1]
  6836  		if v_0_1.Op != OpMIPSMOVWconst {
  6837  			break
  6838  		}
  6839  		d := auxIntToInt32(v_0_1.AuxInt)
  6840  		if !(d != 0) {
  6841  			break
  6842  		}
  6843  		v.reset(OpMIPSMOVWconst)
  6844  		v.AuxInt = int32ToAuxInt(c / d)
  6845  		return true
  6846  	}
  6847  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6848  	// cond: d != 0
  6849  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6850  	for {
  6851  		if v_0.Op != OpMIPSDIVU {
  6852  			break
  6853  		}
  6854  		_ = v_0.Args[1]
  6855  		v_0_0 := v_0.Args[0]
  6856  		if v_0_0.Op != OpMIPSMOVWconst {
  6857  			break
  6858  		}
  6859  		c := auxIntToInt32(v_0_0.AuxInt)
  6860  		v_0_1 := v_0.Args[1]
  6861  		if v_0_1.Op != OpMIPSMOVWconst {
  6862  			break
  6863  		}
  6864  		d := auxIntToInt32(v_0_1.AuxInt)
  6865  		if !(d != 0) {
  6866  			break
  6867  		}
  6868  		v.reset(OpMIPSMOVWconst)
  6869  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6870  		return true
  6871  	}
  6872  	return false
  6873  }
  6874  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6875  	v_0 := v.Args[0]
  6876  	// match: (Signmask x)
  6877  	// result: (SRAconst x [31])
  6878  	for {
  6879  		x := v_0
  6880  		v.reset(OpMIPSSRAconst)
  6881  		v.AuxInt = int32ToAuxInt(31)
  6882  		v.AddArg(x)
  6883  		return true
  6884  	}
  6885  }
  6886  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6887  	v_0 := v.Args[0]
  6888  	b := v.Block
  6889  	// match: (Slicemask <t> x)
  6890  	// result: (SRAconst (NEG <t> x) [31])
  6891  	for {
  6892  		t := v.Type
  6893  		x := v_0
  6894  		v.reset(OpMIPSSRAconst)
  6895  		v.AuxInt = int32ToAuxInt(31)
  6896  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6897  		v0.AddArg(x)
  6898  		v.AddArg(v0)
  6899  		return true
  6900  	}
  6901  }
  6902  func rewriteValueMIPS_OpStore(v *Value) bool {
  6903  	v_2 := v.Args[2]
  6904  	v_1 := v.Args[1]
  6905  	v_0 := v.Args[0]
  6906  	// match: (Store {t} ptr val mem)
  6907  	// cond: t.Size() == 1
  6908  	// result: (MOVBstore ptr val mem)
  6909  	for {
  6910  		t := auxToType(v.Aux)
  6911  		ptr := v_0
  6912  		val := v_1
  6913  		mem := v_2
  6914  		if !(t.Size() == 1) {
  6915  			break
  6916  		}
  6917  		v.reset(OpMIPSMOVBstore)
  6918  		v.AddArg3(ptr, val, mem)
  6919  		return true
  6920  	}
  6921  	// match: (Store {t} ptr val mem)
  6922  	// cond: t.Size() == 2
  6923  	// result: (MOVHstore ptr val mem)
  6924  	for {
  6925  		t := auxToType(v.Aux)
  6926  		ptr := v_0
  6927  		val := v_1
  6928  		mem := v_2
  6929  		if !(t.Size() == 2) {
  6930  			break
  6931  		}
  6932  		v.reset(OpMIPSMOVHstore)
  6933  		v.AddArg3(ptr, val, mem)
  6934  		return true
  6935  	}
  6936  	// match: (Store {t} ptr val mem)
  6937  	// cond: t.Size() == 4 && !t.IsFloat()
  6938  	// result: (MOVWstore ptr val mem)
  6939  	for {
  6940  		t := auxToType(v.Aux)
  6941  		ptr := v_0
  6942  		val := v_1
  6943  		mem := v_2
  6944  		if !(t.Size() == 4 && !t.IsFloat()) {
  6945  			break
  6946  		}
  6947  		v.reset(OpMIPSMOVWstore)
  6948  		v.AddArg3(ptr, val, mem)
  6949  		return true
  6950  	}
  6951  	// match: (Store {t} ptr val mem)
  6952  	// cond: t.Size() == 4 && t.IsFloat()
  6953  	// result: (MOVFstore ptr val mem)
  6954  	for {
  6955  		t := auxToType(v.Aux)
  6956  		ptr := v_0
  6957  		val := v_1
  6958  		mem := v_2
  6959  		if !(t.Size() == 4 && t.IsFloat()) {
  6960  			break
  6961  		}
  6962  		v.reset(OpMIPSMOVFstore)
  6963  		v.AddArg3(ptr, val, mem)
  6964  		return true
  6965  	}
  6966  	// match: (Store {t} ptr val mem)
  6967  	// cond: t.Size() == 8 && t.IsFloat()
  6968  	// result: (MOVDstore ptr val mem)
  6969  	for {
  6970  		t := auxToType(v.Aux)
  6971  		ptr := v_0
  6972  		val := v_1
  6973  		mem := v_2
  6974  		if !(t.Size() == 8 && t.IsFloat()) {
  6975  			break
  6976  		}
  6977  		v.reset(OpMIPSMOVDstore)
  6978  		v.AddArg3(ptr, val, mem)
  6979  		return true
  6980  	}
  6981  	return false
  6982  }
  6983  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  6984  	v_2 := v.Args[2]
  6985  	v_1 := v.Args[1]
  6986  	v_0 := v.Args[0]
  6987  	b := v.Block
  6988  	// match: (Sub32withcarry <t> x y c)
  6989  	// result: (SUB (SUB <t> x y) c)
  6990  	for {
  6991  		t := v.Type
  6992  		x := v_0
  6993  		y := v_1
  6994  		c := v_2
  6995  		v.reset(OpMIPSSUB)
  6996  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  6997  		v0.AddArg2(x, y)
  6998  		v.AddArg2(v0, c)
  6999  		return true
  7000  	}
  7001  }
  7002  func rewriteValueMIPS_OpZero(v *Value) bool {
  7003  	v_1 := v.Args[1]
  7004  	v_0 := v.Args[0]
  7005  	b := v.Block
  7006  	config := b.Func.Config
  7007  	typ := &b.Func.Config.Types
  7008  	// match: (Zero [0] _ mem)
  7009  	// result: mem
  7010  	for {
  7011  		if auxIntToInt64(v.AuxInt) != 0 {
  7012  			break
  7013  		}
  7014  		mem := v_1
  7015  		v.copyOf(mem)
  7016  		return true
  7017  	}
  7018  	// match: (Zero [1] ptr mem)
  7019  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  7020  	for {
  7021  		if auxIntToInt64(v.AuxInt) != 1 {
  7022  			break
  7023  		}
  7024  		ptr := v_0
  7025  		mem := v_1
  7026  		v.reset(OpMIPSMOVBstore)
  7027  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7028  		v0.AuxInt = int32ToAuxInt(0)
  7029  		v.AddArg3(ptr, v0, mem)
  7030  		return true
  7031  	}
  7032  	// match: (Zero [2] {t} ptr mem)
  7033  	// cond: t.Alignment()%2 == 0
  7034  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  7035  	for {
  7036  		if auxIntToInt64(v.AuxInt) != 2 {
  7037  			break
  7038  		}
  7039  		t := auxToType(v.Aux)
  7040  		ptr := v_0
  7041  		mem := v_1
  7042  		if !(t.Alignment()%2 == 0) {
  7043  			break
  7044  		}
  7045  		v.reset(OpMIPSMOVHstore)
  7046  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7047  		v0.AuxInt = int32ToAuxInt(0)
  7048  		v.AddArg3(ptr, v0, mem)
  7049  		return true
  7050  	}
  7051  	// match: (Zero [2] ptr mem)
  7052  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  7053  	for {
  7054  		if auxIntToInt64(v.AuxInt) != 2 {
  7055  			break
  7056  		}
  7057  		ptr := v_0
  7058  		mem := v_1
  7059  		v.reset(OpMIPSMOVBstore)
  7060  		v.AuxInt = int32ToAuxInt(1)
  7061  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7062  		v0.AuxInt = int32ToAuxInt(0)
  7063  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7064  		v1.AuxInt = int32ToAuxInt(0)
  7065  		v1.AddArg3(ptr, v0, mem)
  7066  		v.AddArg3(ptr, v0, v1)
  7067  		return true
  7068  	}
  7069  	// match: (Zero [4] {t} ptr mem)
  7070  	// cond: t.Alignment()%4 == 0
  7071  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  7072  	for {
  7073  		if auxIntToInt64(v.AuxInt) != 4 {
  7074  			break
  7075  		}
  7076  		t := auxToType(v.Aux)
  7077  		ptr := v_0
  7078  		mem := v_1
  7079  		if !(t.Alignment()%4 == 0) {
  7080  			break
  7081  		}
  7082  		v.reset(OpMIPSMOVWstore)
  7083  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7084  		v0.AuxInt = int32ToAuxInt(0)
  7085  		v.AddArg3(ptr, v0, mem)
  7086  		return true
  7087  	}
  7088  	// match: (Zero [4] {t} ptr mem)
  7089  	// cond: t.Alignment()%2 == 0
  7090  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  7091  	for {
  7092  		if auxIntToInt64(v.AuxInt) != 4 {
  7093  			break
  7094  		}
  7095  		t := auxToType(v.Aux)
  7096  		ptr := v_0
  7097  		mem := v_1
  7098  		if !(t.Alignment()%2 == 0) {
  7099  			break
  7100  		}
  7101  		v.reset(OpMIPSMOVHstore)
  7102  		v.AuxInt = int32ToAuxInt(2)
  7103  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7104  		v0.AuxInt = int32ToAuxInt(0)
  7105  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7106  		v1.AuxInt = int32ToAuxInt(0)
  7107  		v1.AddArg3(ptr, v0, mem)
  7108  		v.AddArg3(ptr, v0, v1)
  7109  		return true
  7110  	}
  7111  	// match: (Zero [4] ptr mem)
  7112  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  7113  	for {
  7114  		if auxIntToInt64(v.AuxInt) != 4 {
  7115  			break
  7116  		}
  7117  		ptr := v_0
  7118  		mem := v_1
  7119  		v.reset(OpMIPSMOVBstore)
  7120  		v.AuxInt = int32ToAuxInt(3)
  7121  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7122  		v0.AuxInt = int32ToAuxInt(0)
  7123  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7124  		v1.AuxInt = int32ToAuxInt(2)
  7125  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7126  		v2.AuxInt = int32ToAuxInt(1)
  7127  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7128  		v3.AuxInt = int32ToAuxInt(0)
  7129  		v3.AddArg3(ptr, v0, mem)
  7130  		v2.AddArg3(ptr, v0, v3)
  7131  		v1.AddArg3(ptr, v0, v2)
  7132  		v.AddArg3(ptr, v0, v1)
  7133  		return true
  7134  	}
  7135  	// match: (Zero [3] ptr mem)
  7136  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  7137  	for {
  7138  		if auxIntToInt64(v.AuxInt) != 3 {
  7139  			break
  7140  		}
  7141  		ptr := v_0
  7142  		mem := v_1
  7143  		v.reset(OpMIPSMOVBstore)
  7144  		v.AuxInt = int32ToAuxInt(2)
  7145  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7146  		v0.AuxInt = int32ToAuxInt(0)
  7147  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7148  		v1.AuxInt = int32ToAuxInt(1)
  7149  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7150  		v2.AuxInt = int32ToAuxInt(0)
  7151  		v2.AddArg3(ptr, v0, mem)
  7152  		v1.AddArg3(ptr, v0, v2)
  7153  		v.AddArg3(ptr, v0, v1)
  7154  		return true
  7155  	}
  7156  	// match: (Zero [6] {t} ptr mem)
  7157  	// cond: t.Alignment()%2 == 0
  7158  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  7159  	for {
  7160  		if auxIntToInt64(v.AuxInt) != 6 {
  7161  			break
  7162  		}
  7163  		t := auxToType(v.Aux)
  7164  		ptr := v_0
  7165  		mem := v_1
  7166  		if !(t.Alignment()%2 == 0) {
  7167  			break
  7168  		}
  7169  		v.reset(OpMIPSMOVHstore)
  7170  		v.AuxInt = int32ToAuxInt(4)
  7171  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7172  		v0.AuxInt = int32ToAuxInt(0)
  7173  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7174  		v1.AuxInt = int32ToAuxInt(2)
  7175  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7176  		v2.AuxInt = int32ToAuxInt(0)
  7177  		v2.AddArg3(ptr, v0, mem)
  7178  		v1.AddArg3(ptr, v0, v2)
  7179  		v.AddArg3(ptr, v0, v1)
  7180  		return true
  7181  	}
  7182  	// match: (Zero [8] {t} ptr mem)
  7183  	// cond: t.Alignment()%4 == 0
  7184  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  7185  	for {
  7186  		if auxIntToInt64(v.AuxInt) != 8 {
  7187  			break
  7188  		}
  7189  		t := auxToType(v.Aux)
  7190  		ptr := v_0
  7191  		mem := v_1
  7192  		if !(t.Alignment()%4 == 0) {
  7193  			break
  7194  		}
  7195  		v.reset(OpMIPSMOVWstore)
  7196  		v.AuxInt = int32ToAuxInt(4)
  7197  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7198  		v0.AuxInt = int32ToAuxInt(0)
  7199  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7200  		v1.AuxInt = int32ToAuxInt(0)
  7201  		v1.AddArg3(ptr, v0, mem)
  7202  		v.AddArg3(ptr, v0, v1)
  7203  		return true
  7204  	}
  7205  	// match: (Zero [12] {t} ptr mem)
  7206  	// cond: t.Alignment()%4 == 0
  7207  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7208  	for {
  7209  		if auxIntToInt64(v.AuxInt) != 12 {
  7210  			break
  7211  		}
  7212  		t := auxToType(v.Aux)
  7213  		ptr := v_0
  7214  		mem := v_1
  7215  		if !(t.Alignment()%4 == 0) {
  7216  			break
  7217  		}
  7218  		v.reset(OpMIPSMOVWstore)
  7219  		v.AuxInt = int32ToAuxInt(8)
  7220  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7221  		v0.AuxInt = int32ToAuxInt(0)
  7222  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7223  		v1.AuxInt = int32ToAuxInt(4)
  7224  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7225  		v2.AuxInt = int32ToAuxInt(0)
  7226  		v2.AddArg3(ptr, v0, mem)
  7227  		v1.AddArg3(ptr, v0, v2)
  7228  		v.AddArg3(ptr, v0, v1)
  7229  		return true
  7230  	}
  7231  	// match: (Zero [16] {t} ptr mem)
  7232  	// cond: t.Alignment()%4 == 0
  7233  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7234  	for {
  7235  		if auxIntToInt64(v.AuxInt) != 16 {
  7236  			break
  7237  		}
  7238  		t := auxToType(v.Aux)
  7239  		ptr := v_0
  7240  		mem := v_1
  7241  		if !(t.Alignment()%4 == 0) {
  7242  			break
  7243  		}
  7244  		v.reset(OpMIPSMOVWstore)
  7245  		v.AuxInt = int32ToAuxInt(12)
  7246  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7247  		v0.AuxInt = int32ToAuxInt(0)
  7248  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7249  		v1.AuxInt = int32ToAuxInt(8)
  7250  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7251  		v2.AuxInt = int32ToAuxInt(4)
  7252  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7253  		v3.AuxInt = int32ToAuxInt(0)
  7254  		v3.AddArg3(ptr, v0, mem)
  7255  		v2.AddArg3(ptr, v0, v3)
  7256  		v1.AddArg3(ptr, v0, v2)
  7257  		v.AddArg3(ptr, v0, v1)
  7258  		return true
  7259  	}
  7260  	// match: (Zero [s] {t} ptr mem)
  7261  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7262  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7263  	for {
  7264  		s := auxIntToInt64(v.AuxInt)
  7265  		t := auxToType(v.Aux)
  7266  		ptr := v_0
  7267  		mem := v_1
  7268  		if !(s > 16 || t.Alignment()%4 != 0) {
  7269  			break
  7270  		}
  7271  		v.reset(OpMIPSLoweredZero)
  7272  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7273  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7274  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7275  		v0.AddArg(ptr)
  7276  		v.AddArg3(ptr, v0, mem)
  7277  		return true
  7278  	}
  7279  	return false
  7280  }
  7281  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7282  	v_0 := v.Args[0]
  7283  	b := v.Block
  7284  	typ := &b.Func.Config.Types
  7285  	// match: (Zeromask x)
  7286  	// result: (NEG (SGTU x (MOVWconst [0])))
  7287  	for {
  7288  		x := v_0
  7289  		v.reset(OpMIPSNEG)
  7290  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7291  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7292  		v1.AuxInt = int32ToAuxInt(0)
  7293  		v0.AddArg2(x, v1)
  7294  		v.AddArg(v0)
  7295  		return true
  7296  	}
  7297  }
  7298  func rewriteBlockMIPS(b *Block) bool {
  7299  	switch b.Kind {
  7300  	case BlockMIPSEQ:
  7301  		// match: (EQ (FPFlagTrue cmp) yes no)
  7302  		// result: (FPF cmp yes no)
  7303  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7304  			v_0 := b.Controls[0]
  7305  			cmp := v_0.Args[0]
  7306  			b.resetWithControl(BlockMIPSFPF, cmp)
  7307  			return true
  7308  		}
  7309  		// match: (EQ (FPFlagFalse cmp) yes no)
  7310  		// result: (FPT cmp yes no)
  7311  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7312  			v_0 := b.Controls[0]
  7313  			cmp := v_0.Args[0]
  7314  			b.resetWithControl(BlockMIPSFPT, cmp)
  7315  			return true
  7316  		}
  7317  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7318  		// result: (NE cmp yes no)
  7319  		for b.Controls[0].Op == OpMIPSXORconst {
  7320  			v_0 := b.Controls[0]
  7321  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7322  				break
  7323  			}
  7324  			cmp := v_0.Args[0]
  7325  			if cmp.Op != OpMIPSSGT {
  7326  				break
  7327  			}
  7328  			b.resetWithControl(BlockMIPSNE, cmp)
  7329  			return true
  7330  		}
  7331  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7332  		// result: (NE cmp yes no)
  7333  		for b.Controls[0].Op == OpMIPSXORconst {
  7334  			v_0 := b.Controls[0]
  7335  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7336  				break
  7337  			}
  7338  			cmp := v_0.Args[0]
  7339  			if cmp.Op != OpMIPSSGTU {
  7340  				break
  7341  			}
  7342  			b.resetWithControl(BlockMIPSNE, cmp)
  7343  			return true
  7344  		}
  7345  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7346  		// result: (NE cmp yes no)
  7347  		for b.Controls[0].Op == OpMIPSXORconst {
  7348  			v_0 := b.Controls[0]
  7349  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7350  				break
  7351  			}
  7352  			cmp := v_0.Args[0]
  7353  			if cmp.Op != OpMIPSSGTconst {
  7354  				break
  7355  			}
  7356  			b.resetWithControl(BlockMIPSNE, cmp)
  7357  			return true
  7358  		}
  7359  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7360  		// result: (NE cmp yes no)
  7361  		for b.Controls[0].Op == OpMIPSXORconst {
  7362  			v_0 := b.Controls[0]
  7363  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7364  				break
  7365  			}
  7366  			cmp := v_0.Args[0]
  7367  			if cmp.Op != OpMIPSSGTUconst {
  7368  				break
  7369  			}
  7370  			b.resetWithControl(BlockMIPSNE, cmp)
  7371  			return true
  7372  		}
  7373  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7374  		// result: (NE cmp yes no)
  7375  		for b.Controls[0].Op == OpMIPSXORconst {
  7376  			v_0 := b.Controls[0]
  7377  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7378  				break
  7379  			}
  7380  			cmp := v_0.Args[0]
  7381  			if cmp.Op != OpMIPSSGTzero {
  7382  				break
  7383  			}
  7384  			b.resetWithControl(BlockMIPSNE, cmp)
  7385  			return true
  7386  		}
  7387  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7388  		// result: (NE cmp yes no)
  7389  		for b.Controls[0].Op == OpMIPSXORconst {
  7390  			v_0 := b.Controls[0]
  7391  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7392  				break
  7393  			}
  7394  			cmp := v_0.Args[0]
  7395  			if cmp.Op != OpMIPSSGTUzero {
  7396  				break
  7397  			}
  7398  			b.resetWithControl(BlockMIPSNE, cmp)
  7399  			return true
  7400  		}
  7401  		// match: (EQ (SGTUconst [1] x) yes no)
  7402  		// result: (NE x yes no)
  7403  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7404  			v_0 := b.Controls[0]
  7405  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7406  				break
  7407  			}
  7408  			x := v_0.Args[0]
  7409  			b.resetWithControl(BlockMIPSNE, x)
  7410  			return true
  7411  		}
  7412  		// match: (EQ (SGTUzero x) yes no)
  7413  		// result: (EQ x yes no)
  7414  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7415  			v_0 := b.Controls[0]
  7416  			x := v_0.Args[0]
  7417  			b.resetWithControl(BlockMIPSEQ, x)
  7418  			return true
  7419  		}
  7420  		// match: (EQ (SGTconst [0] x) yes no)
  7421  		// result: (GEZ x yes no)
  7422  		for b.Controls[0].Op == OpMIPSSGTconst {
  7423  			v_0 := b.Controls[0]
  7424  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7425  				break
  7426  			}
  7427  			x := v_0.Args[0]
  7428  			b.resetWithControl(BlockMIPSGEZ, x)
  7429  			return true
  7430  		}
  7431  		// match: (EQ (SGTzero x) yes no)
  7432  		// result: (LEZ x yes no)
  7433  		for b.Controls[0].Op == OpMIPSSGTzero {
  7434  			v_0 := b.Controls[0]
  7435  			x := v_0.Args[0]
  7436  			b.resetWithControl(BlockMIPSLEZ, x)
  7437  			return true
  7438  		}
  7439  		// match: (EQ (MOVWconst [0]) yes no)
  7440  		// result: (First yes no)
  7441  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7442  			v_0 := b.Controls[0]
  7443  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7444  				break
  7445  			}
  7446  			b.Reset(BlockFirst)
  7447  			return true
  7448  		}
  7449  		// match: (EQ (MOVWconst [c]) yes no)
  7450  		// cond: c != 0
  7451  		// result: (First no yes)
  7452  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7453  			v_0 := b.Controls[0]
  7454  			c := auxIntToInt32(v_0.AuxInt)
  7455  			if !(c != 0) {
  7456  				break
  7457  			}
  7458  			b.Reset(BlockFirst)
  7459  			b.swapSuccessors()
  7460  			return true
  7461  		}
  7462  	case BlockMIPSGEZ:
  7463  		// match: (GEZ (MOVWconst [c]) yes no)
  7464  		// cond: c >= 0
  7465  		// result: (First yes no)
  7466  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7467  			v_0 := b.Controls[0]
  7468  			c := auxIntToInt32(v_0.AuxInt)
  7469  			if !(c >= 0) {
  7470  				break
  7471  			}
  7472  			b.Reset(BlockFirst)
  7473  			return true
  7474  		}
  7475  		// match: (GEZ (MOVWconst [c]) yes no)
  7476  		// cond: c < 0
  7477  		// result: (First no yes)
  7478  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7479  			v_0 := b.Controls[0]
  7480  			c := auxIntToInt32(v_0.AuxInt)
  7481  			if !(c < 0) {
  7482  				break
  7483  			}
  7484  			b.Reset(BlockFirst)
  7485  			b.swapSuccessors()
  7486  			return true
  7487  		}
  7488  	case BlockMIPSGTZ:
  7489  		// match: (GTZ (MOVWconst [c]) yes no)
  7490  		// cond: c > 0
  7491  		// result: (First yes no)
  7492  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7493  			v_0 := b.Controls[0]
  7494  			c := auxIntToInt32(v_0.AuxInt)
  7495  			if !(c > 0) {
  7496  				break
  7497  			}
  7498  			b.Reset(BlockFirst)
  7499  			return true
  7500  		}
  7501  		// match: (GTZ (MOVWconst [c]) yes no)
  7502  		// cond: c <= 0
  7503  		// result: (First no yes)
  7504  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7505  			v_0 := b.Controls[0]
  7506  			c := auxIntToInt32(v_0.AuxInt)
  7507  			if !(c <= 0) {
  7508  				break
  7509  			}
  7510  			b.Reset(BlockFirst)
  7511  			b.swapSuccessors()
  7512  			return true
  7513  		}
  7514  	case BlockIf:
  7515  		// match: (If cond yes no)
  7516  		// result: (NE cond yes no)
  7517  		for {
  7518  			cond := b.Controls[0]
  7519  			b.resetWithControl(BlockMIPSNE, cond)
  7520  			return true
  7521  		}
  7522  	case BlockMIPSLEZ:
  7523  		// match: (LEZ (MOVWconst [c]) yes no)
  7524  		// cond: c <= 0
  7525  		// result: (First yes no)
  7526  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7527  			v_0 := b.Controls[0]
  7528  			c := auxIntToInt32(v_0.AuxInt)
  7529  			if !(c <= 0) {
  7530  				break
  7531  			}
  7532  			b.Reset(BlockFirst)
  7533  			return true
  7534  		}
  7535  		// match: (LEZ (MOVWconst [c]) yes no)
  7536  		// cond: c > 0
  7537  		// result: (First no yes)
  7538  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7539  			v_0 := b.Controls[0]
  7540  			c := auxIntToInt32(v_0.AuxInt)
  7541  			if !(c > 0) {
  7542  				break
  7543  			}
  7544  			b.Reset(BlockFirst)
  7545  			b.swapSuccessors()
  7546  			return true
  7547  		}
  7548  	case BlockMIPSLTZ:
  7549  		// match: (LTZ (MOVWconst [c]) yes no)
  7550  		// cond: c < 0
  7551  		// result: (First yes no)
  7552  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7553  			v_0 := b.Controls[0]
  7554  			c := auxIntToInt32(v_0.AuxInt)
  7555  			if !(c < 0) {
  7556  				break
  7557  			}
  7558  			b.Reset(BlockFirst)
  7559  			return true
  7560  		}
  7561  		// match: (LTZ (MOVWconst [c]) yes no)
  7562  		// cond: c >= 0
  7563  		// result: (First no yes)
  7564  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7565  			v_0 := b.Controls[0]
  7566  			c := auxIntToInt32(v_0.AuxInt)
  7567  			if !(c >= 0) {
  7568  				break
  7569  			}
  7570  			b.Reset(BlockFirst)
  7571  			b.swapSuccessors()
  7572  			return true
  7573  		}
  7574  	case BlockMIPSNE:
  7575  		// match: (NE (FPFlagTrue cmp) yes no)
  7576  		// result: (FPT cmp yes no)
  7577  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7578  			v_0 := b.Controls[0]
  7579  			cmp := v_0.Args[0]
  7580  			b.resetWithControl(BlockMIPSFPT, cmp)
  7581  			return true
  7582  		}
  7583  		// match: (NE (FPFlagFalse cmp) yes no)
  7584  		// result: (FPF cmp yes no)
  7585  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7586  			v_0 := b.Controls[0]
  7587  			cmp := v_0.Args[0]
  7588  			b.resetWithControl(BlockMIPSFPF, cmp)
  7589  			return true
  7590  		}
  7591  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7592  		// result: (EQ cmp yes no)
  7593  		for b.Controls[0].Op == OpMIPSXORconst {
  7594  			v_0 := b.Controls[0]
  7595  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7596  				break
  7597  			}
  7598  			cmp := v_0.Args[0]
  7599  			if cmp.Op != OpMIPSSGT {
  7600  				break
  7601  			}
  7602  			b.resetWithControl(BlockMIPSEQ, cmp)
  7603  			return true
  7604  		}
  7605  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7606  		// result: (EQ cmp yes no)
  7607  		for b.Controls[0].Op == OpMIPSXORconst {
  7608  			v_0 := b.Controls[0]
  7609  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7610  				break
  7611  			}
  7612  			cmp := v_0.Args[0]
  7613  			if cmp.Op != OpMIPSSGTU {
  7614  				break
  7615  			}
  7616  			b.resetWithControl(BlockMIPSEQ, cmp)
  7617  			return true
  7618  		}
  7619  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7620  		// result: (EQ cmp yes no)
  7621  		for b.Controls[0].Op == OpMIPSXORconst {
  7622  			v_0 := b.Controls[0]
  7623  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7624  				break
  7625  			}
  7626  			cmp := v_0.Args[0]
  7627  			if cmp.Op != OpMIPSSGTconst {
  7628  				break
  7629  			}
  7630  			b.resetWithControl(BlockMIPSEQ, cmp)
  7631  			return true
  7632  		}
  7633  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7634  		// result: (EQ cmp yes no)
  7635  		for b.Controls[0].Op == OpMIPSXORconst {
  7636  			v_0 := b.Controls[0]
  7637  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7638  				break
  7639  			}
  7640  			cmp := v_0.Args[0]
  7641  			if cmp.Op != OpMIPSSGTUconst {
  7642  				break
  7643  			}
  7644  			b.resetWithControl(BlockMIPSEQ, cmp)
  7645  			return true
  7646  		}
  7647  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7648  		// result: (EQ cmp yes no)
  7649  		for b.Controls[0].Op == OpMIPSXORconst {
  7650  			v_0 := b.Controls[0]
  7651  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7652  				break
  7653  			}
  7654  			cmp := v_0.Args[0]
  7655  			if cmp.Op != OpMIPSSGTzero {
  7656  				break
  7657  			}
  7658  			b.resetWithControl(BlockMIPSEQ, cmp)
  7659  			return true
  7660  		}
  7661  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7662  		// result: (EQ cmp yes no)
  7663  		for b.Controls[0].Op == OpMIPSXORconst {
  7664  			v_0 := b.Controls[0]
  7665  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7666  				break
  7667  			}
  7668  			cmp := v_0.Args[0]
  7669  			if cmp.Op != OpMIPSSGTUzero {
  7670  				break
  7671  			}
  7672  			b.resetWithControl(BlockMIPSEQ, cmp)
  7673  			return true
  7674  		}
  7675  		// match: (NE (SGTUconst [1] x) yes no)
  7676  		// result: (EQ x yes no)
  7677  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7678  			v_0 := b.Controls[0]
  7679  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7680  				break
  7681  			}
  7682  			x := v_0.Args[0]
  7683  			b.resetWithControl(BlockMIPSEQ, x)
  7684  			return true
  7685  		}
  7686  		// match: (NE (SGTUzero x) yes no)
  7687  		// result: (NE x yes no)
  7688  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7689  			v_0 := b.Controls[0]
  7690  			x := v_0.Args[0]
  7691  			b.resetWithControl(BlockMIPSNE, x)
  7692  			return true
  7693  		}
  7694  		// match: (NE (SGTconst [0] x) yes no)
  7695  		// result: (LTZ x yes no)
  7696  		for b.Controls[0].Op == OpMIPSSGTconst {
  7697  			v_0 := b.Controls[0]
  7698  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7699  				break
  7700  			}
  7701  			x := v_0.Args[0]
  7702  			b.resetWithControl(BlockMIPSLTZ, x)
  7703  			return true
  7704  		}
  7705  		// match: (NE (SGTzero x) yes no)
  7706  		// result: (GTZ x yes no)
  7707  		for b.Controls[0].Op == OpMIPSSGTzero {
  7708  			v_0 := b.Controls[0]
  7709  			x := v_0.Args[0]
  7710  			b.resetWithControl(BlockMIPSGTZ, x)
  7711  			return true
  7712  		}
  7713  		// match: (NE (MOVWconst [0]) yes no)
  7714  		// result: (First no yes)
  7715  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7716  			v_0 := b.Controls[0]
  7717  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7718  				break
  7719  			}
  7720  			b.Reset(BlockFirst)
  7721  			b.swapSuccessors()
  7722  			return true
  7723  		}
  7724  		// match: (NE (MOVWconst [c]) yes no)
  7725  		// cond: c != 0
  7726  		// result: (First yes no)
  7727  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7728  			v_0 := b.Controls[0]
  7729  			c := auxIntToInt32(v_0.AuxInt)
  7730  			if !(c != 0) {
  7731  				break
  7732  			}
  7733  			b.Reset(BlockFirst)
  7734  			return true
  7735  		}
  7736  	}
  7737  	return false
  7738  }
  7739