Source file src/cmd/compile/internal/ssa/rewriteARM64.go

     1  // Code generated from _gen/ARM64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueARM64(v *Value) bool {
     8  	switch v.Op {
     9  	case OpARM64ADCSflags:
    10  		return rewriteValueARM64_OpARM64ADCSflags(v)
    11  	case OpARM64ADD:
    12  		return rewriteValueARM64_OpARM64ADD(v)
    13  	case OpARM64ADDSflags:
    14  		return rewriteValueARM64_OpARM64ADDSflags(v)
    15  	case OpARM64ADDconst:
    16  		return rewriteValueARM64_OpARM64ADDconst(v)
    17  	case OpARM64ADDshiftLL:
    18  		return rewriteValueARM64_OpARM64ADDshiftLL(v)
    19  	case OpARM64ADDshiftRA:
    20  		return rewriteValueARM64_OpARM64ADDshiftRA(v)
    21  	case OpARM64ADDshiftRL:
    22  		return rewriteValueARM64_OpARM64ADDshiftRL(v)
    23  	case OpARM64AND:
    24  		return rewriteValueARM64_OpARM64AND(v)
    25  	case OpARM64ANDconst:
    26  		return rewriteValueARM64_OpARM64ANDconst(v)
    27  	case OpARM64ANDshiftLL:
    28  		return rewriteValueARM64_OpARM64ANDshiftLL(v)
    29  	case OpARM64ANDshiftRA:
    30  		return rewriteValueARM64_OpARM64ANDshiftRA(v)
    31  	case OpARM64ANDshiftRL:
    32  		return rewriteValueARM64_OpARM64ANDshiftRL(v)
    33  	case OpARM64ANDshiftRO:
    34  		return rewriteValueARM64_OpARM64ANDshiftRO(v)
    35  	case OpARM64BIC:
    36  		return rewriteValueARM64_OpARM64BIC(v)
    37  	case OpARM64BICshiftLL:
    38  		return rewriteValueARM64_OpARM64BICshiftLL(v)
    39  	case OpARM64BICshiftRA:
    40  		return rewriteValueARM64_OpARM64BICshiftRA(v)
    41  	case OpARM64BICshiftRL:
    42  		return rewriteValueARM64_OpARM64BICshiftRL(v)
    43  	case OpARM64BICshiftRO:
    44  		return rewriteValueARM64_OpARM64BICshiftRO(v)
    45  	case OpARM64CMN:
    46  		return rewriteValueARM64_OpARM64CMN(v)
    47  	case OpARM64CMNW:
    48  		return rewriteValueARM64_OpARM64CMNW(v)
    49  	case OpARM64CMNWconst:
    50  		return rewriteValueARM64_OpARM64CMNWconst(v)
    51  	case OpARM64CMNconst:
    52  		return rewriteValueARM64_OpARM64CMNconst(v)
    53  	case OpARM64CMNshiftLL:
    54  		return rewriteValueARM64_OpARM64CMNshiftLL(v)
    55  	case OpARM64CMNshiftRA:
    56  		return rewriteValueARM64_OpARM64CMNshiftRA(v)
    57  	case OpARM64CMNshiftRL:
    58  		return rewriteValueARM64_OpARM64CMNshiftRL(v)
    59  	case OpARM64CMP:
    60  		return rewriteValueARM64_OpARM64CMP(v)
    61  	case OpARM64CMPW:
    62  		return rewriteValueARM64_OpARM64CMPW(v)
    63  	case OpARM64CMPWconst:
    64  		return rewriteValueARM64_OpARM64CMPWconst(v)
    65  	case OpARM64CMPconst:
    66  		return rewriteValueARM64_OpARM64CMPconst(v)
    67  	case OpARM64CMPshiftLL:
    68  		return rewriteValueARM64_OpARM64CMPshiftLL(v)
    69  	case OpARM64CMPshiftRA:
    70  		return rewriteValueARM64_OpARM64CMPshiftRA(v)
    71  	case OpARM64CMPshiftRL:
    72  		return rewriteValueARM64_OpARM64CMPshiftRL(v)
    73  	case OpARM64CSEL:
    74  		return rewriteValueARM64_OpARM64CSEL(v)
    75  	case OpARM64CSEL0:
    76  		return rewriteValueARM64_OpARM64CSEL0(v)
    77  	case OpARM64CSETM:
    78  		return rewriteValueARM64_OpARM64CSETM(v)
    79  	case OpARM64CSINC:
    80  		return rewriteValueARM64_OpARM64CSINC(v)
    81  	case OpARM64CSINV:
    82  		return rewriteValueARM64_OpARM64CSINV(v)
    83  	case OpARM64CSNEG:
    84  		return rewriteValueARM64_OpARM64CSNEG(v)
    85  	case OpARM64DIV:
    86  		return rewriteValueARM64_OpARM64DIV(v)
    87  	case OpARM64DIVW:
    88  		return rewriteValueARM64_OpARM64DIVW(v)
    89  	case OpARM64EON:
    90  		return rewriteValueARM64_OpARM64EON(v)
    91  	case OpARM64EONshiftLL:
    92  		return rewriteValueARM64_OpARM64EONshiftLL(v)
    93  	case OpARM64EONshiftRA:
    94  		return rewriteValueARM64_OpARM64EONshiftRA(v)
    95  	case OpARM64EONshiftRL:
    96  		return rewriteValueARM64_OpARM64EONshiftRL(v)
    97  	case OpARM64EONshiftRO:
    98  		return rewriteValueARM64_OpARM64EONshiftRO(v)
    99  	case OpARM64Equal:
   100  		return rewriteValueARM64_OpARM64Equal(v)
   101  	case OpARM64FADDD:
   102  		return rewriteValueARM64_OpARM64FADDD(v)
   103  	case OpARM64FADDS:
   104  		return rewriteValueARM64_OpARM64FADDS(v)
   105  	case OpARM64FCMPD:
   106  		return rewriteValueARM64_OpARM64FCMPD(v)
   107  	case OpARM64FCMPS:
   108  		return rewriteValueARM64_OpARM64FCMPS(v)
   109  	case OpARM64FCVTDS:
   110  		return rewriteValueARM64_OpARM64FCVTDS(v)
   111  	case OpARM64FLDPQ:
   112  		return rewriteValueARM64_OpARM64FLDPQ(v)
   113  	case OpARM64FMOVDfpgp:
   114  		return rewriteValueARM64_OpARM64FMOVDfpgp(v)
   115  	case OpARM64FMOVDgpfp:
   116  		return rewriteValueARM64_OpARM64FMOVDgpfp(v)
   117  	case OpARM64FMOVDload:
   118  		return rewriteValueARM64_OpARM64FMOVDload(v)
   119  	case OpARM64FMOVDloadidx:
   120  		return rewriteValueARM64_OpARM64FMOVDloadidx(v)
   121  	case OpARM64FMOVDloadidx8:
   122  		return rewriteValueARM64_OpARM64FMOVDloadidx8(v)
   123  	case OpARM64FMOVDstore:
   124  		return rewriteValueARM64_OpARM64FMOVDstore(v)
   125  	case OpARM64FMOVDstoreidx:
   126  		return rewriteValueARM64_OpARM64FMOVDstoreidx(v)
   127  	case OpARM64FMOVDstoreidx8:
   128  		return rewriteValueARM64_OpARM64FMOVDstoreidx8(v)
   129  	case OpARM64FMOVQload:
   130  		return rewriteValueARM64_OpARM64FMOVQload(v)
   131  	case OpARM64FMOVQstore:
   132  		return rewriteValueARM64_OpARM64FMOVQstore(v)
   133  	case OpARM64FMOVSload:
   134  		return rewriteValueARM64_OpARM64FMOVSload(v)
   135  	case OpARM64FMOVSloadidx:
   136  		return rewriteValueARM64_OpARM64FMOVSloadidx(v)
   137  	case OpARM64FMOVSloadidx4:
   138  		return rewriteValueARM64_OpARM64FMOVSloadidx4(v)
   139  	case OpARM64FMOVSstore:
   140  		return rewriteValueARM64_OpARM64FMOVSstore(v)
   141  	case OpARM64FMOVSstoreidx:
   142  		return rewriteValueARM64_OpARM64FMOVSstoreidx(v)
   143  	case OpARM64FMOVSstoreidx4:
   144  		return rewriteValueARM64_OpARM64FMOVSstoreidx4(v)
   145  	case OpARM64FMULD:
   146  		return rewriteValueARM64_OpARM64FMULD(v)
   147  	case OpARM64FMULS:
   148  		return rewriteValueARM64_OpARM64FMULS(v)
   149  	case OpARM64FNEGD:
   150  		return rewriteValueARM64_OpARM64FNEGD(v)
   151  	case OpARM64FNEGS:
   152  		return rewriteValueARM64_OpARM64FNEGS(v)
   153  	case OpARM64FNMULD:
   154  		return rewriteValueARM64_OpARM64FNMULD(v)
   155  	case OpARM64FNMULS:
   156  		return rewriteValueARM64_OpARM64FNMULS(v)
   157  	case OpARM64FSTPQ:
   158  		return rewriteValueARM64_OpARM64FSTPQ(v)
   159  	case OpARM64FSUBD:
   160  		return rewriteValueARM64_OpARM64FSUBD(v)
   161  	case OpARM64FSUBS:
   162  		return rewriteValueARM64_OpARM64FSUBS(v)
   163  	case OpARM64GreaterEqual:
   164  		return rewriteValueARM64_OpARM64GreaterEqual(v)
   165  	case OpARM64GreaterEqualF:
   166  		return rewriteValueARM64_OpARM64GreaterEqualF(v)
   167  	case OpARM64GreaterEqualNoov:
   168  		return rewriteValueARM64_OpARM64GreaterEqualNoov(v)
   169  	case OpARM64GreaterEqualU:
   170  		return rewriteValueARM64_OpARM64GreaterEqualU(v)
   171  	case OpARM64GreaterThan:
   172  		return rewriteValueARM64_OpARM64GreaterThan(v)
   173  	case OpARM64GreaterThanF:
   174  		return rewriteValueARM64_OpARM64GreaterThanF(v)
   175  	case OpARM64GreaterThanU:
   176  		return rewriteValueARM64_OpARM64GreaterThanU(v)
   177  	case OpARM64LDP:
   178  		return rewriteValueARM64_OpARM64LDP(v)
   179  	case OpARM64LessEqual:
   180  		return rewriteValueARM64_OpARM64LessEqual(v)
   181  	case OpARM64LessEqualF:
   182  		return rewriteValueARM64_OpARM64LessEqualF(v)
   183  	case OpARM64LessEqualU:
   184  		return rewriteValueARM64_OpARM64LessEqualU(v)
   185  	case OpARM64LessThan:
   186  		return rewriteValueARM64_OpARM64LessThan(v)
   187  	case OpARM64LessThanF:
   188  		return rewriteValueARM64_OpARM64LessThanF(v)
   189  	case OpARM64LessThanNoov:
   190  		return rewriteValueARM64_OpARM64LessThanNoov(v)
   191  	case OpARM64LessThanU:
   192  		return rewriteValueARM64_OpARM64LessThanU(v)
   193  	case OpARM64LoweredPanicBoundsCR:
   194  		return rewriteValueARM64_OpARM64LoweredPanicBoundsCR(v)
   195  	case OpARM64LoweredPanicBoundsRC:
   196  		return rewriteValueARM64_OpARM64LoweredPanicBoundsRC(v)
   197  	case OpARM64LoweredPanicBoundsRR:
   198  		return rewriteValueARM64_OpARM64LoweredPanicBoundsRR(v)
   199  	case OpARM64MADD:
   200  		return rewriteValueARM64_OpARM64MADD(v)
   201  	case OpARM64MADDW:
   202  		return rewriteValueARM64_OpARM64MADDW(v)
   203  	case OpARM64MNEG:
   204  		return rewriteValueARM64_OpARM64MNEG(v)
   205  	case OpARM64MNEGW:
   206  		return rewriteValueARM64_OpARM64MNEGW(v)
   207  	case OpARM64MOD:
   208  		return rewriteValueARM64_OpARM64MOD(v)
   209  	case OpARM64MODW:
   210  		return rewriteValueARM64_OpARM64MODW(v)
   211  	case OpARM64MOVBUload:
   212  		return rewriteValueARM64_OpARM64MOVBUload(v)
   213  	case OpARM64MOVBUloadidx:
   214  		return rewriteValueARM64_OpARM64MOVBUloadidx(v)
   215  	case OpARM64MOVBUreg:
   216  		return rewriteValueARM64_OpARM64MOVBUreg(v)
   217  	case OpARM64MOVBload:
   218  		return rewriteValueARM64_OpARM64MOVBload(v)
   219  	case OpARM64MOVBloadidx:
   220  		return rewriteValueARM64_OpARM64MOVBloadidx(v)
   221  	case OpARM64MOVBreg:
   222  		return rewriteValueARM64_OpARM64MOVBreg(v)
   223  	case OpARM64MOVBstore:
   224  		return rewriteValueARM64_OpARM64MOVBstore(v)
   225  	case OpARM64MOVBstoreidx:
   226  		return rewriteValueARM64_OpARM64MOVBstoreidx(v)
   227  	case OpARM64MOVDload:
   228  		return rewriteValueARM64_OpARM64MOVDload(v)
   229  	case OpARM64MOVDloadidx:
   230  		return rewriteValueARM64_OpARM64MOVDloadidx(v)
   231  	case OpARM64MOVDloadidx8:
   232  		return rewriteValueARM64_OpARM64MOVDloadidx8(v)
   233  	case OpARM64MOVDnop:
   234  		return rewriteValueARM64_OpARM64MOVDnop(v)
   235  	case OpARM64MOVDreg:
   236  		return rewriteValueARM64_OpARM64MOVDreg(v)
   237  	case OpARM64MOVDstore:
   238  		return rewriteValueARM64_OpARM64MOVDstore(v)
   239  	case OpARM64MOVDstoreidx:
   240  		return rewriteValueARM64_OpARM64MOVDstoreidx(v)
   241  	case OpARM64MOVDstoreidx8:
   242  		return rewriteValueARM64_OpARM64MOVDstoreidx8(v)
   243  	case OpARM64MOVHUload:
   244  		return rewriteValueARM64_OpARM64MOVHUload(v)
   245  	case OpARM64MOVHUloadidx:
   246  		return rewriteValueARM64_OpARM64MOVHUloadidx(v)
   247  	case OpARM64MOVHUloadidx2:
   248  		return rewriteValueARM64_OpARM64MOVHUloadidx2(v)
   249  	case OpARM64MOVHUreg:
   250  		return rewriteValueARM64_OpARM64MOVHUreg(v)
   251  	case OpARM64MOVHload:
   252  		return rewriteValueARM64_OpARM64MOVHload(v)
   253  	case OpARM64MOVHloadidx:
   254  		return rewriteValueARM64_OpARM64MOVHloadidx(v)
   255  	case OpARM64MOVHloadidx2:
   256  		return rewriteValueARM64_OpARM64MOVHloadidx2(v)
   257  	case OpARM64MOVHreg:
   258  		return rewriteValueARM64_OpARM64MOVHreg(v)
   259  	case OpARM64MOVHstore:
   260  		return rewriteValueARM64_OpARM64MOVHstore(v)
   261  	case OpARM64MOVHstoreidx:
   262  		return rewriteValueARM64_OpARM64MOVHstoreidx(v)
   263  	case OpARM64MOVHstoreidx2:
   264  		return rewriteValueARM64_OpARM64MOVHstoreidx2(v)
   265  	case OpARM64MOVWUload:
   266  		return rewriteValueARM64_OpARM64MOVWUload(v)
   267  	case OpARM64MOVWUloadidx:
   268  		return rewriteValueARM64_OpARM64MOVWUloadidx(v)
   269  	case OpARM64MOVWUloadidx4:
   270  		return rewriteValueARM64_OpARM64MOVWUloadidx4(v)
   271  	case OpARM64MOVWUreg:
   272  		return rewriteValueARM64_OpARM64MOVWUreg(v)
   273  	case OpARM64MOVWload:
   274  		return rewriteValueARM64_OpARM64MOVWload(v)
   275  	case OpARM64MOVWloadidx:
   276  		return rewriteValueARM64_OpARM64MOVWloadidx(v)
   277  	case OpARM64MOVWloadidx4:
   278  		return rewriteValueARM64_OpARM64MOVWloadidx4(v)
   279  	case OpARM64MOVWreg:
   280  		return rewriteValueARM64_OpARM64MOVWreg(v)
   281  	case OpARM64MOVWstore:
   282  		return rewriteValueARM64_OpARM64MOVWstore(v)
   283  	case OpARM64MOVWstoreidx:
   284  		return rewriteValueARM64_OpARM64MOVWstoreidx(v)
   285  	case OpARM64MOVWstoreidx4:
   286  		return rewriteValueARM64_OpARM64MOVWstoreidx4(v)
   287  	case OpARM64MSUB:
   288  		return rewriteValueARM64_OpARM64MSUB(v)
   289  	case OpARM64MSUBW:
   290  		return rewriteValueARM64_OpARM64MSUBW(v)
   291  	case OpARM64MUL:
   292  		return rewriteValueARM64_OpARM64MUL(v)
   293  	case OpARM64MULW:
   294  		return rewriteValueARM64_OpARM64MULW(v)
   295  	case OpARM64MVN:
   296  		return rewriteValueARM64_OpARM64MVN(v)
   297  	case OpARM64MVNshiftLL:
   298  		return rewriteValueARM64_OpARM64MVNshiftLL(v)
   299  	case OpARM64MVNshiftRA:
   300  		return rewriteValueARM64_OpARM64MVNshiftRA(v)
   301  	case OpARM64MVNshiftRL:
   302  		return rewriteValueARM64_OpARM64MVNshiftRL(v)
   303  	case OpARM64MVNshiftRO:
   304  		return rewriteValueARM64_OpARM64MVNshiftRO(v)
   305  	case OpARM64NEG:
   306  		return rewriteValueARM64_OpARM64NEG(v)
   307  	case OpARM64NEGshiftLL:
   308  		return rewriteValueARM64_OpARM64NEGshiftLL(v)
   309  	case OpARM64NEGshiftRA:
   310  		return rewriteValueARM64_OpARM64NEGshiftRA(v)
   311  	case OpARM64NEGshiftRL:
   312  		return rewriteValueARM64_OpARM64NEGshiftRL(v)
   313  	case OpARM64NotEqual:
   314  		return rewriteValueARM64_OpARM64NotEqual(v)
   315  	case OpARM64OR:
   316  		return rewriteValueARM64_OpARM64OR(v)
   317  	case OpARM64ORN:
   318  		return rewriteValueARM64_OpARM64ORN(v)
   319  	case OpARM64ORNshiftLL:
   320  		return rewriteValueARM64_OpARM64ORNshiftLL(v)
   321  	case OpARM64ORNshiftRA:
   322  		return rewriteValueARM64_OpARM64ORNshiftRA(v)
   323  	case OpARM64ORNshiftRL:
   324  		return rewriteValueARM64_OpARM64ORNshiftRL(v)
   325  	case OpARM64ORNshiftRO:
   326  		return rewriteValueARM64_OpARM64ORNshiftRO(v)
   327  	case OpARM64ORconst:
   328  		return rewriteValueARM64_OpARM64ORconst(v)
   329  	case OpARM64ORshiftLL:
   330  		return rewriteValueARM64_OpARM64ORshiftLL(v)
   331  	case OpARM64ORshiftRA:
   332  		return rewriteValueARM64_OpARM64ORshiftRA(v)
   333  	case OpARM64ORshiftRL:
   334  		return rewriteValueARM64_OpARM64ORshiftRL(v)
   335  	case OpARM64ORshiftRO:
   336  		return rewriteValueARM64_OpARM64ORshiftRO(v)
   337  	case OpARM64REV:
   338  		return rewriteValueARM64_OpARM64REV(v)
   339  	case OpARM64REV16:
   340  		return rewriteValueARM64_OpARM64REV16(v)
   341  	case OpARM64REVW:
   342  		return rewriteValueARM64_OpARM64REVW(v)
   343  	case OpARM64ROR:
   344  		return rewriteValueARM64_OpARM64ROR(v)
   345  	case OpARM64RORW:
   346  		return rewriteValueARM64_OpARM64RORW(v)
   347  	case OpARM64SBCSflags:
   348  		return rewriteValueARM64_OpARM64SBCSflags(v)
   349  	case OpARM64SBFX:
   350  		return rewriteValueARM64_OpARM64SBFX(v)
   351  	case OpARM64SLL:
   352  		return rewriteValueARM64_OpARM64SLL(v)
   353  	case OpARM64SLLconst:
   354  		return rewriteValueARM64_OpARM64SLLconst(v)
   355  	case OpARM64SRA:
   356  		return rewriteValueARM64_OpARM64SRA(v)
   357  	case OpARM64SRAconst:
   358  		return rewriteValueARM64_OpARM64SRAconst(v)
   359  	case OpARM64SRL:
   360  		return rewriteValueARM64_OpARM64SRL(v)
   361  	case OpARM64SRLconst:
   362  		return rewriteValueARM64_OpARM64SRLconst(v)
   363  	case OpARM64STP:
   364  		return rewriteValueARM64_OpARM64STP(v)
   365  	case OpARM64SUB:
   366  		return rewriteValueARM64_OpARM64SUB(v)
   367  	case OpARM64SUBconst:
   368  		return rewriteValueARM64_OpARM64SUBconst(v)
   369  	case OpARM64SUBshiftLL:
   370  		return rewriteValueARM64_OpARM64SUBshiftLL(v)
   371  	case OpARM64SUBshiftRA:
   372  		return rewriteValueARM64_OpARM64SUBshiftRA(v)
   373  	case OpARM64SUBshiftRL:
   374  		return rewriteValueARM64_OpARM64SUBshiftRL(v)
   375  	case OpARM64TST:
   376  		return rewriteValueARM64_OpARM64TST(v)
   377  	case OpARM64TSTW:
   378  		return rewriteValueARM64_OpARM64TSTW(v)
   379  	case OpARM64TSTWconst:
   380  		return rewriteValueARM64_OpARM64TSTWconst(v)
   381  	case OpARM64TSTconst:
   382  		return rewriteValueARM64_OpARM64TSTconst(v)
   383  	case OpARM64TSTshiftLL:
   384  		return rewriteValueARM64_OpARM64TSTshiftLL(v)
   385  	case OpARM64TSTshiftRA:
   386  		return rewriteValueARM64_OpARM64TSTshiftRA(v)
   387  	case OpARM64TSTshiftRL:
   388  		return rewriteValueARM64_OpARM64TSTshiftRL(v)
   389  	case OpARM64TSTshiftRO:
   390  		return rewriteValueARM64_OpARM64TSTshiftRO(v)
   391  	case OpARM64UBFIZ:
   392  		return rewriteValueARM64_OpARM64UBFIZ(v)
   393  	case OpARM64UBFX:
   394  		return rewriteValueARM64_OpARM64UBFX(v)
   395  	case OpARM64UDIV:
   396  		return rewriteValueARM64_OpARM64UDIV(v)
   397  	case OpARM64UDIVW:
   398  		return rewriteValueARM64_OpARM64UDIVW(v)
   399  	case OpARM64UMOD:
   400  		return rewriteValueARM64_OpARM64UMOD(v)
   401  	case OpARM64UMODW:
   402  		return rewriteValueARM64_OpARM64UMODW(v)
   403  	case OpARM64XOR:
   404  		return rewriteValueARM64_OpARM64XOR(v)
   405  	case OpARM64XORconst:
   406  		return rewriteValueARM64_OpARM64XORconst(v)
   407  	case OpARM64XORshiftLL:
   408  		return rewriteValueARM64_OpARM64XORshiftLL(v)
   409  	case OpARM64XORshiftRA:
   410  		return rewriteValueARM64_OpARM64XORshiftRA(v)
   411  	case OpARM64XORshiftRL:
   412  		return rewriteValueARM64_OpARM64XORshiftRL(v)
   413  	case OpARM64XORshiftRO:
   414  		return rewriteValueARM64_OpARM64XORshiftRO(v)
   415  	case OpAbs:
   416  		v.Op = OpARM64FABSD
   417  		return true
   418  	case OpAdd16:
   419  		v.Op = OpARM64ADD
   420  		return true
   421  	case OpAdd32:
   422  		v.Op = OpARM64ADD
   423  		return true
   424  	case OpAdd32F:
   425  		v.Op = OpARM64FADDS
   426  		return true
   427  	case OpAdd64:
   428  		v.Op = OpARM64ADD
   429  		return true
   430  	case OpAdd64F:
   431  		v.Op = OpARM64FADDD
   432  		return true
   433  	case OpAdd8:
   434  		v.Op = OpARM64ADD
   435  		return true
   436  	case OpAddPtr:
   437  		v.Op = OpARM64ADD
   438  		return true
   439  	case OpAddr:
   440  		return rewriteValueARM64_OpAddr(v)
   441  	case OpAnd16:
   442  		v.Op = OpARM64AND
   443  		return true
   444  	case OpAnd32:
   445  		v.Op = OpARM64AND
   446  		return true
   447  	case OpAnd64:
   448  		v.Op = OpARM64AND
   449  		return true
   450  	case OpAnd8:
   451  		v.Op = OpARM64AND
   452  		return true
   453  	case OpAndB:
   454  		v.Op = OpARM64AND
   455  		return true
   456  	case OpAtomicAdd32:
   457  		v.Op = OpARM64LoweredAtomicAdd32
   458  		return true
   459  	case OpAtomicAdd32Variant:
   460  		v.Op = OpARM64LoweredAtomicAdd32Variant
   461  		return true
   462  	case OpAtomicAdd64:
   463  		v.Op = OpARM64LoweredAtomicAdd64
   464  		return true
   465  	case OpAtomicAdd64Variant:
   466  		v.Op = OpARM64LoweredAtomicAdd64Variant
   467  		return true
   468  	case OpAtomicAnd32value:
   469  		v.Op = OpARM64LoweredAtomicAnd32
   470  		return true
   471  	case OpAtomicAnd32valueVariant:
   472  		v.Op = OpARM64LoweredAtomicAnd32Variant
   473  		return true
   474  	case OpAtomicAnd64value:
   475  		v.Op = OpARM64LoweredAtomicAnd64
   476  		return true
   477  	case OpAtomicAnd64valueVariant:
   478  		v.Op = OpARM64LoweredAtomicAnd64Variant
   479  		return true
   480  	case OpAtomicAnd8value:
   481  		v.Op = OpARM64LoweredAtomicAnd8
   482  		return true
   483  	case OpAtomicAnd8valueVariant:
   484  		v.Op = OpARM64LoweredAtomicAnd8Variant
   485  		return true
   486  	case OpAtomicCompareAndSwap32:
   487  		v.Op = OpARM64LoweredAtomicCas32
   488  		return true
   489  	case OpAtomicCompareAndSwap32Variant:
   490  		v.Op = OpARM64LoweredAtomicCas32Variant
   491  		return true
   492  	case OpAtomicCompareAndSwap64:
   493  		v.Op = OpARM64LoweredAtomicCas64
   494  		return true
   495  	case OpAtomicCompareAndSwap64Variant:
   496  		v.Op = OpARM64LoweredAtomicCas64Variant
   497  		return true
   498  	case OpAtomicExchange32:
   499  		v.Op = OpARM64LoweredAtomicExchange32
   500  		return true
   501  	case OpAtomicExchange32Variant:
   502  		v.Op = OpARM64LoweredAtomicExchange32Variant
   503  		return true
   504  	case OpAtomicExchange64:
   505  		v.Op = OpARM64LoweredAtomicExchange64
   506  		return true
   507  	case OpAtomicExchange64Variant:
   508  		v.Op = OpARM64LoweredAtomicExchange64Variant
   509  		return true
   510  	case OpAtomicExchange8:
   511  		v.Op = OpARM64LoweredAtomicExchange8
   512  		return true
   513  	case OpAtomicExchange8Variant:
   514  		v.Op = OpARM64LoweredAtomicExchange8Variant
   515  		return true
   516  	case OpAtomicLoad32:
   517  		v.Op = OpARM64LDARW
   518  		return true
   519  	case OpAtomicLoad64:
   520  		v.Op = OpARM64LDAR
   521  		return true
   522  	case OpAtomicLoad8:
   523  		v.Op = OpARM64LDARB
   524  		return true
   525  	case OpAtomicLoadPtr:
   526  		v.Op = OpARM64LDAR
   527  		return true
   528  	case OpAtomicOr32value:
   529  		v.Op = OpARM64LoweredAtomicOr32
   530  		return true
   531  	case OpAtomicOr32valueVariant:
   532  		v.Op = OpARM64LoweredAtomicOr32Variant
   533  		return true
   534  	case OpAtomicOr64value:
   535  		v.Op = OpARM64LoweredAtomicOr64
   536  		return true
   537  	case OpAtomicOr64valueVariant:
   538  		v.Op = OpARM64LoweredAtomicOr64Variant
   539  		return true
   540  	case OpAtomicOr8value:
   541  		v.Op = OpARM64LoweredAtomicOr8
   542  		return true
   543  	case OpAtomicOr8valueVariant:
   544  		v.Op = OpARM64LoweredAtomicOr8Variant
   545  		return true
   546  	case OpAtomicStore32:
   547  		v.Op = OpARM64STLRW
   548  		return true
   549  	case OpAtomicStore64:
   550  		v.Op = OpARM64STLR
   551  		return true
   552  	case OpAtomicStore8:
   553  		v.Op = OpARM64STLRB
   554  		return true
   555  	case OpAtomicStorePtrNoWB:
   556  		v.Op = OpARM64STLR
   557  		return true
   558  	case OpAvg64u:
   559  		return rewriteValueARM64_OpAvg64u(v)
   560  	case OpBitLen16:
   561  		return rewriteValueARM64_OpBitLen16(v)
   562  	case OpBitLen32:
   563  		return rewriteValueARM64_OpBitLen32(v)
   564  	case OpBitLen64:
   565  		return rewriteValueARM64_OpBitLen64(v)
   566  	case OpBitLen8:
   567  		return rewriteValueARM64_OpBitLen8(v)
   568  	case OpBitRev16:
   569  		return rewriteValueARM64_OpBitRev16(v)
   570  	case OpBitRev32:
   571  		v.Op = OpARM64RBITW
   572  		return true
   573  	case OpBitRev64:
   574  		v.Op = OpARM64RBIT
   575  		return true
   576  	case OpBitRev8:
   577  		return rewriteValueARM64_OpBitRev8(v)
   578  	case OpBswap16:
   579  		v.Op = OpARM64REV16W
   580  		return true
   581  	case OpBswap32:
   582  		v.Op = OpARM64REVW
   583  		return true
   584  	case OpBswap64:
   585  		v.Op = OpARM64REV
   586  		return true
   587  	case OpCeil:
   588  		v.Op = OpARM64FRINTPD
   589  		return true
   590  	case OpClosureCall:
   591  		v.Op = OpARM64CALLclosure
   592  		return true
   593  	case OpCom16:
   594  		v.Op = OpARM64MVN
   595  		return true
   596  	case OpCom32:
   597  		v.Op = OpARM64MVN
   598  		return true
   599  	case OpCom64:
   600  		v.Op = OpARM64MVN
   601  		return true
   602  	case OpCom8:
   603  		v.Op = OpARM64MVN
   604  		return true
   605  	case OpCondSelect:
   606  		return rewriteValueARM64_OpCondSelect(v)
   607  	case OpConst16:
   608  		return rewriteValueARM64_OpConst16(v)
   609  	case OpConst32:
   610  		return rewriteValueARM64_OpConst32(v)
   611  	case OpConst32F:
   612  		return rewriteValueARM64_OpConst32F(v)
   613  	case OpConst64:
   614  		return rewriteValueARM64_OpConst64(v)
   615  	case OpConst64F:
   616  		return rewriteValueARM64_OpConst64F(v)
   617  	case OpConst8:
   618  		return rewriteValueARM64_OpConst8(v)
   619  	case OpConstBool:
   620  		return rewriteValueARM64_OpConstBool(v)
   621  	case OpConstNil:
   622  		return rewriteValueARM64_OpConstNil(v)
   623  	case OpCtz16:
   624  		return rewriteValueARM64_OpCtz16(v)
   625  	case OpCtz16NonZero:
   626  		v.Op = OpCtz32
   627  		return true
   628  	case OpCtz32:
   629  		return rewriteValueARM64_OpCtz32(v)
   630  	case OpCtz32NonZero:
   631  		v.Op = OpCtz32
   632  		return true
   633  	case OpCtz64:
   634  		return rewriteValueARM64_OpCtz64(v)
   635  	case OpCtz64NonZero:
   636  		v.Op = OpCtz64
   637  		return true
   638  	case OpCtz8:
   639  		return rewriteValueARM64_OpCtz8(v)
   640  	case OpCtz8NonZero:
   641  		v.Op = OpCtz32
   642  		return true
   643  	case OpCvt32Fto32:
   644  		v.Op = OpARM64FCVTZSSW
   645  		return true
   646  	case OpCvt32Fto32U:
   647  		v.Op = OpARM64FCVTZUSW
   648  		return true
   649  	case OpCvt32Fto64:
   650  		v.Op = OpARM64FCVTZSS
   651  		return true
   652  	case OpCvt32Fto64F:
   653  		v.Op = OpARM64FCVTSD
   654  		return true
   655  	case OpCvt32Fto64U:
   656  		v.Op = OpARM64FCVTZUS
   657  		return true
   658  	case OpCvt32Uto32F:
   659  		v.Op = OpARM64UCVTFWS
   660  		return true
   661  	case OpCvt32Uto64F:
   662  		v.Op = OpARM64UCVTFWD
   663  		return true
   664  	case OpCvt32to32F:
   665  		v.Op = OpARM64SCVTFWS
   666  		return true
   667  	case OpCvt32to64F:
   668  		v.Op = OpARM64SCVTFWD
   669  		return true
   670  	case OpCvt64Fto32:
   671  		v.Op = OpARM64FCVTZSDW
   672  		return true
   673  	case OpCvt64Fto32F:
   674  		v.Op = OpARM64FCVTDS
   675  		return true
   676  	case OpCvt64Fto32U:
   677  		v.Op = OpARM64FCVTZUDW
   678  		return true
   679  	case OpCvt64Fto64:
   680  		v.Op = OpARM64FCVTZSD
   681  		return true
   682  	case OpCvt64Fto64U:
   683  		v.Op = OpARM64FCVTZUD
   684  		return true
   685  	case OpCvt64Uto32F:
   686  		v.Op = OpARM64UCVTFS
   687  		return true
   688  	case OpCvt64Uto64F:
   689  		v.Op = OpARM64UCVTFD
   690  		return true
   691  	case OpCvt64to32F:
   692  		v.Op = OpARM64SCVTFS
   693  		return true
   694  	case OpCvt64to64F:
   695  		v.Op = OpARM64SCVTFD
   696  		return true
   697  	case OpCvtBoolToUint8:
   698  		v.Op = OpCopy
   699  		return true
   700  	case OpDiv16:
   701  		return rewriteValueARM64_OpDiv16(v)
   702  	case OpDiv16u:
   703  		return rewriteValueARM64_OpDiv16u(v)
   704  	case OpDiv32:
   705  		return rewriteValueARM64_OpDiv32(v)
   706  	case OpDiv32F:
   707  		v.Op = OpARM64FDIVS
   708  		return true
   709  	case OpDiv32u:
   710  		v.Op = OpARM64UDIVW
   711  		return true
   712  	case OpDiv64:
   713  		return rewriteValueARM64_OpDiv64(v)
   714  	case OpDiv64F:
   715  		v.Op = OpARM64FDIVD
   716  		return true
   717  	case OpDiv64u:
   718  		v.Op = OpARM64UDIV
   719  		return true
   720  	case OpDiv8:
   721  		return rewriteValueARM64_OpDiv8(v)
   722  	case OpDiv8u:
   723  		return rewriteValueARM64_OpDiv8u(v)
   724  	case OpEq16:
   725  		return rewriteValueARM64_OpEq16(v)
   726  	case OpEq32:
   727  		return rewriteValueARM64_OpEq32(v)
   728  	case OpEq32F:
   729  		return rewriteValueARM64_OpEq32F(v)
   730  	case OpEq64:
   731  		return rewriteValueARM64_OpEq64(v)
   732  	case OpEq64F:
   733  		return rewriteValueARM64_OpEq64F(v)
   734  	case OpEq8:
   735  		return rewriteValueARM64_OpEq8(v)
   736  	case OpEqB:
   737  		return rewriteValueARM64_OpEqB(v)
   738  	case OpEqPtr:
   739  		return rewriteValueARM64_OpEqPtr(v)
   740  	case OpFMA:
   741  		return rewriteValueARM64_OpFMA(v)
   742  	case OpFloor:
   743  		v.Op = OpARM64FRINTMD
   744  		return true
   745  	case OpGetCallerPC:
   746  		v.Op = OpARM64LoweredGetCallerPC
   747  		return true
   748  	case OpGetCallerSP:
   749  		v.Op = OpARM64LoweredGetCallerSP
   750  		return true
   751  	case OpGetClosurePtr:
   752  		v.Op = OpARM64LoweredGetClosurePtr
   753  		return true
   754  	case OpHmul32:
   755  		return rewriteValueARM64_OpHmul32(v)
   756  	case OpHmul32u:
   757  		return rewriteValueARM64_OpHmul32u(v)
   758  	case OpHmul64:
   759  		v.Op = OpARM64MULH
   760  		return true
   761  	case OpHmul64u:
   762  		v.Op = OpARM64UMULH
   763  		return true
   764  	case OpInterCall:
   765  		v.Op = OpARM64CALLinter
   766  		return true
   767  	case OpIsInBounds:
   768  		return rewriteValueARM64_OpIsInBounds(v)
   769  	case OpIsNonNil:
   770  		return rewriteValueARM64_OpIsNonNil(v)
   771  	case OpIsSliceInBounds:
   772  		return rewriteValueARM64_OpIsSliceInBounds(v)
   773  	case OpLeq16:
   774  		return rewriteValueARM64_OpLeq16(v)
   775  	case OpLeq16U:
   776  		return rewriteValueARM64_OpLeq16U(v)
   777  	case OpLeq32:
   778  		return rewriteValueARM64_OpLeq32(v)
   779  	case OpLeq32F:
   780  		return rewriteValueARM64_OpLeq32F(v)
   781  	case OpLeq32U:
   782  		return rewriteValueARM64_OpLeq32U(v)
   783  	case OpLeq64:
   784  		return rewriteValueARM64_OpLeq64(v)
   785  	case OpLeq64F:
   786  		return rewriteValueARM64_OpLeq64F(v)
   787  	case OpLeq64U:
   788  		return rewriteValueARM64_OpLeq64U(v)
   789  	case OpLeq8:
   790  		return rewriteValueARM64_OpLeq8(v)
   791  	case OpLeq8U:
   792  		return rewriteValueARM64_OpLeq8U(v)
   793  	case OpLess16:
   794  		return rewriteValueARM64_OpLess16(v)
   795  	case OpLess16U:
   796  		return rewriteValueARM64_OpLess16U(v)
   797  	case OpLess32:
   798  		return rewriteValueARM64_OpLess32(v)
   799  	case OpLess32F:
   800  		return rewriteValueARM64_OpLess32F(v)
   801  	case OpLess32U:
   802  		return rewriteValueARM64_OpLess32U(v)
   803  	case OpLess64:
   804  		return rewriteValueARM64_OpLess64(v)
   805  	case OpLess64F:
   806  		return rewriteValueARM64_OpLess64F(v)
   807  	case OpLess64U:
   808  		return rewriteValueARM64_OpLess64U(v)
   809  	case OpLess8:
   810  		return rewriteValueARM64_OpLess8(v)
   811  	case OpLess8U:
   812  		return rewriteValueARM64_OpLess8U(v)
   813  	case OpLoad:
   814  		return rewriteValueARM64_OpLoad(v)
   815  	case OpLocalAddr:
   816  		return rewriteValueARM64_OpLocalAddr(v)
   817  	case OpLsh16x16:
   818  		v.Op = OpLsh64x16
   819  		return true
   820  	case OpLsh16x32:
   821  		v.Op = OpLsh64x32
   822  		return true
   823  	case OpLsh16x64:
   824  		v.Op = OpLsh64x64
   825  		return true
   826  	case OpLsh16x8:
   827  		v.Op = OpLsh64x8
   828  		return true
   829  	case OpLsh32x16:
   830  		v.Op = OpLsh64x16
   831  		return true
   832  	case OpLsh32x32:
   833  		v.Op = OpLsh64x32
   834  		return true
   835  	case OpLsh32x64:
   836  		v.Op = OpLsh64x64
   837  		return true
   838  	case OpLsh32x8:
   839  		v.Op = OpLsh64x8
   840  		return true
   841  	case OpLsh64x16:
   842  		return rewriteValueARM64_OpLsh64x16(v)
   843  	case OpLsh64x32:
   844  		return rewriteValueARM64_OpLsh64x32(v)
   845  	case OpLsh64x64:
   846  		return rewriteValueARM64_OpLsh64x64(v)
   847  	case OpLsh64x8:
   848  		return rewriteValueARM64_OpLsh64x8(v)
   849  	case OpLsh8x16:
   850  		v.Op = OpLsh64x16
   851  		return true
   852  	case OpLsh8x32:
   853  		v.Op = OpLsh64x32
   854  		return true
   855  	case OpLsh8x64:
   856  		v.Op = OpLsh64x64
   857  		return true
   858  	case OpLsh8x8:
   859  		v.Op = OpLsh64x8
   860  		return true
   861  	case OpMax32F:
   862  		v.Op = OpARM64FMAXS
   863  		return true
   864  	case OpMax64F:
   865  		v.Op = OpARM64FMAXD
   866  		return true
   867  	case OpMemEq:
   868  		v.Op = OpARM64LoweredMemEq
   869  		return true
   870  	case OpMin32F:
   871  		v.Op = OpARM64FMINS
   872  		return true
   873  	case OpMin64F:
   874  		v.Op = OpARM64FMIND
   875  		return true
   876  	case OpMod16:
   877  		return rewriteValueARM64_OpMod16(v)
   878  	case OpMod16u:
   879  		return rewriteValueARM64_OpMod16u(v)
   880  	case OpMod32:
   881  		return rewriteValueARM64_OpMod32(v)
   882  	case OpMod32u:
   883  		v.Op = OpARM64UMODW
   884  		return true
   885  	case OpMod64:
   886  		return rewriteValueARM64_OpMod64(v)
   887  	case OpMod64u:
   888  		v.Op = OpARM64UMOD
   889  		return true
   890  	case OpMod8:
   891  		return rewriteValueARM64_OpMod8(v)
   892  	case OpMod8u:
   893  		return rewriteValueARM64_OpMod8u(v)
   894  	case OpMove:
   895  		return rewriteValueARM64_OpMove(v)
   896  	case OpMul16:
   897  		v.Op = OpARM64MULW
   898  		return true
   899  	case OpMul32:
   900  		v.Op = OpARM64MULW
   901  		return true
   902  	case OpMul32F:
   903  		v.Op = OpARM64FMULS
   904  		return true
   905  	case OpMul64:
   906  		v.Op = OpARM64MUL
   907  		return true
   908  	case OpMul64F:
   909  		v.Op = OpARM64FMULD
   910  		return true
   911  	case OpMul8:
   912  		v.Op = OpARM64MULW
   913  		return true
   914  	case OpNeg16:
   915  		v.Op = OpARM64NEG
   916  		return true
   917  	case OpNeg32:
   918  		v.Op = OpARM64NEG
   919  		return true
   920  	case OpNeg32F:
   921  		v.Op = OpARM64FNEGS
   922  		return true
   923  	case OpNeg64:
   924  		v.Op = OpARM64NEG
   925  		return true
   926  	case OpNeg64F:
   927  		v.Op = OpARM64FNEGD
   928  		return true
   929  	case OpNeg8:
   930  		v.Op = OpARM64NEG
   931  		return true
   932  	case OpNeq16:
   933  		return rewriteValueARM64_OpNeq16(v)
   934  	case OpNeq32:
   935  		return rewriteValueARM64_OpNeq32(v)
   936  	case OpNeq32F:
   937  		return rewriteValueARM64_OpNeq32F(v)
   938  	case OpNeq64:
   939  		return rewriteValueARM64_OpNeq64(v)
   940  	case OpNeq64F:
   941  		return rewriteValueARM64_OpNeq64F(v)
   942  	case OpNeq8:
   943  		return rewriteValueARM64_OpNeq8(v)
   944  	case OpNeqB:
   945  		v.Op = OpARM64XOR
   946  		return true
   947  	case OpNeqPtr:
   948  		return rewriteValueARM64_OpNeqPtr(v)
   949  	case OpNilCheck:
   950  		v.Op = OpARM64LoweredNilCheck
   951  		return true
   952  	case OpNot:
   953  		return rewriteValueARM64_OpNot(v)
   954  	case OpOffPtr:
   955  		return rewriteValueARM64_OpOffPtr(v)
   956  	case OpOr16:
   957  		v.Op = OpARM64OR
   958  		return true
   959  	case OpOr32:
   960  		v.Op = OpARM64OR
   961  		return true
   962  	case OpOr64:
   963  		v.Op = OpARM64OR
   964  		return true
   965  	case OpOr8:
   966  		v.Op = OpARM64OR
   967  		return true
   968  	case OpOrB:
   969  		v.Op = OpARM64OR
   970  		return true
   971  	case OpPanicBounds:
   972  		v.Op = OpARM64LoweredPanicBoundsRR
   973  		return true
   974  	case OpPopCount16:
   975  		return rewriteValueARM64_OpPopCount16(v)
   976  	case OpPopCount32:
   977  		return rewriteValueARM64_OpPopCount32(v)
   978  	case OpPopCount64:
   979  		return rewriteValueARM64_OpPopCount64(v)
   980  	case OpPrefetchCache:
   981  		return rewriteValueARM64_OpPrefetchCache(v)
   982  	case OpPrefetchCacheStreamed:
   983  		return rewriteValueARM64_OpPrefetchCacheStreamed(v)
   984  	case OpPubBarrier:
   985  		return rewriteValueARM64_OpPubBarrier(v)
   986  	case OpRotateLeft16:
   987  		return rewriteValueARM64_OpRotateLeft16(v)
   988  	case OpRotateLeft32:
   989  		return rewriteValueARM64_OpRotateLeft32(v)
   990  	case OpRotateLeft64:
   991  		return rewriteValueARM64_OpRotateLeft64(v)
   992  	case OpRotateLeft8:
   993  		return rewriteValueARM64_OpRotateLeft8(v)
   994  	case OpRound:
   995  		v.Op = OpARM64FRINTAD
   996  		return true
   997  	case OpRound32F:
   998  		v.Op = OpARM64LoweredRound32F
   999  		return true
  1000  	case OpRound64F:
  1001  		v.Op = OpARM64LoweredRound64F
  1002  		return true
  1003  	case OpRoundToEven:
  1004  		v.Op = OpARM64FRINTND
  1005  		return true
  1006  	case OpRsh16Ux16:
  1007  		return rewriteValueARM64_OpRsh16Ux16(v)
  1008  	case OpRsh16Ux32:
  1009  		return rewriteValueARM64_OpRsh16Ux32(v)
  1010  	case OpRsh16Ux64:
  1011  		return rewriteValueARM64_OpRsh16Ux64(v)
  1012  	case OpRsh16Ux8:
  1013  		return rewriteValueARM64_OpRsh16Ux8(v)
  1014  	case OpRsh16x16:
  1015  		return rewriteValueARM64_OpRsh16x16(v)
  1016  	case OpRsh16x32:
  1017  		return rewriteValueARM64_OpRsh16x32(v)
  1018  	case OpRsh16x64:
  1019  		return rewriteValueARM64_OpRsh16x64(v)
  1020  	case OpRsh16x8:
  1021  		return rewriteValueARM64_OpRsh16x8(v)
  1022  	case OpRsh32Ux16:
  1023  		return rewriteValueARM64_OpRsh32Ux16(v)
  1024  	case OpRsh32Ux32:
  1025  		return rewriteValueARM64_OpRsh32Ux32(v)
  1026  	case OpRsh32Ux64:
  1027  		return rewriteValueARM64_OpRsh32Ux64(v)
  1028  	case OpRsh32Ux8:
  1029  		return rewriteValueARM64_OpRsh32Ux8(v)
  1030  	case OpRsh32x16:
  1031  		return rewriteValueARM64_OpRsh32x16(v)
  1032  	case OpRsh32x32:
  1033  		return rewriteValueARM64_OpRsh32x32(v)
  1034  	case OpRsh32x64:
  1035  		return rewriteValueARM64_OpRsh32x64(v)
  1036  	case OpRsh32x8:
  1037  		return rewriteValueARM64_OpRsh32x8(v)
  1038  	case OpRsh64Ux16:
  1039  		return rewriteValueARM64_OpRsh64Ux16(v)
  1040  	case OpRsh64Ux32:
  1041  		return rewriteValueARM64_OpRsh64Ux32(v)
  1042  	case OpRsh64Ux64:
  1043  		return rewriteValueARM64_OpRsh64Ux64(v)
  1044  	case OpRsh64Ux8:
  1045  		return rewriteValueARM64_OpRsh64Ux8(v)
  1046  	case OpRsh64x16:
  1047  		return rewriteValueARM64_OpRsh64x16(v)
  1048  	case OpRsh64x32:
  1049  		return rewriteValueARM64_OpRsh64x32(v)
  1050  	case OpRsh64x64:
  1051  		return rewriteValueARM64_OpRsh64x64(v)
  1052  	case OpRsh64x8:
  1053  		return rewriteValueARM64_OpRsh64x8(v)
  1054  	case OpRsh8Ux16:
  1055  		return rewriteValueARM64_OpRsh8Ux16(v)
  1056  	case OpRsh8Ux32:
  1057  		return rewriteValueARM64_OpRsh8Ux32(v)
  1058  	case OpRsh8Ux64:
  1059  		return rewriteValueARM64_OpRsh8Ux64(v)
  1060  	case OpRsh8Ux8:
  1061  		return rewriteValueARM64_OpRsh8Ux8(v)
  1062  	case OpRsh8x16:
  1063  		return rewriteValueARM64_OpRsh8x16(v)
  1064  	case OpRsh8x32:
  1065  		return rewriteValueARM64_OpRsh8x32(v)
  1066  	case OpRsh8x64:
  1067  		return rewriteValueARM64_OpRsh8x64(v)
  1068  	case OpRsh8x8:
  1069  		return rewriteValueARM64_OpRsh8x8(v)
  1070  	case OpSelect0:
  1071  		return rewriteValueARM64_OpSelect0(v)
  1072  	case OpSelect1:
  1073  		return rewriteValueARM64_OpSelect1(v)
  1074  	case OpSelectN:
  1075  		return rewriteValueARM64_OpSelectN(v)
  1076  	case OpSignExt16to32:
  1077  		v.Op = OpARM64MOVHreg
  1078  		return true
  1079  	case OpSignExt16to64:
  1080  		v.Op = OpARM64MOVHreg
  1081  		return true
  1082  	case OpSignExt32to64:
  1083  		v.Op = OpARM64MOVWreg
  1084  		return true
  1085  	case OpSignExt8to16:
  1086  		v.Op = OpARM64MOVBreg
  1087  		return true
  1088  	case OpSignExt8to32:
  1089  		v.Op = OpARM64MOVBreg
  1090  		return true
  1091  	case OpSignExt8to64:
  1092  		v.Op = OpARM64MOVBreg
  1093  		return true
  1094  	case OpSlicemask:
  1095  		return rewriteValueARM64_OpSlicemask(v)
  1096  	case OpSqrt:
  1097  		v.Op = OpARM64FSQRTD
  1098  		return true
  1099  	case OpSqrt32:
  1100  		v.Op = OpARM64FSQRTS
  1101  		return true
  1102  	case OpStaticCall:
  1103  		v.Op = OpARM64CALLstatic
  1104  		return true
  1105  	case OpStore:
  1106  		return rewriteValueARM64_OpStore(v)
  1107  	case OpSub16:
  1108  		v.Op = OpARM64SUB
  1109  		return true
  1110  	case OpSub32:
  1111  		v.Op = OpARM64SUB
  1112  		return true
  1113  	case OpSub32F:
  1114  		v.Op = OpARM64FSUBS
  1115  		return true
  1116  	case OpSub64:
  1117  		v.Op = OpARM64SUB
  1118  		return true
  1119  	case OpSub64F:
  1120  		v.Op = OpARM64FSUBD
  1121  		return true
  1122  	case OpSub8:
  1123  		v.Op = OpARM64SUB
  1124  		return true
  1125  	case OpSubPtr:
  1126  		v.Op = OpARM64SUB
  1127  		return true
  1128  	case OpTailCall:
  1129  		v.Op = OpARM64CALLtail
  1130  		return true
  1131  	case OpTailCallInter:
  1132  		v.Op = OpARM64CALLtailinter
  1133  		return true
  1134  	case OpTrunc:
  1135  		v.Op = OpARM64FRINTZD
  1136  		return true
  1137  	case OpTrunc16to8:
  1138  		v.Op = OpCopy
  1139  		return true
  1140  	case OpTrunc32to16:
  1141  		v.Op = OpCopy
  1142  		return true
  1143  	case OpTrunc32to8:
  1144  		v.Op = OpCopy
  1145  		return true
  1146  	case OpTrunc64to16:
  1147  		v.Op = OpCopy
  1148  		return true
  1149  	case OpTrunc64to32:
  1150  		v.Op = OpCopy
  1151  		return true
  1152  	case OpTrunc64to8:
  1153  		v.Op = OpCopy
  1154  		return true
  1155  	case OpWB:
  1156  		v.Op = OpARM64LoweredWB
  1157  		return true
  1158  	case OpXor16:
  1159  		v.Op = OpARM64XOR
  1160  		return true
  1161  	case OpXor32:
  1162  		v.Op = OpARM64XOR
  1163  		return true
  1164  	case OpXor64:
  1165  		v.Op = OpARM64XOR
  1166  		return true
  1167  	case OpXor8:
  1168  		v.Op = OpARM64XOR
  1169  		return true
  1170  	case OpZero:
  1171  		return rewriteValueARM64_OpZero(v)
  1172  	case OpZeroExt16to32:
  1173  		v.Op = OpARM64MOVHUreg
  1174  		return true
  1175  	case OpZeroExt16to64:
  1176  		v.Op = OpARM64MOVHUreg
  1177  		return true
  1178  	case OpZeroExt32to64:
  1179  		v.Op = OpARM64MOVWUreg
  1180  		return true
  1181  	case OpZeroExt8to16:
  1182  		v.Op = OpARM64MOVBUreg
  1183  		return true
  1184  	case OpZeroExt8to32:
  1185  		v.Op = OpARM64MOVBUreg
  1186  		return true
  1187  	case OpZeroExt8to64:
  1188  		v.Op = OpARM64MOVBUreg
  1189  		return true
  1190  	}
  1191  	return false
  1192  }
  1193  func rewriteValueARM64_OpARM64ADCSflags(v *Value) bool {
  1194  	v_2 := v.Args[2]
  1195  	v_1 := v.Args[1]
  1196  	v_0 := v.Args[0]
  1197  	b := v.Block
  1198  	typ := &b.Func.Config.Types
  1199  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c))))
  1200  	// result: (ADCSflags x y c)
  1201  	for {
  1202  		x := v_0
  1203  		y := v_1
  1204  		if v_2.Op != OpSelect1 || v_2.Type != types.TypeFlags {
  1205  			break
  1206  		}
  1207  		v_2_0 := v_2.Args[0]
  1208  		if v_2_0.Op != OpARM64ADDSconstflags || auxIntToInt64(v_2_0.AuxInt) != -1 {
  1209  			break
  1210  		}
  1211  		v_2_0_0 := v_2_0.Args[0]
  1212  		if v_2_0_0.Op != OpARM64ADCzerocarry || v_2_0_0.Type != typ.UInt64 {
  1213  			break
  1214  		}
  1215  		c := v_2_0_0.Args[0]
  1216  		v.reset(OpARM64ADCSflags)
  1217  		v.AddArg3(x, y, c)
  1218  		return true
  1219  	}
  1220  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0]))))
  1221  	// result: (ADDSflags x y)
  1222  	for {
  1223  		x := v_0
  1224  		y := v_1
  1225  		if v_2.Op != OpSelect1 || v_2.Type != types.TypeFlags {
  1226  			break
  1227  		}
  1228  		v_2_0 := v_2.Args[0]
  1229  		if v_2_0.Op != OpARM64ADDSconstflags || auxIntToInt64(v_2_0.AuxInt) != -1 {
  1230  			break
  1231  		}
  1232  		v_2_0_0 := v_2_0.Args[0]
  1233  		if v_2_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_2_0_0.AuxInt) != 0 {
  1234  			break
  1235  		}
  1236  		v.reset(OpARM64ADDSflags)
  1237  		v.AddArg2(x, y)
  1238  		return true
  1239  	}
  1240  	return false
  1241  }
  1242  func rewriteValueARM64_OpARM64ADD(v *Value) bool {
  1243  	v_1 := v.Args[1]
  1244  	v_0 := v.Args[0]
  1245  	b := v.Block
  1246  	// match: (ADD x (MOVDconst <t> [c]))
  1247  	// cond: !t.IsPtr()
  1248  	// result: (ADDconst [c] x)
  1249  	for {
  1250  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1251  			x := v_0
  1252  			if v_1.Op != OpARM64MOVDconst {
  1253  				continue
  1254  			}
  1255  			t := v_1.Type
  1256  			c := auxIntToInt64(v_1.AuxInt)
  1257  			if !(!t.IsPtr()) {
  1258  				continue
  1259  			}
  1260  			v.reset(OpARM64ADDconst)
  1261  			v.AuxInt = int64ToAuxInt(c)
  1262  			v.AddArg(x)
  1263  			return true
  1264  		}
  1265  		break
  1266  	}
  1267  	// match: (ADD a l:(MUL x y))
  1268  	// cond: l.Uses==1 && clobber(l)
  1269  	// result: (MADD a x y)
  1270  	for {
  1271  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1272  			a := v_0
  1273  			l := v_1
  1274  			if l.Op != OpARM64MUL {
  1275  				continue
  1276  			}
  1277  			y := l.Args[1]
  1278  			x := l.Args[0]
  1279  			if !(l.Uses == 1 && clobber(l)) {
  1280  				continue
  1281  			}
  1282  			v.reset(OpARM64MADD)
  1283  			v.AddArg3(a, x, y)
  1284  			return true
  1285  		}
  1286  		break
  1287  	}
  1288  	// match: (ADD a l:(MNEG x y))
  1289  	// cond: l.Uses==1 && clobber(l)
  1290  	// result: (MSUB a x y)
  1291  	for {
  1292  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1293  			a := v_0
  1294  			l := v_1
  1295  			if l.Op != OpARM64MNEG {
  1296  				continue
  1297  			}
  1298  			y := l.Args[1]
  1299  			x := l.Args[0]
  1300  			if !(l.Uses == 1 && clobber(l)) {
  1301  				continue
  1302  			}
  1303  			v.reset(OpARM64MSUB)
  1304  			v.AddArg3(a, x, y)
  1305  			return true
  1306  		}
  1307  		break
  1308  	}
  1309  	// match: (ADD a l:(MULW x y))
  1310  	// cond: v.Type.Size() <= 4 && l.Uses==1 && clobber(l)
  1311  	// result: (MADDW a x y)
  1312  	for {
  1313  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1314  			a := v_0
  1315  			l := v_1
  1316  			if l.Op != OpARM64MULW {
  1317  				continue
  1318  			}
  1319  			y := l.Args[1]
  1320  			x := l.Args[0]
  1321  			if !(v.Type.Size() <= 4 && l.Uses == 1 && clobber(l)) {
  1322  				continue
  1323  			}
  1324  			v.reset(OpARM64MADDW)
  1325  			v.AddArg3(a, x, y)
  1326  			return true
  1327  		}
  1328  		break
  1329  	}
  1330  	// match: (ADD a l:(MNEGW x y))
  1331  	// cond: v.Type.Size() <= 4 && l.Uses==1 && clobber(l)
  1332  	// result: (MSUBW a x y)
  1333  	for {
  1334  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1335  			a := v_0
  1336  			l := v_1
  1337  			if l.Op != OpARM64MNEGW {
  1338  				continue
  1339  			}
  1340  			y := l.Args[1]
  1341  			x := l.Args[0]
  1342  			if !(v.Type.Size() <= 4 && l.Uses == 1 && clobber(l)) {
  1343  				continue
  1344  			}
  1345  			v.reset(OpARM64MSUBW)
  1346  			v.AddArg3(a, x, y)
  1347  			return true
  1348  		}
  1349  		break
  1350  	}
  1351  	// match: (ADD <t> a p:(ADDconst [c] m:(MUL _ _)))
  1352  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1353  	// result: (ADDconst [c] (ADD <v.Type> a m))
  1354  	for {
  1355  		t := v.Type
  1356  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1357  			a := v_0
  1358  			p := v_1
  1359  			if p.Op != OpARM64ADDconst {
  1360  				continue
  1361  			}
  1362  			c := auxIntToInt64(p.AuxInt)
  1363  			m := p.Args[0]
  1364  			if m.Op != OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1365  				continue
  1366  			}
  1367  			v.reset(OpARM64ADDconst)
  1368  			v.AuxInt = int64ToAuxInt(c)
  1369  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1370  			v0.AddArg2(a, m)
  1371  			v.AddArg(v0)
  1372  			return true
  1373  		}
  1374  		break
  1375  	}
  1376  	// match: (ADD <t> a p:(ADDconst [c] m:(MULW _ _)))
  1377  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1378  	// result: (ADDconst [c] (ADD <v.Type> a m))
  1379  	for {
  1380  		t := v.Type
  1381  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1382  			a := v_0
  1383  			p := v_1
  1384  			if p.Op != OpARM64ADDconst {
  1385  				continue
  1386  			}
  1387  			c := auxIntToInt64(p.AuxInt)
  1388  			m := p.Args[0]
  1389  			if m.Op != OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1390  				continue
  1391  			}
  1392  			v.reset(OpARM64ADDconst)
  1393  			v.AuxInt = int64ToAuxInt(c)
  1394  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1395  			v0.AddArg2(a, m)
  1396  			v.AddArg(v0)
  1397  			return true
  1398  		}
  1399  		break
  1400  	}
  1401  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEG _ _)))
  1402  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1403  	// result: (ADDconst [c] (ADD <v.Type> a m))
  1404  	for {
  1405  		t := v.Type
  1406  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1407  			a := v_0
  1408  			p := v_1
  1409  			if p.Op != OpARM64ADDconst {
  1410  				continue
  1411  			}
  1412  			c := auxIntToInt64(p.AuxInt)
  1413  			m := p.Args[0]
  1414  			if m.Op != OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1415  				continue
  1416  			}
  1417  			v.reset(OpARM64ADDconst)
  1418  			v.AuxInt = int64ToAuxInt(c)
  1419  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1420  			v0.AddArg2(a, m)
  1421  			v.AddArg(v0)
  1422  			return true
  1423  		}
  1424  		break
  1425  	}
  1426  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEGW _ _)))
  1427  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1428  	// result: (ADDconst [c] (ADD <v.Type> a m))
  1429  	for {
  1430  		t := v.Type
  1431  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1432  			a := v_0
  1433  			p := v_1
  1434  			if p.Op != OpARM64ADDconst {
  1435  				continue
  1436  			}
  1437  			c := auxIntToInt64(p.AuxInt)
  1438  			m := p.Args[0]
  1439  			if m.Op != OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1440  				continue
  1441  			}
  1442  			v.reset(OpARM64ADDconst)
  1443  			v.AuxInt = int64ToAuxInt(c)
  1444  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1445  			v0.AddArg2(a, m)
  1446  			v.AddArg(v0)
  1447  			return true
  1448  		}
  1449  		break
  1450  	}
  1451  	// match: (ADD <t> a p:(SUBconst [c] m:(MUL _ _)))
  1452  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1453  	// result: (SUBconst [c] (ADD <v.Type> a m))
  1454  	for {
  1455  		t := v.Type
  1456  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1457  			a := v_0
  1458  			p := v_1
  1459  			if p.Op != OpARM64SUBconst {
  1460  				continue
  1461  			}
  1462  			c := auxIntToInt64(p.AuxInt)
  1463  			m := p.Args[0]
  1464  			if m.Op != OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1465  				continue
  1466  			}
  1467  			v.reset(OpARM64SUBconst)
  1468  			v.AuxInt = int64ToAuxInt(c)
  1469  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1470  			v0.AddArg2(a, m)
  1471  			v.AddArg(v0)
  1472  			return true
  1473  		}
  1474  		break
  1475  	}
  1476  	// match: (ADD <t> a p:(SUBconst [c] m:(MULW _ _)))
  1477  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1478  	// result: (SUBconst [c] (ADD <v.Type> a m))
  1479  	for {
  1480  		t := v.Type
  1481  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1482  			a := v_0
  1483  			p := v_1
  1484  			if p.Op != OpARM64SUBconst {
  1485  				continue
  1486  			}
  1487  			c := auxIntToInt64(p.AuxInt)
  1488  			m := p.Args[0]
  1489  			if m.Op != OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1490  				continue
  1491  			}
  1492  			v.reset(OpARM64SUBconst)
  1493  			v.AuxInt = int64ToAuxInt(c)
  1494  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1495  			v0.AddArg2(a, m)
  1496  			v.AddArg(v0)
  1497  			return true
  1498  		}
  1499  		break
  1500  	}
  1501  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEG _ _)))
  1502  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1503  	// result: (SUBconst [c] (ADD <v.Type> a m))
  1504  	for {
  1505  		t := v.Type
  1506  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1507  			a := v_0
  1508  			p := v_1
  1509  			if p.Op != OpARM64SUBconst {
  1510  				continue
  1511  			}
  1512  			c := auxIntToInt64(p.AuxInt)
  1513  			m := p.Args[0]
  1514  			if m.Op != OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1515  				continue
  1516  			}
  1517  			v.reset(OpARM64SUBconst)
  1518  			v.AuxInt = int64ToAuxInt(c)
  1519  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1520  			v0.AddArg2(a, m)
  1521  			v.AddArg(v0)
  1522  			return true
  1523  		}
  1524  		break
  1525  	}
  1526  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEGW _ _)))
  1527  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  1528  	// result: (SUBconst [c] (ADD <v.Type> a m))
  1529  	for {
  1530  		t := v.Type
  1531  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1532  			a := v_0
  1533  			p := v_1
  1534  			if p.Op != OpARM64SUBconst {
  1535  				continue
  1536  			}
  1537  			c := auxIntToInt64(p.AuxInt)
  1538  			m := p.Args[0]
  1539  			if m.Op != OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  1540  				continue
  1541  			}
  1542  			v.reset(OpARM64SUBconst)
  1543  			v.AuxInt = int64ToAuxInt(c)
  1544  			v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
  1545  			v0.AddArg2(a, m)
  1546  			v.AddArg(v0)
  1547  			return true
  1548  		}
  1549  		break
  1550  	}
  1551  	// match: (ADD x (NEG y))
  1552  	// result: (SUB x y)
  1553  	for {
  1554  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1555  			x := v_0
  1556  			if v_1.Op != OpARM64NEG {
  1557  				continue
  1558  			}
  1559  			y := v_1.Args[0]
  1560  			v.reset(OpARM64SUB)
  1561  			v.AddArg2(x, y)
  1562  			return true
  1563  		}
  1564  		break
  1565  	}
  1566  	// match: (ADD x0 x1:(SLLconst [c] y))
  1567  	// cond: clobberIfDead(x1)
  1568  	// result: (ADDshiftLL x0 y [c])
  1569  	for {
  1570  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1571  			x0 := v_0
  1572  			x1 := v_1
  1573  			if x1.Op != OpARM64SLLconst {
  1574  				continue
  1575  			}
  1576  			c := auxIntToInt64(x1.AuxInt)
  1577  			y := x1.Args[0]
  1578  			if !(clobberIfDead(x1)) {
  1579  				continue
  1580  			}
  1581  			v.reset(OpARM64ADDshiftLL)
  1582  			v.AuxInt = int64ToAuxInt(c)
  1583  			v.AddArg2(x0, y)
  1584  			return true
  1585  		}
  1586  		break
  1587  	}
  1588  	// match: (ADD x0 x1:(SRLconst [c] y))
  1589  	// cond: clobberIfDead(x1)
  1590  	// result: (ADDshiftRL x0 y [c])
  1591  	for {
  1592  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1593  			x0 := v_0
  1594  			x1 := v_1
  1595  			if x1.Op != OpARM64SRLconst {
  1596  				continue
  1597  			}
  1598  			c := auxIntToInt64(x1.AuxInt)
  1599  			y := x1.Args[0]
  1600  			if !(clobberIfDead(x1)) {
  1601  				continue
  1602  			}
  1603  			v.reset(OpARM64ADDshiftRL)
  1604  			v.AuxInt = int64ToAuxInt(c)
  1605  			v.AddArg2(x0, y)
  1606  			return true
  1607  		}
  1608  		break
  1609  	}
  1610  	// match: (ADD x0 x1:(SRAconst [c] y))
  1611  	// cond: clobberIfDead(x1)
  1612  	// result: (ADDshiftRA x0 y [c])
  1613  	for {
  1614  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1615  			x0 := v_0
  1616  			x1 := v_1
  1617  			if x1.Op != OpARM64SRAconst {
  1618  				continue
  1619  			}
  1620  			c := auxIntToInt64(x1.AuxInt)
  1621  			y := x1.Args[0]
  1622  			if !(clobberIfDead(x1)) {
  1623  				continue
  1624  			}
  1625  			v.reset(OpARM64ADDshiftRA)
  1626  			v.AuxInt = int64ToAuxInt(c)
  1627  			v.AddArg2(x0, y)
  1628  			return true
  1629  		}
  1630  		break
  1631  	}
  1632  	// match: (ADD x0 x1:(ANDshiftRA x2:(SLLconst [sl] y) z [63]))
  1633  	// cond: x1.Uses == 1 && x2.Uses == 1
  1634  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  1635  	for {
  1636  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1637  			x0 := v_0
  1638  			x1 := v_1
  1639  			if x1.Op != OpARM64ANDshiftRA || auxIntToInt64(x1.AuxInt) != 63 {
  1640  				continue
  1641  			}
  1642  			z := x1.Args[1]
  1643  			x2 := x1.Args[0]
  1644  			if x2.Op != OpARM64SLLconst {
  1645  				continue
  1646  			}
  1647  			sl := auxIntToInt64(x2.AuxInt)
  1648  			y := x2.Args[0]
  1649  			if !(x1.Uses == 1 && x2.Uses == 1) {
  1650  				continue
  1651  			}
  1652  			v.reset(OpARM64ADDshiftLL)
  1653  			v.AuxInt = int64ToAuxInt(sl)
  1654  			v0 := b.NewValue0(v.Pos, OpARM64ANDshiftRA, y.Type)
  1655  			v0.AuxInt = int64ToAuxInt(63)
  1656  			v0.AddArg2(y, z)
  1657  			v.AddArg2(x0, v0)
  1658  			return true
  1659  		}
  1660  		break
  1661  	}
  1662  	// match: (ADD x0 x1:(ANDshiftLL x2:(SRAconst [63] z) y [sl]))
  1663  	// cond: x1.Uses == 1 && x2.Uses == 1
  1664  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  1665  	for {
  1666  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1667  			x0 := v_0
  1668  			x1 := v_1
  1669  			if x1.Op != OpARM64ANDshiftLL {
  1670  				continue
  1671  			}
  1672  			sl := auxIntToInt64(x1.AuxInt)
  1673  			y := x1.Args[1]
  1674  			x2 := x1.Args[0]
  1675  			if x2.Op != OpARM64SRAconst || auxIntToInt64(x2.AuxInt) != 63 {
  1676  				continue
  1677  			}
  1678  			z := x2.Args[0]
  1679  			if !(x1.Uses == 1 && x2.Uses == 1) {
  1680  				continue
  1681  			}
  1682  			v.reset(OpARM64ADDshiftLL)
  1683  			v.AuxInt = int64ToAuxInt(sl)
  1684  			v0 := b.NewValue0(v.Pos, OpARM64ANDshiftRA, y.Type)
  1685  			v0.AuxInt = int64ToAuxInt(63)
  1686  			v0.AddArg2(y, z)
  1687  			v.AddArg2(x0, v0)
  1688  			return true
  1689  		}
  1690  		break
  1691  	}
  1692  	return false
  1693  }
  1694  func rewriteValueARM64_OpARM64ADDSflags(v *Value) bool {
  1695  	v_1 := v.Args[1]
  1696  	v_0 := v.Args[0]
  1697  	// match: (ADDSflags x (MOVDconst [c]))
  1698  	// result: (ADDSconstflags [c] x)
  1699  	for {
  1700  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1701  			x := v_0
  1702  			if v_1.Op != OpARM64MOVDconst {
  1703  				continue
  1704  			}
  1705  			c := auxIntToInt64(v_1.AuxInt)
  1706  			v.reset(OpARM64ADDSconstflags)
  1707  			v.AuxInt = int64ToAuxInt(c)
  1708  			v.AddArg(x)
  1709  			return true
  1710  		}
  1711  		break
  1712  	}
  1713  	return false
  1714  }
  1715  func rewriteValueARM64_OpARM64ADDconst(v *Value) bool {
  1716  	v_0 := v.Args[0]
  1717  	// match: (ADDconst [off1] (MOVDaddr [off2] {sym} ptr))
  1718  	// cond: is32Bit(off1+int64(off2))
  1719  	// result: (MOVDaddr [int32(off1)+off2] {sym} ptr)
  1720  	for {
  1721  		off1 := auxIntToInt64(v.AuxInt)
  1722  		if v_0.Op != OpARM64MOVDaddr {
  1723  			break
  1724  		}
  1725  		off2 := auxIntToInt32(v_0.AuxInt)
  1726  		sym := auxToSym(v_0.Aux)
  1727  		ptr := v_0.Args[0]
  1728  		if !(is32Bit(off1 + int64(off2))) {
  1729  			break
  1730  		}
  1731  		v.reset(OpARM64MOVDaddr)
  1732  		v.AuxInt = int32ToAuxInt(int32(off1) + off2)
  1733  		v.Aux = symToAux(sym)
  1734  		v.AddArg(ptr)
  1735  		return true
  1736  	}
  1737  	// match: (ADDconst [c] y)
  1738  	// cond: c < 0
  1739  	// result: (SUBconst [-c] y)
  1740  	for {
  1741  		c := auxIntToInt64(v.AuxInt)
  1742  		y := v_0
  1743  		if !(c < 0) {
  1744  			break
  1745  		}
  1746  		v.reset(OpARM64SUBconst)
  1747  		v.AuxInt = int64ToAuxInt(-c)
  1748  		v.AddArg(y)
  1749  		return true
  1750  	}
  1751  	// match: (ADDconst [0] x)
  1752  	// result: x
  1753  	for {
  1754  		if auxIntToInt64(v.AuxInt) != 0 {
  1755  			break
  1756  		}
  1757  		x := v_0
  1758  		v.copyOf(x)
  1759  		return true
  1760  	}
  1761  	// match: (ADDconst [c] (MOVDconst [d]))
  1762  	// result: (MOVDconst [c+d])
  1763  	for {
  1764  		c := auxIntToInt64(v.AuxInt)
  1765  		if v_0.Op != OpARM64MOVDconst {
  1766  			break
  1767  		}
  1768  		d := auxIntToInt64(v_0.AuxInt)
  1769  		v.reset(OpARM64MOVDconst)
  1770  		v.AuxInt = int64ToAuxInt(c + d)
  1771  		return true
  1772  	}
  1773  	// match: (ADDconst [c] (ADDconst [d] x))
  1774  	// result: (ADDconst [c+d] x)
  1775  	for {
  1776  		c := auxIntToInt64(v.AuxInt)
  1777  		if v_0.Op != OpARM64ADDconst {
  1778  			break
  1779  		}
  1780  		d := auxIntToInt64(v_0.AuxInt)
  1781  		x := v_0.Args[0]
  1782  		v.reset(OpARM64ADDconst)
  1783  		v.AuxInt = int64ToAuxInt(c + d)
  1784  		v.AddArg(x)
  1785  		return true
  1786  	}
  1787  	// match: (ADDconst [c] (SUBconst [d] x))
  1788  	// result: (ADDconst [c-d] x)
  1789  	for {
  1790  		c := auxIntToInt64(v.AuxInt)
  1791  		if v_0.Op != OpARM64SUBconst {
  1792  			break
  1793  		}
  1794  		d := auxIntToInt64(v_0.AuxInt)
  1795  		x := v_0.Args[0]
  1796  		v.reset(OpARM64ADDconst)
  1797  		v.AuxInt = int64ToAuxInt(c - d)
  1798  		v.AddArg(x)
  1799  		return true
  1800  	}
  1801  	return false
  1802  }
  1803  func rewriteValueARM64_OpARM64ADDshiftLL(v *Value) bool {
  1804  	v_1 := v.Args[1]
  1805  	v_0 := v.Args[0]
  1806  	b := v.Block
  1807  	typ := &b.Func.Config.Types
  1808  	// match: (ADDshiftLL (MOVDconst [c]) x [d])
  1809  	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
  1810  	for {
  1811  		d := auxIntToInt64(v.AuxInt)
  1812  		if v_0.Op != OpARM64MOVDconst {
  1813  			break
  1814  		}
  1815  		c := auxIntToInt64(v_0.AuxInt)
  1816  		x := v_1
  1817  		v.reset(OpARM64ADDconst)
  1818  		v.AuxInt = int64ToAuxInt(c)
  1819  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  1820  		v0.AuxInt = int64ToAuxInt(d)
  1821  		v0.AddArg(x)
  1822  		v.AddArg(v0)
  1823  		return true
  1824  	}
  1825  	// match: (ADDshiftLL x (MOVDconst [c]) [d])
  1826  	// result: (ADDconst x [int64(uint64(c)<<uint64(d))])
  1827  	for {
  1828  		d := auxIntToInt64(v.AuxInt)
  1829  		x := v_0
  1830  		if v_1.Op != OpARM64MOVDconst {
  1831  			break
  1832  		}
  1833  		c := auxIntToInt64(v_1.AuxInt)
  1834  		v.reset(OpARM64ADDconst)
  1835  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  1836  		v.AddArg(x)
  1837  		return true
  1838  	}
  1839  	// match: (ADDshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [armBFAuxInt(8, 8)] x) x)
  1840  	// result: (REV16W x)
  1841  	for {
  1842  		if v.Type != typ.UInt16 || auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || v_0.Type != typ.UInt16 || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 8) {
  1843  			break
  1844  		}
  1845  		x := v_0.Args[0]
  1846  		if x != v_1 {
  1847  			break
  1848  		}
  1849  		v.reset(OpARM64REV16W)
  1850  		v.AddArg(x)
  1851  		return true
  1852  	}
  1853  	// match: (ADDshiftLL [8] (UBFX [armBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
  1854  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
  1855  	// result: (REV16W x)
  1856  	for {
  1857  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 24) {
  1858  			break
  1859  		}
  1860  		v_0_0 := v_0.Args[0]
  1861  		if v_0_0.Op != OpARM64ANDconst {
  1862  			break
  1863  		}
  1864  		c1 := auxIntToInt64(v_0_0.AuxInt)
  1865  		x := v_0_0.Args[0]
  1866  		if v_1.Op != OpARM64ANDconst {
  1867  			break
  1868  		}
  1869  		c2 := auxIntToInt64(v_1.AuxInt)
  1870  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
  1871  			break
  1872  		}
  1873  		v.reset(OpARM64REV16W)
  1874  		v.AddArg(x)
  1875  		return true
  1876  	}
  1877  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  1878  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
  1879  	// result: (REV16 x)
  1880  	for {
  1881  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 8 {
  1882  			break
  1883  		}
  1884  		v_0_0 := v_0.Args[0]
  1885  		if v_0_0.Op != OpARM64ANDconst {
  1886  			break
  1887  		}
  1888  		c1 := auxIntToInt64(v_0_0.AuxInt)
  1889  		x := v_0_0.Args[0]
  1890  		if v_1.Op != OpARM64ANDconst {
  1891  			break
  1892  		}
  1893  		c2 := auxIntToInt64(v_1.AuxInt)
  1894  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
  1895  			break
  1896  		}
  1897  		v.reset(OpARM64REV16)
  1898  		v.AddArg(x)
  1899  		return true
  1900  	}
  1901  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  1902  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
  1903  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
  1904  	for {
  1905  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 8 {
  1906  			break
  1907  		}
  1908  		v_0_0 := v_0.Args[0]
  1909  		if v_0_0.Op != OpARM64ANDconst {
  1910  			break
  1911  		}
  1912  		c1 := auxIntToInt64(v_0_0.AuxInt)
  1913  		x := v_0_0.Args[0]
  1914  		if v_1.Op != OpARM64ANDconst {
  1915  			break
  1916  		}
  1917  		c2 := auxIntToInt64(v_1.AuxInt)
  1918  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
  1919  			break
  1920  		}
  1921  		v.reset(OpARM64REV16)
  1922  		v0 := b.NewValue0(v.Pos, OpARM64ANDconst, x.Type)
  1923  		v0.AuxInt = int64ToAuxInt(0xffffffff)
  1924  		v0.AddArg(x)
  1925  		v.AddArg(v0)
  1926  		return true
  1927  	}
  1928  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x2)
  1929  	// result: (EXTRconst [64-c] x2 x)
  1930  	for {
  1931  		c := auxIntToInt64(v.AuxInt)
  1932  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 64-c {
  1933  			break
  1934  		}
  1935  		x := v_0.Args[0]
  1936  		x2 := v_1
  1937  		v.reset(OpARM64EXTRconst)
  1938  		v.AuxInt = int64ToAuxInt(64 - c)
  1939  		v.AddArg2(x2, x)
  1940  		return true
  1941  	}
  1942  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x2)
  1943  	// cond: c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
  1944  	// result: (EXTRWconst [32-c] x2 x)
  1945  	for {
  1946  		t := v.Type
  1947  		c := auxIntToInt64(v.AuxInt)
  1948  		if v_0.Op != OpARM64UBFX {
  1949  			break
  1950  		}
  1951  		bfc := auxIntToArm64BitField(v_0.AuxInt)
  1952  		x := v_0.Args[0]
  1953  		x2 := v_1
  1954  		if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
  1955  			break
  1956  		}
  1957  		v.reset(OpARM64EXTRWconst)
  1958  		v.AuxInt = int64ToAuxInt(32 - c)
  1959  		v.AddArg2(x2, x)
  1960  		return true
  1961  	}
  1962  	return false
  1963  }
  1964  func rewriteValueARM64_OpARM64ADDshiftRA(v *Value) bool {
  1965  	v_1 := v.Args[1]
  1966  	v_0 := v.Args[0]
  1967  	b := v.Block
  1968  	// match: (ADDshiftRA (MOVDconst [c]) x [d])
  1969  	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
  1970  	for {
  1971  		d := auxIntToInt64(v.AuxInt)
  1972  		if v_0.Op != OpARM64MOVDconst {
  1973  			break
  1974  		}
  1975  		c := auxIntToInt64(v_0.AuxInt)
  1976  		x := v_1
  1977  		v.reset(OpARM64ADDconst)
  1978  		v.AuxInt = int64ToAuxInt(c)
  1979  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  1980  		v0.AuxInt = int64ToAuxInt(d)
  1981  		v0.AddArg(x)
  1982  		v.AddArg(v0)
  1983  		return true
  1984  	}
  1985  	// match: (ADDshiftRA x (MOVDconst [c]) [d])
  1986  	// result: (ADDconst x [c>>uint64(d)])
  1987  	for {
  1988  		d := auxIntToInt64(v.AuxInt)
  1989  		x := v_0
  1990  		if v_1.Op != OpARM64MOVDconst {
  1991  			break
  1992  		}
  1993  		c := auxIntToInt64(v_1.AuxInt)
  1994  		v.reset(OpARM64ADDconst)
  1995  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  1996  		v.AddArg(x)
  1997  		return true
  1998  	}
  1999  	return false
  2000  }
  2001  func rewriteValueARM64_OpARM64ADDshiftRL(v *Value) bool {
  2002  	v_1 := v.Args[1]
  2003  	v_0 := v.Args[0]
  2004  	b := v.Block
  2005  	// match: (ADDshiftRL (MOVDconst [c]) x [d])
  2006  	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
  2007  	for {
  2008  		d := auxIntToInt64(v.AuxInt)
  2009  		if v_0.Op != OpARM64MOVDconst {
  2010  			break
  2011  		}
  2012  		c := auxIntToInt64(v_0.AuxInt)
  2013  		x := v_1
  2014  		v.reset(OpARM64ADDconst)
  2015  		v.AuxInt = int64ToAuxInt(c)
  2016  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  2017  		v0.AuxInt = int64ToAuxInt(d)
  2018  		v0.AddArg(x)
  2019  		v.AddArg(v0)
  2020  		return true
  2021  	}
  2022  	// match: (ADDshiftRL x (MOVDconst [c]) [d])
  2023  	// result: (ADDconst x [int64(uint64(c)>>uint64(d))])
  2024  	for {
  2025  		d := auxIntToInt64(v.AuxInt)
  2026  		x := v_0
  2027  		if v_1.Op != OpARM64MOVDconst {
  2028  			break
  2029  		}
  2030  		c := auxIntToInt64(v_1.AuxInt)
  2031  		v.reset(OpARM64ADDconst)
  2032  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  2033  		v.AddArg(x)
  2034  		return true
  2035  	}
  2036  	return false
  2037  }
  2038  func rewriteValueARM64_OpARM64AND(v *Value) bool {
  2039  	v_1 := v.Args[1]
  2040  	v_0 := v.Args[0]
  2041  	// match: (AND x (MOVDconst [c]))
  2042  	// result: (ANDconst [c] x)
  2043  	for {
  2044  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2045  			x := v_0
  2046  			if v_1.Op != OpARM64MOVDconst {
  2047  				continue
  2048  			}
  2049  			c := auxIntToInt64(v_1.AuxInt)
  2050  			v.reset(OpARM64ANDconst)
  2051  			v.AuxInt = int64ToAuxInt(c)
  2052  			v.AddArg(x)
  2053  			return true
  2054  		}
  2055  		break
  2056  	}
  2057  	// match: (AND x x)
  2058  	// result: x
  2059  	for {
  2060  		x := v_0
  2061  		if x != v_1 {
  2062  			break
  2063  		}
  2064  		v.copyOf(x)
  2065  		return true
  2066  	}
  2067  	// match: (AND x (MVN y))
  2068  	// result: (BIC x y)
  2069  	for {
  2070  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2071  			x := v_0
  2072  			if v_1.Op != OpARM64MVN {
  2073  				continue
  2074  			}
  2075  			y := v_1.Args[0]
  2076  			v.reset(OpARM64BIC)
  2077  			v.AddArg2(x, y)
  2078  			return true
  2079  		}
  2080  		break
  2081  	}
  2082  	// match: (AND x0 x1:(SLLconst [c] y))
  2083  	// cond: clobberIfDead(x1)
  2084  	// result: (ANDshiftLL x0 y [c])
  2085  	for {
  2086  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2087  			x0 := v_0
  2088  			x1 := v_1
  2089  			if x1.Op != OpARM64SLLconst {
  2090  				continue
  2091  			}
  2092  			c := auxIntToInt64(x1.AuxInt)
  2093  			y := x1.Args[0]
  2094  			if !(clobberIfDead(x1)) {
  2095  				continue
  2096  			}
  2097  			v.reset(OpARM64ANDshiftLL)
  2098  			v.AuxInt = int64ToAuxInt(c)
  2099  			v.AddArg2(x0, y)
  2100  			return true
  2101  		}
  2102  		break
  2103  	}
  2104  	// match: (AND x0 x1:(SRLconst [c] y))
  2105  	// cond: clobberIfDead(x1)
  2106  	// result: (ANDshiftRL x0 y [c])
  2107  	for {
  2108  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2109  			x0 := v_0
  2110  			x1 := v_1
  2111  			if x1.Op != OpARM64SRLconst {
  2112  				continue
  2113  			}
  2114  			c := auxIntToInt64(x1.AuxInt)
  2115  			y := x1.Args[0]
  2116  			if !(clobberIfDead(x1)) {
  2117  				continue
  2118  			}
  2119  			v.reset(OpARM64ANDshiftRL)
  2120  			v.AuxInt = int64ToAuxInt(c)
  2121  			v.AddArg2(x0, y)
  2122  			return true
  2123  		}
  2124  		break
  2125  	}
  2126  	// match: (AND x0 x1:(SRAconst [c] y))
  2127  	// cond: clobberIfDead(x1)
  2128  	// result: (ANDshiftRA x0 y [c])
  2129  	for {
  2130  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2131  			x0 := v_0
  2132  			x1 := v_1
  2133  			if x1.Op != OpARM64SRAconst {
  2134  				continue
  2135  			}
  2136  			c := auxIntToInt64(x1.AuxInt)
  2137  			y := x1.Args[0]
  2138  			if !(clobberIfDead(x1)) {
  2139  				continue
  2140  			}
  2141  			v.reset(OpARM64ANDshiftRA)
  2142  			v.AuxInt = int64ToAuxInt(c)
  2143  			v.AddArg2(x0, y)
  2144  			return true
  2145  		}
  2146  		break
  2147  	}
  2148  	// match: (AND x0 x1:(RORconst [c] y))
  2149  	// cond: clobberIfDead(x1)
  2150  	// result: (ANDshiftRO x0 y [c])
  2151  	for {
  2152  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2153  			x0 := v_0
  2154  			x1 := v_1
  2155  			if x1.Op != OpARM64RORconst {
  2156  				continue
  2157  			}
  2158  			c := auxIntToInt64(x1.AuxInt)
  2159  			y := x1.Args[0]
  2160  			if !(clobberIfDead(x1)) {
  2161  				continue
  2162  			}
  2163  			v.reset(OpARM64ANDshiftRO)
  2164  			v.AuxInt = int64ToAuxInt(c)
  2165  			v.AddArg2(x0, y)
  2166  			return true
  2167  		}
  2168  		break
  2169  	}
  2170  	return false
  2171  }
  2172  func rewriteValueARM64_OpARM64ANDconst(v *Value) bool {
  2173  	v_0 := v.Args[0]
  2174  	// match: (ANDconst [0] _)
  2175  	// result: (MOVDconst [0])
  2176  	for {
  2177  		if auxIntToInt64(v.AuxInt) != 0 {
  2178  			break
  2179  		}
  2180  		v.reset(OpARM64MOVDconst)
  2181  		v.AuxInt = int64ToAuxInt(0)
  2182  		return true
  2183  	}
  2184  	// match: (ANDconst [-1] x)
  2185  	// result: x
  2186  	for {
  2187  		if auxIntToInt64(v.AuxInt) != -1 {
  2188  			break
  2189  		}
  2190  		x := v_0
  2191  		v.copyOf(x)
  2192  		return true
  2193  	}
  2194  	// match: (ANDconst [c] (MOVDconst [d]))
  2195  	// result: (MOVDconst [c&d])
  2196  	for {
  2197  		c := auxIntToInt64(v.AuxInt)
  2198  		if v_0.Op != OpARM64MOVDconst {
  2199  			break
  2200  		}
  2201  		d := auxIntToInt64(v_0.AuxInt)
  2202  		v.reset(OpARM64MOVDconst)
  2203  		v.AuxInt = int64ToAuxInt(c & d)
  2204  		return true
  2205  	}
  2206  	// match: (ANDconst [c] (ANDconst [d] x))
  2207  	// result: (ANDconst [c&d] x)
  2208  	for {
  2209  		c := auxIntToInt64(v.AuxInt)
  2210  		if v_0.Op != OpARM64ANDconst {
  2211  			break
  2212  		}
  2213  		d := auxIntToInt64(v_0.AuxInt)
  2214  		x := v_0.Args[0]
  2215  		v.reset(OpARM64ANDconst)
  2216  		v.AuxInt = int64ToAuxInt(c & d)
  2217  		v.AddArg(x)
  2218  		return true
  2219  	}
  2220  	// match: (ANDconst [c] (MOVWUreg x))
  2221  	// result: (ANDconst [c&(1<<32-1)] x)
  2222  	for {
  2223  		c := auxIntToInt64(v.AuxInt)
  2224  		if v_0.Op != OpARM64MOVWUreg {
  2225  			break
  2226  		}
  2227  		x := v_0.Args[0]
  2228  		v.reset(OpARM64ANDconst)
  2229  		v.AuxInt = int64ToAuxInt(c & (1<<32 - 1))
  2230  		v.AddArg(x)
  2231  		return true
  2232  	}
  2233  	// match: (ANDconst [c] (MOVHUreg x))
  2234  	// result: (ANDconst [c&(1<<16-1)] x)
  2235  	for {
  2236  		c := auxIntToInt64(v.AuxInt)
  2237  		if v_0.Op != OpARM64MOVHUreg {
  2238  			break
  2239  		}
  2240  		x := v_0.Args[0]
  2241  		v.reset(OpARM64ANDconst)
  2242  		v.AuxInt = int64ToAuxInt(c & (1<<16 - 1))
  2243  		v.AddArg(x)
  2244  		return true
  2245  	}
  2246  	// match: (ANDconst [c] (MOVBUreg x))
  2247  	// result: (ANDconst [c&(1<<8-1)] x)
  2248  	for {
  2249  		c := auxIntToInt64(v.AuxInt)
  2250  		if v_0.Op != OpARM64MOVBUreg {
  2251  			break
  2252  		}
  2253  		x := v_0.Args[0]
  2254  		v.reset(OpARM64ANDconst)
  2255  		v.AuxInt = int64ToAuxInt(c & (1<<8 - 1))
  2256  		v.AddArg(x)
  2257  		return true
  2258  	}
  2259  	// match: (ANDconst [ac] (SLLconst [sc] x))
  2260  	// cond: isARM64BFMask(sc, ac, sc)
  2261  	// result: (UBFIZ [armBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
  2262  	for {
  2263  		ac := auxIntToInt64(v.AuxInt)
  2264  		if v_0.Op != OpARM64SLLconst {
  2265  			break
  2266  		}
  2267  		sc := auxIntToInt64(v_0.AuxInt)
  2268  		x := v_0.Args[0]
  2269  		if !(isARM64BFMask(sc, ac, sc)) {
  2270  			break
  2271  		}
  2272  		v.reset(OpARM64UBFIZ)
  2273  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, sc)))
  2274  		v.AddArg(x)
  2275  		return true
  2276  	}
  2277  	// match: (ANDconst [ac] (SRLconst [sc] x))
  2278  	// cond: isARM64BFMask(sc, ac, 0)
  2279  	// result: (UBFX [armBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
  2280  	for {
  2281  		ac := auxIntToInt64(v.AuxInt)
  2282  		if v_0.Op != OpARM64SRLconst {
  2283  			break
  2284  		}
  2285  		sc := auxIntToInt64(v_0.AuxInt)
  2286  		x := v_0.Args[0]
  2287  		if !(isARM64BFMask(sc, ac, 0)) {
  2288  			break
  2289  		}
  2290  		v.reset(OpARM64UBFX)
  2291  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, 0)))
  2292  		v.AddArg(x)
  2293  		return true
  2294  	}
  2295  	// match: (ANDconst [c] (UBFX [bfc] x))
  2296  	// cond: isARM64BFMask(0, c, 0)
  2297  	// result: (UBFX [armBFAuxInt(bfc.lsb(), min(bfc.width(), arm64BFWidth(c, 0)))] x)
  2298  	for {
  2299  		c := auxIntToInt64(v.AuxInt)
  2300  		if v_0.Op != OpARM64UBFX {
  2301  			break
  2302  		}
  2303  		bfc := auxIntToArm64BitField(v_0.AuxInt)
  2304  		x := v_0.Args[0]
  2305  		if !(isARM64BFMask(0, c, 0)) {
  2306  			break
  2307  		}
  2308  		v.reset(OpARM64UBFX)
  2309  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb(), min(bfc.width(), arm64BFWidth(c, 0))))
  2310  		v.AddArg(x)
  2311  		return true
  2312  	}
  2313  	// match: (ANDconst [0xffffffff] x)
  2314  	// result: (MOVWUreg x)
  2315  	for {
  2316  		if auxIntToInt64(v.AuxInt) != 0xffffffff {
  2317  			break
  2318  		}
  2319  		x := v_0
  2320  		v.reset(OpARM64MOVWUreg)
  2321  		v.AddArg(x)
  2322  		return true
  2323  	}
  2324  	// match: (ANDconst [0xffff ] x)
  2325  	// result: (MOVHUreg x)
  2326  	for {
  2327  		if auxIntToInt64(v.AuxInt) != 0xffff {
  2328  			break
  2329  		}
  2330  		x := v_0
  2331  		v.reset(OpARM64MOVHUreg)
  2332  		v.AddArg(x)
  2333  		return true
  2334  	}
  2335  	// match: (ANDconst [0xff ] x)
  2336  	// result: (MOVBUreg x)
  2337  	for {
  2338  		if auxIntToInt64(v.AuxInt) != 0xff {
  2339  			break
  2340  		}
  2341  		x := v_0
  2342  		v.reset(OpARM64MOVBUreg)
  2343  		v.AddArg(x)
  2344  		return true
  2345  	}
  2346  	return false
  2347  }
  2348  func rewriteValueARM64_OpARM64ANDshiftLL(v *Value) bool {
  2349  	v_1 := v.Args[1]
  2350  	v_0 := v.Args[0]
  2351  	b := v.Block
  2352  	// match: (ANDshiftLL (MOVDconst [c]) x [d])
  2353  	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
  2354  	for {
  2355  		d := auxIntToInt64(v.AuxInt)
  2356  		if v_0.Op != OpARM64MOVDconst {
  2357  			break
  2358  		}
  2359  		c := auxIntToInt64(v_0.AuxInt)
  2360  		x := v_1
  2361  		v.reset(OpARM64ANDconst)
  2362  		v.AuxInt = int64ToAuxInt(c)
  2363  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  2364  		v0.AuxInt = int64ToAuxInt(d)
  2365  		v0.AddArg(x)
  2366  		v.AddArg(v0)
  2367  		return true
  2368  	}
  2369  	// match: (ANDshiftLL x (MOVDconst [c]) [d])
  2370  	// result: (ANDconst x [int64(uint64(c)<<uint64(d))])
  2371  	for {
  2372  		d := auxIntToInt64(v.AuxInt)
  2373  		x := v_0
  2374  		if v_1.Op != OpARM64MOVDconst {
  2375  			break
  2376  		}
  2377  		c := auxIntToInt64(v_1.AuxInt)
  2378  		v.reset(OpARM64ANDconst)
  2379  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  2380  		v.AddArg(x)
  2381  		return true
  2382  	}
  2383  	// match: (ANDshiftLL y:(SLLconst x [c]) x [c])
  2384  	// result: y
  2385  	for {
  2386  		c := auxIntToInt64(v.AuxInt)
  2387  		y := v_0
  2388  		if y.Op != OpARM64SLLconst || auxIntToInt64(y.AuxInt) != c {
  2389  			break
  2390  		}
  2391  		x := y.Args[0]
  2392  		if x != v_1 {
  2393  			break
  2394  		}
  2395  		v.copyOf(y)
  2396  		return true
  2397  	}
  2398  	return false
  2399  }
  2400  func rewriteValueARM64_OpARM64ANDshiftRA(v *Value) bool {
  2401  	v_1 := v.Args[1]
  2402  	v_0 := v.Args[0]
  2403  	b := v.Block
  2404  	// match: (ANDshiftRA (MOVDconst [c]) x [d])
  2405  	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
  2406  	for {
  2407  		d := auxIntToInt64(v.AuxInt)
  2408  		if v_0.Op != OpARM64MOVDconst {
  2409  			break
  2410  		}
  2411  		c := auxIntToInt64(v_0.AuxInt)
  2412  		x := v_1
  2413  		v.reset(OpARM64ANDconst)
  2414  		v.AuxInt = int64ToAuxInt(c)
  2415  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  2416  		v0.AuxInt = int64ToAuxInt(d)
  2417  		v0.AddArg(x)
  2418  		v.AddArg(v0)
  2419  		return true
  2420  	}
  2421  	// match: (ANDshiftRA x (MOVDconst [c]) [d])
  2422  	// result: (ANDconst x [c>>uint64(d)])
  2423  	for {
  2424  		d := auxIntToInt64(v.AuxInt)
  2425  		x := v_0
  2426  		if v_1.Op != OpARM64MOVDconst {
  2427  			break
  2428  		}
  2429  		c := auxIntToInt64(v_1.AuxInt)
  2430  		v.reset(OpARM64ANDconst)
  2431  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  2432  		v.AddArg(x)
  2433  		return true
  2434  	}
  2435  	// match: (ANDshiftRA y:(SRAconst x [c]) x [c])
  2436  	// result: y
  2437  	for {
  2438  		c := auxIntToInt64(v.AuxInt)
  2439  		y := v_0
  2440  		if y.Op != OpARM64SRAconst || auxIntToInt64(y.AuxInt) != c {
  2441  			break
  2442  		}
  2443  		x := y.Args[0]
  2444  		if x != v_1 {
  2445  			break
  2446  		}
  2447  		v.copyOf(y)
  2448  		return true
  2449  	}
  2450  	return false
  2451  }
  2452  func rewriteValueARM64_OpARM64ANDshiftRL(v *Value) bool {
  2453  	v_1 := v.Args[1]
  2454  	v_0 := v.Args[0]
  2455  	b := v.Block
  2456  	// match: (ANDshiftRL (MOVDconst [c]) x [d])
  2457  	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
  2458  	for {
  2459  		d := auxIntToInt64(v.AuxInt)
  2460  		if v_0.Op != OpARM64MOVDconst {
  2461  			break
  2462  		}
  2463  		c := auxIntToInt64(v_0.AuxInt)
  2464  		x := v_1
  2465  		v.reset(OpARM64ANDconst)
  2466  		v.AuxInt = int64ToAuxInt(c)
  2467  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  2468  		v0.AuxInt = int64ToAuxInt(d)
  2469  		v0.AddArg(x)
  2470  		v.AddArg(v0)
  2471  		return true
  2472  	}
  2473  	// match: (ANDshiftRL x (MOVDconst [c]) [d])
  2474  	// result: (ANDconst x [int64(uint64(c)>>uint64(d))])
  2475  	for {
  2476  		d := auxIntToInt64(v.AuxInt)
  2477  		x := v_0
  2478  		if v_1.Op != OpARM64MOVDconst {
  2479  			break
  2480  		}
  2481  		c := auxIntToInt64(v_1.AuxInt)
  2482  		v.reset(OpARM64ANDconst)
  2483  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  2484  		v.AddArg(x)
  2485  		return true
  2486  	}
  2487  	// match: (ANDshiftRL y:(SRLconst x [c]) x [c])
  2488  	// result: y
  2489  	for {
  2490  		c := auxIntToInt64(v.AuxInt)
  2491  		y := v_0
  2492  		if y.Op != OpARM64SRLconst || auxIntToInt64(y.AuxInt) != c {
  2493  			break
  2494  		}
  2495  		x := y.Args[0]
  2496  		if x != v_1 {
  2497  			break
  2498  		}
  2499  		v.copyOf(y)
  2500  		return true
  2501  	}
  2502  	return false
  2503  }
  2504  func rewriteValueARM64_OpARM64ANDshiftRO(v *Value) bool {
  2505  	v_1 := v.Args[1]
  2506  	v_0 := v.Args[0]
  2507  	b := v.Block
  2508  	// match: (ANDshiftRO (MOVDconst [c]) x [d])
  2509  	// result: (ANDconst [c] (RORconst <x.Type> x [d]))
  2510  	for {
  2511  		d := auxIntToInt64(v.AuxInt)
  2512  		if v_0.Op != OpARM64MOVDconst {
  2513  			break
  2514  		}
  2515  		c := auxIntToInt64(v_0.AuxInt)
  2516  		x := v_1
  2517  		v.reset(OpARM64ANDconst)
  2518  		v.AuxInt = int64ToAuxInt(c)
  2519  		v0 := b.NewValue0(v.Pos, OpARM64RORconst, x.Type)
  2520  		v0.AuxInt = int64ToAuxInt(d)
  2521  		v0.AddArg(x)
  2522  		v.AddArg(v0)
  2523  		return true
  2524  	}
  2525  	// match: (ANDshiftRO x (MOVDconst [c]) [d])
  2526  	// result: (ANDconst x [rotateRight64(c, d)])
  2527  	for {
  2528  		d := auxIntToInt64(v.AuxInt)
  2529  		x := v_0
  2530  		if v_1.Op != OpARM64MOVDconst {
  2531  			break
  2532  		}
  2533  		c := auxIntToInt64(v_1.AuxInt)
  2534  		v.reset(OpARM64ANDconst)
  2535  		v.AuxInt = int64ToAuxInt(rotateRight64(c, d))
  2536  		v.AddArg(x)
  2537  		return true
  2538  	}
  2539  	// match: (ANDshiftRO y:(RORconst x [c]) x [c])
  2540  	// result: y
  2541  	for {
  2542  		c := auxIntToInt64(v.AuxInt)
  2543  		y := v_0
  2544  		if y.Op != OpARM64RORconst || auxIntToInt64(y.AuxInt) != c {
  2545  			break
  2546  		}
  2547  		x := y.Args[0]
  2548  		if x != v_1 {
  2549  			break
  2550  		}
  2551  		v.copyOf(y)
  2552  		return true
  2553  	}
  2554  	return false
  2555  }
  2556  func rewriteValueARM64_OpARM64BIC(v *Value) bool {
  2557  	v_1 := v.Args[1]
  2558  	v_0 := v.Args[0]
  2559  	// match: (BIC x (MOVDconst [c]))
  2560  	// result: (ANDconst [^c] x)
  2561  	for {
  2562  		x := v_0
  2563  		if v_1.Op != OpARM64MOVDconst {
  2564  			break
  2565  		}
  2566  		c := auxIntToInt64(v_1.AuxInt)
  2567  		v.reset(OpARM64ANDconst)
  2568  		v.AuxInt = int64ToAuxInt(^c)
  2569  		v.AddArg(x)
  2570  		return true
  2571  	}
  2572  	// match: (BIC x x)
  2573  	// result: (MOVDconst [0])
  2574  	for {
  2575  		x := v_0
  2576  		if x != v_1 {
  2577  			break
  2578  		}
  2579  		v.reset(OpARM64MOVDconst)
  2580  		v.AuxInt = int64ToAuxInt(0)
  2581  		return true
  2582  	}
  2583  	// match: (BIC x0 x1:(SLLconst [c] y))
  2584  	// cond: clobberIfDead(x1)
  2585  	// result: (BICshiftLL x0 y [c])
  2586  	for {
  2587  		x0 := v_0
  2588  		x1 := v_1
  2589  		if x1.Op != OpARM64SLLconst {
  2590  			break
  2591  		}
  2592  		c := auxIntToInt64(x1.AuxInt)
  2593  		y := x1.Args[0]
  2594  		if !(clobberIfDead(x1)) {
  2595  			break
  2596  		}
  2597  		v.reset(OpARM64BICshiftLL)
  2598  		v.AuxInt = int64ToAuxInt(c)
  2599  		v.AddArg2(x0, y)
  2600  		return true
  2601  	}
  2602  	// match: (BIC x0 x1:(SRLconst [c] y))
  2603  	// cond: clobberIfDead(x1)
  2604  	// result: (BICshiftRL x0 y [c])
  2605  	for {
  2606  		x0 := v_0
  2607  		x1 := v_1
  2608  		if x1.Op != OpARM64SRLconst {
  2609  			break
  2610  		}
  2611  		c := auxIntToInt64(x1.AuxInt)
  2612  		y := x1.Args[0]
  2613  		if !(clobberIfDead(x1)) {
  2614  			break
  2615  		}
  2616  		v.reset(OpARM64BICshiftRL)
  2617  		v.AuxInt = int64ToAuxInt(c)
  2618  		v.AddArg2(x0, y)
  2619  		return true
  2620  	}
  2621  	// match: (BIC x0 x1:(SRAconst [c] y))
  2622  	// cond: clobberIfDead(x1)
  2623  	// result: (BICshiftRA x0 y [c])
  2624  	for {
  2625  		x0 := v_0
  2626  		x1 := v_1
  2627  		if x1.Op != OpARM64SRAconst {
  2628  			break
  2629  		}
  2630  		c := auxIntToInt64(x1.AuxInt)
  2631  		y := x1.Args[0]
  2632  		if !(clobberIfDead(x1)) {
  2633  			break
  2634  		}
  2635  		v.reset(OpARM64BICshiftRA)
  2636  		v.AuxInt = int64ToAuxInt(c)
  2637  		v.AddArg2(x0, y)
  2638  		return true
  2639  	}
  2640  	// match: (BIC x0 x1:(RORconst [c] y))
  2641  	// cond: clobberIfDead(x1)
  2642  	// result: (BICshiftRO x0 y [c])
  2643  	for {
  2644  		x0 := v_0
  2645  		x1 := v_1
  2646  		if x1.Op != OpARM64RORconst {
  2647  			break
  2648  		}
  2649  		c := auxIntToInt64(x1.AuxInt)
  2650  		y := x1.Args[0]
  2651  		if !(clobberIfDead(x1)) {
  2652  			break
  2653  		}
  2654  		v.reset(OpARM64BICshiftRO)
  2655  		v.AuxInt = int64ToAuxInt(c)
  2656  		v.AddArg2(x0, y)
  2657  		return true
  2658  	}
  2659  	return false
  2660  }
  2661  func rewriteValueARM64_OpARM64BICshiftLL(v *Value) bool {
  2662  	v_1 := v.Args[1]
  2663  	v_0 := v.Args[0]
  2664  	// match: (BICshiftLL x (MOVDconst [c]) [d])
  2665  	// result: (ANDconst x [^int64(uint64(c)<<uint64(d))])
  2666  	for {
  2667  		d := auxIntToInt64(v.AuxInt)
  2668  		x := v_0
  2669  		if v_1.Op != OpARM64MOVDconst {
  2670  			break
  2671  		}
  2672  		c := auxIntToInt64(v_1.AuxInt)
  2673  		v.reset(OpARM64ANDconst)
  2674  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  2675  		v.AddArg(x)
  2676  		return true
  2677  	}
  2678  	// match: (BICshiftLL (SLLconst x [c]) x [c])
  2679  	// result: (MOVDconst [0])
  2680  	for {
  2681  		c := auxIntToInt64(v.AuxInt)
  2682  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != c {
  2683  			break
  2684  		}
  2685  		x := v_0.Args[0]
  2686  		if x != v_1 {
  2687  			break
  2688  		}
  2689  		v.reset(OpARM64MOVDconst)
  2690  		v.AuxInt = int64ToAuxInt(0)
  2691  		return true
  2692  	}
  2693  	return false
  2694  }
  2695  func rewriteValueARM64_OpARM64BICshiftRA(v *Value) bool {
  2696  	v_1 := v.Args[1]
  2697  	v_0 := v.Args[0]
  2698  	// match: (BICshiftRA x (MOVDconst [c]) [d])
  2699  	// result: (ANDconst x [^(c>>uint64(d))])
  2700  	for {
  2701  		d := auxIntToInt64(v.AuxInt)
  2702  		x := v_0
  2703  		if v_1.Op != OpARM64MOVDconst {
  2704  			break
  2705  		}
  2706  		c := auxIntToInt64(v_1.AuxInt)
  2707  		v.reset(OpARM64ANDconst)
  2708  		v.AuxInt = int64ToAuxInt(^(c >> uint64(d)))
  2709  		v.AddArg(x)
  2710  		return true
  2711  	}
  2712  	// match: (BICshiftRA (SRAconst x [c]) x [c])
  2713  	// result: (MOVDconst [0])
  2714  	for {
  2715  		c := auxIntToInt64(v.AuxInt)
  2716  		if v_0.Op != OpARM64SRAconst || auxIntToInt64(v_0.AuxInt) != c {
  2717  			break
  2718  		}
  2719  		x := v_0.Args[0]
  2720  		if x != v_1 {
  2721  			break
  2722  		}
  2723  		v.reset(OpARM64MOVDconst)
  2724  		v.AuxInt = int64ToAuxInt(0)
  2725  		return true
  2726  	}
  2727  	return false
  2728  }
  2729  func rewriteValueARM64_OpARM64BICshiftRL(v *Value) bool {
  2730  	v_1 := v.Args[1]
  2731  	v_0 := v.Args[0]
  2732  	// match: (BICshiftRL x (MOVDconst [c]) [d])
  2733  	// result: (ANDconst x [^int64(uint64(c)>>uint64(d))])
  2734  	for {
  2735  		d := auxIntToInt64(v.AuxInt)
  2736  		x := v_0
  2737  		if v_1.Op != OpARM64MOVDconst {
  2738  			break
  2739  		}
  2740  		c := auxIntToInt64(v_1.AuxInt)
  2741  		v.reset(OpARM64ANDconst)
  2742  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  2743  		v.AddArg(x)
  2744  		return true
  2745  	}
  2746  	// match: (BICshiftRL (SRLconst x [c]) x [c])
  2747  	// result: (MOVDconst [0])
  2748  	for {
  2749  		c := auxIntToInt64(v.AuxInt)
  2750  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != c {
  2751  			break
  2752  		}
  2753  		x := v_0.Args[0]
  2754  		if x != v_1 {
  2755  			break
  2756  		}
  2757  		v.reset(OpARM64MOVDconst)
  2758  		v.AuxInt = int64ToAuxInt(0)
  2759  		return true
  2760  	}
  2761  	return false
  2762  }
  2763  func rewriteValueARM64_OpARM64BICshiftRO(v *Value) bool {
  2764  	v_1 := v.Args[1]
  2765  	v_0 := v.Args[0]
  2766  	// match: (BICshiftRO x (MOVDconst [c]) [d])
  2767  	// result: (ANDconst x [^rotateRight64(c, d)])
  2768  	for {
  2769  		d := auxIntToInt64(v.AuxInt)
  2770  		x := v_0
  2771  		if v_1.Op != OpARM64MOVDconst {
  2772  			break
  2773  		}
  2774  		c := auxIntToInt64(v_1.AuxInt)
  2775  		v.reset(OpARM64ANDconst)
  2776  		v.AuxInt = int64ToAuxInt(^rotateRight64(c, d))
  2777  		v.AddArg(x)
  2778  		return true
  2779  	}
  2780  	// match: (BICshiftRO (RORconst x [c]) x [c])
  2781  	// result: (MOVDconst [0])
  2782  	for {
  2783  		c := auxIntToInt64(v.AuxInt)
  2784  		if v_0.Op != OpARM64RORconst || auxIntToInt64(v_0.AuxInt) != c {
  2785  			break
  2786  		}
  2787  		x := v_0.Args[0]
  2788  		if x != v_1 {
  2789  			break
  2790  		}
  2791  		v.reset(OpARM64MOVDconst)
  2792  		v.AuxInt = int64ToAuxInt(0)
  2793  		return true
  2794  	}
  2795  	return false
  2796  }
  2797  func rewriteValueARM64_OpARM64CMN(v *Value) bool {
  2798  	v_1 := v.Args[1]
  2799  	v_0 := v.Args[0]
  2800  	// match: (CMN x (MOVDconst [c]))
  2801  	// result: (CMNconst [c] x)
  2802  	for {
  2803  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2804  			x := v_0
  2805  			if v_1.Op != OpARM64MOVDconst {
  2806  				continue
  2807  			}
  2808  			c := auxIntToInt64(v_1.AuxInt)
  2809  			v.reset(OpARM64CMNconst)
  2810  			v.AuxInt = int64ToAuxInt(c)
  2811  			v.AddArg(x)
  2812  			return true
  2813  		}
  2814  		break
  2815  	}
  2816  	// match: (CMN x0 x1:(SLLconst [c] y))
  2817  	// cond: clobberIfDead(x1)
  2818  	// result: (CMNshiftLL x0 y [c])
  2819  	for {
  2820  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2821  			x0 := v_0
  2822  			x1 := v_1
  2823  			if x1.Op != OpARM64SLLconst {
  2824  				continue
  2825  			}
  2826  			c := auxIntToInt64(x1.AuxInt)
  2827  			y := x1.Args[0]
  2828  			if !(clobberIfDead(x1)) {
  2829  				continue
  2830  			}
  2831  			v.reset(OpARM64CMNshiftLL)
  2832  			v.AuxInt = int64ToAuxInt(c)
  2833  			v.AddArg2(x0, y)
  2834  			return true
  2835  		}
  2836  		break
  2837  	}
  2838  	// match: (CMN x0 x1:(SRLconst [c] y))
  2839  	// cond: clobberIfDead(x1)
  2840  	// result: (CMNshiftRL x0 y [c])
  2841  	for {
  2842  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2843  			x0 := v_0
  2844  			x1 := v_1
  2845  			if x1.Op != OpARM64SRLconst {
  2846  				continue
  2847  			}
  2848  			c := auxIntToInt64(x1.AuxInt)
  2849  			y := x1.Args[0]
  2850  			if !(clobberIfDead(x1)) {
  2851  				continue
  2852  			}
  2853  			v.reset(OpARM64CMNshiftRL)
  2854  			v.AuxInt = int64ToAuxInt(c)
  2855  			v.AddArg2(x0, y)
  2856  			return true
  2857  		}
  2858  		break
  2859  	}
  2860  	// match: (CMN x0 x1:(SRAconst [c] y))
  2861  	// cond: clobberIfDead(x1)
  2862  	// result: (CMNshiftRA x0 y [c])
  2863  	for {
  2864  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2865  			x0 := v_0
  2866  			x1 := v_1
  2867  			if x1.Op != OpARM64SRAconst {
  2868  				continue
  2869  			}
  2870  			c := auxIntToInt64(x1.AuxInt)
  2871  			y := x1.Args[0]
  2872  			if !(clobberIfDead(x1)) {
  2873  				continue
  2874  			}
  2875  			v.reset(OpARM64CMNshiftRA)
  2876  			v.AuxInt = int64ToAuxInt(c)
  2877  			v.AddArg2(x0, y)
  2878  			return true
  2879  		}
  2880  		break
  2881  	}
  2882  	return false
  2883  }
  2884  func rewriteValueARM64_OpARM64CMNW(v *Value) bool {
  2885  	v_1 := v.Args[1]
  2886  	v_0 := v.Args[0]
  2887  	// match: (CMNW x (MOVDconst [c]))
  2888  	// result: (CMNWconst [int32(c)] x)
  2889  	for {
  2890  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2891  			x := v_0
  2892  			if v_1.Op != OpARM64MOVDconst {
  2893  				continue
  2894  			}
  2895  			c := auxIntToInt64(v_1.AuxInt)
  2896  			v.reset(OpARM64CMNWconst)
  2897  			v.AuxInt = int32ToAuxInt(int32(c))
  2898  			v.AddArg(x)
  2899  			return true
  2900  		}
  2901  		break
  2902  	}
  2903  	return false
  2904  }
  2905  func rewriteValueARM64_OpARM64CMNWconst(v *Value) bool {
  2906  	v_0 := v.Args[0]
  2907  	// match: (CMNWconst [c] y)
  2908  	// cond: c < 0 && c != -1<<31
  2909  	// result: (CMPWconst [-c] y)
  2910  	for {
  2911  		c := auxIntToInt32(v.AuxInt)
  2912  		y := v_0
  2913  		if !(c < 0 && c != -1<<31) {
  2914  			break
  2915  		}
  2916  		v.reset(OpARM64CMPWconst)
  2917  		v.AuxInt = int32ToAuxInt(-c)
  2918  		v.AddArg(y)
  2919  		return true
  2920  	}
  2921  	// match: (CMNWconst (MOVDconst [x]) [y])
  2922  	// result: (FlagConstant [addFlags32(int32(x),y)])
  2923  	for {
  2924  		y := auxIntToInt32(v.AuxInt)
  2925  		if v_0.Op != OpARM64MOVDconst {
  2926  			break
  2927  		}
  2928  		x := auxIntToInt64(v_0.AuxInt)
  2929  		v.reset(OpARM64FlagConstant)
  2930  		v.AuxInt = flagConstantToAuxInt(addFlags32(int32(x), y))
  2931  		return true
  2932  	}
  2933  	return false
  2934  }
  2935  func rewriteValueARM64_OpARM64CMNconst(v *Value) bool {
  2936  	v_0 := v.Args[0]
  2937  	// match: (CMNconst [c] y)
  2938  	// cond: c < 0 && c != -1<<63
  2939  	// result: (CMPconst [-c] y)
  2940  	for {
  2941  		c := auxIntToInt64(v.AuxInt)
  2942  		y := v_0
  2943  		if !(c < 0 && c != -1<<63) {
  2944  			break
  2945  		}
  2946  		v.reset(OpARM64CMPconst)
  2947  		v.AuxInt = int64ToAuxInt(-c)
  2948  		v.AddArg(y)
  2949  		return true
  2950  	}
  2951  	// match: (CMNconst (MOVDconst [x]) [y])
  2952  	// result: (FlagConstant [addFlags64(x,y)])
  2953  	for {
  2954  		y := auxIntToInt64(v.AuxInt)
  2955  		if v_0.Op != OpARM64MOVDconst {
  2956  			break
  2957  		}
  2958  		x := auxIntToInt64(v_0.AuxInt)
  2959  		v.reset(OpARM64FlagConstant)
  2960  		v.AuxInt = flagConstantToAuxInt(addFlags64(x, y))
  2961  		return true
  2962  	}
  2963  	return false
  2964  }
  2965  func rewriteValueARM64_OpARM64CMNshiftLL(v *Value) bool {
  2966  	v_1 := v.Args[1]
  2967  	v_0 := v.Args[0]
  2968  	b := v.Block
  2969  	// match: (CMNshiftLL (MOVDconst [c]) x [d])
  2970  	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
  2971  	for {
  2972  		d := auxIntToInt64(v.AuxInt)
  2973  		if v_0.Op != OpARM64MOVDconst {
  2974  			break
  2975  		}
  2976  		c := auxIntToInt64(v_0.AuxInt)
  2977  		x := v_1
  2978  		v.reset(OpARM64CMNconst)
  2979  		v.AuxInt = int64ToAuxInt(c)
  2980  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  2981  		v0.AuxInt = int64ToAuxInt(d)
  2982  		v0.AddArg(x)
  2983  		v.AddArg(v0)
  2984  		return true
  2985  	}
  2986  	// match: (CMNshiftLL x (MOVDconst [c]) [d])
  2987  	// result: (CMNconst x [int64(uint64(c)<<uint64(d))])
  2988  	for {
  2989  		d := auxIntToInt64(v.AuxInt)
  2990  		x := v_0
  2991  		if v_1.Op != OpARM64MOVDconst {
  2992  			break
  2993  		}
  2994  		c := auxIntToInt64(v_1.AuxInt)
  2995  		v.reset(OpARM64CMNconst)
  2996  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  2997  		v.AddArg(x)
  2998  		return true
  2999  	}
  3000  	return false
  3001  }
  3002  func rewriteValueARM64_OpARM64CMNshiftRA(v *Value) bool {
  3003  	v_1 := v.Args[1]
  3004  	v_0 := v.Args[0]
  3005  	b := v.Block
  3006  	// match: (CMNshiftRA (MOVDconst [c]) x [d])
  3007  	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
  3008  	for {
  3009  		d := auxIntToInt64(v.AuxInt)
  3010  		if v_0.Op != OpARM64MOVDconst {
  3011  			break
  3012  		}
  3013  		c := auxIntToInt64(v_0.AuxInt)
  3014  		x := v_1
  3015  		v.reset(OpARM64CMNconst)
  3016  		v.AuxInt = int64ToAuxInt(c)
  3017  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  3018  		v0.AuxInt = int64ToAuxInt(d)
  3019  		v0.AddArg(x)
  3020  		v.AddArg(v0)
  3021  		return true
  3022  	}
  3023  	// match: (CMNshiftRA x (MOVDconst [c]) [d])
  3024  	// result: (CMNconst x [c>>uint64(d)])
  3025  	for {
  3026  		d := auxIntToInt64(v.AuxInt)
  3027  		x := v_0
  3028  		if v_1.Op != OpARM64MOVDconst {
  3029  			break
  3030  		}
  3031  		c := auxIntToInt64(v_1.AuxInt)
  3032  		v.reset(OpARM64CMNconst)
  3033  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  3034  		v.AddArg(x)
  3035  		return true
  3036  	}
  3037  	return false
  3038  }
  3039  func rewriteValueARM64_OpARM64CMNshiftRL(v *Value) bool {
  3040  	v_1 := v.Args[1]
  3041  	v_0 := v.Args[0]
  3042  	b := v.Block
  3043  	// match: (CMNshiftRL (MOVDconst [c]) x [d])
  3044  	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
  3045  	for {
  3046  		d := auxIntToInt64(v.AuxInt)
  3047  		if v_0.Op != OpARM64MOVDconst {
  3048  			break
  3049  		}
  3050  		c := auxIntToInt64(v_0.AuxInt)
  3051  		x := v_1
  3052  		v.reset(OpARM64CMNconst)
  3053  		v.AuxInt = int64ToAuxInt(c)
  3054  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  3055  		v0.AuxInt = int64ToAuxInt(d)
  3056  		v0.AddArg(x)
  3057  		v.AddArg(v0)
  3058  		return true
  3059  	}
  3060  	// match: (CMNshiftRL x (MOVDconst [c]) [d])
  3061  	// result: (CMNconst x [int64(uint64(c)>>uint64(d))])
  3062  	for {
  3063  		d := auxIntToInt64(v.AuxInt)
  3064  		x := v_0
  3065  		if v_1.Op != OpARM64MOVDconst {
  3066  			break
  3067  		}
  3068  		c := auxIntToInt64(v_1.AuxInt)
  3069  		v.reset(OpARM64CMNconst)
  3070  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3071  		v.AddArg(x)
  3072  		return true
  3073  	}
  3074  	return false
  3075  }
  3076  func rewriteValueARM64_OpARM64CMP(v *Value) bool {
  3077  	v_1 := v.Args[1]
  3078  	v_0 := v.Args[0]
  3079  	b := v.Block
  3080  	// match: (CMP x (MOVDconst [c]))
  3081  	// result: (CMPconst [c] x)
  3082  	for {
  3083  		x := v_0
  3084  		if v_1.Op != OpARM64MOVDconst {
  3085  			break
  3086  		}
  3087  		c := auxIntToInt64(v_1.AuxInt)
  3088  		v.reset(OpARM64CMPconst)
  3089  		v.AuxInt = int64ToAuxInt(c)
  3090  		v.AddArg(x)
  3091  		return true
  3092  	}
  3093  	// match: (CMP (MOVDconst [c]) x)
  3094  	// result: (InvertFlags (CMPconst [c] x))
  3095  	for {
  3096  		if v_0.Op != OpARM64MOVDconst {
  3097  			break
  3098  		}
  3099  		c := auxIntToInt64(v_0.AuxInt)
  3100  		x := v_1
  3101  		v.reset(OpARM64InvertFlags)
  3102  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3103  		v0.AuxInt = int64ToAuxInt(c)
  3104  		v0.AddArg(x)
  3105  		v.AddArg(v0)
  3106  		return true
  3107  	}
  3108  	// match: (CMP x y)
  3109  	// cond: canonLessThan(x,y)
  3110  	// result: (InvertFlags (CMP y x))
  3111  	for {
  3112  		x := v_0
  3113  		y := v_1
  3114  		if !(canonLessThan(x, y)) {
  3115  			break
  3116  		}
  3117  		v.reset(OpARM64InvertFlags)
  3118  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
  3119  		v0.AddArg2(y, x)
  3120  		v.AddArg(v0)
  3121  		return true
  3122  	}
  3123  	// match: (CMP x0 x1:(SLLconst [c] y))
  3124  	// cond: clobberIfDead(x1)
  3125  	// result: (CMPshiftLL x0 y [c])
  3126  	for {
  3127  		x0 := v_0
  3128  		x1 := v_1
  3129  		if x1.Op != OpARM64SLLconst {
  3130  			break
  3131  		}
  3132  		c := auxIntToInt64(x1.AuxInt)
  3133  		y := x1.Args[0]
  3134  		if !(clobberIfDead(x1)) {
  3135  			break
  3136  		}
  3137  		v.reset(OpARM64CMPshiftLL)
  3138  		v.AuxInt = int64ToAuxInt(c)
  3139  		v.AddArg2(x0, y)
  3140  		return true
  3141  	}
  3142  	// match: (CMP x0:(SLLconst [c] y) x1)
  3143  	// cond: clobberIfDead(x0)
  3144  	// result: (InvertFlags (CMPshiftLL x1 y [c]))
  3145  	for {
  3146  		x0 := v_0
  3147  		if x0.Op != OpARM64SLLconst {
  3148  			break
  3149  		}
  3150  		c := auxIntToInt64(x0.AuxInt)
  3151  		y := x0.Args[0]
  3152  		x1 := v_1
  3153  		if !(clobberIfDead(x0)) {
  3154  			break
  3155  		}
  3156  		v.reset(OpARM64InvertFlags)
  3157  		v0 := b.NewValue0(v.Pos, OpARM64CMPshiftLL, types.TypeFlags)
  3158  		v0.AuxInt = int64ToAuxInt(c)
  3159  		v0.AddArg2(x1, y)
  3160  		v.AddArg(v0)
  3161  		return true
  3162  	}
  3163  	// match: (CMP x0 x1:(SRLconst [c] y))
  3164  	// cond: clobberIfDead(x1)
  3165  	// result: (CMPshiftRL x0 y [c])
  3166  	for {
  3167  		x0 := v_0
  3168  		x1 := v_1
  3169  		if x1.Op != OpARM64SRLconst {
  3170  			break
  3171  		}
  3172  		c := auxIntToInt64(x1.AuxInt)
  3173  		y := x1.Args[0]
  3174  		if !(clobberIfDead(x1)) {
  3175  			break
  3176  		}
  3177  		v.reset(OpARM64CMPshiftRL)
  3178  		v.AuxInt = int64ToAuxInt(c)
  3179  		v.AddArg2(x0, y)
  3180  		return true
  3181  	}
  3182  	// match: (CMP x0:(SRLconst [c] y) x1)
  3183  	// cond: clobberIfDead(x0)
  3184  	// result: (InvertFlags (CMPshiftRL x1 y [c]))
  3185  	for {
  3186  		x0 := v_0
  3187  		if x0.Op != OpARM64SRLconst {
  3188  			break
  3189  		}
  3190  		c := auxIntToInt64(x0.AuxInt)
  3191  		y := x0.Args[0]
  3192  		x1 := v_1
  3193  		if !(clobberIfDead(x0)) {
  3194  			break
  3195  		}
  3196  		v.reset(OpARM64InvertFlags)
  3197  		v0 := b.NewValue0(v.Pos, OpARM64CMPshiftRL, types.TypeFlags)
  3198  		v0.AuxInt = int64ToAuxInt(c)
  3199  		v0.AddArg2(x1, y)
  3200  		v.AddArg(v0)
  3201  		return true
  3202  	}
  3203  	// match: (CMP x0 x1:(SRAconst [c] y))
  3204  	// cond: clobberIfDead(x1)
  3205  	// result: (CMPshiftRA x0 y [c])
  3206  	for {
  3207  		x0 := v_0
  3208  		x1 := v_1
  3209  		if x1.Op != OpARM64SRAconst {
  3210  			break
  3211  		}
  3212  		c := auxIntToInt64(x1.AuxInt)
  3213  		y := x1.Args[0]
  3214  		if !(clobberIfDead(x1)) {
  3215  			break
  3216  		}
  3217  		v.reset(OpARM64CMPshiftRA)
  3218  		v.AuxInt = int64ToAuxInt(c)
  3219  		v.AddArg2(x0, y)
  3220  		return true
  3221  	}
  3222  	// match: (CMP x0:(SRAconst [c] y) x1)
  3223  	// cond: clobberIfDead(x0)
  3224  	// result: (InvertFlags (CMPshiftRA x1 y [c]))
  3225  	for {
  3226  		x0 := v_0
  3227  		if x0.Op != OpARM64SRAconst {
  3228  			break
  3229  		}
  3230  		c := auxIntToInt64(x0.AuxInt)
  3231  		y := x0.Args[0]
  3232  		x1 := v_1
  3233  		if !(clobberIfDead(x0)) {
  3234  			break
  3235  		}
  3236  		v.reset(OpARM64InvertFlags)
  3237  		v0 := b.NewValue0(v.Pos, OpARM64CMPshiftRA, types.TypeFlags)
  3238  		v0.AuxInt = int64ToAuxInt(c)
  3239  		v0.AddArg2(x1, y)
  3240  		v.AddArg(v0)
  3241  		return true
  3242  	}
  3243  	return false
  3244  }
  3245  func rewriteValueARM64_OpARM64CMPW(v *Value) bool {
  3246  	v_1 := v.Args[1]
  3247  	v_0 := v.Args[0]
  3248  	b := v.Block
  3249  	// match: (CMPW x (MOVDconst [c]))
  3250  	// result: (CMPWconst [int32(c)] x)
  3251  	for {
  3252  		x := v_0
  3253  		if v_1.Op != OpARM64MOVDconst {
  3254  			break
  3255  		}
  3256  		c := auxIntToInt64(v_1.AuxInt)
  3257  		v.reset(OpARM64CMPWconst)
  3258  		v.AuxInt = int32ToAuxInt(int32(c))
  3259  		v.AddArg(x)
  3260  		return true
  3261  	}
  3262  	// match: (CMPW (MOVDconst [c]) x)
  3263  	// result: (InvertFlags (CMPWconst [int32(c)] x))
  3264  	for {
  3265  		if v_0.Op != OpARM64MOVDconst {
  3266  			break
  3267  		}
  3268  		c := auxIntToInt64(v_0.AuxInt)
  3269  		x := v_1
  3270  		v.reset(OpARM64InvertFlags)
  3271  		v0 := b.NewValue0(v.Pos, OpARM64CMPWconst, types.TypeFlags)
  3272  		v0.AuxInt = int32ToAuxInt(int32(c))
  3273  		v0.AddArg(x)
  3274  		v.AddArg(v0)
  3275  		return true
  3276  	}
  3277  	// match: (CMPW x y)
  3278  	// cond: canonLessThan(x,y)
  3279  	// result: (InvertFlags (CMPW y x))
  3280  	for {
  3281  		x := v_0
  3282  		y := v_1
  3283  		if !(canonLessThan(x, y)) {
  3284  			break
  3285  		}
  3286  		v.reset(OpARM64InvertFlags)
  3287  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
  3288  		v0.AddArg2(y, x)
  3289  		v.AddArg(v0)
  3290  		return true
  3291  	}
  3292  	return false
  3293  }
  3294  func rewriteValueARM64_OpARM64CMPWconst(v *Value) bool {
  3295  	v_0 := v.Args[0]
  3296  	// match: (CMPWconst [c] y)
  3297  	// cond: c < 0 && c != -1<<31
  3298  	// result: (CMNWconst [-c] y)
  3299  	for {
  3300  		c := auxIntToInt32(v.AuxInt)
  3301  		y := v_0
  3302  		if !(c < 0 && c != -1<<31) {
  3303  			break
  3304  		}
  3305  		v.reset(OpARM64CMNWconst)
  3306  		v.AuxInt = int32ToAuxInt(-c)
  3307  		v.AddArg(y)
  3308  		return true
  3309  	}
  3310  	// match: (CMPWconst (MOVDconst [x]) [y])
  3311  	// result: (FlagConstant [subFlags32(int32(x),y)])
  3312  	for {
  3313  		y := auxIntToInt32(v.AuxInt)
  3314  		if v_0.Op != OpARM64MOVDconst {
  3315  			break
  3316  		}
  3317  		x := auxIntToInt64(v_0.AuxInt)
  3318  		v.reset(OpARM64FlagConstant)
  3319  		v.AuxInt = flagConstantToAuxInt(subFlags32(int32(x), y))
  3320  		return true
  3321  	}
  3322  	// match: (CMPWconst (MOVBUreg _) [c])
  3323  	// cond: 0xff < c
  3324  	// result: (FlagConstant [subFlags64(0,1)])
  3325  	for {
  3326  		c := auxIntToInt32(v.AuxInt)
  3327  		if v_0.Op != OpARM64MOVBUreg || !(0xff < c) {
  3328  			break
  3329  		}
  3330  		v.reset(OpARM64FlagConstant)
  3331  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3332  		return true
  3333  	}
  3334  	// match: (CMPWconst (MOVHUreg _) [c])
  3335  	// cond: 0xffff < c
  3336  	// result: (FlagConstant [subFlags64(0,1)])
  3337  	for {
  3338  		c := auxIntToInt32(v.AuxInt)
  3339  		if v_0.Op != OpARM64MOVHUreg || !(0xffff < c) {
  3340  			break
  3341  		}
  3342  		v.reset(OpARM64FlagConstant)
  3343  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3344  		return true
  3345  	}
  3346  	return false
  3347  }
  3348  func rewriteValueARM64_OpARM64CMPconst(v *Value) bool {
  3349  	v_0 := v.Args[0]
  3350  	// match: (CMPconst [c] y)
  3351  	// cond: c < 0 && c != -1<<63
  3352  	// result: (CMNconst [-c] y)
  3353  	for {
  3354  		c := auxIntToInt64(v.AuxInt)
  3355  		y := v_0
  3356  		if !(c < 0 && c != -1<<63) {
  3357  			break
  3358  		}
  3359  		v.reset(OpARM64CMNconst)
  3360  		v.AuxInt = int64ToAuxInt(-c)
  3361  		v.AddArg(y)
  3362  		return true
  3363  	}
  3364  	// match: (CMPconst (MOVDconst [x]) [y])
  3365  	// result: (FlagConstant [subFlags64(x,y)])
  3366  	for {
  3367  		y := auxIntToInt64(v.AuxInt)
  3368  		if v_0.Op != OpARM64MOVDconst {
  3369  			break
  3370  		}
  3371  		x := auxIntToInt64(v_0.AuxInt)
  3372  		v.reset(OpARM64FlagConstant)
  3373  		v.AuxInt = flagConstantToAuxInt(subFlags64(x, y))
  3374  		return true
  3375  	}
  3376  	// match: (CMPconst (MOVBUreg _) [c])
  3377  	// cond: 0xff < c
  3378  	// result: (FlagConstant [subFlags64(0,1)])
  3379  	for {
  3380  		c := auxIntToInt64(v.AuxInt)
  3381  		if v_0.Op != OpARM64MOVBUreg || !(0xff < c) {
  3382  			break
  3383  		}
  3384  		v.reset(OpARM64FlagConstant)
  3385  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3386  		return true
  3387  	}
  3388  	// match: (CMPconst (MOVHUreg _) [c])
  3389  	// cond: 0xffff < c
  3390  	// result: (FlagConstant [subFlags64(0,1)])
  3391  	for {
  3392  		c := auxIntToInt64(v.AuxInt)
  3393  		if v_0.Op != OpARM64MOVHUreg || !(0xffff < c) {
  3394  			break
  3395  		}
  3396  		v.reset(OpARM64FlagConstant)
  3397  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3398  		return true
  3399  	}
  3400  	// match: (CMPconst (MOVWUreg _) [c])
  3401  	// cond: 0xffffffff < c
  3402  	// result: (FlagConstant [subFlags64(0,1)])
  3403  	for {
  3404  		c := auxIntToInt64(v.AuxInt)
  3405  		if v_0.Op != OpARM64MOVWUreg || !(0xffffffff < c) {
  3406  			break
  3407  		}
  3408  		v.reset(OpARM64FlagConstant)
  3409  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3410  		return true
  3411  	}
  3412  	// match: (CMPconst (ANDconst _ [m]) [n])
  3413  	// cond: 0 <= m && m < n
  3414  	// result: (FlagConstant [subFlags64(0,1)])
  3415  	for {
  3416  		n := auxIntToInt64(v.AuxInt)
  3417  		if v_0.Op != OpARM64ANDconst {
  3418  			break
  3419  		}
  3420  		m := auxIntToInt64(v_0.AuxInt)
  3421  		if !(0 <= m && m < n) {
  3422  			break
  3423  		}
  3424  		v.reset(OpARM64FlagConstant)
  3425  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3426  		return true
  3427  	}
  3428  	// match: (CMPconst (SRLconst _ [c]) [n])
  3429  	// cond: 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)
  3430  	// result: (FlagConstant [subFlags64(0,1)])
  3431  	for {
  3432  		n := auxIntToInt64(v.AuxInt)
  3433  		if v_0.Op != OpARM64SRLconst {
  3434  			break
  3435  		}
  3436  		c := auxIntToInt64(v_0.AuxInt)
  3437  		if !(0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)) {
  3438  			break
  3439  		}
  3440  		v.reset(OpARM64FlagConstant)
  3441  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3442  		return true
  3443  	}
  3444  	return false
  3445  }
  3446  func rewriteValueARM64_OpARM64CMPshiftLL(v *Value) bool {
  3447  	v_1 := v.Args[1]
  3448  	v_0 := v.Args[0]
  3449  	b := v.Block
  3450  	// match: (CMPshiftLL (MOVDconst [c]) x [d])
  3451  	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
  3452  	for {
  3453  		d := auxIntToInt64(v.AuxInt)
  3454  		if v_0.Op != OpARM64MOVDconst {
  3455  			break
  3456  		}
  3457  		c := auxIntToInt64(v_0.AuxInt)
  3458  		x := v_1
  3459  		v.reset(OpARM64InvertFlags)
  3460  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3461  		v0.AuxInt = int64ToAuxInt(c)
  3462  		v1 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  3463  		v1.AuxInt = int64ToAuxInt(d)
  3464  		v1.AddArg(x)
  3465  		v0.AddArg(v1)
  3466  		v.AddArg(v0)
  3467  		return true
  3468  	}
  3469  	// match: (CMPshiftLL x (MOVDconst [c]) [d])
  3470  	// result: (CMPconst x [int64(uint64(c)<<uint64(d))])
  3471  	for {
  3472  		d := auxIntToInt64(v.AuxInt)
  3473  		x := v_0
  3474  		if v_1.Op != OpARM64MOVDconst {
  3475  			break
  3476  		}
  3477  		c := auxIntToInt64(v_1.AuxInt)
  3478  		v.reset(OpARM64CMPconst)
  3479  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3480  		v.AddArg(x)
  3481  		return true
  3482  	}
  3483  	return false
  3484  }
  3485  func rewriteValueARM64_OpARM64CMPshiftRA(v *Value) bool {
  3486  	v_1 := v.Args[1]
  3487  	v_0 := v.Args[0]
  3488  	b := v.Block
  3489  	// match: (CMPshiftRA (MOVDconst [c]) x [d])
  3490  	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
  3491  	for {
  3492  		d := auxIntToInt64(v.AuxInt)
  3493  		if v_0.Op != OpARM64MOVDconst {
  3494  			break
  3495  		}
  3496  		c := auxIntToInt64(v_0.AuxInt)
  3497  		x := v_1
  3498  		v.reset(OpARM64InvertFlags)
  3499  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3500  		v0.AuxInt = int64ToAuxInt(c)
  3501  		v1 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  3502  		v1.AuxInt = int64ToAuxInt(d)
  3503  		v1.AddArg(x)
  3504  		v0.AddArg(v1)
  3505  		v.AddArg(v0)
  3506  		return true
  3507  	}
  3508  	// match: (CMPshiftRA x (MOVDconst [c]) [d])
  3509  	// result: (CMPconst x [c>>uint64(d)])
  3510  	for {
  3511  		d := auxIntToInt64(v.AuxInt)
  3512  		x := v_0
  3513  		if v_1.Op != OpARM64MOVDconst {
  3514  			break
  3515  		}
  3516  		c := auxIntToInt64(v_1.AuxInt)
  3517  		v.reset(OpARM64CMPconst)
  3518  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  3519  		v.AddArg(x)
  3520  		return true
  3521  	}
  3522  	return false
  3523  }
  3524  func rewriteValueARM64_OpARM64CMPshiftRL(v *Value) bool {
  3525  	v_1 := v.Args[1]
  3526  	v_0 := v.Args[0]
  3527  	b := v.Block
  3528  	// match: (CMPshiftRL (MOVDconst [c]) x [d])
  3529  	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
  3530  	for {
  3531  		d := auxIntToInt64(v.AuxInt)
  3532  		if v_0.Op != OpARM64MOVDconst {
  3533  			break
  3534  		}
  3535  		c := auxIntToInt64(v_0.AuxInt)
  3536  		x := v_1
  3537  		v.reset(OpARM64InvertFlags)
  3538  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3539  		v0.AuxInt = int64ToAuxInt(c)
  3540  		v1 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  3541  		v1.AuxInt = int64ToAuxInt(d)
  3542  		v1.AddArg(x)
  3543  		v0.AddArg(v1)
  3544  		v.AddArg(v0)
  3545  		return true
  3546  	}
  3547  	// match: (CMPshiftRL x (MOVDconst [c]) [d])
  3548  	// result: (CMPconst x [int64(uint64(c)>>uint64(d))])
  3549  	for {
  3550  		d := auxIntToInt64(v.AuxInt)
  3551  		x := v_0
  3552  		if v_1.Op != OpARM64MOVDconst {
  3553  			break
  3554  		}
  3555  		c := auxIntToInt64(v_1.AuxInt)
  3556  		v.reset(OpARM64CMPconst)
  3557  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3558  		v.AddArg(x)
  3559  		return true
  3560  	}
  3561  	return false
  3562  }
  3563  func rewriteValueARM64_OpARM64CSEL(v *Value) bool {
  3564  	v_2 := v.Args[2]
  3565  	v_1 := v.Args[1]
  3566  	v_0 := v.Args[0]
  3567  	// match: (CSEL [cc] (MOVDconst [-1]) (MOVDconst [0]) flag)
  3568  	// result: (CSETM [cc] flag)
  3569  	for {
  3570  		cc := auxIntToOp(v.AuxInt)
  3571  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != -1 || v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  3572  			break
  3573  		}
  3574  		flag := v_2
  3575  		v.reset(OpARM64CSETM)
  3576  		v.AuxInt = opToAuxInt(cc)
  3577  		v.AddArg(flag)
  3578  		return true
  3579  	}
  3580  	// match: (CSEL [cc] (MOVDconst [0]) (MOVDconst [-1]) flag)
  3581  	// result: (CSETM [arm64Negate(cc)] flag)
  3582  	for {
  3583  		cc := auxIntToOp(v.AuxInt)
  3584  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 || v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
  3585  			break
  3586  		}
  3587  		flag := v_2
  3588  		v.reset(OpARM64CSETM)
  3589  		v.AuxInt = opToAuxInt(arm64Negate(cc))
  3590  		v.AddArg(flag)
  3591  		return true
  3592  	}
  3593  	// match: (CSEL [cc] x (MOVDconst [0]) flag)
  3594  	// result: (CSEL0 [cc] x flag)
  3595  	for {
  3596  		cc := auxIntToOp(v.AuxInt)
  3597  		x := v_0
  3598  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  3599  			break
  3600  		}
  3601  		flag := v_2
  3602  		v.reset(OpARM64CSEL0)
  3603  		v.AuxInt = opToAuxInt(cc)
  3604  		v.AddArg2(x, flag)
  3605  		return true
  3606  	}
  3607  	// match: (CSEL [cc] (MOVDconst [0]) y flag)
  3608  	// result: (CSEL0 [arm64Negate(cc)] y flag)
  3609  	for {
  3610  		cc := auxIntToOp(v.AuxInt)
  3611  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 {
  3612  			break
  3613  		}
  3614  		y := v_1
  3615  		flag := v_2
  3616  		v.reset(OpARM64CSEL0)
  3617  		v.AuxInt = opToAuxInt(arm64Negate(cc))
  3618  		v.AddArg2(y, flag)
  3619  		return true
  3620  	}
  3621  	// match: (CSEL [cc] x (ADDconst [1] a) flag)
  3622  	// result: (CSINC [cc] x a flag)
  3623  	for {
  3624  		cc := auxIntToOp(v.AuxInt)
  3625  		x := v_0
  3626  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  3627  			break
  3628  		}
  3629  		a := v_1.Args[0]
  3630  		flag := v_2
  3631  		v.reset(OpARM64CSINC)
  3632  		v.AuxInt = opToAuxInt(cc)
  3633  		v.AddArg3(x, a, flag)
  3634  		return true
  3635  	}
  3636  	// match: (CSEL [cc] (ADDconst [1] a) x flag)
  3637  	// result: (CSINC [arm64Negate(cc)] x a flag)
  3638  	for {
  3639  		cc := auxIntToOp(v.AuxInt)
  3640  		if v_0.Op != OpARM64ADDconst || auxIntToInt64(v_0.AuxInt) != 1 {
  3641  			break
  3642  		}
  3643  		a := v_0.Args[0]
  3644  		x := v_1
  3645  		flag := v_2
  3646  		v.reset(OpARM64CSINC)
  3647  		v.AuxInt = opToAuxInt(arm64Negate(cc))
  3648  		v.AddArg3(x, a, flag)
  3649  		return true
  3650  	}
  3651  	// match: (CSEL [cc] x (MVN a) flag)
  3652  	// result: (CSINV [cc] x a flag)
  3653  	for {
  3654  		cc := auxIntToOp(v.AuxInt)
  3655  		x := v_0
  3656  		if v_1.Op != OpARM64MVN {
  3657  			break
  3658  		}
  3659  		a := v_1.Args[0]
  3660  		flag := v_2
  3661  		v.reset(OpARM64CSINV)
  3662  		v.AuxInt = opToAuxInt(cc)
  3663  		v.AddArg3(x, a, flag)
  3664  		return true
  3665  	}
  3666  	// match: (CSEL [cc] (MVN a) x flag)
  3667  	// result: (CSINV [arm64Negate(cc)] x a flag)
  3668  	for {
  3669  		cc := auxIntToOp(v.AuxInt)
  3670  		if v_0.Op != OpARM64MVN {
  3671  			break
  3672  		}
  3673  		a := v_0.Args[0]
  3674  		x := v_1
  3675  		flag := v_2
  3676  		v.reset(OpARM64CSINV)
  3677  		v.AuxInt = opToAuxInt(arm64Negate(cc))
  3678  		v.AddArg3(x, a, flag)
  3679  		return true
  3680  	}
  3681  	// match: (CSEL [cc] x (NEG a) flag)
  3682  	// result: (CSNEG [cc] x a flag)
  3683  	for {
  3684  		cc := auxIntToOp(v.AuxInt)
  3685  		x := v_0
  3686  		if v_1.Op != OpARM64NEG {
  3687  			break
  3688  		}
  3689  		a := v_1.Args[0]
  3690  		flag := v_2
  3691  		v.reset(OpARM64CSNEG)
  3692  		v.AuxInt = opToAuxInt(cc)
  3693  		v.AddArg3(x, a, flag)
  3694  		return true
  3695  	}
  3696  	// match: (CSEL [cc] (NEG a) x flag)
  3697  	// result: (CSNEG [arm64Negate(cc)] x a flag)
  3698  	for {
  3699  		cc := auxIntToOp(v.AuxInt)
  3700  		if v_0.Op != OpARM64NEG {
  3701  			break
  3702  		}
  3703  		a := v_0.Args[0]
  3704  		x := v_1
  3705  		flag := v_2
  3706  		v.reset(OpARM64CSNEG)
  3707  		v.AuxInt = opToAuxInt(arm64Negate(cc))
  3708  		v.AddArg3(x, a, flag)
  3709  		return true
  3710  	}
  3711  	// match: (CSEL [cc] x y (InvertFlags cmp))
  3712  	// result: (CSEL [arm64Invert(cc)] x y cmp)
  3713  	for {
  3714  		cc := auxIntToOp(v.AuxInt)
  3715  		x := v_0
  3716  		y := v_1
  3717  		if v_2.Op != OpARM64InvertFlags {
  3718  			break
  3719  		}
  3720  		cmp := v_2.Args[0]
  3721  		v.reset(OpARM64CSEL)
  3722  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3723  		v.AddArg3(x, y, cmp)
  3724  		return true
  3725  	}
  3726  	// match: (CSEL [cc] x _ flag)
  3727  	// cond: ccARM64Eval(cc, flag) > 0
  3728  	// result: x
  3729  	for {
  3730  		cc := auxIntToOp(v.AuxInt)
  3731  		x := v_0
  3732  		flag := v_2
  3733  		if !(ccARM64Eval(cc, flag) > 0) {
  3734  			break
  3735  		}
  3736  		v.copyOf(x)
  3737  		return true
  3738  	}
  3739  	// match: (CSEL [cc] _ y flag)
  3740  	// cond: ccARM64Eval(cc, flag) < 0
  3741  	// result: y
  3742  	for {
  3743  		cc := auxIntToOp(v.AuxInt)
  3744  		y := v_1
  3745  		flag := v_2
  3746  		if !(ccARM64Eval(cc, flag) < 0) {
  3747  			break
  3748  		}
  3749  		v.copyOf(y)
  3750  		return true
  3751  	}
  3752  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  3753  	// cond: cc == OpARM64NotEqual && flagArg(boolval) != nil
  3754  	// result: (CSEL [boolval.Op] x y flagArg(boolval))
  3755  	for {
  3756  		cc := auxIntToOp(v.AuxInt)
  3757  		x := v_0
  3758  		y := v_1
  3759  		if v_2.Op != OpARM64CMPWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  3760  			break
  3761  		}
  3762  		boolval := v_2.Args[0]
  3763  		if !(cc == OpARM64NotEqual && flagArg(boolval) != nil) {
  3764  			break
  3765  		}
  3766  		v.reset(OpARM64CSEL)
  3767  		v.AuxInt = opToAuxInt(boolval.Op)
  3768  		v.AddArg3(x, y, flagArg(boolval))
  3769  		return true
  3770  	}
  3771  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  3772  	// cond: cc == OpARM64Equal && flagArg(boolval) != nil
  3773  	// result: (CSEL [arm64Negate(boolval.Op)] x y flagArg(boolval))
  3774  	for {
  3775  		cc := auxIntToOp(v.AuxInt)
  3776  		x := v_0
  3777  		y := v_1
  3778  		if v_2.Op != OpARM64CMPWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  3779  			break
  3780  		}
  3781  		boolval := v_2.Args[0]
  3782  		if !(cc == OpARM64Equal && flagArg(boolval) != nil) {
  3783  			break
  3784  		}
  3785  		v.reset(OpARM64CSEL)
  3786  		v.AuxInt = opToAuxInt(arm64Negate(boolval.Op))
  3787  		v.AddArg3(x, y, flagArg(boolval))
  3788  		return true
  3789  	}
  3790  	return false
  3791  }
  3792  func rewriteValueARM64_OpARM64CSEL0(v *Value) bool {
  3793  	v_1 := v.Args[1]
  3794  	v_0 := v.Args[0]
  3795  	// match: (CSEL0 [cc] x (InvertFlags cmp))
  3796  	// result: (CSEL0 [arm64Invert(cc)] x cmp)
  3797  	for {
  3798  		cc := auxIntToOp(v.AuxInt)
  3799  		x := v_0
  3800  		if v_1.Op != OpARM64InvertFlags {
  3801  			break
  3802  		}
  3803  		cmp := v_1.Args[0]
  3804  		v.reset(OpARM64CSEL0)
  3805  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3806  		v.AddArg2(x, cmp)
  3807  		return true
  3808  	}
  3809  	// match: (CSEL0 [cc] x flag)
  3810  	// cond: ccARM64Eval(cc, flag) > 0
  3811  	// result: x
  3812  	for {
  3813  		cc := auxIntToOp(v.AuxInt)
  3814  		x := v_0
  3815  		flag := v_1
  3816  		if !(ccARM64Eval(cc, flag) > 0) {
  3817  			break
  3818  		}
  3819  		v.copyOf(x)
  3820  		return true
  3821  	}
  3822  	// match: (CSEL0 [cc] _ flag)
  3823  	// cond: ccARM64Eval(cc, flag) < 0
  3824  	// result: (MOVDconst [0])
  3825  	for {
  3826  		cc := auxIntToOp(v.AuxInt)
  3827  		flag := v_1
  3828  		if !(ccARM64Eval(cc, flag) < 0) {
  3829  			break
  3830  		}
  3831  		v.reset(OpARM64MOVDconst)
  3832  		v.AuxInt = int64ToAuxInt(0)
  3833  		return true
  3834  	}
  3835  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  3836  	// cond: cc == OpARM64NotEqual && flagArg(boolval) != nil
  3837  	// result: (CSEL0 [boolval.Op] x flagArg(boolval))
  3838  	for {
  3839  		cc := auxIntToOp(v.AuxInt)
  3840  		x := v_0
  3841  		if v_1.Op != OpARM64CMPWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3842  			break
  3843  		}
  3844  		boolval := v_1.Args[0]
  3845  		if !(cc == OpARM64NotEqual && flagArg(boolval) != nil) {
  3846  			break
  3847  		}
  3848  		v.reset(OpARM64CSEL0)
  3849  		v.AuxInt = opToAuxInt(boolval.Op)
  3850  		v.AddArg2(x, flagArg(boolval))
  3851  		return true
  3852  	}
  3853  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  3854  	// cond: cc == OpARM64Equal && flagArg(boolval) != nil
  3855  	// result: (CSEL0 [arm64Negate(boolval.Op)] x flagArg(boolval))
  3856  	for {
  3857  		cc := auxIntToOp(v.AuxInt)
  3858  		x := v_0
  3859  		if v_1.Op != OpARM64CMPWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3860  			break
  3861  		}
  3862  		boolval := v_1.Args[0]
  3863  		if !(cc == OpARM64Equal && flagArg(boolval) != nil) {
  3864  			break
  3865  		}
  3866  		v.reset(OpARM64CSEL0)
  3867  		v.AuxInt = opToAuxInt(arm64Negate(boolval.Op))
  3868  		v.AddArg2(x, flagArg(boolval))
  3869  		return true
  3870  	}
  3871  	return false
  3872  }
  3873  func rewriteValueARM64_OpARM64CSETM(v *Value) bool {
  3874  	v_0 := v.Args[0]
  3875  	// match: (CSETM [cc] (InvertFlags cmp))
  3876  	// result: (CSETM [arm64Invert(cc)] cmp)
  3877  	for {
  3878  		cc := auxIntToOp(v.AuxInt)
  3879  		if v_0.Op != OpARM64InvertFlags {
  3880  			break
  3881  		}
  3882  		cmp := v_0.Args[0]
  3883  		v.reset(OpARM64CSETM)
  3884  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3885  		v.AddArg(cmp)
  3886  		return true
  3887  	}
  3888  	// match: (CSETM [cc] flag)
  3889  	// cond: ccARM64Eval(cc, flag) > 0
  3890  	// result: (MOVDconst [-1])
  3891  	for {
  3892  		cc := auxIntToOp(v.AuxInt)
  3893  		flag := v_0
  3894  		if !(ccARM64Eval(cc, flag) > 0) {
  3895  			break
  3896  		}
  3897  		v.reset(OpARM64MOVDconst)
  3898  		v.AuxInt = int64ToAuxInt(-1)
  3899  		return true
  3900  	}
  3901  	// match: (CSETM [cc] flag)
  3902  	// cond: ccARM64Eval(cc, flag) < 0
  3903  	// result: (MOVDconst [0])
  3904  	for {
  3905  		cc := auxIntToOp(v.AuxInt)
  3906  		flag := v_0
  3907  		if !(ccARM64Eval(cc, flag) < 0) {
  3908  			break
  3909  		}
  3910  		v.reset(OpARM64MOVDconst)
  3911  		v.AuxInt = int64ToAuxInt(0)
  3912  		return true
  3913  	}
  3914  	return false
  3915  }
  3916  func rewriteValueARM64_OpARM64CSINC(v *Value) bool {
  3917  	v_2 := v.Args[2]
  3918  	v_1 := v.Args[1]
  3919  	v_0 := v.Args[0]
  3920  	// match: (CSINC [cc] x y (InvertFlags cmp))
  3921  	// result: (CSINC [arm64Invert(cc)] x y cmp)
  3922  	for {
  3923  		cc := auxIntToOp(v.AuxInt)
  3924  		x := v_0
  3925  		y := v_1
  3926  		if v_2.Op != OpARM64InvertFlags {
  3927  			break
  3928  		}
  3929  		cmp := v_2.Args[0]
  3930  		v.reset(OpARM64CSINC)
  3931  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3932  		v.AddArg3(x, y, cmp)
  3933  		return true
  3934  	}
  3935  	// match: (CSINC [cc] x _ flag)
  3936  	// cond: ccARM64Eval(cc, flag) > 0
  3937  	// result: x
  3938  	for {
  3939  		cc := auxIntToOp(v.AuxInt)
  3940  		x := v_0
  3941  		flag := v_2
  3942  		if !(ccARM64Eval(cc, flag) > 0) {
  3943  			break
  3944  		}
  3945  		v.copyOf(x)
  3946  		return true
  3947  	}
  3948  	// match: (CSINC [cc] _ y flag)
  3949  	// cond: ccARM64Eval(cc, flag) < 0
  3950  	// result: (ADDconst [1] y)
  3951  	for {
  3952  		cc := auxIntToOp(v.AuxInt)
  3953  		y := v_1
  3954  		flag := v_2
  3955  		if !(ccARM64Eval(cc, flag) < 0) {
  3956  			break
  3957  		}
  3958  		v.reset(OpARM64ADDconst)
  3959  		v.AuxInt = int64ToAuxInt(1)
  3960  		v.AddArg(y)
  3961  		return true
  3962  	}
  3963  	return false
  3964  }
  3965  func rewriteValueARM64_OpARM64CSINV(v *Value) bool {
  3966  	v_2 := v.Args[2]
  3967  	v_1 := v.Args[1]
  3968  	v_0 := v.Args[0]
  3969  	// match: (CSINV [cc] x y (InvertFlags cmp))
  3970  	// result: (CSINV [arm64Invert(cc)] x y cmp)
  3971  	for {
  3972  		cc := auxIntToOp(v.AuxInt)
  3973  		x := v_0
  3974  		y := v_1
  3975  		if v_2.Op != OpARM64InvertFlags {
  3976  			break
  3977  		}
  3978  		cmp := v_2.Args[0]
  3979  		v.reset(OpARM64CSINV)
  3980  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3981  		v.AddArg3(x, y, cmp)
  3982  		return true
  3983  	}
  3984  	// match: (CSINV [cc] x _ flag)
  3985  	// cond: ccARM64Eval(cc, flag) > 0
  3986  	// result: x
  3987  	for {
  3988  		cc := auxIntToOp(v.AuxInt)
  3989  		x := v_0
  3990  		flag := v_2
  3991  		if !(ccARM64Eval(cc, flag) > 0) {
  3992  			break
  3993  		}
  3994  		v.copyOf(x)
  3995  		return true
  3996  	}
  3997  	// match: (CSINV [cc] _ y flag)
  3998  	// cond: ccARM64Eval(cc, flag) < 0
  3999  	// result: (Not y)
  4000  	for {
  4001  		cc := auxIntToOp(v.AuxInt)
  4002  		y := v_1
  4003  		flag := v_2
  4004  		if !(ccARM64Eval(cc, flag) < 0) {
  4005  			break
  4006  		}
  4007  		v.reset(OpNot)
  4008  		v.AddArg(y)
  4009  		return true
  4010  	}
  4011  	return false
  4012  }
  4013  func rewriteValueARM64_OpARM64CSNEG(v *Value) bool {
  4014  	v_2 := v.Args[2]
  4015  	v_1 := v.Args[1]
  4016  	v_0 := v.Args[0]
  4017  	// match: (CSNEG [cc] x y (InvertFlags cmp))
  4018  	// result: (CSNEG [arm64Invert(cc)] x y cmp)
  4019  	for {
  4020  		cc := auxIntToOp(v.AuxInt)
  4021  		x := v_0
  4022  		y := v_1
  4023  		if v_2.Op != OpARM64InvertFlags {
  4024  			break
  4025  		}
  4026  		cmp := v_2.Args[0]
  4027  		v.reset(OpARM64CSNEG)
  4028  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  4029  		v.AddArg3(x, y, cmp)
  4030  		return true
  4031  	}
  4032  	// match: (CSNEG [cc] x _ flag)
  4033  	// cond: ccARM64Eval(cc, flag) > 0
  4034  	// result: x
  4035  	for {
  4036  		cc := auxIntToOp(v.AuxInt)
  4037  		x := v_0
  4038  		flag := v_2
  4039  		if !(ccARM64Eval(cc, flag) > 0) {
  4040  			break
  4041  		}
  4042  		v.copyOf(x)
  4043  		return true
  4044  	}
  4045  	// match: (CSNEG [cc] _ y flag)
  4046  	// cond: ccARM64Eval(cc, flag) < 0
  4047  	// result: (NEG y)
  4048  	for {
  4049  		cc := auxIntToOp(v.AuxInt)
  4050  		y := v_1
  4051  		flag := v_2
  4052  		if !(ccARM64Eval(cc, flag) < 0) {
  4053  			break
  4054  		}
  4055  		v.reset(OpARM64NEG)
  4056  		v.AddArg(y)
  4057  		return true
  4058  	}
  4059  	return false
  4060  }
  4061  func rewriteValueARM64_OpARM64DIV(v *Value) bool {
  4062  	v_1 := v.Args[1]
  4063  	v_0 := v.Args[0]
  4064  	// match: (DIV (MOVDconst [c]) (MOVDconst [d]))
  4065  	// cond: d != 0
  4066  	// result: (MOVDconst [c/d])
  4067  	for {
  4068  		if v_0.Op != OpARM64MOVDconst {
  4069  			break
  4070  		}
  4071  		c := auxIntToInt64(v_0.AuxInt)
  4072  		if v_1.Op != OpARM64MOVDconst {
  4073  			break
  4074  		}
  4075  		d := auxIntToInt64(v_1.AuxInt)
  4076  		if !(d != 0) {
  4077  			break
  4078  		}
  4079  		v.reset(OpARM64MOVDconst)
  4080  		v.AuxInt = int64ToAuxInt(c / d)
  4081  		return true
  4082  	}
  4083  	return false
  4084  }
  4085  func rewriteValueARM64_OpARM64DIVW(v *Value) bool {
  4086  	v_1 := v.Args[1]
  4087  	v_0 := v.Args[0]
  4088  	// match: (DIVW (MOVDconst [c]) (MOVDconst [d]))
  4089  	// cond: d != 0
  4090  	// result: (MOVDconst [int64(uint32(int32(c)/int32(d)))])
  4091  	for {
  4092  		if v_0.Op != OpARM64MOVDconst {
  4093  			break
  4094  		}
  4095  		c := auxIntToInt64(v_0.AuxInt)
  4096  		if v_1.Op != OpARM64MOVDconst {
  4097  			break
  4098  		}
  4099  		d := auxIntToInt64(v_1.AuxInt)
  4100  		if !(d != 0) {
  4101  			break
  4102  		}
  4103  		v.reset(OpARM64MOVDconst)
  4104  		v.AuxInt = int64ToAuxInt(int64(uint32(int32(c) / int32(d))))
  4105  		return true
  4106  	}
  4107  	return false
  4108  }
  4109  func rewriteValueARM64_OpARM64EON(v *Value) bool {
  4110  	v_1 := v.Args[1]
  4111  	v_0 := v.Args[0]
  4112  	// match: (EON x (MOVDconst [c]))
  4113  	// result: (XORconst [^c] x)
  4114  	for {
  4115  		x := v_0
  4116  		if v_1.Op != OpARM64MOVDconst {
  4117  			break
  4118  		}
  4119  		c := auxIntToInt64(v_1.AuxInt)
  4120  		v.reset(OpARM64XORconst)
  4121  		v.AuxInt = int64ToAuxInt(^c)
  4122  		v.AddArg(x)
  4123  		return true
  4124  	}
  4125  	// match: (EON x x)
  4126  	// result: (MOVDconst [-1])
  4127  	for {
  4128  		x := v_0
  4129  		if x != v_1 {
  4130  			break
  4131  		}
  4132  		v.reset(OpARM64MOVDconst)
  4133  		v.AuxInt = int64ToAuxInt(-1)
  4134  		return true
  4135  	}
  4136  	// match: (EON x0 x1:(SLLconst [c] y))
  4137  	// cond: clobberIfDead(x1)
  4138  	// result: (EONshiftLL x0 y [c])
  4139  	for {
  4140  		x0 := v_0
  4141  		x1 := v_1
  4142  		if x1.Op != OpARM64SLLconst {
  4143  			break
  4144  		}
  4145  		c := auxIntToInt64(x1.AuxInt)
  4146  		y := x1.Args[0]
  4147  		if !(clobberIfDead(x1)) {
  4148  			break
  4149  		}
  4150  		v.reset(OpARM64EONshiftLL)
  4151  		v.AuxInt = int64ToAuxInt(c)
  4152  		v.AddArg2(x0, y)
  4153  		return true
  4154  	}
  4155  	// match: (EON x0 x1:(SRLconst [c] y))
  4156  	// cond: clobberIfDead(x1)
  4157  	// result: (EONshiftRL x0 y [c])
  4158  	for {
  4159  		x0 := v_0
  4160  		x1 := v_1
  4161  		if x1.Op != OpARM64SRLconst {
  4162  			break
  4163  		}
  4164  		c := auxIntToInt64(x1.AuxInt)
  4165  		y := x1.Args[0]
  4166  		if !(clobberIfDead(x1)) {
  4167  			break
  4168  		}
  4169  		v.reset(OpARM64EONshiftRL)
  4170  		v.AuxInt = int64ToAuxInt(c)
  4171  		v.AddArg2(x0, y)
  4172  		return true
  4173  	}
  4174  	// match: (EON x0 x1:(SRAconst [c] y))
  4175  	// cond: clobberIfDead(x1)
  4176  	// result: (EONshiftRA x0 y [c])
  4177  	for {
  4178  		x0 := v_0
  4179  		x1 := v_1
  4180  		if x1.Op != OpARM64SRAconst {
  4181  			break
  4182  		}
  4183  		c := auxIntToInt64(x1.AuxInt)
  4184  		y := x1.Args[0]
  4185  		if !(clobberIfDead(x1)) {
  4186  			break
  4187  		}
  4188  		v.reset(OpARM64EONshiftRA)
  4189  		v.AuxInt = int64ToAuxInt(c)
  4190  		v.AddArg2(x0, y)
  4191  		return true
  4192  	}
  4193  	// match: (EON x0 x1:(RORconst [c] y))
  4194  	// cond: clobberIfDead(x1)
  4195  	// result: (EONshiftRO x0 y [c])
  4196  	for {
  4197  		x0 := v_0
  4198  		x1 := v_1
  4199  		if x1.Op != OpARM64RORconst {
  4200  			break
  4201  		}
  4202  		c := auxIntToInt64(x1.AuxInt)
  4203  		y := x1.Args[0]
  4204  		if !(clobberIfDead(x1)) {
  4205  			break
  4206  		}
  4207  		v.reset(OpARM64EONshiftRO)
  4208  		v.AuxInt = int64ToAuxInt(c)
  4209  		v.AddArg2(x0, y)
  4210  		return true
  4211  	}
  4212  	return false
  4213  }
  4214  func rewriteValueARM64_OpARM64EONshiftLL(v *Value) bool {
  4215  	v_1 := v.Args[1]
  4216  	v_0 := v.Args[0]
  4217  	// match: (EONshiftLL x (MOVDconst [c]) [d])
  4218  	// result: (XORconst x [^int64(uint64(c)<<uint64(d))])
  4219  	for {
  4220  		d := auxIntToInt64(v.AuxInt)
  4221  		x := v_0
  4222  		if v_1.Op != OpARM64MOVDconst {
  4223  			break
  4224  		}
  4225  		c := auxIntToInt64(v_1.AuxInt)
  4226  		v.reset(OpARM64XORconst)
  4227  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  4228  		v.AddArg(x)
  4229  		return true
  4230  	}
  4231  	// match: (EONshiftLL (SLLconst x [c]) x [c])
  4232  	// result: (MOVDconst [-1])
  4233  	for {
  4234  		c := auxIntToInt64(v.AuxInt)
  4235  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != c {
  4236  			break
  4237  		}
  4238  		x := v_0.Args[0]
  4239  		if x != v_1 {
  4240  			break
  4241  		}
  4242  		v.reset(OpARM64MOVDconst)
  4243  		v.AuxInt = int64ToAuxInt(-1)
  4244  		return true
  4245  	}
  4246  	return false
  4247  }
  4248  func rewriteValueARM64_OpARM64EONshiftRA(v *Value) bool {
  4249  	v_1 := v.Args[1]
  4250  	v_0 := v.Args[0]
  4251  	// match: (EONshiftRA x (MOVDconst [c]) [d])
  4252  	// result: (XORconst x [^(c>>uint64(d))])
  4253  	for {
  4254  		d := auxIntToInt64(v.AuxInt)
  4255  		x := v_0
  4256  		if v_1.Op != OpARM64MOVDconst {
  4257  			break
  4258  		}
  4259  		c := auxIntToInt64(v_1.AuxInt)
  4260  		v.reset(OpARM64XORconst)
  4261  		v.AuxInt = int64ToAuxInt(^(c >> uint64(d)))
  4262  		v.AddArg(x)
  4263  		return true
  4264  	}
  4265  	// match: (EONshiftRA (SRAconst x [c]) x [c])
  4266  	// result: (MOVDconst [-1])
  4267  	for {
  4268  		c := auxIntToInt64(v.AuxInt)
  4269  		if v_0.Op != OpARM64SRAconst || auxIntToInt64(v_0.AuxInt) != c {
  4270  			break
  4271  		}
  4272  		x := v_0.Args[0]
  4273  		if x != v_1 {
  4274  			break
  4275  		}
  4276  		v.reset(OpARM64MOVDconst)
  4277  		v.AuxInt = int64ToAuxInt(-1)
  4278  		return true
  4279  	}
  4280  	return false
  4281  }
  4282  func rewriteValueARM64_OpARM64EONshiftRL(v *Value) bool {
  4283  	v_1 := v.Args[1]
  4284  	v_0 := v.Args[0]
  4285  	// match: (EONshiftRL x (MOVDconst [c]) [d])
  4286  	// result: (XORconst x [^int64(uint64(c)>>uint64(d))])
  4287  	for {
  4288  		d := auxIntToInt64(v.AuxInt)
  4289  		x := v_0
  4290  		if v_1.Op != OpARM64MOVDconst {
  4291  			break
  4292  		}
  4293  		c := auxIntToInt64(v_1.AuxInt)
  4294  		v.reset(OpARM64XORconst)
  4295  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  4296  		v.AddArg(x)
  4297  		return true
  4298  	}
  4299  	// match: (EONshiftRL (SRLconst x [c]) x [c])
  4300  	// result: (MOVDconst [-1])
  4301  	for {
  4302  		c := auxIntToInt64(v.AuxInt)
  4303  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != c {
  4304  			break
  4305  		}
  4306  		x := v_0.Args[0]
  4307  		if x != v_1 {
  4308  			break
  4309  		}
  4310  		v.reset(OpARM64MOVDconst)
  4311  		v.AuxInt = int64ToAuxInt(-1)
  4312  		return true
  4313  	}
  4314  	return false
  4315  }
  4316  func rewriteValueARM64_OpARM64EONshiftRO(v *Value) bool {
  4317  	v_1 := v.Args[1]
  4318  	v_0 := v.Args[0]
  4319  	// match: (EONshiftRO x (MOVDconst [c]) [d])
  4320  	// result: (XORconst x [^rotateRight64(c, d)])
  4321  	for {
  4322  		d := auxIntToInt64(v.AuxInt)
  4323  		x := v_0
  4324  		if v_1.Op != OpARM64MOVDconst {
  4325  			break
  4326  		}
  4327  		c := auxIntToInt64(v_1.AuxInt)
  4328  		v.reset(OpARM64XORconst)
  4329  		v.AuxInt = int64ToAuxInt(^rotateRight64(c, d))
  4330  		v.AddArg(x)
  4331  		return true
  4332  	}
  4333  	// match: (EONshiftRO (RORconst x [c]) x [c])
  4334  	// result: (MOVDconst [-1])
  4335  	for {
  4336  		c := auxIntToInt64(v.AuxInt)
  4337  		if v_0.Op != OpARM64RORconst || auxIntToInt64(v_0.AuxInt) != c {
  4338  			break
  4339  		}
  4340  		x := v_0.Args[0]
  4341  		if x != v_1 {
  4342  			break
  4343  		}
  4344  		v.reset(OpARM64MOVDconst)
  4345  		v.AuxInt = int64ToAuxInt(-1)
  4346  		return true
  4347  	}
  4348  	return false
  4349  }
  4350  func rewriteValueARM64_OpARM64Equal(v *Value) bool {
  4351  	v_0 := v.Args[0]
  4352  	b := v.Block
  4353  	// match: (Equal (CMPconst [0] z:(AND x y)))
  4354  	// cond: z.Uses == 1
  4355  	// result: (Equal (TST x y))
  4356  	for {
  4357  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  4358  			break
  4359  		}
  4360  		z := v_0.Args[0]
  4361  		if z.Op != OpARM64AND {
  4362  			break
  4363  		}
  4364  		y := z.Args[1]
  4365  		x := z.Args[0]
  4366  		if !(z.Uses == 1) {
  4367  			break
  4368  		}
  4369  		v.reset(OpARM64Equal)
  4370  		v0 := b.NewValue0(v.Pos, OpARM64TST, types.TypeFlags)
  4371  		v0.AddArg2(x, y)
  4372  		v.AddArg(v0)
  4373  		return true
  4374  	}
  4375  	// match: (Equal (CMPWconst [0] x:(ANDconst [c] y)))
  4376  	// cond: x.Uses == 1
  4377  	// result: (Equal (TSTWconst [int32(c)] y))
  4378  	for {
  4379  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4380  			break
  4381  		}
  4382  		x := v_0.Args[0]
  4383  		if x.Op != OpARM64ANDconst {
  4384  			break
  4385  		}
  4386  		c := auxIntToInt64(x.AuxInt)
  4387  		y := x.Args[0]
  4388  		if !(x.Uses == 1) {
  4389  			break
  4390  		}
  4391  		v.reset(OpARM64Equal)
  4392  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
  4393  		v0.AuxInt = int32ToAuxInt(int32(c))
  4394  		v0.AddArg(y)
  4395  		v.AddArg(v0)
  4396  		return true
  4397  	}
  4398  	// match: (Equal (CMPWconst [0] z:(AND x y)))
  4399  	// cond: z.Uses == 1
  4400  	// result: (Equal (TSTW x y))
  4401  	for {
  4402  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4403  			break
  4404  		}
  4405  		z := v_0.Args[0]
  4406  		if z.Op != OpARM64AND {
  4407  			break
  4408  		}
  4409  		y := z.Args[1]
  4410  		x := z.Args[0]
  4411  		if !(z.Uses == 1) {
  4412  			break
  4413  		}
  4414  		v.reset(OpARM64Equal)
  4415  		v0 := b.NewValue0(v.Pos, OpARM64TSTW, types.TypeFlags)
  4416  		v0.AddArg2(x, y)
  4417  		v.AddArg(v0)
  4418  		return true
  4419  	}
  4420  	// match: (Equal (CMPconst [0] x:(ANDconst [c] y)))
  4421  	// cond: x.Uses == 1
  4422  	// result: (Equal (TSTconst [c] y))
  4423  	for {
  4424  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  4425  			break
  4426  		}
  4427  		x := v_0.Args[0]
  4428  		if x.Op != OpARM64ANDconst {
  4429  			break
  4430  		}
  4431  		c := auxIntToInt64(x.AuxInt)
  4432  		y := x.Args[0]
  4433  		if !(x.Uses == 1) {
  4434  			break
  4435  		}
  4436  		v.reset(OpARM64Equal)
  4437  		v0 := b.NewValue0(v.Pos, OpARM64TSTconst, types.TypeFlags)
  4438  		v0.AuxInt = int64ToAuxInt(c)
  4439  		v0.AddArg(y)
  4440  		v.AddArg(v0)
  4441  		return true
  4442  	}
  4443  	// match: (Equal (CMP x z:(NEG y)))
  4444  	// cond: z.Uses == 1
  4445  	// result: (Equal (CMN x y))
  4446  	for {
  4447  		if v_0.Op != OpARM64CMP {
  4448  			break
  4449  		}
  4450  		_ = v_0.Args[1]
  4451  		x := v_0.Args[0]
  4452  		z := v_0.Args[1]
  4453  		if z.Op != OpARM64NEG {
  4454  			break
  4455  		}
  4456  		y := z.Args[0]
  4457  		if !(z.Uses == 1) {
  4458  			break
  4459  		}
  4460  		v.reset(OpARM64Equal)
  4461  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  4462  		v0.AddArg2(x, y)
  4463  		v.AddArg(v0)
  4464  		return true
  4465  	}
  4466  	// match: (Equal (CMPW x z:(NEG y)))
  4467  	// cond: z.Uses == 1
  4468  	// result: (Equal (CMNW x y))
  4469  	for {
  4470  		if v_0.Op != OpARM64CMPW {
  4471  			break
  4472  		}
  4473  		_ = v_0.Args[1]
  4474  		x := v_0.Args[0]
  4475  		z := v_0.Args[1]
  4476  		if z.Op != OpARM64NEG {
  4477  			break
  4478  		}
  4479  		y := z.Args[0]
  4480  		if !(z.Uses == 1) {
  4481  			break
  4482  		}
  4483  		v.reset(OpARM64Equal)
  4484  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  4485  		v0.AddArg2(x, y)
  4486  		v.AddArg(v0)
  4487  		return true
  4488  	}
  4489  	// match: (Equal (CMPconst [0] x:(ADDconst [c] y)))
  4490  	// cond: x.Uses == 1
  4491  	// result: (Equal (CMNconst [c] y))
  4492  	for {
  4493  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  4494  			break
  4495  		}
  4496  		x := v_0.Args[0]
  4497  		if x.Op != OpARM64ADDconst {
  4498  			break
  4499  		}
  4500  		c := auxIntToInt64(x.AuxInt)
  4501  		y := x.Args[0]
  4502  		if !(x.Uses == 1) {
  4503  			break
  4504  		}
  4505  		v.reset(OpARM64Equal)
  4506  		v0 := b.NewValue0(v.Pos, OpARM64CMNconst, types.TypeFlags)
  4507  		v0.AuxInt = int64ToAuxInt(c)
  4508  		v0.AddArg(y)
  4509  		v.AddArg(v0)
  4510  		return true
  4511  	}
  4512  	// match: (Equal (CMPWconst [0] x:(ADDconst [c] y)))
  4513  	// cond: x.Uses == 1
  4514  	// result: (Equal (CMNWconst [int32(c)] y))
  4515  	for {
  4516  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4517  			break
  4518  		}
  4519  		x := v_0.Args[0]
  4520  		if x.Op != OpARM64ADDconst {
  4521  			break
  4522  		}
  4523  		c := auxIntToInt64(x.AuxInt)
  4524  		y := x.Args[0]
  4525  		if !(x.Uses == 1) {
  4526  			break
  4527  		}
  4528  		v.reset(OpARM64Equal)
  4529  		v0 := b.NewValue0(v.Pos, OpARM64CMNWconst, types.TypeFlags)
  4530  		v0.AuxInt = int32ToAuxInt(int32(c))
  4531  		v0.AddArg(y)
  4532  		v.AddArg(v0)
  4533  		return true
  4534  	}
  4535  	// match: (Equal (CMPconst [0] z:(ADD x y)))
  4536  	// cond: z.Uses == 1
  4537  	// result: (Equal (CMN x y))
  4538  	for {
  4539  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  4540  			break
  4541  		}
  4542  		z := v_0.Args[0]
  4543  		if z.Op != OpARM64ADD {
  4544  			break
  4545  		}
  4546  		y := z.Args[1]
  4547  		x := z.Args[0]
  4548  		if !(z.Uses == 1) {
  4549  			break
  4550  		}
  4551  		v.reset(OpARM64Equal)
  4552  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  4553  		v0.AddArg2(x, y)
  4554  		v.AddArg(v0)
  4555  		return true
  4556  	}
  4557  	// match: (Equal (CMPWconst [0] z:(ADD x y)))
  4558  	// cond: z.Uses == 1
  4559  	// result: (Equal (CMNW x y))
  4560  	for {
  4561  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4562  			break
  4563  		}
  4564  		z := v_0.Args[0]
  4565  		if z.Op != OpARM64ADD {
  4566  			break
  4567  		}
  4568  		y := z.Args[1]
  4569  		x := z.Args[0]
  4570  		if !(z.Uses == 1) {
  4571  			break
  4572  		}
  4573  		v.reset(OpARM64Equal)
  4574  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  4575  		v0.AddArg2(x, y)
  4576  		v.AddArg(v0)
  4577  		return true
  4578  	}
  4579  	// match: (Equal (CMPconst [0] z:(MADD a x y)))
  4580  	// cond: z.Uses == 1
  4581  	// result: (Equal (CMN a (MUL <x.Type> x y)))
  4582  	for {
  4583  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  4584  			break
  4585  		}
  4586  		z := v_0.Args[0]
  4587  		if z.Op != OpARM64MADD {
  4588  			break
  4589  		}
  4590  		y := z.Args[2]
  4591  		a := z.Args[0]
  4592  		x := z.Args[1]
  4593  		if !(z.Uses == 1) {
  4594  			break
  4595  		}
  4596  		v.reset(OpARM64Equal)
  4597  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  4598  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  4599  		v1.AddArg2(x, y)
  4600  		v0.AddArg2(a, v1)
  4601  		v.AddArg(v0)
  4602  		return true
  4603  	}
  4604  	// match: (Equal (CMPconst [0] z:(MSUB a x y)))
  4605  	// cond: z.Uses == 1
  4606  	// result: (Equal (CMP a (MUL <x.Type> x y)))
  4607  	for {
  4608  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  4609  			break
  4610  		}
  4611  		z := v_0.Args[0]
  4612  		if z.Op != OpARM64MSUB {
  4613  			break
  4614  		}
  4615  		y := z.Args[2]
  4616  		a := z.Args[0]
  4617  		x := z.Args[1]
  4618  		if !(z.Uses == 1) {
  4619  			break
  4620  		}
  4621  		v.reset(OpARM64Equal)
  4622  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
  4623  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  4624  		v1.AddArg2(x, y)
  4625  		v0.AddArg2(a, v1)
  4626  		v.AddArg(v0)
  4627  		return true
  4628  	}
  4629  	// match: (Equal (CMPWconst [0] z:(MADDW a x y)))
  4630  	// cond: z.Uses == 1
  4631  	// result: (Equal (CMNW a (MULW <x.Type> x y)))
  4632  	for {
  4633  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4634  			break
  4635  		}
  4636  		z := v_0.Args[0]
  4637  		if z.Op != OpARM64MADDW {
  4638  			break
  4639  		}
  4640  		y := z.Args[2]
  4641  		a := z.Args[0]
  4642  		x := z.Args[1]
  4643  		if !(z.Uses == 1) {
  4644  			break
  4645  		}
  4646  		v.reset(OpARM64Equal)
  4647  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  4648  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  4649  		v1.AddArg2(x, y)
  4650  		v0.AddArg2(a, v1)
  4651  		v.AddArg(v0)
  4652  		return true
  4653  	}
  4654  	// match: (Equal (CMPWconst [0] z:(MSUBW a x y)))
  4655  	// cond: z.Uses == 1
  4656  	// result: (Equal (CMPW a (MULW <x.Type> x y)))
  4657  	for {
  4658  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4659  			break
  4660  		}
  4661  		z := v_0.Args[0]
  4662  		if z.Op != OpARM64MSUBW {
  4663  			break
  4664  		}
  4665  		y := z.Args[2]
  4666  		a := z.Args[0]
  4667  		x := z.Args[1]
  4668  		if !(z.Uses == 1) {
  4669  			break
  4670  		}
  4671  		v.reset(OpARM64Equal)
  4672  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
  4673  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  4674  		v1.AddArg2(x, y)
  4675  		v0.AddArg2(a, v1)
  4676  		v.AddArg(v0)
  4677  		return true
  4678  	}
  4679  	// match: (Equal (FlagConstant [fc]))
  4680  	// result: (MOVDconst [b2i(fc.eq())])
  4681  	for {
  4682  		if v_0.Op != OpARM64FlagConstant {
  4683  			break
  4684  		}
  4685  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4686  		v.reset(OpARM64MOVDconst)
  4687  		v.AuxInt = int64ToAuxInt(b2i(fc.eq()))
  4688  		return true
  4689  	}
  4690  	// match: (Equal (InvertFlags x))
  4691  	// result: (Equal x)
  4692  	for {
  4693  		if v_0.Op != OpARM64InvertFlags {
  4694  			break
  4695  		}
  4696  		x := v_0.Args[0]
  4697  		v.reset(OpARM64Equal)
  4698  		v.AddArg(x)
  4699  		return true
  4700  	}
  4701  	return false
  4702  }
  4703  func rewriteValueARM64_OpARM64FADDD(v *Value) bool {
  4704  	v_1 := v.Args[1]
  4705  	v_0 := v.Args[0]
  4706  	// match: (FADDD a (FMULD x y))
  4707  	// cond: a.Block.Func.useFMA(v)
  4708  	// result: (FMADDD a x y)
  4709  	for {
  4710  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4711  			a := v_0
  4712  			if v_1.Op != OpARM64FMULD {
  4713  				continue
  4714  			}
  4715  			y := v_1.Args[1]
  4716  			x := v_1.Args[0]
  4717  			if !(a.Block.Func.useFMA(v)) {
  4718  				continue
  4719  			}
  4720  			v.reset(OpARM64FMADDD)
  4721  			v.AddArg3(a, x, y)
  4722  			return true
  4723  		}
  4724  		break
  4725  	}
  4726  	// match: (FADDD a (FNMULD x y))
  4727  	// cond: a.Block.Func.useFMA(v)
  4728  	// result: (FMSUBD a x y)
  4729  	for {
  4730  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4731  			a := v_0
  4732  			if v_1.Op != OpARM64FNMULD {
  4733  				continue
  4734  			}
  4735  			y := v_1.Args[1]
  4736  			x := v_1.Args[0]
  4737  			if !(a.Block.Func.useFMA(v)) {
  4738  				continue
  4739  			}
  4740  			v.reset(OpARM64FMSUBD)
  4741  			v.AddArg3(a, x, y)
  4742  			return true
  4743  		}
  4744  		break
  4745  	}
  4746  	return false
  4747  }
  4748  func rewriteValueARM64_OpARM64FADDS(v *Value) bool {
  4749  	v_1 := v.Args[1]
  4750  	v_0 := v.Args[0]
  4751  	// match: (FADDS a (FMULS x y))
  4752  	// cond: a.Block.Func.useFMA(v)
  4753  	// result: (FMADDS a x y)
  4754  	for {
  4755  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4756  			a := v_0
  4757  			if v_1.Op != OpARM64FMULS {
  4758  				continue
  4759  			}
  4760  			y := v_1.Args[1]
  4761  			x := v_1.Args[0]
  4762  			if !(a.Block.Func.useFMA(v)) {
  4763  				continue
  4764  			}
  4765  			v.reset(OpARM64FMADDS)
  4766  			v.AddArg3(a, x, y)
  4767  			return true
  4768  		}
  4769  		break
  4770  	}
  4771  	// match: (FADDS a (FNMULS x y))
  4772  	// cond: a.Block.Func.useFMA(v)
  4773  	// result: (FMSUBS a x y)
  4774  	for {
  4775  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4776  			a := v_0
  4777  			if v_1.Op != OpARM64FNMULS {
  4778  				continue
  4779  			}
  4780  			y := v_1.Args[1]
  4781  			x := v_1.Args[0]
  4782  			if !(a.Block.Func.useFMA(v)) {
  4783  				continue
  4784  			}
  4785  			v.reset(OpARM64FMSUBS)
  4786  			v.AddArg3(a, x, y)
  4787  			return true
  4788  		}
  4789  		break
  4790  	}
  4791  	return false
  4792  }
  4793  func rewriteValueARM64_OpARM64FCMPD(v *Value) bool {
  4794  	v_1 := v.Args[1]
  4795  	v_0 := v.Args[0]
  4796  	b := v.Block
  4797  	// match: (FCMPD x (FMOVDconst [0]))
  4798  	// result: (FCMPD0 x)
  4799  	for {
  4800  		x := v_0
  4801  		if v_1.Op != OpARM64FMOVDconst || auxIntToFloat64(v_1.AuxInt) != 0 {
  4802  			break
  4803  		}
  4804  		v.reset(OpARM64FCMPD0)
  4805  		v.AddArg(x)
  4806  		return true
  4807  	}
  4808  	// match: (FCMPD (FMOVDconst [0]) x)
  4809  	// result: (InvertFlags (FCMPD0 x))
  4810  	for {
  4811  		if v_0.Op != OpARM64FMOVDconst || auxIntToFloat64(v_0.AuxInt) != 0 {
  4812  			break
  4813  		}
  4814  		x := v_1
  4815  		v.reset(OpARM64InvertFlags)
  4816  		v0 := b.NewValue0(v.Pos, OpARM64FCMPD0, types.TypeFlags)
  4817  		v0.AddArg(x)
  4818  		v.AddArg(v0)
  4819  		return true
  4820  	}
  4821  	return false
  4822  }
  4823  func rewriteValueARM64_OpARM64FCMPS(v *Value) bool {
  4824  	v_1 := v.Args[1]
  4825  	v_0 := v.Args[0]
  4826  	b := v.Block
  4827  	// match: (FCMPS x (FMOVSconst [0]))
  4828  	// result: (FCMPS0 x)
  4829  	for {
  4830  		x := v_0
  4831  		if v_1.Op != OpARM64FMOVSconst || auxIntToFloat64(v_1.AuxInt) != 0 {
  4832  			break
  4833  		}
  4834  		v.reset(OpARM64FCMPS0)
  4835  		v.AddArg(x)
  4836  		return true
  4837  	}
  4838  	// match: (FCMPS (FMOVSconst [0]) x)
  4839  	// result: (InvertFlags (FCMPS0 x))
  4840  	for {
  4841  		if v_0.Op != OpARM64FMOVSconst || auxIntToFloat64(v_0.AuxInt) != 0 {
  4842  			break
  4843  		}
  4844  		x := v_1
  4845  		v.reset(OpARM64InvertFlags)
  4846  		v0 := b.NewValue0(v.Pos, OpARM64FCMPS0, types.TypeFlags)
  4847  		v0.AddArg(x)
  4848  		v.AddArg(v0)
  4849  		return true
  4850  	}
  4851  	return false
  4852  }
  4853  func rewriteValueARM64_OpARM64FCVTDS(v *Value) bool {
  4854  	v_0 := v.Args[0]
  4855  	// match: (FCVTDS (FABSD (FCVTSD x)))
  4856  	// result: (FABSS x)
  4857  	for {
  4858  		if v_0.Op != OpARM64FABSD {
  4859  			break
  4860  		}
  4861  		v_0_0 := v_0.Args[0]
  4862  		if v_0_0.Op != OpARM64FCVTSD {
  4863  			break
  4864  		}
  4865  		x := v_0_0.Args[0]
  4866  		v.reset(OpARM64FABSS)
  4867  		v.AddArg(x)
  4868  		return true
  4869  	}
  4870  	// match: (FCVTDS (FSQRTD (FCVTSD x)))
  4871  	// result: (FSQRTS x)
  4872  	for {
  4873  		if v_0.Op != OpARM64FSQRTD {
  4874  			break
  4875  		}
  4876  		v_0_0 := v_0.Args[0]
  4877  		if v_0_0.Op != OpARM64FCVTSD {
  4878  			break
  4879  		}
  4880  		x := v_0_0.Args[0]
  4881  		v.reset(OpARM64FSQRTS)
  4882  		v.AddArg(x)
  4883  		return true
  4884  	}
  4885  	// match: (FCVTDS (FRINTPD (FCVTSD x)))
  4886  	// result: (FRINTPS x)
  4887  	for {
  4888  		if v_0.Op != OpARM64FRINTPD {
  4889  			break
  4890  		}
  4891  		v_0_0 := v_0.Args[0]
  4892  		if v_0_0.Op != OpARM64FCVTSD {
  4893  			break
  4894  		}
  4895  		x := v_0_0.Args[0]
  4896  		v.reset(OpARM64FRINTPS)
  4897  		v.AddArg(x)
  4898  		return true
  4899  	}
  4900  	// match: (FCVTDS (FRINTMD (FCVTSD x)))
  4901  	// result: (FRINTMS x)
  4902  	for {
  4903  		if v_0.Op != OpARM64FRINTMD {
  4904  			break
  4905  		}
  4906  		v_0_0 := v_0.Args[0]
  4907  		if v_0_0.Op != OpARM64FCVTSD {
  4908  			break
  4909  		}
  4910  		x := v_0_0.Args[0]
  4911  		v.reset(OpARM64FRINTMS)
  4912  		v.AddArg(x)
  4913  		return true
  4914  	}
  4915  	// match: (FCVTDS (FRINTAD (FCVTSD x)))
  4916  	// result: (FRINTAS x)
  4917  	for {
  4918  		if v_0.Op != OpARM64FRINTAD {
  4919  			break
  4920  		}
  4921  		v_0_0 := v_0.Args[0]
  4922  		if v_0_0.Op != OpARM64FCVTSD {
  4923  			break
  4924  		}
  4925  		x := v_0_0.Args[0]
  4926  		v.reset(OpARM64FRINTAS)
  4927  		v.AddArg(x)
  4928  		return true
  4929  	}
  4930  	// match: (FCVTDS (FRINTND (FCVTSD x)))
  4931  	// result: (FRINTNS x)
  4932  	for {
  4933  		if v_0.Op != OpARM64FRINTND {
  4934  			break
  4935  		}
  4936  		v_0_0 := v_0.Args[0]
  4937  		if v_0_0.Op != OpARM64FCVTSD {
  4938  			break
  4939  		}
  4940  		x := v_0_0.Args[0]
  4941  		v.reset(OpARM64FRINTNS)
  4942  		v.AddArg(x)
  4943  		return true
  4944  	}
  4945  	// match: (FCVTDS (FRINTZD (FCVTSD x)))
  4946  	// result: (FRINTZS x)
  4947  	for {
  4948  		if v_0.Op != OpARM64FRINTZD {
  4949  			break
  4950  		}
  4951  		v_0_0 := v_0.Args[0]
  4952  		if v_0_0.Op != OpARM64FCVTSD {
  4953  			break
  4954  		}
  4955  		x := v_0_0.Args[0]
  4956  		v.reset(OpARM64FRINTZS)
  4957  		v.AddArg(x)
  4958  		return true
  4959  	}
  4960  	return false
  4961  }
  4962  func rewriteValueARM64_OpARM64FLDPQ(v *Value) bool {
  4963  	v_1 := v.Args[1]
  4964  	v_0 := v.Args[0]
  4965  	b := v.Block
  4966  	config := b.Func.Config
  4967  	// match: (FLDPQ [off1] {sym} (ADDconst [off2] ptr) mem)
  4968  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  4969  	// result: (FLDPQ [off1+int32(off2)] {sym} ptr mem)
  4970  	for {
  4971  		off1 := auxIntToInt32(v.AuxInt)
  4972  		sym := auxToSym(v.Aux)
  4973  		if v_0.Op != OpARM64ADDconst {
  4974  			break
  4975  		}
  4976  		off2 := auxIntToInt64(v_0.AuxInt)
  4977  		ptr := v_0.Args[0]
  4978  		mem := v_1
  4979  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  4980  			break
  4981  		}
  4982  		v.reset(OpARM64FLDPQ)
  4983  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4984  		v.Aux = symToAux(sym)
  4985  		v.AddArg2(ptr, mem)
  4986  		return true
  4987  	}
  4988  	// match: (FLDPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  4989  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  4990  	// result: (FLDPQ [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4991  	for {
  4992  		off1 := auxIntToInt32(v.AuxInt)
  4993  		sym1 := auxToSym(v.Aux)
  4994  		if v_0.Op != OpARM64MOVDaddr {
  4995  			break
  4996  		}
  4997  		off2 := auxIntToInt32(v_0.AuxInt)
  4998  		sym2 := auxToSym(v_0.Aux)
  4999  		ptr := v_0.Args[0]
  5000  		mem := v_1
  5001  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5002  			break
  5003  		}
  5004  		v.reset(OpARM64FLDPQ)
  5005  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5006  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5007  		v.AddArg2(ptr, mem)
  5008  		return true
  5009  	}
  5010  	return false
  5011  }
  5012  func rewriteValueARM64_OpARM64FMOVDfpgp(v *Value) bool {
  5013  	v_0 := v.Args[0]
  5014  	b := v.Block
  5015  	// match: (FMOVDfpgp <t> (Arg [off] {sym}))
  5016  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  5017  	for {
  5018  		t := v.Type
  5019  		if v_0.Op != OpArg {
  5020  			break
  5021  		}
  5022  		off := auxIntToInt32(v_0.AuxInt)
  5023  		sym := auxToSym(v_0.Aux)
  5024  		b = b.Func.Entry
  5025  		v0 := b.NewValue0(v.Pos, OpArg, t)
  5026  		v.copyOf(v0)
  5027  		v0.AuxInt = int32ToAuxInt(off)
  5028  		v0.Aux = symToAux(sym)
  5029  		return true
  5030  	}
  5031  	return false
  5032  }
  5033  func rewriteValueARM64_OpARM64FMOVDgpfp(v *Value) bool {
  5034  	v_0 := v.Args[0]
  5035  	b := v.Block
  5036  	// match: (FMOVDgpfp <t> (Arg [off] {sym}))
  5037  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  5038  	for {
  5039  		t := v.Type
  5040  		if v_0.Op != OpArg {
  5041  			break
  5042  		}
  5043  		off := auxIntToInt32(v_0.AuxInt)
  5044  		sym := auxToSym(v_0.Aux)
  5045  		b = b.Func.Entry
  5046  		v0 := b.NewValue0(v.Pos, OpArg, t)
  5047  		v.copyOf(v0)
  5048  		v0.AuxInt = int32ToAuxInt(off)
  5049  		v0.Aux = symToAux(sym)
  5050  		return true
  5051  	}
  5052  	return false
  5053  }
  5054  func rewriteValueARM64_OpARM64FMOVDload(v *Value) bool {
  5055  	v_1 := v.Args[1]
  5056  	v_0 := v.Args[0]
  5057  	b := v.Block
  5058  	config := b.Func.Config
  5059  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  5060  	// result: (FMOVDgpfp val)
  5061  	for {
  5062  		off := auxIntToInt32(v.AuxInt)
  5063  		sym := auxToSym(v.Aux)
  5064  		ptr := v_0
  5065  		if v_1.Op != OpARM64MOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  5066  			break
  5067  		}
  5068  		val := v_1.Args[1]
  5069  		if ptr != v_1.Args[0] {
  5070  			break
  5071  		}
  5072  		v.reset(OpARM64FMOVDgpfp)
  5073  		v.AddArg(val)
  5074  		return true
  5075  	}
  5076  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  5077  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5078  	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
  5079  	for {
  5080  		off1 := auxIntToInt32(v.AuxInt)
  5081  		sym := auxToSym(v.Aux)
  5082  		if v_0.Op != OpARM64ADDconst {
  5083  			break
  5084  		}
  5085  		off2 := auxIntToInt64(v_0.AuxInt)
  5086  		ptr := v_0.Args[0]
  5087  		mem := v_1
  5088  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5089  			break
  5090  		}
  5091  		v.reset(OpARM64FMOVDload)
  5092  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  5093  		v.Aux = symToAux(sym)
  5094  		v.AddArg2(ptr, mem)
  5095  		return true
  5096  	}
  5097  	// match: (FMOVDload [off] {sym} (ADD ptr idx) mem)
  5098  	// cond: off == 0 && sym == nil
  5099  	// result: (FMOVDloadidx ptr idx mem)
  5100  	for {
  5101  		off := auxIntToInt32(v.AuxInt)
  5102  		sym := auxToSym(v.Aux)
  5103  		if v_0.Op != OpARM64ADD {
  5104  			break
  5105  		}
  5106  		idx := v_0.Args[1]
  5107  		ptr := v_0.Args[0]
  5108  		mem := v_1
  5109  		if !(off == 0 && sym == nil) {
  5110  			break
  5111  		}
  5112  		v.reset(OpARM64FMOVDloadidx)
  5113  		v.AddArg3(ptr, idx, mem)
  5114  		return true
  5115  	}
  5116  	// match: (FMOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  5117  	// cond: off == 0 && sym == nil
  5118  	// result: (FMOVDloadidx8 ptr idx mem)
  5119  	for {
  5120  		off := auxIntToInt32(v.AuxInt)
  5121  		sym := auxToSym(v.Aux)
  5122  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  5123  			break
  5124  		}
  5125  		idx := v_0.Args[1]
  5126  		ptr := v_0.Args[0]
  5127  		mem := v_1
  5128  		if !(off == 0 && sym == nil) {
  5129  			break
  5130  		}
  5131  		v.reset(OpARM64FMOVDloadidx8)
  5132  		v.AddArg3(ptr, idx, mem)
  5133  		return true
  5134  	}
  5135  	// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  5136  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5137  	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  5138  	for {
  5139  		off1 := auxIntToInt32(v.AuxInt)
  5140  		sym1 := auxToSym(v.Aux)
  5141  		if v_0.Op != OpARM64MOVDaddr {
  5142  			break
  5143  		}
  5144  		off2 := auxIntToInt32(v_0.AuxInt)
  5145  		sym2 := auxToSym(v_0.Aux)
  5146  		ptr := v_0.Args[0]
  5147  		mem := v_1
  5148  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5149  			break
  5150  		}
  5151  		v.reset(OpARM64FMOVDload)
  5152  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5153  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5154  		v.AddArg2(ptr, mem)
  5155  		return true
  5156  	}
  5157  	return false
  5158  }
  5159  func rewriteValueARM64_OpARM64FMOVDloadidx(v *Value) bool {
  5160  	v_2 := v.Args[2]
  5161  	v_1 := v.Args[1]
  5162  	v_0 := v.Args[0]
  5163  	// match: (FMOVDloadidx ptr (MOVDconst [c]) mem)
  5164  	// cond: is32Bit(c)
  5165  	// result: (FMOVDload [int32(c)] ptr mem)
  5166  	for {
  5167  		ptr := v_0
  5168  		if v_1.Op != OpARM64MOVDconst {
  5169  			break
  5170  		}
  5171  		c := auxIntToInt64(v_1.AuxInt)
  5172  		mem := v_2
  5173  		if !(is32Bit(c)) {
  5174  			break
  5175  		}
  5176  		v.reset(OpARM64FMOVDload)
  5177  		v.AuxInt = int32ToAuxInt(int32(c))
  5178  		v.AddArg2(ptr, mem)
  5179  		return true
  5180  	}
  5181  	// match: (FMOVDloadidx (MOVDconst [c]) ptr mem)
  5182  	// cond: is32Bit(c)
  5183  	// result: (FMOVDload [int32(c)] ptr mem)
  5184  	for {
  5185  		if v_0.Op != OpARM64MOVDconst {
  5186  			break
  5187  		}
  5188  		c := auxIntToInt64(v_0.AuxInt)
  5189  		ptr := v_1
  5190  		mem := v_2
  5191  		if !(is32Bit(c)) {
  5192  			break
  5193  		}
  5194  		v.reset(OpARM64FMOVDload)
  5195  		v.AuxInt = int32ToAuxInt(int32(c))
  5196  		v.AddArg2(ptr, mem)
  5197  		return true
  5198  	}
  5199  	// match: (FMOVDloadidx ptr (SLLconst [3] idx) mem)
  5200  	// result: (FMOVDloadidx8 ptr idx mem)
  5201  	for {
  5202  		ptr := v_0
  5203  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
  5204  			break
  5205  		}
  5206  		idx := v_1.Args[0]
  5207  		mem := v_2
  5208  		v.reset(OpARM64FMOVDloadidx8)
  5209  		v.AddArg3(ptr, idx, mem)
  5210  		return true
  5211  	}
  5212  	// match: (FMOVDloadidx (SLLconst [3] idx) ptr mem)
  5213  	// result: (FMOVDloadidx8 ptr idx mem)
  5214  	for {
  5215  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
  5216  			break
  5217  		}
  5218  		idx := v_0.Args[0]
  5219  		ptr := v_1
  5220  		mem := v_2
  5221  		v.reset(OpARM64FMOVDloadidx8)
  5222  		v.AddArg3(ptr, idx, mem)
  5223  		return true
  5224  	}
  5225  	return false
  5226  }
  5227  func rewriteValueARM64_OpARM64FMOVDloadidx8(v *Value) bool {
  5228  	v_2 := v.Args[2]
  5229  	v_1 := v.Args[1]
  5230  	v_0 := v.Args[0]
  5231  	// match: (FMOVDloadidx8 ptr (MOVDconst [c]) mem)
  5232  	// cond: is32Bit(c<<3)
  5233  	// result: (FMOVDload ptr [int32(c)<<3] mem)
  5234  	for {
  5235  		ptr := v_0
  5236  		if v_1.Op != OpARM64MOVDconst {
  5237  			break
  5238  		}
  5239  		c := auxIntToInt64(v_1.AuxInt)
  5240  		mem := v_2
  5241  		if !(is32Bit(c << 3)) {
  5242  			break
  5243  		}
  5244  		v.reset(OpARM64FMOVDload)
  5245  		v.AuxInt = int32ToAuxInt(int32(c) << 3)
  5246  		v.AddArg2(ptr, mem)
  5247  		return true
  5248  	}
  5249  	return false
  5250  }
  5251  func rewriteValueARM64_OpARM64FMOVDstore(v *Value) bool {
  5252  	v_2 := v.Args[2]
  5253  	v_1 := v.Args[1]
  5254  	v_0 := v.Args[0]
  5255  	b := v.Block
  5256  	config := b.Func.Config
  5257  	// match: (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem)
  5258  	// result: (MOVDstore [off] {sym} ptr val mem)
  5259  	for {
  5260  		off := auxIntToInt32(v.AuxInt)
  5261  		sym := auxToSym(v.Aux)
  5262  		ptr := v_0
  5263  		if v_1.Op != OpARM64FMOVDgpfp {
  5264  			break
  5265  		}
  5266  		val := v_1.Args[0]
  5267  		mem := v_2
  5268  		v.reset(OpARM64MOVDstore)
  5269  		v.AuxInt = int32ToAuxInt(off)
  5270  		v.Aux = symToAux(sym)
  5271  		v.AddArg3(ptr, val, mem)
  5272  		return true
  5273  	}
  5274  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  5275  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5276  	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
  5277  	for {
  5278  		off1 := auxIntToInt32(v.AuxInt)
  5279  		sym := auxToSym(v.Aux)
  5280  		if v_0.Op != OpARM64ADDconst {
  5281  			break
  5282  		}
  5283  		off2 := auxIntToInt64(v_0.AuxInt)
  5284  		ptr := v_0.Args[0]
  5285  		val := v_1
  5286  		mem := v_2
  5287  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5288  			break
  5289  		}
  5290  		v.reset(OpARM64FMOVDstore)
  5291  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  5292  		v.Aux = symToAux(sym)
  5293  		v.AddArg3(ptr, val, mem)
  5294  		return true
  5295  	}
  5296  	// match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem)
  5297  	// cond: off == 0 && sym == nil
  5298  	// result: (FMOVDstoreidx ptr idx val mem)
  5299  	for {
  5300  		off := auxIntToInt32(v.AuxInt)
  5301  		sym := auxToSym(v.Aux)
  5302  		if v_0.Op != OpARM64ADD {
  5303  			break
  5304  		}
  5305  		idx := v_0.Args[1]
  5306  		ptr := v_0.Args[0]
  5307  		val := v_1
  5308  		mem := v_2
  5309  		if !(off == 0 && sym == nil) {
  5310  			break
  5311  		}
  5312  		v.reset(OpARM64FMOVDstoreidx)
  5313  		v.AddArg4(ptr, idx, val, mem)
  5314  		return true
  5315  	}
  5316  	// match: (FMOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  5317  	// cond: off == 0 && sym == nil
  5318  	// result: (FMOVDstoreidx8 ptr idx val mem)
  5319  	for {
  5320  		off := auxIntToInt32(v.AuxInt)
  5321  		sym := auxToSym(v.Aux)
  5322  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  5323  			break
  5324  		}
  5325  		idx := v_0.Args[1]
  5326  		ptr := v_0.Args[0]
  5327  		val := v_1
  5328  		mem := v_2
  5329  		if !(off == 0 && sym == nil) {
  5330  			break
  5331  		}
  5332  		v.reset(OpARM64FMOVDstoreidx8)
  5333  		v.AddArg4(ptr, idx, val, mem)
  5334  		return true
  5335  	}
  5336  	// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  5337  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5338  	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  5339  	for {
  5340  		off1 := auxIntToInt32(v.AuxInt)
  5341  		sym1 := auxToSym(v.Aux)
  5342  		if v_0.Op != OpARM64MOVDaddr {
  5343  			break
  5344  		}
  5345  		off2 := auxIntToInt32(v_0.AuxInt)
  5346  		sym2 := auxToSym(v_0.Aux)
  5347  		ptr := v_0.Args[0]
  5348  		val := v_1
  5349  		mem := v_2
  5350  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5351  			break
  5352  		}
  5353  		v.reset(OpARM64FMOVDstore)
  5354  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5355  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5356  		v.AddArg3(ptr, val, mem)
  5357  		return true
  5358  	}
  5359  	return false
  5360  }
  5361  func rewriteValueARM64_OpARM64FMOVDstoreidx(v *Value) bool {
  5362  	v_3 := v.Args[3]
  5363  	v_2 := v.Args[2]
  5364  	v_1 := v.Args[1]
  5365  	v_0 := v.Args[0]
  5366  	// match: (FMOVDstoreidx ptr (MOVDconst [c]) val mem)
  5367  	// cond: is32Bit(c)
  5368  	// result: (FMOVDstore [int32(c)] ptr val mem)
  5369  	for {
  5370  		ptr := v_0
  5371  		if v_1.Op != OpARM64MOVDconst {
  5372  			break
  5373  		}
  5374  		c := auxIntToInt64(v_1.AuxInt)
  5375  		val := v_2
  5376  		mem := v_3
  5377  		if !(is32Bit(c)) {
  5378  			break
  5379  		}
  5380  		v.reset(OpARM64FMOVDstore)
  5381  		v.AuxInt = int32ToAuxInt(int32(c))
  5382  		v.AddArg3(ptr, val, mem)
  5383  		return true
  5384  	}
  5385  	// match: (FMOVDstoreidx (MOVDconst [c]) idx val mem)
  5386  	// cond: is32Bit(c)
  5387  	// result: (FMOVDstore [int32(c)] idx val mem)
  5388  	for {
  5389  		if v_0.Op != OpARM64MOVDconst {
  5390  			break
  5391  		}
  5392  		c := auxIntToInt64(v_0.AuxInt)
  5393  		idx := v_1
  5394  		val := v_2
  5395  		mem := v_3
  5396  		if !(is32Bit(c)) {
  5397  			break
  5398  		}
  5399  		v.reset(OpARM64FMOVDstore)
  5400  		v.AuxInt = int32ToAuxInt(int32(c))
  5401  		v.AddArg3(idx, val, mem)
  5402  		return true
  5403  	}
  5404  	// match: (FMOVDstoreidx ptr (SLLconst [3] idx) val mem)
  5405  	// result: (FMOVDstoreidx8 ptr idx val mem)
  5406  	for {
  5407  		ptr := v_0
  5408  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
  5409  			break
  5410  		}
  5411  		idx := v_1.Args[0]
  5412  		val := v_2
  5413  		mem := v_3
  5414  		v.reset(OpARM64FMOVDstoreidx8)
  5415  		v.AddArg4(ptr, idx, val, mem)
  5416  		return true
  5417  	}
  5418  	// match: (FMOVDstoreidx (SLLconst [3] idx) ptr val mem)
  5419  	// result: (FMOVDstoreidx8 ptr idx val mem)
  5420  	for {
  5421  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
  5422  			break
  5423  		}
  5424  		idx := v_0.Args[0]
  5425  		ptr := v_1
  5426  		val := v_2
  5427  		mem := v_3
  5428  		v.reset(OpARM64FMOVDstoreidx8)
  5429  		v.AddArg4(ptr, idx, val, mem)
  5430  		return true
  5431  	}
  5432  	return false
  5433  }
  5434  func rewriteValueARM64_OpARM64FMOVDstoreidx8(v *Value) bool {
  5435  	v_3 := v.Args[3]
  5436  	v_2 := v.Args[2]
  5437  	v_1 := v.Args[1]
  5438  	v_0 := v.Args[0]
  5439  	// match: (FMOVDstoreidx8 ptr (MOVDconst [c]) val mem)
  5440  	// cond: is32Bit(c<<3)
  5441  	// result: (FMOVDstore [int32(c)<<3] ptr val mem)
  5442  	for {
  5443  		ptr := v_0
  5444  		if v_1.Op != OpARM64MOVDconst {
  5445  			break
  5446  		}
  5447  		c := auxIntToInt64(v_1.AuxInt)
  5448  		val := v_2
  5449  		mem := v_3
  5450  		if !(is32Bit(c << 3)) {
  5451  			break
  5452  		}
  5453  		v.reset(OpARM64FMOVDstore)
  5454  		v.AuxInt = int32ToAuxInt(int32(c) << 3)
  5455  		v.AddArg3(ptr, val, mem)
  5456  		return true
  5457  	}
  5458  	return false
  5459  }
  5460  func rewriteValueARM64_OpARM64FMOVQload(v *Value) bool {
  5461  	v_1 := v.Args[1]
  5462  	v_0 := v.Args[0]
  5463  	b := v.Block
  5464  	config := b.Func.Config
  5465  	// match: (FMOVQload [off1] {sym} (ADDconst [off2] ptr) mem)
  5466  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5467  	// result: (FMOVQload [off1+int32(off2)] {sym} ptr mem)
  5468  	for {
  5469  		off1 := auxIntToInt32(v.AuxInt)
  5470  		sym := auxToSym(v.Aux)
  5471  		if v_0.Op != OpARM64ADDconst {
  5472  			break
  5473  		}
  5474  		off2 := auxIntToInt64(v_0.AuxInt)
  5475  		ptr := v_0.Args[0]
  5476  		mem := v_1
  5477  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5478  			break
  5479  		}
  5480  		v.reset(OpARM64FMOVQload)
  5481  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  5482  		v.Aux = symToAux(sym)
  5483  		v.AddArg2(ptr, mem)
  5484  		return true
  5485  	}
  5486  	// match: (FMOVQload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  5487  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5488  	// result: (FMOVQload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  5489  	for {
  5490  		off1 := auxIntToInt32(v.AuxInt)
  5491  		sym1 := auxToSym(v.Aux)
  5492  		if v_0.Op != OpARM64MOVDaddr {
  5493  			break
  5494  		}
  5495  		off2 := auxIntToInt32(v_0.AuxInt)
  5496  		sym2 := auxToSym(v_0.Aux)
  5497  		ptr := v_0.Args[0]
  5498  		mem := v_1
  5499  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5500  			break
  5501  		}
  5502  		v.reset(OpARM64FMOVQload)
  5503  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5504  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5505  		v.AddArg2(ptr, mem)
  5506  		return true
  5507  	}
  5508  	return false
  5509  }
  5510  func rewriteValueARM64_OpARM64FMOVQstore(v *Value) bool {
  5511  	v_2 := v.Args[2]
  5512  	v_1 := v.Args[1]
  5513  	v_0 := v.Args[0]
  5514  	b := v.Block
  5515  	config := b.Func.Config
  5516  	// match: (FMOVQstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  5517  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5518  	// result: (FMOVQstore [off1+int32(off2)] {sym} ptr val mem)
  5519  	for {
  5520  		off1 := auxIntToInt32(v.AuxInt)
  5521  		sym := auxToSym(v.Aux)
  5522  		if v_0.Op != OpARM64ADDconst {
  5523  			break
  5524  		}
  5525  		off2 := auxIntToInt64(v_0.AuxInt)
  5526  		ptr := v_0.Args[0]
  5527  		val := v_1
  5528  		mem := v_2
  5529  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5530  			break
  5531  		}
  5532  		v.reset(OpARM64FMOVQstore)
  5533  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  5534  		v.Aux = symToAux(sym)
  5535  		v.AddArg3(ptr, val, mem)
  5536  		return true
  5537  	}
  5538  	// match: (FMOVQstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  5539  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5540  	// result: (FMOVQstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  5541  	for {
  5542  		off1 := auxIntToInt32(v.AuxInt)
  5543  		sym1 := auxToSym(v.Aux)
  5544  		if v_0.Op != OpARM64MOVDaddr {
  5545  			break
  5546  		}
  5547  		off2 := auxIntToInt32(v_0.AuxInt)
  5548  		sym2 := auxToSym(v_0.Aux)
  5549  		ptr := v_0.Args[0]
  5550  		val := v_1
  5551  		mem := v_2
  5552  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5553  			break
  5554  		}
  5555  		v.reset(OpARM64FMOVQstore)
  5556  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5557  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5558  		v.AddArg3(ptr, val, mem)
  5559  		return true
  5560  	}
  5561  	return false
  5562  }
  5563  func rewriteValueARM64_OpARM64FMOVSload(v *Value) bool {
  5564  	v_1 := v.Args[1]
  5565  	v_0 := v.Args[0]
  5566  	b := v.Block
  5567  	config := b.Func.Config
  5568  	// match: (FMOVSload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  5569  	// result: (FMOVSgpfp val)
  5570  	for {
  5571  		off := auxIntToInt32(v.AuxInt)
  5572  		sym := auxToSym(v.Aux)
  5573  		ptr := v_0
  5574  		if v_1.Op != OpARM64MOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  5575  			break
  5576  		}
  5577  		val := v_1.Args[1]
  5578  		if ptr != v_1.Args[0] {
  5579  			break
  5580  		}
  5581  		v.reset(OpARM64FMOVSgpfp)
  5582  		v.AddArg(val)
  5583  		return true
  5584  	}
  5585  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  5586  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5587  	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
  5588  	for {
  5589  		off1 := auxIntToInt32(v.AuxInt)
  5590  		sym := auxToSym(v.Aux)
  5591  		if v_0.Op != OpARM64ADDconst {
  5592  			break
  5593  		}
  5594  		off2 := auxIntToInt64(v_0.AuxInt)
  5595  		ptr := v_0.Args[0]
  5596  		mem := v_1
  5597  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5598  			break
  5599  		}
  5600  		v.reset(OpARM64FMOVSload)
  5601  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  5602  		v.Aux = symToAux(sym)
  5603  		v.AddArg2(ptr, mem)
  5604  		return true
  5605  	}
  5606  	// match: (FMOVSload [off] {sym} (ADD ptr idx) mem)
  5607  	// cond: off == 0 && sym == nil
  5608  	// result: (FMOVSloadidx ptr idx mem)
  5609  	for {
  5610  		off := auxIntToInt32(v.AuxInt)
  5611  		sym := auxToSym(v.Aux)
  5612  		if v_0.Op != OpARM64ADD {
  5613  			break
  5614  		}
  5615  		idx := v_0.Args[1]
  5616  		ptr := v_0.Args[0]
  5617  		mem := v_1
  5618  		if !(off == 0 && sym == nil) {
  5619  			break
  5620  		}
  5621  		v.reset(OpARM64FMOVSloadidx)
  5622  		v.AddArg3(ptr, idx, mem)
  5623  		return true
  5624  	}
  5625  	// match: (FMOVSload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
  5626  	// cond: off == 0 && sym == nil
  5627  	// result: (FMOVSloadidx4 ptr idx mem)
  5628  	for {
  5629  		off := auxIntToInt32(v.AuxInt)
  5630  		sym := auxToSym(v.Aux)
  5631  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
  5632  			break
  5633  		}
  5634  		idx := v_0.Args[1]
  5635  		ptr := v_0.Args[0]
  5636  		mem := v_1
  5637  		if !(off == 0 && sym == nil) {
  5638  			break
  5639  		}
  5640  		v.reset(OpARM64FMOVSloadidx4)
  5641  		v.AddArg3(ptr, idx, mem)
  5642  		return true
  5643  	}
  5644  	// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  5645  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5646  	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  5647  	for {
  5648  		off1 := auxIntToInt32(v.AuxInt)
  5649  		sym1 := auxToSym(v.Aux)
  5650  		if v_0.Op != OpARM64MOVDaddr {
  5651  			break
  5652  		}
  5653  		off2 := auxIntToInt32(v_0.AuxInt)
  5654  		sym2 := auxToSym(v_0.Aux)
  5655  		ptr := v_0.Args[0]
  5656  		mem := v_1
  5657  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5658  			break
  5659  		}
  5660  		v.reset(OpARM64FMOVSload)
  5661  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5662  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5663  		v.AddArg2(ptr, mem)
  5664  		return true
  5665  	}
  5666  	return false
  5667  }
  5668  func rewriteValueARM64_OpARM64FMOVSloadidx(v *Value) bool {
  5669  	v_2 := v.Args[2]
  5670  	v_1 := v.Args[1]
  5671  	v_0 := v.Args[0]
  5672  	// match: (FMOVSloadidx ptr (MOVDconst [c]) mem)
  5673  	// cond: is32Bit(c)
  5674  	// result: (FMOVSload [int32(c)] ptr mem)
  5675  	for {
  5676  		ptr := v_0
  5677  		if v_1.Op != OpARM64MOVDconst {
  5678  			break
  5679  		}
  5680  		c := auxIntToInt64(v_1.AuxInt)
  5681  		mem := v_2
  5682  		if !(is32Bit(c)) {
  5683  			break
  5684  		}
  5685  		v.reset(OpARM64FMOVSload)
  5686  		v.AuxInt = int32ToAuxInt(int32(c))
  5687  		v.AddArg2(ptr, mem)
  5688  		return true
  5689  	}
  5690  	// match: (FMOVSloadidx (MOVDconst [c]) ptr mem)
  5691  	// cond: is32Bit(c)
  5692  	// result: (FMOVSload [int32(c)] ptr mem)
  5693  	for {
  5694  		if v_0.Op != OpARM64MOVDconst {
  5695  			break
  5696  		}
  5697  		c := auxIntToInt64(v_0.AuxInt)
  5698  		ptr := v_1
  5699  		mem := v_2
  5700  		if !(is32Bit(c)) {
  5701  			break
  5702  		}
  5703  		v.reset(OpARM64FMOVSload)
  5704  		v.AuxInt = int32ToAuxInt(int32(c))
  5705  		v.AddArg2(ptr, mem)
  5706  		return true
  5707  	}
  5708  	// match: (FMOVSloadidx ptr (SLLconst [2] idx) mem)
  5709  	// result: (FMOVSloadidx4 ptr idx mem)
  5710  	for {
  5711  		ptr := v_0
  5712  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
  5713  			break
  5714  		}
  5715  		idx := v_1.Args[0]
  5716  		mem := v_2
  5717  		v.reset(OpARM64FMOVSloadidx4)
  5718  		v.AddArg3(ptr, idx, mem)
  5719  		return true
  5720  	}
  5721  	// match: (FMOVSloadidx (SLLconst [2] idx) ptr mem)
  5722  	// result: (FMOVSloadidx4 ptr idx mem)
  5723  	for {
  5724  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
  5725  			break
  5726  		}
  5727  		idx := v_0.Args[0]
  5728  		ptr := v_1
  5729  		mem := v_2
  5730  		v.reset(OpARM64FMOVSloadidx4)
  5731  		v.AddArg3(ptr, idx, mem)
  5732  		return true
  5733  	}
  5734  	return false
  5735  }
  5736  func rewriteValueARM64_OpARM64FMOVSloadidx4(v *Value) bool {
  5737  	v_2 := v.Args[2]
  5738  	v_1 := v.Args[1]
  5739  	v_0 := v.Args[0]
  5740  	// match: (FMOVSloadidx4 ptr (MOVDconst [c]) mem)
  5741  	// cond: is32Bit(c<<2)
  5742  	// result: (FMOVSload ptr [int32(c)<<2] mem)
  5743  	for {
  5744  		ptr := v_0
  5745  		if v_1.Op != OpARM64MOVDconst {
  5746  			break
  5747  		}
  5748  		c := auxIntToInt64(v_1.AuxInt)
  5749  		mem := v_2
  5750  		if !(is32Bit(c << 2)) {
  5751  			break
  5752  		}
  5753  		v.reset(OpARM64FMOVSload)
  5754  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
  5755  		v.AddArg2(ptr, mem)
  5756  		return true
  5757  	}
  5758  	return false
  5759  }
  5760  func rewriteValueARM64_OpARM64FMOVSstore(v *Value) bool {
  5761  	v_2 := v.Args[2]
  5762  	v_1 := v.Args[1]
  5763  	v_0 := v.Args[0]
  5764  	b := v.Block
  5765  	config := b.Func.Config
  5766  	// match: (FMOVSstore [off] {sym} ptr (FMOVSgpfp val) mem)
  5767  	// result: (MOVWstore [off] {sym} ptr val mem)
  5768  	for {
  5769  		off := auxIntToInt32(v.AuxInt)
  5770  		sym := auxToSym(v.Aux)
  5771  		ptr := v_0
  5772  		if v_1.Op != OpARM64FMOVSgpfp {
  5773  			break
  5774  		}
  5775  		val := v_1.Args[0]
  5776  		mem := v_2
  5777  		v.reset(OpARM64MOVWstore)
  5778  		v.AuxInt = int32ToAuxInt(off)
  5779  		v.Aux = symToAux(sym)
  5780  		v.AddArg3(ptr, val, mem)
  5781  		return true
  5782  	}
  5783  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  5784  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5785  	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
  5786  	for {
  5787  		off1 := auxIntToInt32(v.AuxInt)
  5788  		sym := auxToSym(v.Aux)
  5789  		if v_0.Op != OpARM64ADDconst {
  5790  			break
  5791  		}
  5792  		off2 := auxIntToInt64(v_0.AuxInt)
  5793  		ptr := v_0.Args[0]
  5794  		val := v_1
  5795  		mem := v_2
  5796  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5797  			break
  5798  		}
  5799  		v.reset(OpARM64FMOVSstore)
  5800  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  5801  		v.Aux = symToAux(sym)
  5802  		v.AddArg3(ptr, val, mem)
  5803  		return true
  5804  	}
  5805  	// match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem)
  5806  	// cond: off == 0 && sym == nil
  5807  	// result: (FMOVSstoreidx ptr idx val mem)
  5808  	for {
  5809  		off := auxIntToInt32(v.AuxInt)
  5810  		sym := auxToSym(v.Aux)
  5811  		if v_0.Op != OpARM64ADD {
  5812  			break
  5813  		}
  5814  		idx := v_0.Args[1]
  5815  		ptr := v_0.Args[0]
  5816  		val := v_1
  5817  		mem := v_2
  5818  		if !(off == 0 && sym == nil) {
  5819  			break
  5820  		}
  5821  		v.reset(OpARM64FMOVSstoreidx)
  5822  		v.AddArg4(ptr, idx, val, mem)
  5823  		return true
  5824  	}
  5825  	// match: (FMOVSstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
  5826  	// cond: off == 0 && sym == nil
  5827  	// result: (FMOVSstoreidx4 ptr idx val mem)
  5828  	for {
  5829  		off := auxIntToInt32(v.AuxInt)
  5830  		sym := auxToSym(v.Aux)
  5831  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
  5832  			break
  5833  		}
  5834  		idx := v_0.Args[1]
  5835  		ptr := v_0.Args[0]
  5836  		val := v_1
  5837  		mem := v_2
  5838  		if !(off == 0 && sym == nil) {
  5839  			break
  5840  		}
  5841  		v.reset(OpARM64FMOVSstoreidx4)
  5842  		v.AddArg4(ptr, idx, val, mem)
  5843  		return true
  5844  	}
  5845  	// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  5846  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  5847  	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  5848  	for {
  5849  		off1 := auxIntToInt32(v.AuxInt)
  5850  		sym1 := auxToSym(v.Aux)
  5851  		if v_0.Op != OpARM64MOVDaddr {
  5852  			break
  5853  		}
  5854  		off2 := auxIntToInt32(v_0.AuxInt)
  5855  		sym2 := auxToSym(v_0.Aux)
  5856  		ptr := v_0.Args[0]
  5857  		val := v_1
  5858  		mem := v_2
  5859  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  5860  			break
  5861  		}
  5862  		v.reset(OpARM64FMOVSstore)
  5863  		v.AuxInt = int32ToAuxInt(off1 + off2)
  5864  		v.Aux = symToAux(mergeSym(sym1, sym2))
  5865  		v.AddArg3(ptr, val, mem)
  5866  		return true
  5867  	}
  5868  	return false
  5869  }
  5870  func rewriteValueARM64_OpARM64FMOVSstoreidx(v *Value) bool {
  5871  	v_3 := v.Args[3]
  5872  	v_2 := v.Args[2]
  5873  	v_1 := v.Args[1]
  5874  	v_0 := v.Args[0]
  5875  	// match: (FMOVSstoreidx ptr (MOVDconst [c]) val mem)
  5876  	// cond: is32Bit(c)
  5877  	// result: (FMOVSstore [int32(c)] ptr val mem)
  5878  	for {
  5879  		ptr := v_0
  5880  		if v_1.Op != OpARM64MOVDconst {
  5881  			break
  5882  		}
  5883  		c := auxIntToInt64(v_1.AuxInt)
  5884  		val := v_2
  5885  		mem := v_3
  5886  		if !(is32Bit(c)) {
  5887  			break
  5888  		}
  5889  		v.reset(OpARM64FMOVSstore)
  5890  		v.AuxInt = int32ToAuxInt(int32(c))
  5891  		v.AddArg3(ptr, val, mem)
  5892  		return true
  5893  	}
  5894  	// match: (FMOVSstoreidx (MOVDconst [c]) idx val mem)
  5895  	// cond: is32Bit(c)
  5896  	// result: (FMOVSstore [int32(c)] idx val mem)
  5897  	for {
  5898  		if v_0.Op != OpARM64MOVDconst {
  5899  			break
  5900  		}
  5901  		c := auxIntToInt64(v_0.AuxInt)
  5902  		idx := v_1
  5903  		val := v_2
  5904  		mem := v_3
  5905  		if !(is32Bit(c)) {
  5906  			break
  5907  		}
  5908  		v.reset(OpARM64FMOVSstore)
  5909  		v.AuxInt = int32ToAuxInt(int32(c))
  5910  		v.AddArg3(idx, val, mem)
  5911  		return true
  5912  	}
  5913  	// match: (FMOVSstoreidx ptr (SLLconst [2] idx) val mem)
  5914  	// result: (FMOVSstoreidx4 ptr idx val mem)
  5915  	for {
  5916  		ptr := v_0
  5917  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
  5918  			break
  5919  		}
  5920  		idx := v_1.Args[0]
  5921  		val := v_2
  5922  		mem := v_3
  5923  		v.reset(OpARM64FMOVSstoreidx4)
  5924  		v.AddArg4(ptr, idx, val, mem)
  5925  		return true
  5926  	}
  5927  	// match: (FMOVSstoreidx (SLLconst [2] idx) ptr val mem)
  5928  	// result: (FMOVSstoreidx4 ptr idx val mem)
  5929  	for {
  5930  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
  5931  			break
  5932  		}
  5933  		idx := v_0.Args[0]
  5934  		ptr := v_1
  5935  		val := v_2
  5936  		mem := v_3
  5937  		v.reset(OpARM64FMOVSstoreidx4)
  5938  		v.AddArg4(ptr, idx, val, mem)
  5939  		return true
  5940  	}
  5941  	return false
  5942  }
  5943  func rewriteValueARM64_OpARM64FMOVSstoreidx4(v *Value) bool {
  5944  	v_3 := v.Args[3]
  5945  	v_2 := v.Args[2]
  5946  	v_1 := v.Args[1]
  5947  	v_0 := v.Args[0]
  5948  	// match: (FMOVSstoreidx4 ptr (MOVDconst [c]) val mem)
  5949  	// cond: is32Bit(c<<2)
  5950  	// result: (FMOVSstore [int32(c)<<2] ptr val mem)
  5951  	for {
  5952  		ptr := v_0
  5953  		if v_1.Op != OpARM64MOVDconst {
  5954  			break
  5955  		}
  5956  		c := auxIntToInt64(v_1.AuxInt)
  5957  		val := v_2
  5958  		mem := v_3
  5959  		if !(is32Bit(c << 2)) {
  5960  			break
  5961  		}
  5962  		v.reset(OpARM64FMOVSstore)
  5963  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
  5964  		v.AddArg3(ptr, val, mem)
  5965  		return true
  5966  	}
  5967  	return false
  5968  }
  5969  func rewriteValueARM64_OpARM64FMULD(v *Value) bool {
  5970  	v_1 := v.Args[1]
  5971  	v_0 := v.Args[0]
  5972  	// match: (FMULD (FNEGD x) y)
  5973  	// result: (FNMULD x y)
  5974  	for {
  5975  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5976  			if v_0.Op != OpARM64FNEGD {
  5977  				continue
  5978  			}
  5979  			x := v_0.Args[0]
  5980  			y := v_1
  5981  			v.reset(OpARM64FNMULD)
  5982  			v.AddArg2(x, y)
  5983  			return true
  5984  		}
  5985  		break
  5986  	}
  5987  	return false
  5988  }
  5989  func rewriteValueARM64_OpARM64FMULS(v *Value) bool {
  5990  	v_1 := v.Args[1]
  5991  	v_0 := v.Args[0]
  5992  	// match: (FMULS (FNEGS x) y)
  5993  	// result: (FNMULS x y)
  5994  	for {
  5995  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5996  			if v_0.Op != OpARM64FNEGS {
  5997  				continue
  5998  			}
  5999  			x := v_0.Args[0]
  6000  			y := v_1
  6001  			v.reset(OpARM64FNMULS)
  6002  			v.AddArg2(x, y)
  6003  			return true
  6004  		}
  6005  		break
  6006  	}
  6007  	return false
  6008  }
  6009  func rewriteValueARM64_OpARM64FNEGD(v *Value) bool {
  6010  	v_0 := v.Args[0]
  6011  	// match: (FNEGD (FMULD x y))
  6012  	// result: (FNMULD x y)
  6013  	for {
  6014  		if v_0.Op != OpARM64FMULD {
  6015  			break
  6016  		}
  6017  		y := v_0.Args[1]
  6018  		x := v_0.Args[0]
  6019  		v.reset(OpARM64FNMULD)
  6020  		v.AddArg2(x, y)
  6021  		return true
  6022  	}
  6023  	// match: (FNEGD (FNMULD x y))
  6024  	// result: (FMULD x y)
  6025  	for {
  6026  		if v_0.Op != OpARM64FNMULD {
  6027  			break
  6028  		}
  6029  		y := v_0.Args[1]
  6030  		x := v_0.Args[0]
  6031  		v.reset(OpARM64FMULD)
  6032  		v.AddArg2(x, y)
  6033  		return true
  6034  	}
  6035  	return false
  6036  }
  6037  func rewriteValueARM64_OpARM64FNEGS(v *Value) bool {
  6038  	v_0 := v.Args[0]
  6039  	// match: (FNEGS (FMULS x y))
  6040  	// result: (FNMULS x y)
  6041  	for {
  6042  		if v_0.Op != OpARM64FMULS {
  6043  			break
  6044  		}
  6045  		y := v_0.Args[1]
  6046  		x := v_0.Args[0]
  6047  		v.reset(OpARM64FNMULS)
  6048  		v.AddArg2(x, y)
  6049  		return true
  6050  	}
  6051  	// match: (FNEGS (FNMULS x y))
  6052  	// result: (FMULS x y)
  6053  	for {
  6054  		if v_0.Op != OpARM64FNMULS {
  6055  			break
  6056  		}
  6057  		y := v_0.Args[1]
  6058  		x := v_0.Args[0]
  6059  		v.reset(OpARM64FMULS)
  6060  		v.AddArg2(x, y)
  6061  		return true
  6062  	}
  6063  	return false
  6064  }
  6065  func rewriteValueARM64_OpARM64FNMULD(v *Value) bool {
  6066  	v_1 := v.Args[1]
  6067  	v_0 := v.Args[0]
  6068  	// match: (FNMULD (FNEGD x) y)
  6069  	// result: (FMULD x y)
  6070  	for {
  6071  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6072  			if v_0.Op != OpARM64FNEGD {
  6073  				continue
  6074  			}
  6075  			x := v_0.Args[0]
  6076  			y := v_1
  6077  			v.reset(OpARM64FMULD)
  6078  			v.AddArg2(x, y)
  6079  			return true
  6080  		}
  6081  		break
  6082  	}
  6083  	return false
  6084  }
  6085  func rewriteValueARM64_OpARM64FNMULS(v *Value) bool {
  6086  	v_1 := v.Args[1]
  6087  	v_0 := v.Args[0]
  6088  	// match: (FNMULS (FNEGS x) y)
  6089  	// result: (FMULS x y)
  6090  	for {
  6091  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6092  			if v_0.Op != OpARM64FNEGS {
  6093  				continue
  6094  			}
  6095  			x := v_0.Args[0]
  6096  			y := v_1
  6097  			v.reset(OpARM64FMULS)
  6098  			v.AddArg2(x, y)
  6099  			return true
  6100  		}
  6101  		break
  6102  	}
  6103  	return false
  6104  }
  6105  func rewriteValueARM64_OpARM64FSTPQ(v *Value) bool {
  6106  	v_3 := v.Args[3]
  6107  	v_2 := v.Args[2]
  6108  	v_1 := v.Args[1]
  6109  	v_0 := v.Args[0]
  6110  	b := v.Block
  6111  	config := b.Func.Config
  6112  	// match: (FSTPQ [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
  6113  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  6114  	// result: (FSTPQ [off1+int32(off2)] {sym} ptr val1 val2 mem)
  6115  	for {
  6116  		off1 := auxIntToInt32(v.AuxInt)
  6117  		sym := auxToSym(v.Aux)
  6118  		if v_0.Op != OpARM64ADDconst {
  6119  			break
  6120  		}
  6121  		off2 := auxIntToInt64(v_0.AuxInt)
  6122  		ptr := v_0.Args[0]
  6123  		val1 := v_1
  6124  		val2 := v_2
  6125  		mem := v_3
  6126  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  6127  			break
  6128  		}
  6129  		v.reset(OpARM64FSTPQ)
  6130  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  6131  		v.Aux = symToAux(sym)
  6132  		v.AddArg4(ptr, val1, val2, mem)
  6133  		return true
  6134  	}
  6135  	// match: (FSTPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
  6136  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  6137  	// result: (FSTPQ [off1+off2] {mergeSym(sym1,sym2)} ptr val1 val2 mem)
  6138  	for {
  6139  		off1 := auxIntToInt32(v.AuxInt)
  6140  		sym1 := auxToSym(v.Aux)
  6141  		if v_0.Op != OpARM64MOVDaddr {
  6142  			break
  6143  		}
  6144  		off2 := auxIntToInt32(v_0.AuxInt)
  6145  		sym2 := auxToSym(v_0.Aux)
  6146  		ptr := v_0.Args[0]
  6147  		val1 := v_1
  6148  		val2 := v_2
  6149  		mem := v_3
  6150  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  6151  			break
  6152  		}
  6153  		v.reset(OpARM64FSTPQ)
  6154  		v.AuxInt = int32ToAuxInt(off1 + off2)
  6155  		v.Aux = symToAux(mergeSym(sym1, sym2))
  6156  		v.AddArg4(ptr, val1, val2, mem)
  6157  		return true
  6158  	}
  6159  	return false
  6160  }
  6161  func rewriteValueARM64_OpARM64FSUBD(v *Value) bool {
  6162  	v_1 := v.Args[1]
  6163  	v_0 := v.Args[0]
  6164  	// match: (FSUBD a (FMULD x y))
  6165  	// cond: a.Block.Func.useFMA(v)
  6166  	// result: (FMSUBD a x y)
  6167  	for {
  6168  		a := v_0
  6169  		if v_1.Op != OpARM64FMULD {
  6170  			break
  6171  		}
  6172  		y := v_1.Args[1]
  6173  		x := v_1.Args[0]
  6174  		if !(a.Block.Func.useFMA(v)) {
  6175  			break
  6176  		}
  6177  		v.reset(OpARM64FMSUBD)
  6178  		v.AddArg3(a, x, y)
  6179  		return true
  6180  	}
  6181  	// match: (FSUBD (FMULD x y) a)
  6182  	// cond: a.Block.Func.useFMA(v)
  6183  	// result: (FNMSUBD a x y)
  6184  	for {
  6185  		if v_0.Op != OpARM64FMULD {
  6186  			break
  6187  		}
  6188  		y := v_0.Args[1]
  6189  		x := v_0.Args[0]
  6190  		a := v_1
  6191  		if !(a.Block.Func.useFMA(v)) {
  6192  			break
  6193  		}
  6194  		v.reset(OpARM64FNMSUBD)
  6195  		v.AddArg3(a, x, y)
  6196  		return true
  6197  	}
  6198  	// match: (FSUBD a (FNMULD x y))
  6199  	// cond: a.Block.Func.useFMA(v)
  6200  	// result: (FMADDD a x y)
  6201  	for {
  6202  		a := v_0
  6203  		if v_1.Op != OpARM64FNMULD {
  6204  			break
  6205  		}
  6206  		y := v_1.Args[1]
  6207  		x := v_1.Args[0]
  6208  		if !(a.Block.Func.useFMA(v)) {
  6209  			break
  6210  		}
  6211  		v.reset(OpARM64FMADDD)
  6212  		v.AddArg3(a, x, y)
  6213  		return true
  6214  	}
  6215  	// match: (FSUBD (FNMULD x y) a)
  6216  	// cond: a.Block.Func.useFMA(v)
  6217  	// result: (FNMADDD a x y)
  6218  	for {
  6219  		if v_0.Op != OpARM64FNMULD {
  6220  			break
  6221  		}
  6222  		y := v_0.Args[1]
  6223  		x := v_0.Args[0]
  6224  		a := v_1
  6225  		if !(a.Block.Func.useFMA(v)) {
  6226  			break
  6227  		}
  6228  		v.reset(OpARM64FNMADDD)
  6229  		v.AddArg3(a, x, y)
  6230  		return true
  6231  	}
  6232  	return false
  6233  }
  6234  func rewriteValueARM64_OpARM64FSUBS(v *Value) bool {
  6235  	v_1 := v.Args[1]
  6236  	v_0 := v.Args[0]
  6237  	// match: (FSUBS a (FMULS x y))
  6238  	// cond: a.Block.Func.useFMA(v)
  6239  	// result: (FMSUBS a x y)
  6240  	for {
  6241  		a := v_0
  6242  		if v_1.Op != OpARM64FMULS {
  6243  			break
  6244  		}
  6245  		y := v_1.Args[1]
  6246  		x := v_1.Args[0]
  6247  		if !(a.Block.Func.useFMA(v)) {
  6248  			break
  6249  		}
  6250  		v.reset(OpARM64FMSUBS)
  6251  		v.AddArg3(a, x, y)
  6252  		return true
  6253  	}
  6254  	// match: (FSUBS (FMULS x y) a)
  6255  	// cond: a.Block.Func.useFMA(v)
  6256  	// result: (FNMSUBS a x y)
  6257  	for {
  6258  		if v_0.Op != OpARM64FMULS {
  6259  			break
  6260  		}
  6261  		y := v_0.Args[1]
  6262  		x := v_0.Args[0]
  6263  		a := v_1
  6264  		if !(a.Block.Func.useFMA(v)) {
  6265  			break
  6266  		}
  6267  		v.reset(OpARM64FNMSUBS)
  6268  		v.AddArg3(a, x, y)
  6269  		return true
  6270  	}
  6271  	// match: (FSUBS a (FNMULS x y))
  6272  	// cond: a.Block.Func.useFMA(v)
  6273  	// result: (FMADDS a x y)
  6274  	for {
  6275  		a := v_0
  6276  		if v_1.Op != OpARM64FNMULS {
  6277  			break
  6278  		}
  6279  		y := v_1.Args[1]
  6280  		x := v_1.Args[0]
  6281  		if !(a.Block.Func.useFMA(v)) {
  6282  			break
  6283  		}
  6284  		v.reset(OpARM64FMADDS)
  6285  		v.AddArg3(a, x, y)
  6286  		return true
  6287  	}
  6288  	// match: (FSUBS (FNMULS x y) a)
  6289  	// cond: a.Block.Func.useFMA(v)
  6290  	// result: (FNMADDS a x y)
  6291  	for {
  6292  		if v_0.Op != OpARM64FNMULS {
  6293  			break
  6294  		}
  6295  		y := v_0.Args[1]
  6296  		x := v_0.Args[0]
  6297  		a := v_1
  6298  		if !(a.Block.Func.useFMA(v)) {
  6299  			break
  6300  		}
  6301  		v.reset(OpARM64FNMADDS)
  6302  		v.AddArg3(a, x, y)
  6303  		return true
  6304  	}
  6305  	return false
  6306  }
  6307  func rewriteValueARM64_OpARM64GreaterEqual(v *Value) bool {
  6308  	v_0 := v.Args[0]
  6309  	b := v.Block
  6310  	// match: (GreaterEqual (CMPconst [0] z:(AND x y)))
  6311  	// cond: z.Uses == 1
  6312  	// result: (GreaterEqual (TST x y))
  6313  	for {
  6314  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6315  			break
  6316  		}
  6317  		z := v_0.Args[0]
  6318  		if z.Op != OpARM64AND {
  6319  			break
  6320  		}
  6321  		y := z.Args[1]
  6322  		x := z.Args[0]
  6323  		if !(z.Uses == 1) {
  6324  			break
  6325  		}
  6326  		v.reset(OpARM64GreaterEqual)
  6327  		v0 := b.NewValue0(v.Pos, OpARM64TST, types.TypeFlags)
  6328  		v0.AddArg2(x, y)
  6329  		v.AddArg(v0)
  6330  		return true
  6331  	}
  6332  	// match: (GreaterEqual (CMPWconst [0] x:(ANDconst [c] y)))
  6333  	// cond: x.Uses == 1
  6334  	// result: (GreaterEqual (TSTWconst [int32(c)] y))
  6335  	for {
  6336  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6337  			break
  6338  		}
  6339  		x := v_0.Args[0]
  6340  		if x.Op != OpARM64ANDconst {
  6341  			break
  6342  		}
  6343  		c := auxIntToInt64(x.AuxInt)
  6344  		y := x.Args[0]
  6345  		if !(x.Uses == 1) {
  6346  			break
  6347  		}
  6348  		v.reset(OpARM64GreaterEqual)
  6349  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
  6350  		v0.AuxInt = int32ToAuxInt(int32(c))
  6351  		v0.AddArg(y)
  6352  		v.AddArg(v0)
  6353  		return true
  6354  	}
  6355  	// match: (GreaterEqual (CMPWconst [0] z:(AND x y)))
  6356  	// cond: z.Uses == 1
  6357  	// result: (GreaterEqual (TSTW x y))
  6358  	for {
  6359  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6360  			break
  6361  		}
  6362  		z := v_0.Args[0]
  6363  		if z.Op != OpARM64AND {
  6364  			break
  6365  		}
  6366  		y := z.Args[1]
  6367  		x := z.Args[0]
  6368  		if !(z.Uses == 1) {
  6369  			break
  6370  		}
  6371  		v.reset(OpARM64GreaterEqual)
  6372  		v0 := b.NewValue0(v.Pos, OpARM64TSTW, types.TypeFlags)
  6373  		v0.AddArg2(x, y)
  6374  		v.AddArg(v0)
  6375  		return true
  6376  	}
  6377  	// match: (GreaterEqual (CMPconst [0] x:(ANDconst [c] y)))
  6378  	// cond: x.Uses == 1
  6379  	// result: (GreaterEqual (TSTconst [c] y))
  6380  	for {
  6381  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6382  			break
  6383  		}
  6384  		x := v_0.Args[0]
  6385  		if x.Op != OpARM64ANDconst {
  6386  			break
  6387  		}
  6388  		c := auxIntToInt64(x.AuxInt)
  6389  		y := x.Args[0]
  6390  		if !(x.Uses == 1) {
  6391  			break
  6392  		}
  6393  		v.reset(OpARM64GreaterEqual)
  6394  		v0 := b.NewValue0(v.Pos, OpARM64TSTconst, types.TypeFlags)
  6395  		v0.AuxInt = int64ToAuxInt(c)
  6396  		v0.AddArg(y)
  6397  		v.AddArg(v0)
  6398  		return true
  6399  	}
  6400  	// match: (GreaterEqual (CMPconst [0] x:(ADDconst [c] y)))
  6401  	// cond: x.Uses == 1
  6402  	// result: (GreaterEqualNoov (CMNconst [c] y))
  6403  	for {
  6404  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6405  			break
  6406  		}
  6407  		x := v_0.Args[0]
  6408  		if x.Op != OpARM64ADDconst {
  6409  			break
  6410  		}
  6411  		c := auxIntToInt64(x.AuxInt)
  6412  		y := x.Args[0]
  6413  		if !(x.Uses == 1) {
  6414  			break
  6415  		}
  6416  		v.reset(OpARM64GreaterEqualNoov)
  6417  		v0 := b.NewValue0(v.Pos, OpARM64CMNconst, types.TypeFlags)
  6418  		v0.AuxInt = int64ToAuxInt(c)
  6419  		v0.AddArg(y)
  6420  		v.AddArg(v0)
  6421  		return true
  6422  	}
  6423  	// match: (GreaterEqual (CMPWconst [0] x:(ADDconst [c] y)))
  6424  	// cond: x.Uses == 1
  6425  	// result: (GreaterEqualNoov (CMNWconst [int32(c)] y))
  6426  	for {
  6427  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6428  			break
  6429  		}
  6430  		x := v_0.Args[0]
  6431  		if x.Op != OpARM64ADDconst {
  6432  			break
  6433  		}
  6434  		c := auxIntToInt64(x.AuxInt)
  6435  		y := x.Args[0]
  6436  		if !(x.Uses == 1) {
  6437  			break
  6438  		}
  6439  		v.reset(OpARM64GreaterEqualNoov)
  6440  		v0 := b.NewValue0(v.Pos, OpARM64CMNWconst, types.TypeFlags)
  6441  		v0.AuxInt = int32ToAuxInt(int32(c))
  6442  		v0.AddArg(y)
  6443  		v.AddArg(v0)
  6444  		return true
  6445  	}
  6446  	// match: (GreaterEqual (CMPconst [0] z:(ADD x y)))
  6447  	// cond: z.Uses == 1
  6448  	// result: (GreaterEqualNoov (CMN x y))
  6449  	for {
  6450  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6451  			break
  6452  		}
  6453  		z := v_0.Args[0]
  6454  		if z.Op != OpARM64ADD {
  6455  			break
  6456  		}
  6457  		y := z.Args[1]
  6458  		x := z.Args[0]
  6459  		if !(z.Uses == 1) {
  6460  			break
  6461  		}
  6462  		v.reset(OpARM64GreaterEqualNoov)
  6463  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  6464  		v0.AddArg2(x, y)
  6465  		v.AddArg(v0)
  6466  		return true
  6467  	}
  6468  	// match: (GreaterEqual (CMPWconst [0] z:(ADD x y)))
  6469  	// cond: z.Uses == 1
  6470  	// result: (GreaterEqualNoov (CMNW x y))
  6471  	for {
  6472  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6473  			break
  6474  		}
  6475  		z := v_0.Args[0]
  6476  		if z.Op != OpARM64ADD {
  6477  			break
  6478  		}
  6479  		y := z.Args[1]
  6480  		x := z.Args[0]
  6481  		if !(z.Uses == 1) {
  6482  			break
  6483  		}
  6484  		v.reset(OpARM64GreaterEqualNoov)
  6485  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  6486  		v0.AddArg2(x, y)
  6487  		v.AddArg(v0)
  6488  		return true
  6489  	}
  6490  	// match: (GreaterEqual (CMPconst [0] z:(MADD a x y)))
  6491  	// cond: z.Uses == 1
  6492  	// result: (GreaterEqualNoov (CMN a (MUL <x.Type> x y)))
  6493  	for {
  6494  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6495  			break
  6496  		}
  6497  		z := v_0.Args[0]
  6498  		if z.Op != OpARM64MADD {
  6499  			break
  6500  		}
  6501  		y := z.Args[2]
  6502  		a := z.Args[0]
  6503  		x := z.Args[1]
  6504  		if !(z.Uses == 1) {
  6505  			break
  6506  		}
  6507  		v.reset(OpARM64GreaterEqualNoov)
  6508  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  6509  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  6510  		v1.AddArg2(x, y)
  6511  		v0.AddArg2(a, v1)
  6512  		v.AddArg(v0)
  6513  		return true
  6514  	}
  6515  	// match: (GreaterEqual (CMPconst [0] z:(MSUB a x y)))
  6516  	// cond: z.Uses == 1
  6517  	// result: (GreaterEqualNoov (CMP a (MUL <x.Type> x y)))
  6518  	for {
  6519  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6520  			break
  6521  		}
  6522  		z := v_0.Args[0]
  6523  		if z.Op != OpARM64MSUB {
  6524  			break
  6525  		}
  6526  		y := z.Args[2]
  6527  		a := z.Args[0]
  6528  		x := z.Args[1]
  6529  		if !(z.Uses == 1) {
  6530  			break
  6531  		}
  6532  		v.reset(OpARM64GreaterEqualNoov)
  6533  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
  6534  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  6535  		v1.AddArg2(x, y)
  6536  		v0.AddArg2(a, v1)
  6537  		v.AddArg(v0)
  6538  		return true
  6539  	}
  6540  	// match: (GreaterEqual (CMPWconst [0] z:(MADDW a x y)))
  6541  	// cond: z.Uses == 1
  6542  	// result: (GreaterEqualNoov (CMNW a (MULW <x.Type> x y)))
  6543  	for {
  6544  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6545  			break
  6546  		}
  6547  		z := v_0.Args[0]
  6548  		if z.Op != OpARM64MADDW {
  6549  			break
  6550  		}
  6551  		y := z.Args[2]
  6552  		a := z.Args[0]
  6553  		x := z.Args[1]
  6554  		if !(z.Uses == 1) {
  6555  			break
  6556  		}
  6557  		v.reset(OpARM64GreaterEqualNoov)
  6558  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  6559  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  6560  		v1.AddArg2(x, y)
  6561  		v0.AddArg2(a, v1)
  6562  		v.AddArg(v0)
  6563  		return true
  6564  	}
  6565  	// match: (GreaterEqual (CMPWconst [0] z:(MSUBW a x y)))
  6566  	// cond: z.Uses == 1
  6567  	// result: (GreaterEqualNoov (CMPW a (MULW <x.Type> x y)))
  6568  	for {
  6569  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6570  			break
  6571  		}
  6572  		z := v_0.Args[0]
  6573  		if z.Op != OpARM64MSUBW {
  6574  			break
  6575  		}
  6576  		y := z.Args[2]
  6577  		a := z.Args[0]
  6578  		x := z.Args[1]
  6579  		if !(z.Uses == 1) {
  6580  			break
  6581  		}
  6582  		v.reset(OpARM64GreaterEqualNoov)
  6583  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
  6584  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  6585  		v1.AddArg2(x, y)
  6586  		v0.AddArg2(a, v1)
  6587  		v.AddArg(v0)
  6588  		return true
  6589  	}
  6590  	// match: (GreaterEqual (FlagConstant [fc]))
  6591  	// result: (MOVDconst [b2i(fc.ge())])
  6592  	for {
  6593  		if v_0.Op != OpARM64FlagConstant {
  6594  			break
  6595  		}
  6596  		fc := auxIntToFlagConstant(v_0.AuxInt)
  6597  		v.reset(OpARM64MOVDconst)
  6598  		v.AuxInt = int64ToAuxInt(b2i(fc.ge()))
  6599  		return true
  6600  	}
  6601  	// match: (GreaterEqual (InvertFlags x))
  6602  	// result: (LessEqual x)
  6603  	for {
  6604  		if v_0.Op != OpARM64InvertFlags {
  6605  			break
  6606  		}
  6607  		x := v_0.Args[0]
  6608  		v.reset(OpARM64LessEqual)
  6609  		v.AddArg(x)
  6610  		return true
  6611  	}
  6612  	return false
  6613  }
  6614  func rewriteValueARM64_OpARM64GreaterEqualF(v *Value) bool {
  6615  	v_0 := v.Args[0]
  6616  	// match: (GreaterEqualF (InvertFlags x))
  6617  	// result: (LessEqualF x)
  6618  	for {
  6619  		if v_0.Op != OpARM64InvertFlags {
  6620  			break
  6621  		}
  6622  		x := v_0.Args[0]
  6623  		v.reset(OpARM64LessEqualF)
  6624  		v.AddArg(x)
  6625  		return true
  6626  	}
  6627  	return false
  6628  }
  6629  func rewriteValueARM64_OpARM64GreaterEqualNoov(v *Value) bool {
  6630  	v_0 := v.Args[0]
  6631  	b := v.Block
  6632  	typ := &b.Func.Config.Types
  6633  	// match: (GreaterEqualNoov (FlagConstant [fc]))
  6634  	// result: (MOVDconst [b2i(fc.geNoov())])
  6635  	for {
  6636  		if v_0.Op != OpARM64FlagConstant {
  6637  			break
  6638  		}
  6639  		fc := auxIntToFlagConstant(v_0.AuxInt)
  6640  		v.reset(OpARM64MOVDconst)
  6641  		v.AuxInt = int64ToAuxInt(b2i(fc.geNoov()))
  6642  		return true
  6643  	}
  6644  	// match: (GreaterEqualNoov (InvertFlags x))
  6645  	// result: (CSINC [OpARM64NotEqual] (LessThanNoov <typ.Bool> x) (MOVDconst [0]) x)
  6646  	for {
  6647  		if v_0.Op != OpARM64InvertFlags {
  6648  			break
  6649  		}
  6650  		x := v_0.Args[0]
  6651  		v.reset(OpARM64CSINC)
  6652  		v.AuxInt = opToAuxInt(OpARM64NotEqual)
  6653  		v0 := b.NewValue0(v.Pos, OpARM64LessThanNoov, typ.Bool)
  6654  		v0.AddArg(x)
  6655  		v1 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
  6656  		v1.AuxInt = int64ToAuxInt(0)
  6657  		v.AddArg3(v0, v1, x)
  6658  		return true
  6659  	}
  6660  	return false
  6661  }
  6662  func rewriteValueARM64_OpARM64GreaterEqualU(v *Value) bool {
  6663  	v_0 := v.Args[0]
  6664  	// match: (GreaterEqualU (FlagConstant [fc]))
  6665  	// result: (MOVDconst [b2i(fc.uge())])
  6666  	for {
  6667  		if v_0.Op != OpARM64FlagConstant {
  6668  			break
  6669  		}
  6670  		fc := auxIntToFlagConstant(v_0.AuxInt)
  6671  		v.reset(OpARM64MOVDconst)
  6672  		v.AuxInt = int64ToAuxInt(b2i(fc.uge()))
  6673  		return true
  6674  	}
  6675  	// match: (GreaterEqualU (InvertFlags x))
  6676  	// result: (LessEqualU x)
  6677  	for {
  6678  		if v_0.Op != OpARM64InvertFlags {
  6679  			break
  6680  		}
  6681  		x := v_0.Args[0]
  6682  		v.reset(OpARM64LessEqualU)
  6683  		v.AddArg(x)
  6684  		return true
  6685  	}
  6686  	return false
  6687  }
  6688  func rewriteValueARM64_OpARM64GreaterThan(v *Value) bool {
  6689  	v_0 := v.Args[0]
  6690  	b := v.Block
  6691  	// match: (GreaterThan (CMPconst [0] z:(AND x y)))
  6692  	// cond: z.Uses == 1
  6693  	// result: (GreaterThan (TST x y))
  6694  	for {
  6695  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6696  			break
  6697  		}
  6698  		z := v_0.Args[0]
  6699  		if z.Op != OpARM64AND {
  6700  			break
  6701  		}
  6702  		y := z.Args[1]
  6703  		x := z.Args[0]
  6704  		if !(z.Uses == 1) {
  6705  			break
  6706  		}
  6707  		v.reset(OpARM64GreaterThan)
  6708  		v0 := b.NewValue0(v.Pos, OpARM64TST, types.TypeFlags)
  6709  		v0.AddArg2(x, y)
  6710  		v.AddArg(v0)
  6711  		return true
  6712  	}
  6713  	// match: (GreaterThan (CMPWconst [0] x:(ANDconst [c] y)))
  6714  	// cond: x.Uses == 1
  6715  	// result: (GreaterThan (TSTWconst [int32(c)] y))
  6716  	for {
  6717  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6718  			break
  6719  		}
  6720  		x := v_0.Args[0]
  6721  		if x.Op != OpARM64ANDconst {
  6722  			break
  6723  		}
  6724  		c := auxIntToInt64(x.AuxInt)
  6725  		y := x.Args[0]
  6726  		if !(x.Uses == 1) {
  6727  			break
  6728  		}
  6729  		v.reset(OpARM64GreaterThan)
  6730  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
  6731  		v0.AuxInt = int32ToAuxInt(int32(c))
  6732  		v0.AddArg(y)
  6733  		v.AddArg(v0)
  6734  		return true
  6735  	}
  6736  	// match: (GreaterThan (CMPWconst [0] z:(AND x y)))
  6737  	// cond: z.Uses == 1
  6738  	// result: (GreaterThan (TSTW x y))
  6739  	for {
  6740  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6741  			break
  6742  		}
  6743  		z := v_0.Args[0]
  6744  		if z.Op != OpARM64AND {
  6745  			break
  6746  		}
  6747  		y := z.Args[1]
  6748  		x := z.Args[0]
  6749  		if !(z.Uses == 1) {
  6750  			break
  6751  		}
  6752  		v.reset(OpARM64GreaterThan)
  6753  		v0 := b.NewValue0(v.Pos, OpARM64TSTW, types.TypeFlags)
  6754  		v0.AddArg2(x, y)
  6755  		v.AddArg(v0)
  6756  		return true
  6757  	}
  6758  	// match: (GreaterThan (CMPconst [0] x:(ANDconst [c] y)))
  6759  	// cond: x.Uses == 1
  6760  	// result: (GreaterThan (TSTconst [c] y))
  6761  	for {
  6762  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6763  			break
  6764  		}
  6765  		x := v_0.Args[0]
  6766  		if x.Op != OpARM64ANDconst {
  6767  			break
  6768  		}
  6769  		c := auxIntToInt64(x.AuxInt)
  6770  		y := x.Args[0]
  6771  		if !(x.Uses == 1) {
  6772  			break
  6773  		}
  6774  		v.reset(OpARM64GreaterThan)
  6775  		v0 := b.NewValue0(v.Pos, OpARM64TSTconst, types.TypeFlags)
  6776  		v0.AuxInt = int64ToAuxInt(c)
  6777  		v0.AddArg(y)
  6778  		v.AddArg(v0)
  6779  		return true
  6780  	}
  6781  	// match: (GreaterThan (FlagConstant [fc]))
  6782  	// result: (MOVDconst [b2i(fc.gt())])
  6783  	for {
  6784  		if v_0.Op != OpARM64FlagConstant {
  6785  			break
  6786  		}
  6787  		fc := auxIntToFlagConstant(v_0.AuxInt)
  6788  		v.reset(OpARM64MOVDconst)
  6789  		v.AuxInt = int64ToAuxInt(b2i(fc.gt()))
  6790  		return true
  6791  	}
  6792  	// match: (GreaterThan (InvertFlags x))
  6793  	// result: (LessThan x)
  6794  	for {
  6795  		if v_0.Op != OpARM64InvertFlags {
  6796  			break
  6797  		}
  6798  		x := v_0.Args[0]
  6799  		v.reset(OpARM64LessThan)
  6800  		v.AddArg(x)
  6801  		return true
  6802  	}
  6803  	return false
  6804  }
  6805  func rewriteValueARM64_OpARM64GreaterThanF(v *Value) bool {
  6806  	v_0 := v.Args[0]
  6807  	// match: (GreaterThanF (InvertFlags x))
  6808  	// result: (LessThanF x)
  6809  	for {
  6810  		if v_0.Op != OpARM64InvertFlags {
  6811  			break
  6812  		}
  6813  		x := v_0.Args[0]
  6814  		v.reset(OpARM64LessThanF)
  6815  		v.AddArg(x)
  6816  		return true
  6817  	}
  6818  	return false
  6819  }
  6820  func rewriteValueARM64_OpARM64GreaterThanU(v *Value) bool {
  6821  	v_0 := v.Args[0]
  6822  	// match: (GreaterThanU (FlagConstant [fc]))
  6823  	// result: (MOVDconst [b2i(fc.ugt())])
  6824  	for {
  6825  		if v_0.Op != OpARM64FlagConstant {
  6826  			break
  6827  		}
  6828  		fc := auxIntToFlagConstant(v_0.AuxInt)
  6829  		v.reset(OpARM64MOVDconst)
  6830  		v.AuxInt = int64ToAuxInt(b2i(fc.ugt()))
  6831  		return true
  6832  	}
  6833  	// match: (GreaterThanU (InvertFlags x))
  6834  	// result: (LessThanU x)
  6835  	for {
  6836  		if v_0.Op != OpARM64InvertFlags {
  6837  			break
  6838  		}
  6839  		x := v_0.Args[0]
  6840  		v.reset(OpARM64LessThanU)
  6841  		v.AddArg(x)
  6842  		return true
  6843  	}
  6844  	return false
  6845  }
  6846  func rewriteValueARM64_OpARM64LDP(v *Value) bool {
  6847  	v_1 := v.Args[1]
  6848  	v_0 := v.Args[0]
  6849  	b := v.Block
  6850  	config := b.Func.Config
  6851  	// match: (LDP [off1] {sym} (ADDconst [off2] ptr) mem)
  6852  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  6853  	// result: (LDP [off1+int32(off2)] {sym} ptr mem)
  6854  	for {
  6855  		off1 := auxIntToInt32(v.AuxInt)
  6856  		sym := auxToSym(v.Aux)
  6857  		if v_0.Op != OpARM64ADDconst {
  6858  			break
  6859  		}
  6860  		off2 := auxIntToInt64(v_0.AuxInt)
  6861  		ptr := v_0.Args[0]
  6862  		mem := v_1
  6863  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  6864  			break
  6865  		}
  6866  		v.reset(OpARM64LDP)
  6867  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  6868  		v.Aux = symToAux(sym)
  6869  		v.AddArg2(ptr, mem)
  6870  		return true
  6871  	}
  6872  	// match: (LDP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6873  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  6874  	// result: (LDP [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6875  	for {
  6876  		off1 := auxIntToInt32(v.AuxInt)
  6877  		sym1 := auxToSym(v.Aux)
  6878  		if v_0.Op != OpARM64MOVDaddr {
  6879  			break
  6880  		}
  6881  		off2 := auxIntToInt32(v_0.AuxInt)
  6882  		sym2 := auxToSym(v_0.Aux)
  6883  		ptr := v_0.Args[0]
  6884  		mem := v_1
  6885  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  6886  			break
  6887  		}
  6888  		v.reset(OpARM64LDP)
  6889  		v.AuxInt = int32ToAuxInt(off1 + off2)
  6890  		v.Aux = symToAux(mergeSym(sym1, sym2))
  6891  		v.AddArg2(ptr, mem)
  6892  		return true
  6893  	}
  6894  	return false
  6895  }
  6896  func rewriteValueARM64_OpARM64LessEqual(v *Value) bool {
  6897  	v_0 := v.Args[0]
  6898  	b := v.Block
  6899  	// match: (LessEqual (CMPconst [0] z:(AND x y)))
  6900  	// cond: z.Uses == 1
  6901  	// result: (LessEqual (TST x y))
  6902  	for {
  6903  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6904  			break
  6905  		}
  6906  		z := v_0.Args[0]
  6907  		if z.Op != OpARM64AND {
  6908  			break
  6909  		}
  6910  		y := z.Args[1]
  6911  		x := z.Args[0]
  6912  		if !(z.Uses == 1) {
  6913  			break
  6914  		}
  6915  		v.reset(OpARM64LessEqual)
  6916  		v0 := b.NewValue0(v.Pos, OpARM64TST, types.TypeFlags)
  6917  		v0.AddArg2(x, y)
  6918  		v.AddArg(v0)
  6919  		return true
  6920  	}
  6921  	// match: (LessEqual (CMPWconst [0] x:(ANDconst [c] y)))
  6922  	// cond: x.Uses == 1
  6923  	// result: (LessEqual (TSTWconst [int32(c)] y))
  6924  	for {
  6925  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6926  			break
  6927  		}
  6928  		x := v_0.Args[0]
  6929  		if x.Op != OpARM64ANDconst {
  6930  			break
  6931  		}
  6932  		c := auxIntToInt64(x.AuxInt)
  6933  		y := x.Args[0]
  6934  		if !(x.Uses == 1) {
  6935  			break
  6936  		}
  6937  		v.reset(OpARM64LessEqual)
  6938  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
  6939  		v0.AuxInt = int32ToAuxInt(int32(c))
  6940  		v0.AddArg(y)
  6941  		v.AddArg(v0)
  6942  		return true
  6943  	}
  6944  	// match: (LessEqual (CMPWconst [0] z:(AND x y)))
  6945  	// cond: z.Uses == 1
  6946  	// result: (LessEqual (TSTW x y))
  6947  	for {
  6948  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  6949  			break
  6950  		}
  6951  		z := v_0.Args[0]
  6952  		if z.Op != OpARM64AND {
  6953  			break
  6954  		}
  6955  		y := z.Args[1]
  6956  		x := z.Args[0]
  6957  		if !(z.Uses == 1) {
  6958  			break
  6959  		}
  6960  		v.reset(OpARM64LessEqual)
  6961  		v0 := b.NewValue0(v.Pos, OpARM64TSTW, types.TypeFlags)
  6962  		v0.AddArg2(x, y)
  6963  		v.AddArg(v0)
  6964  		return true
  6965  	}
  6966  	// match: (LessEqual (CMPconst [0] x:(ANDconst [c] y)))
  6967  	// cond: x.Uses == 1
  6968  	// result: (LessEqual (TSTconst [c] y))
  6969  	for {
  6970  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  6971  			break
  6972  		}
  6973  		x := v_0.Args[0]
  6974  		if x.Op != OpARM64ANDconst {
  6975  			break
  6976  		}
  6977  		c := auxIntToInt64(x.AuxInt)
  6978  		y := x.Args[0]
  6979  		if !(x.Uses == 1) {
  6980  			break
  6981  		}
  6982  		v.reset(OpARM64LessEqual)
  6983  		v0 := b.NewValue0(v.Pos, OpARM64TSTconst, types.TypeFlags)
  6984  		v0.AuxInt = int64ToAuxInt(c)
  6985  		v0.AddArg(y)
  6986  		v.AddArg(v0)
  6987  		return true
  6988  	}
  6989  	// match: (LessEqual (FlagConstant [fc]))
  6990  	// result: (MOVDconst [b2i(fc.le())])
  6991  	for {
  6992  		if v_0.Op != OpARM64FlagConstant {
  6993  			break
  6994  		}
  6995  		fc := auxIntToFlagConstant(v_0.AuxInt)
  6996  		v.reset(OpARM64MOVDconst)
  6997  		v.AuxInt = int64ToAuxInt(b2i(fc.le()))
  6998  		return true
  6999  	}
  7000  	// match: (LessEqual (InvertFlags x))
  7001  	// result: (GreaterEqual x)
  7002  	for {
  7003  		if v_0.Op != OpARM64InvertFlags {
  7004  			break
  7005  		}
  7006  		x := v_0.Args[0]
  7007  		v.reset(OpARM64GreaterEqual)
  7008  		v.AddArg(x)
  7009  		return true
  7010  	}
  7011  	return false
  7012  }
  7013  func rewriteValueARM64_OpARM64LessEqualF(v *Value) bool {
  7014  	v_0 := v.Args[0]
  7015  	// match: (LessEqualF (InvertFlags x))
  7016  	// result: (GreaterEqualF x)
  7017  	for {
  7018  		if v_0.Op != OpARM64InvertFlags {
  7019  			break
  7020  		}
  7021  		x := v_0.Args[0]
  7022  		v.reset(OpARM64GreaterEqualF)
  7023  		v.AddArg(x)
  7024  		return true
  7025  	}
  7026  	return false
  7027  }
  7028  func rewriteValueARM64_OpARM64LessEqualU(v *Value) bool {
  7029  	v_0 := v.Args[0]
  7030  	// match: (LessEqualU (FlagConstant [fc]))
  7031  	// result: (MOVDconst [b2i(fc.ule())])
  7032  	for {
  7033  		if v_0.Op != OpARM64FlagConstant {
  7034  			break
  7035  		}
  7036  		fc := auxIntToFlagConstant(v_0.AuxInt)
  7037  		v.reset(OpARM64MOVDconst)
  7038  		v.AuxInt = int64ToAuxInt(b2i(fc.ule()))
  7039  		return true
  7040  	}
  7041  	// match: (LessEqualU (InvertFlags x))
  7042  	// result: (GreaterEqualU x)
  7043  	for {
  7044  		if v_0.Op != OpARM64InvertFlags {
  7045  			break
  7046  		}
  7047  		x := v_0.Args[0]
  7048  		v.reset(OpARM64GreaterEqualU)
  7049  		v.AddArg(x)
  7050  		return true
  7051  	}
  7052  	return false
  7053  }
  7054  func rewriteValueARM64_OpARM64LessThan(v *Value) bool {
  7055  	v_0 := v.Args[0]
  7056  	b := v.Block
  7057  	// match: (LessThan (CMPconst [0] z:(AND x y)))
  7058  	// cond: z.Uses == 1
  7059  	// result: (LessThan (TST x y))
  7060  	for {
  7061  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  7062  			break
  7063  		}
  7064  		z := v_0.Args[0]
  7065  		if z.Op != OpARM64AND {
  7066  			break
  7067  		}
  7068  		y := z.Args[1]
  7069  		x := z.Args[0]
  7070  		if !(z.Uses == 1) {
  7071  			break
  7072  		}
  7073  		v.reset(OpARM64LessThan)
  7074  		v0 := b.NewValue0(v.Pos, OpARM64TST, types.TypeFlags)
  7075  		v0.AddArg2(x, y)
  7076  		v.AddArg(v0)
  7077  		return true
  7078  	}
  7079  	// match: (LessThan (CMPWconst [0] x:(ANDconst [c] y)))
  7080  	// cond: x.Uses == 1
  7081  	// result: (LessThan (TSTWconst [int32(c)] y))
  7082  	for {
  7083  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  7084  			break
  7085  		}
  7086  		x := v_0.Args[0]
  7087  		if x.Op != OpARM64ANDconst {
  7088  			break
  7089  		}
  7090  		c := auxIntToInt64(x.AuxInt)
  7091  		y := x.Args[0]
  7092  		if !(x.Uses == 1) {
  7093  			break
  7094  		}
  7095  		v.reset(OpARM64LessThan)
  7096  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
  7097  		v0.AuxInt = int32ToAuxInt(int32(c))
  7098  		v0.AddArg(y)
  7099  		v.AddArg(v0)
  7100  		return true
  7101  	}
  7102  	// match: (LessThan (CMPWconst [0] z:(AND x y)))
  7103  	// cond: z.Uses == 1
  7104  	// result: (LessThan (TSTW x y))
  7105  	for {
  7106  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  7107  			break
  7108  		}
  7109  		z := v_0.Args[0]
  7110  		if z.Op != OpARM64AND {
  7111  			break
  7112  		}
  7113  		y := z.Args[1]
  7114  		x := z.Args[0]
  7115  		if !(z.Uses == 1) {
  7116  			break
  7117  		}
  7118  		v.reset(OpARM64LessThan)
  7119  		v0 := b.NewValue0(v.Pos, OpARM64TSTW, types.TypeFlags)
  7120  		v0.AddArg2(x, y)
  7121  		v.AddArg(v0)
  7122  		return true
  7123  	}
  7124  	// match: (LessThan (CMPconst [0] x:(ANDconst [c] y)))
  7125  	// cond: x.Uses == 1
  7126  	// result: (LessThan (TSTconst [c] y))
  7127  	for {
  7128  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  7129  			break
  7130  		}
  7131  		x := v_0.Args[0]
  7132  		if x.Op != OpARM64ANDconst {
  7133  			break
  7134  		}
  7135  		c := auxIntToInt64(x.AuxInt)
  7136  		y := x.Args[0]
  7137  		if !(x.Uses == 1) {
  7138  			break
  7139  		}
  7140  		v.reset(OpARM64LessThan)
  7141  		v0 := b.NewValue0(v.Pos, OpARM64TSTconst, types.TypeFlags)
  7142  		v0.AuxInt = int64ToAuxInt(c)
  7143  		v0.AddArg(y)
  7144  		v.AddArg(v0)
  7145  		return true
  7146  	}
  7147  	// match: (LessThan (CMPconst [0] x:(ADDconst [c] y)))
  7148  	// cond: x.Uses == 1
  7149  	// result: (LessThanNoov (CMNconst [c] y))
  7150  	for {
  7151  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  7152  			break
  7153  		}
  7154  		x := v_0.Args[0]
  7155  		if x.Op != OpARM64ADDconst {
  7156  			break
  7157  		}
  7158  		c := auxIntToInt64(x.AuxInt)
  7159  		y := x.Args[0]
  7160  		if !(x.Uses == 1) {
  7161  			break
  7162  		}
  7163  		v.reset(OpARM64LessThanNoov)
  7164  		v0 := b.NewValue0(v.Pos, OpARM64CMNconst, types.TypeFlags)
  7165  		v0.AuxInt = int64ToAuxInt(c)
  7166  		v0.AddArg(y)
  7167  		v.AddArg(v0)
  7168  		return true
  7169  	}
  7170  	// match: (LessThan (CMPWconst [0] x:(ADDconst [c] y)))
  7171  	// cond: x.Uses == 1
  7172  	// result: (LessThanNoov (CMNWconst [int32(c)] y))
  7173  	for {
  7174  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  7175  			break
  7176  		}
  7177  		x := v_0.Args[0]
  7178  		if x.Op != OpARM64ADDconst {
  7179  			break
  7180  		}
  7181  		c := auxIntToInt64(x.AuxInt)
  7182  		y := x.Args[0]
  7183  		if !(x.Uses == 1) {
  7184  			break
  7185  		}
  7186  		v.reset(OpARM64LessThanNoov)
  7187  		v0 := b.NewValue0(v.Pos, OpARM64CMNWconst, types.TypeFlags)
  7188  		v0.AuxInt = int32ToAuxInt(int32(c))
  7189  		v0.AddArg(y)
  7190  		v.AddArg(v0)
  7191  		return true
  7192  	}
  7193  	// match: (LessThan (CMPconst [0] z:(ADD x y)))
  7194  	// cond: z.Uses == 1
  7195  	// result: (LessThanNoov (CMN x y))
  7196  	for {
  7197  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  7198  			break
  7199  		}
  7200  		z := v_0.Args[0]
  7201  		if z.Op != OpARM64ADD {
  7202  			break
  7203  		}
  7204  		y := z.Args[1]
  7205  		x := z.Args[0]
  7206  		if !(z.Uses == 1) {
  7207  			break
  7208  		}
  7209  		v.reset(OpARM64LessThanNoov)
  7210  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  7211  		v0.AddArg2(x, y)
  7212  		v.AddArg(v0)
  7213  		return true
  7214  	}
  7215  	// match: (LessThan (CMPWconst [0] z:(ADD x y)))
  7216  	// cond: z.Uses == 1
  7217  	// result: (LessThanNoov (CMNW x y))
  7218  	for {
  7219  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  7220  			break
  7221  		}
  7222  		z := v_0.Args[0]
  7223  		if z.Op != OpARM64ADD {
  7224  			break
  7225  		}
  7226  		y := z.Args[1]
  7227  		x := z.Args[0]
  7228  		if !(z.Uses == 1) {
  7229  			break
  7230  		}
  7231  		v.reset(OpARM64LessThanNoov)
  7232  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  7233  		v0.AddArg2(x, y)
  7234  		v.AddArg(v0)
  7235  		return true
  7236  	}
  7237  	// match: (LessThan (CMPconst [0] z:(MADD a x y)))
  7238  	// cond: z.Uses == 1
  7239  	// result: (LessThanNoov (CMN a (MUL <x.Type> x y)))
  7240  	for {
  7241  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  7242  			break
  7243  		}
  7244  		z := v_0.Args[0]
  7245  		if z.Op != OpARM64MADD {
  7246  			break
  7247  		}
  7248  		y := z.Args[2]
  7249  		a := z.Args[0]
  7250  		x := z.Args[1]
  7251  		if !(z.Uses == 1) {
  7252  			break
  7253  		}
  7254  		v.reset(OpARM64LessThanNoov)
  7255  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
  7256  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  7257  		v1.AddArg2(x, y)
  7258  		v0.AddArg2(a, v1)
  7259  		v.AddArg(v0)
  7260  		return true
  7261  	}
  7262  	// match: (LessThan (CMPconst [0] z:(MSUB a x y)))
  7263  	// cond: z.Uses == 1
  7264  	// result: (LessThanNoov (CMP a (MUL <x.Type> x y)))
  7265  	for {
  7266  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
  7267  			break
  7268  		}
  7269  		z := v_0.Args[0]
  7270  		if z.Op != OpARM64MSUB {
  7271  			break
  7272  		}
  7273  		y := z.Args[2]
  7274  		a := z.Args[0]
  7275  		x := z.Args[1]
  7276  		if !(z.Uses == 1) {
  7277  			break
  7278  		}
  7279  		v.reset(OpARM64LessThanNoov)
  7280  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
  7281  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  7282  		v1.AddArg2(x, y)
  7283  		v0.AddArg2(a, v1)
  7284  		v.AddArg(v0)
  7285  		return true
  7286  	}
  7287  	// match: (LessThan (CMPWconst [0] z:(MADDW a x y)))
  7288  	// cond: z.Uses == 1
  7289  	// result: (LessThanNoov (CMNW a (MULW <x.Type> x y)))
  7290  	for {
  7291  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  7292  			break
  7293  		}
  7294  		z := v_0.Args[0]
  7295  		if z.Op != OpARM64MADDW {
  7296  			break
  7297  		}
  7298  		y := z.Args[2]
  7299  		a := z.Args[0]
  7300  		x := z.Args[1]
  7301  		if !(z.Uses == 1) {
  7302  			break
  7303  		}
  7304  		v.reset(OpARM64LessThanNoov)
  7305  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
  7306  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  7307  		v1.AddArg2(x, y)
  7308  		v0.AddArg2(a, v1)
  7309  		v.AddArg(v0)
  7310  		return true
  7311  	}
  7312  	// match: (LessThan (CMPWconst [0] z:(MSUBW a x y)))
  7313  	// cond: z.Uses == 1
  7314  	// result: (LessThanNoov (CMPW a (MULW <x.Type> x y)))
  7315  	for {
  7316  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  7317  			break
  7318  		}
  7319  		z := v_0.Args[0]
  7320  		if z.Op != OpARM64MSUBW {
  7321  			break
  7322  		}
  7323  		y := z.Args[2]
  7324  		a := z.Args[0]
  7325  		x := z.Args[1]
  7326  		if !(z.Uses == 1) {
  7327  			break
  7328  		}
  7329  		v.reset(OpARM64LessThanNoov)
  7330  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
  7331  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  7332  		v1.AddArg2(x, y)
  7333  		v0.AddArg2(a, v1)
  7334  		v.AddArg(v0)
  7335  		return true
  7336  	}
  7337  	// match: (LessThan (FlagConstant [fc]))
  7338  	// result: (MOVDconst [b2i(fc.lt())])
  7339  	for {
  7340  		if v_0.Op != OpARM64FlagConstant {
  7341  			break
  7342  		}
  7343  		fc := auxIntToFlagConstant(v_0.AuxInt)
  7344  		v.reset(OpARM64MOVDconst)
  7345  		v.AuxInt = int64ToAuxInt(b2i(fc.lt()))
  7346  		return true
  7347  	}
  7348  	// match: (LessThan (InvertFlags x))
  7349  	// result: (GreaterThan x)
  7350  	for {
  7351  		if v_0.Op != OpARM64InvertFlags {
  7352  			break
  7353  		}
  7354  		x := v_0.Args[0]
  7355  		v.reset(OpARM64GreaterThan)
  7356  		v.AddArg(x)
  7357  		return true
  7358  	}
  7359  	return false
  7360  }
  7361  func rewriteValueARM64_OpARM64LessThanF(v *Value) bool {
  7362  	v_0 := v.Args[0]
  7363  	// match: (LessThanF (InvertFlags x))
  7364  	// result: (GreaterThanF x)
  7365  	for {
  7366  		if v_0.Op != OpARM64InvertFlags {
  7367  			break
  7368  		}
  7369  		x := v_0.Args[0]
  7370  		v.reset(OpARM64GreaterThanF)
  7371  		v.AddArg(x)
  7372  		return true
  7373  	}
  7374  	return false
  7375  }
  7376  func rewriteValueARM64_OpARM64LessThanNoov(v *Value) bool {
  7377  	v_0 := v.Args[0]
  7378  	b := v.Block
  7379  	typ := &b.Func.Config.Types
  7380  	// match: (LessThanNoov (FlagConstant [fc]))
  7381  	// result: (MOVDconst [b2i(fc.ltNoov())])
  7382  	for {
  7383  		if v_0.Op != OpARM64FlagConstant {
  7384  			break
  7385  		}
  7386  		fc := auxIntToFlagConstant(v_0.AuxInt)
  7387  		v.reset(OpARM64MOVDconst)
  7388  		v.AuxInt = int64ToAuxInt(b2i(fc.ltNoov()))
  7389  		return true
  7390  	}
  7391  	// match: (LessThanNoov (InvertFlags x))
  7392  	// result: (CSEL0 [OpARM64NotEqual] (GreaterEqualNoov <typ.Bool> x) x)
  7393  	for {
  7394  		if v_0.Op != OpARM64InvertFlags {
  7395  			break
  7396  		}
  7397  		x := v_0.Args[0]
  7398  		v.reset(OpARM64CSEL0)
  7399  		v.AuxInt = opToAuxInt(OpARM64NotEqual)
  7400  		v0 := b.NewValue0(v.Pos, OpARM64GreaterEqualNoov, typ.Bool)
  7401  		v0.AddArg(x)
  7402  		v.AddArg2(v0, x)
  7403  		return true
  7404  	}
  7405  	return false
  7406  }
  7407  func rewriteValueARM64_OpARM64LessThanU(v *Value) bool {
  7408  	v_0 := v.Args[0]
  7409  	// match: (LessThanU (FlagConstant [fc]))
  7410  	// result: (MOVDconst [b2i(fc.ult())])
  7411  	for {
  7412  		if v_0.Op != OpARM64FlagConstant {
  7413  			break
  7414  		}
  7415  		fc := auxIntToFlagConstant(v_0.AuxInt)
  7416  		v.reset(OpARM64MOVDconst)
  7417  		v.AuxInt = int64ToAuxInt(b2i(fc.ult()))
  7418  		return true
  7419  	}
  7420  	// match: (LessThanU (InvertFlags x))
  7421  	// result: (GreaterThanU x)
  7422  	for {
  7423  		if v_0.Op != OpARM64InvertFlags {
  7424  			break
  7425  		}
  7426  		x := v_0.Args[0]
  7427  		v.reset(OpARM64GreaterThanU)
  7428  		v.AddArg(x)
  7429  		return true
  7430  	}
  7431  	return false
  7432  }
  7433  func rewriteValueARM64_OpARM64LoweredPanicBoundsCR(v *Value) bool {
  7434  	v_1 := v.Args[1]
  7435  	v_0 := v.Args[0]
  7436  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVDconst [c]) mem)
  7437  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  7438  	for {
  7439  		kind := auxIntToInt64(v.AuxInt)
  7440  		p := auxToPanicBoundsC(v.Aux)
  7441  		if v_0.Op != OpARM64MOVDconst {
  7442  			break
  7443  		}
  7444  		c := auxIntToInt64(v_0.AuxInt)
  7445  		mem := v_1
  7446  		v.reset(OpARM64LoweredPanicBoundsCC)
  7447  		v.AuxInt = int64ToAuxInt(kind)
  7448  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: p.C, Cy: c})
  7449  		v.AddArg(mem)
  7450  		return true
  7451  	}
  7452  	return false
  7453  }
  7454  func rewriteValueARM64_OpARM64LoweredPanicBoundsRC(v *Value) bool {
  7455  	v_1 := v.Args[1]
  7456  	v_0 := v.Args[0]
  7457  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVDconst [c]) mem)
  7458  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  7459  	for {
  7460  		kind := auxIntToInt64(v.AuxInt)
  7461  		p := auxToPanicBoundsC(v.Aux)
  7462  		if v_0.Op != OpARM64MOVDconst {
  7463  			break
  7464  		}
  7465  		c := auxIntToInt64(v_0.AuxInt)
  7466  		mem := v_1
  7467  		v.reset(OpARM64LoweredPanicBoundsCC)
  7468  		v.AuxInt = int64ToAuxInt(kind)
  7469  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: c, Cy: p.C})
  7470  		v.AddArg(mem)
  7471  		return true
  7472  	}
  7473  	return false
  7474  }
  7475  func rewriteValueARM64_OpARM64LoweredPanicBoundsRR(v *Value) bool {
  7476  	v_2 := v.Args[2]
  7477  	v_1 := v.Args[1]
  7478  	v_0 := v.Args[0]
  7479  	// match: (LoweredPanicBoundsRR [kind] x (MOVDconst [c]) mem)
  7480  	// result: (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:c}} mem)
  7481  	for {
  7482  		kind := auxIntToInt64(v.AuxInt)
  7483  		x := v_0
  7484  		if v_1.Op != OpARM64MOVDconst {
  7485  			break
  7486  		}
  7487  		c := auxIntToInt64(v_1.AuxInt)
  7488  		mem := v_2
  7489  		v.reset(OpARM64LoweredPanicBoundsRC)
  7490  		v.AuxInt = int64ToAuxInt(kind)
  7491  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: c})
  7492  		v.AddArg2(x, mem)
  7493  		return true
  7494  	}
  7495  	// match: (LoweredPanicBoundsRR [kind] (MOVDconst [c]) y mem)
  7496  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:c}} y mem)
  7497  	for {
  7498  		kind := auxIntToInt64(v.AuxInt)
  7499  		if v_0.Op != OpARM64MOVDconst {
  7500  			break
  7501  		}
  7502  		c := auxIntToInt64(v_0.AuxInt)
  7503  		y := v_1
  7504  		mem := v_2
  7505  		v.reset(OpARM64LoweredPanicBoundsCR)
  7506  		v.AuxInt = int64ToAuxInt(kind)
  7507  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: c})
  7508  		v.AddArg2(y, mem)
  7509  		return true
  7510  	}
  7511  	return false
  7512  }
  7513  func rewriteValueARM64_OpARM64MADD(v *Value) bool {
  7514  	v_2 := v.Args[2]
  7515  	v_1 := v.Args[1]
  7516  	v_0 := v.Args[0]
  7517  	b := v.Block
  7518  	// match: (MADD a x (MOVDconst [-1]))
  7519  	// result: (SUB a x)
  7520  	for {
  7521  		a := v_0
  7522  		x := v_1
  7523  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != -1 {
  7524  			break
  7525  		}
  7526  		v.reset(OpARM64SUB)
  7527  		v.AddArg2(a, x)
  7528  		return true
  7529  	}
  7530  	// match: (MADD a _ (MOVDconst [0]))
  7531  	// result: a
  7532  	for {
  7533  		a := v_0
  7534  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
  7535  			break
  7536  		}
  7537  		v.copyOf(a)
  7538  		return true
  7539  	}
  7540  	// match: (MADD a x (MOVDconst [1]))
  7541  	// result: (ADD a x)
  7542  	for {
  7543  		a := v_0
  7544  		x := v_1
  7545  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 1 {
  7546  			break
  7547  		}
  7548  		v.reset(OpARM64ADD)
  7549  		v.AddArg2(a, x)
  7550  		return true
  7551  	}
  7552  	// match: (MADD a x (MOVDconst [c]))
  7553  	// cond: isPowerOfTwo(c)
  7554  	// result: (ADDshiftLL a x [log64(c)])
  7555  	for {
  7556  		a := v_0
  7557  		x := v_1
  7558  		if v_2.Op != OpARM64MOVDconst {
  7559  			break
  7560  		}
  7561  		c := auxIntToInt64(v_2.AuxInt)
  7562  		if !(isPowerOfTwo(c)) {
  7563  			break
  7564  		}
  7565  		v.reset(OpARM64ADDshiftLL)
  7566  		v.AuxInt = int64ToAuxInt(log64(c))
  7567  		v.AddArg2(a, x)
  7568  		return true
  7569  	}
  7570  	// match: (MADD a x (MOVDconst [c]))
  7571  	// cond: isPowerOfTwo(c-1) && c>=3
  7572  	// result: (ADD a (ADDshiftLL <x.Type> x x [log64(c-1)]))
  7573  	for {
  7574  		a := v_0
  7575  		x := v_1
  7576  		if v_2.Op != OpARM64MOVDconst {
  7577  			break
  7578  		}
  7579  		c := auxIntToInt64(v_2.AuxInt)
  7580  		if !(isPowerOfTwo(c-1) && c >= 3) {
  7581  			break
  7582  		}
  7583  		v.reset(OpARM64ADD)
  7584  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  7585  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
  7586  		v0.AddArg2(x, x)
  7587  		v.AddArg2(a, v0)
  7588  		return true
  7589  	}
  7590  	// match: (MADD a x (MOVDconst [c]))
  7591  	// cond: isPowerOfTwo(c+1) && c>=7
  7592  	// result: (SUB a (SUBshiftLL <x.Type> x x [log64(c+1)]))
  7593  	for {
  7594  		a := v_0
  7595  		x := v_1
  7596  		if v_2.Op != OpARM64MOVDconst {
  7597  			break
  7598  		}
  7599  		c := auxIntToInt64(v_2.AuxInt)
  7600  		if !(isPowerOfTwo(c+1) && c >= 7) {
  7601  			break
  7602  		}
  7603  		v.reset(OpARM64SUB)
  7604  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  7605  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
  7606  		v0.AddArg2(x, x)
  7607  		v.AddArg2(a, v0)
  7608  		return true
  7609  	}
  7610  	// match: (MADD a x (MOVDconst [c]))
  7611  	// cond: c%3 == 0 && isPowerOfTwo(c/3)
  7612  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
  7613  	for {
  7614  		a := v_0
  7615  		x := v_1
  7616  		if v_2.Op != OpARM64MOVDconst {
  7617  			break
  7618  		}
  7619  		c := auxIntToInt64(v_2.AuxInt)
  7620  		if !(c%3 == 0 && isPowerOfTwo(c/3)) {
  7621  			break
  7622  		}
  7623  		v.reset(OpARM64SUBshiftLL)
  7624  		v.AuxInt = int64ToAuxInt(log64(c / 3))
  7625  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  7626  		v0.AuxInt = int64ToAuxInt(2)
  7627  		v0.AddArg2(x, x)
  7628  		v.AddArg2(a, v0)
  7629  		return true
  7630  	}
  7631  	// match: (MADD a x (MOVDconst [c]))
  7632  	// cond: c%5 == 0 && isPowerOfTwo(c/5)
  7633  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
  7634  	for {
  7635  		a := v_0
  7636  		x := v_1
  7637  		if v_2.Op != OpARM64MOVDconst {
  7638  			break
  7639  		}
  7640  		c := auxIntToInt64(v_2.AuxInt)
  7641  		if !(c%5 == 0 && isPowerOfTwo(c/5)) {
  7642  			break
  7643  		}
  7644  		v.reset(OpARM64ADDshiftLL)
  7645  		v.AuxInt = int64ToAuxInt(log64(c / 5))
  7646  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  7647  		v0.AuxInt = int64ToAuxInt(2)
  7648  		v0.AddArg2(x, x)
  7649  		v.AddArg2(a, v0)
  7650  		return true
  7651  	}
  7652  	// match: (MADD a x (MOVDconst [c]))
  7653  	// cond: c%7 == 0 && isPowerOfTwo(c/7)
  7654  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
  7655  	for {
  7656  		a := v_0
  7657  		x := v_1
  7658  		if v_2.Op != OpARM64MOVDconst {
  7659  			break
  7660  		}
  7661  		c := auxIntToInt64(v_2.AuxInt)
  7662  		if !(c%7 == 0 && isPowerOfTwo(c/7)) {
  7663  			break
  7664  		}
  7665  		v.reset(OpARM64SUBshiftLL)
  7666  		v.AuxInt = int64ToAuxInt(log64(c / 7))
  7667  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  7668  		v0.AuxInt = int64ToAuxInt(3)
  7669  		v0.AddArg2(x, x)
  7670  		v.AddArg2(a, v0)
  7671  		return true
  7672  	}
  7673  	// match: (MADD a x (MOVDconst [c]))
  7674  	// cond: c%9 == 0 && isPowerOfTwo(c/9)
  7675  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
  7676  	for {
  7677  		a := v_0
  7678  		x := v_1
  7679  		if v_2.Op != OpARM64MOVDconst {
  7680  			break
  7681  		}
  7682  		c := auxIntToInt64(v_2.AuxInt)
  7683  		if !(c%9 == 0 && isPowerOfTwo(c/9)) {
  7684  			break
  7685  		}
  7686  		v.reset(OpARM64ADDshiftLL)
  7687  		v.AuxInt = int64ToAuxInt(log64(c / 9))
  7688  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  7689  		v0.AuxInt = int64ToAuxInt(3)
  7690  		v0.AddArg2(x, x)
  7691  		v.AddArg2(a, v0)
  7692  		return true
  7693  	}
  7694  	// match: (MADD a (MOVDconst [-1]) x)
  7695  	// result: (SUB a x)
  7696  	for {
  7697  		a := v_0
  7698  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
  7699  			break
  7700  		}
  7701  		x := v_2
  7702  		v.reset(OpARM64SUB)
  7703  		v.AddArg2(a, x)
  7704  		return true
  7705  	}
  7706  	// match: (MADD a (MOVDconst [0]) _)
  7707  	// result: a
  7708  	for {
  7709  		a := v_0
  7710  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  7711  			break
  7712  		}
  7713  		v.copyOf(a)
  7714  		return true
  7715  	}
  7716  	// match: (MADD a (MOVDconst [1]) x)
  7717  	// result: (ADD a x)
  7718  	for {
  7719  		a := v_0
  7720  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  7721  			break
  7722  		}
  7723  		x := v_2
  7724  		v.reset(OpARM64ADD)
  7725  		v.AddArg2(a, x)
  7726  		return true
  7727  	}
  7728  	// match: (MADD a (MOVDconst [c]) x)
  7729  	// cond: isPowerOfTwo(c)
  7730  	// result: (ADDshiftLL a x [log64(c)])
  7731  	for {
  7732  		a := v_0
  7733  		if v_1.Op != OpARM64MOVDconst {
  7734  			break
  7735  		}
  7736  		c := auxIntToInt64(v_1.AuxInt)
  7737  		x := v_2
  7738  		if !(isPowerOfTwo(c)) {
  7739  			break
  7740  		}
  7741  		v.reset(OpARM64ADDshiftLL)
  7742  		v.AuxInt = int64ToAuxInt(log64(c))
  7743  		v.AddArg2(a, x)
  7744  		return true
  7745  	}
  7746  	// match: (MADD a (MOVDconst [c]) x)
  7747  	// cond: isPowerOfTwo(c-1) && c>=3
  7748  	// result: (ADD a (ADDshiftLL <x.Type> x x [log64(c-1)]))
  7749  	for {
  7750  		a := v_0
  7751  		if v_1.Op != OpARM64MOVDconst {
  7752  			break
  7753  		}
  7754  		c := auxIntToInt64(v_1.AuxInt)
  7755  		x := v_2
  7756  		if !(isPowerOfTwo(c-1) && c >= 3) {
  7757  			break
  7758  		}
  7759  		v.reset(OpARM64ADD)
  7760  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  7761  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
  7762  		v0.AddArg2(x, x)
  7763  		v.AddArg2(a, v0)
  7764  		return true
  7765  	}
  7766  	// match: (MADD a (MOVDconst [c]) x)
  7767  	// cond: isPowerOfTwo(c+1) && c>=7
  7768  	// result: (SUB a (SUBshiftLL <x.Type> x x [log64(c+1)]))
  7769  	for {
  7770  		a := v_0
  7771  		if v_1.Op != OpARM64MOVDconst {
  7772  			break
  7773  		}
  7774  		c := auxIntToInt64(v_1.AuxInt)
  7775  		x := v_2
  7776  		if !(isPowerOfTwo(c+1) && c >= 7) {
  7777  			break
  7778  		}
  7779  		v.reset(OpARM64SUB)
  7780  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  7781  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
  7782  		v0.AddArg2(x, x)
  7783  		v.AddArg2(a, v0)
  7784  		return true
  7785  	}
  7786  	// match: (MADD a (MOVDconst [c]) x)
  7787  	// cond: c%3 == 0 && isPowerOfTwo(c/3)
  7788  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
  7789  	for {
  7790  		a := v_0
  7791  		if v_1.Op != OpARM64MOVDconst {
  7792  			break
  7793  		}
  7794  		c := auxIntToInt64(v_1.AuxInt)
  7795  		x := v_2
  7796  		if !(c%3 == 0 && isPowerOfTwo(c/3)) {
  7797  			break
  7798  		}
  7799  		v.reset(OpARM64SUBshiftLL)
  7800  		v.AuxInt = int64ToAuxInt(log64(c / 3))
  7801  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  7802  		v0.AuxInt = int64ToAuxInt(2)
  7803  		v0.AddArg2(x, x)
  7804  		v.AddArg2(a, v0)
  7805  		return true
  7806  	}
  7807  	// match: (MADD a (MOVDconst [c]) x)
  7808  	// cond: c%5 == 0 && isPowerOfTwo(c/5)
  7809  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
  7810  	for {
  7811  		a := v_0
  7812  		if v_1.Op != OpARM64MOVDconst {
  7813  			break
  7814  		}
  7815  		c := auxIntToInt64(v_1.AuxInt)
  7816  		x := v_2
  7817  		if !(c%5 == 0 && isPowerOfTwo(c/5)) {
  7818  			break
  7819  		}
  7820  		v.reset(OpARM64ADDshiftLL)
  7821  		v.AuxInt = int64ToAuxInt(log64(c / 5))
  7822  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  7823  		v0.AuxInt = int64ToAuxInt(2)
  7824  		v0.AddArg2(x, x)
  7825  		v.AddArg2(a, v0)
  7826  		return true
  7827  	}
  7828  	// match: (MADD a (MOVDconst [c]) x)
  7829  	// cond: c%7 == 0 && isPowerOfTwo(c/7)
  7830  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
  7831  	for {
  7832  		a := v_0
  7833  		if v_1.Op != OpARM64MOVDconst {
  7834  			break
  7835  		}
  7836  		c := auxIntToInt64(v_1.AuxInt)
  7837  		x := v_2
  7838  		if !(c%7 == 0 && isPowerOfTwo(c/7)) {
  7839  			break
  7840  		}
  7841  		v.reset(OpARM64SUBshiftLL)
  7842  		v.AuxInt = int64ToAuxInt(log64(c / 7))
  7843  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  7844  		v0.AuxInt = int64ToAuxInt(3)
  7845  		v0.AddArg2(x, x)
  7846  		v.AddArg2(a, v0)
  7847  		return true
  7848  	}
  7849  	// match: (MADD a (MOVDconst [c]) x)
  7850  	// cond: c%9 == 0 && isPowerOfTwo(c/9)
  7851  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
  7852  	for {
  7853  		a := v_0
  7854  		if v_1.Op != OpARM64MOVDconst {
  7855  			break
  7856  		}
  7857  		c := auxIntToInt64(v_1.AuxInt)
  7858  		x := v_2
  7859  		if !(c%9 == 0 && isPowerOfTwo(c/9)) {
  7860  			break
  7861  		}
  7862  		v.reset(OpARM64ADDshiftLL)
  7863  		v.AuxInt = int64ToAuxInt(log64(c / 9))
  7864  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  7865  		v0.AuxInt = int64ToAuxInt(3)
  7866  		v0.AddArg2(x, x)
  7867  		v.AddArg2(a, v0)
  7868  		return true
  7869  	}
  7870  	// match: (MADD (MOVDconst [c]) x y)
  7871  	// result: (ADDconst [c] (MUL <x.Type> x y))
  7872  	for {
  7873  		if v_0.Op != OpARM64MOVDconst {
  7874  			break
  7875  		}
  7876  		c := auxIntToInt64(v_0.AuxInt)
  7877  		x := v_1
  7878  		y := v_2
  7879  		v.reset(OpARM64ADDconst)
  7880  		v.AuxInt = int64ToAuxInt(c)
  7881  		v0 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  7882  		v0.AddArg2(x, y)
  7883  		v.AddArg(v0)
  7884  		return true
  7885  	}
  7886  	// match: (MADD a (MOVDconst [c]) (MOVDconst [d]))
  7887  	// result: (ADDconst [c*d] a)
  7888  	for {
  7889  		a := v_0
  7890  		if v_1.Op != OpARM64MOVDconst {
  7891  			break
  7892  		}
  7893  		c := auxIntToInt64(v_1.AuxInt)
  7894  		if v_2.Op != OpARM64MOVDconst {
  7895  			break
  7896  		}
  7897  		d := auxIntToInt64(v_2.AuxInt)
  7898  		v.reset(OpARM64ADDconst)
  7899  		v.AuxInt = int64ToAuxInt(c * d)
  7900  		v.AddArg(a)
  7901  		return true
  7902  	}
  7903  	return false
  7904  }
  7905  func rewriteValueARM64_OpARM64MADDW(v *Value) bool {
  7906  	v_2 := v.Args[2]
  7907  	v_1 := v.Args[1]
  7908  	v_0 := v.Args[0]
  7909  	b := v.Block
  7910  	// match: (MADDW a x (MOVDconst [c]))
  7911  	// cond: int32(c)==-1
  7912  	// result: (MOVWUreg (SUB <a.Type> a x))
  7913  	for {
  7914  		a := v_0
  7915  		x := v_1
  7916  		if v_2.Op != OpARM64MOVDconst {
  7917  			break
  7918  		}
  7919  		c := auxIntToInt64(v_2.AuxInt)
  7920  		if !(int32(c) == -1) {
  7921  			break
  7922  		}
  7923  		v.reset(OpARM64MOVWUreg)
  7924  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
  7925  		v0.AddArg2(a, x)
  7926  		v.AddArg(v0)
  7927  		return true
  7928  	}
  7929  	// match: (MADDW a _ (MOVDconst [c]))
  7930  	// cond: int32(c)==0
  7931  	// result: (MOVWUreg a)
  7932  	for {
  7933  		a := v_0
  7934  		if v_2.Op != OpARM64MOVDconst {
  7935  			break
  7936  		}
  7937  		c := auxIntToInt64(v_2.AuxInt)
  7938  		if !(int32(c) == 0) {
  7939  			break
  7940  		}
  7941  		v.reset(OpARM64MOVWUreg)
  7942  		v.AddArg(a)
  7943  		return true
  7944  	}
  7945  	// match: (MADDW a x (MOVDconst [c]))
  7946  	// cond: int32(c)==1
  7947  	// result: (MOVWUreg (ADD <a.Type> a x))
  7948  	for {
  7949  		a := v_0
  7950  		x := v_1
  7951  		if v_2.Op != OpARM64MOVDconst {
  7952  			break
  7953  		}
  7954  		c := auxIntToInt64(v_2.AuxInt)
  7955  		if !(int32(c) == 1) {
  7956  			break
  7957  		}
  7958  		v.reset(OpARM64MOVWUreg)
  7959  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
  7960  		v0.AddArg2(a, x)
  7961  		v.AddArg(v0)
  7962  		return true
  7963  	}
  7964  	// match: (MADDW a x (MOVDconst [c]))
  7965  	// cond: isPowerOfTwo(c)
  7966  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [log64(c)]))
  7967  	for {
  7968  		a := v_0
  7969  		x := v_1
  7970  		if v_2.Op != OpARM64MOVDconst {
  7971  			break
  7972  		}
  7973  		c := auxIntToInt64(v_2.AuxInt)
  7974  		if !(isPowerOfTwo(c)) {
  7975  			break
  7976  		}
  7977  		v.reset(OpARM64MOVWUreg)
  7978  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
  7979  		v0.AuxInt = int64ToAuxInt(log64(c))
  7980  		v0.AddArg2(a, x)
  7981  		v.AddArg(v0)
  7982  		return true
  7983  	}
  7984  	// match: (MADDW a x (MOVDconst [c]))
  7985  	// cond: isPowerOfTwo(c-1) && int32(c)>=3
  7986  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [log64(c-1)])))
  7987  	for {
  7988  		a := v_0
  7989  		x := v_1
  7990  		if v_2.Op != OpARM64MOVDconst {
  7991  			break
  7992  		}
  7993  		c := auxIntToInt64(v_2.AuxInt)
  7994  		if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
  7995  			break
  7996  		}
  7997  		v.reset(OpARM64MOVWUreg)
  7998  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
  7999  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8000  		v1.AuxInt = int64ToAuxInt(log64(c - 1))
  8001  		v1.AddArg2(x, x)
  8002  		v0.AddArg2(a, v1)
  8003  		v.AddArg(v0)
  8004  		return true
  8005  	}
  8006  	// match: (MADDW a x (MOVDconst [c]))
  8007  	// cond: isPowerOfTwo(c+1) && int32(c)>=7
  8008  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [log64(c+1)])))
  8009  	for {
  8010  		a := v_0
  8011  		x := v_1
  8012  		if v_2.Op != OpARM64MOVDconst {
  8013  			break
  8014  		}
  8015  		c := auxIntToInt64(v_2.AuxInt)
  8016  		if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
  8017  			break
  8018  		}
  8019  		v.reset(OpARM64MOVWUreg)
  8020  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
  8021  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8022  		v1.AuxInt = int64ToAuxInt(log64(c + 1))
  8023  		v1.AddArg2(x, x)
  8024  		v0.AddArg2(a, v1)
  8025  		v.AddArg(v0)
  8026  		return true
  8027  	}
  8028  	// match: (MADDW a x (MOVDconst [c]))
  8029  	// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
  8030  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)]))
  8031  	for {
  8032  		a := v_0
  8033  		x := v_1
  8034  		if v_2.Op != OpARM64MOVDconst {
  8035  			break
  8036  		}
  8037  		c := auxIntToInt64(v_2.AuxInt)
  8038  		if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
  8039  			break
  8040  		}
  8041  		v.reset(OpARM64MOVWUreg)
  8042  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
  8043  		v0.AuxInt = int64ToAuxInt(log64(c / 3))
  8044  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8045  		v1.AuxInt = int64ToAuxInt(2)
  8046  		v1.AddArg2(x, x)
  8047  		v0.AddArg2(a, v1)
  8048  		v.AddArg(v0)
  8049  		return true
  8050  	}
  8051  	// match: (MADDW a x (MOVDconst [c]))
  8052  	// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
  8053  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)]))
  8054  	for {
  8055  		a := v_0
  8056  		x := v_1
  8057  		if v_2.Op != OpARM64MOVDconst {
  8058  			break
  8059  		}
  8060  		c := auxIntToInt64(v_2.AuxInt)
  8061  		if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
  8062  			break
  8063  		}
  8064  		v.reset(OpARM64MOVWUreg)
  8065  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
  8066  		v0.AuxInt = int64ToAuxInt(log64(c / 5))
  8067  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8068  		v1.AuxInt = int64ToAuxInt(2)
  8069  		v1.AddArg2(x, x)
  8070  		v0.AddArg2(a, v1)
  8071  		v.AddArg(v0)
  8072  		return true
  8073  	}
  8074  	// match: (MADDW a x (MOVDconst [c]))
  8075  	// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
  8076  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)]))
  8077  	for {
  8078  		a := v_0
  8079  		x := v_1
  8080  		if v_2.Op != OpARM64MOVDconst {
  8081  			break
  8082  		}
  8083  		c := auxIntToInt64(v_2.AuxInt)
  8084  		if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
  8085  			break
  8086  		}
  8087  		v.reset(OpARM64MOVWUreg)
  8088  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
  8089  		v0.AuxInt = int64ToAuxInt(log64(c / 7))
  8090  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8091  		v1.AuxInt = int64ToAuxInt(3)
  8092  		v1.AddArg2(x, x)
  8093  		v0.AddArg2(a, v1)
  8094  		v.AddArg(v0)
  8095  		return true
  8096  	}
  8097  	// match: (MADDW a x (MOVDconst [c]))
  8098  	// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
  8099  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)]))
  8100  	for {
  8101  		a := v_0
  8102  		x := v_1
  8103  		if v_2.Op != OpARM64MOVDconst {
  8104  			break
  8105  		}
  8106  		c := auxIntToInt64(v_2.AuxInt)
  8107  		if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
  8108  			break
  8109  		}
  8110  		v.reset(OpARM64MOVWUreg)
  8111  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
  8112  		v0.AuxInt = int64ToAuxInt(log64(c / 9))
  8113  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8114  		v1.AuxInt = int64ToAuxInt(3)
  8115  		v1.AddArg2(x, x)
  8116  		v0.AddArg2(a, v1)
  8117  		v.AddArg(v0)
  8118  		return true
  8119  	}
  8120  	// match: (MADDW a (MOVDconst [c]) x)
  8121  	// cond: int32(c)==-1
  8122  	// result: (MOVWUreg (SUB <a.Type> a x))
  8123  	for {
  8124  		a := v_0
  8125  		if v_1.Op != OpARM64MOVDconst {
  8126  			break
  8127  		}
  8128  		c := auxIntToInt64(v_1.AuxInt)
  8129  		x := v_2
  8130  		if !(int32(c) == -1) {
  8131  			break
  8132  		}
  8133  		v.reset(OpARM64MOVWUreg)
  8134  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
  8135  		v0.AddArg2(a, x)
  8136  		v.AddArg(v0)
  8137  		return true
  8138  	}
  8139  	// match: (MADDW a (MOVDconst [c]) _)
  8140  	// cond: int32(c)==0
  8141  	// result: (MOVWUreg a)
  8142  	for {
  8143  		a := v_0
  8144  		if v_1.Op != OpARM64MOVDconst {
  8145  			break
  8146  		}
  8147  		c := auxIntToInt64(v_1.AuxInt)
  8148  		if !(int32(c) == 0) {
  8149  			break
  8150  		}
  8151  		v.reset(OpARM64MOVWUreg)
  8152  		v.AddArg(a)
  8153  		return true
  8154  	}
  8155  	// match: (MADDW a (MOVDconst [c]) x)
  8156  	// cond: int32(c)==1
  8157  	// result: (MOVWUreg (ADD <a.Type> a x))
  8158  	for {
  8159  		a := v_0
  8160  		if v_1.Op != OpARM64MOVDconst {
  8161  			break
  8162  		}
  8163  		c := auxIntToInt64(v_1.AuxInt)
  8164  		x := v_2
  8165  		if !(int32(c) == 1) {
  8166  			break
  8167  		}
  8168  		v.reset(OpARM64MOVWUreg)
  8169  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
  8170  		v0.AddArg2(a, x)
  8171  		v.AddArg(v0)
  8172  		return true
  8173  	}
  8174  	// match: (MADDW a (MOVDconst [c]) x)
  8175  	// cond: isPowerOfTwo(c)
  8176  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [log64(c)]))
  8177  	for {
  8178  		a := v_0
  8179  		if v_1.Op != OpARM64MOVDconst {
  8180  			break
  8181  		}
  8182  		c := auxIntToInt64(v_1.AuxInt)
  8183  		x := v_2
  8184  		if !(isPowerOfTwo(c)) {
  8185  			break
  8186  		}
  8187  		v.reset(OpARM64MOVWUreg)
  8188  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
  8189  		v0.AuxInt = int64ToAuxInt(log64(c))
  8190  		v0.AddArg2(a, x)
  8191  		v.AddArg(v0)
  8192  		return true
  8193  	}
  8194  	// match: (MADDW a (MOVDconst [c]) x)
  8195  	// cond: isPowerOfTwo(c-1) && int32(c)>=3
  8196  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [log64(c-1)])))
  8197  	for {
  8198  		a := v_0
  8199  		if v_1.Op != OpARM64MOVDconst {
  8200  			break
  8201  		}
  8202  		c := auxIntToInt64(v_1.AuxInt)
  8203  		x := v_2
  8204  		if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
  8205  			break
  8206  		}
  8207  		v.reset(OpARM64MOVWUreg)
  8208  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
  8209  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8210  		v1.AuxInt = int64ToAuxInt(log64(c - 1))
  8211  		v1.AddArg2(x, x)
  8212  		v0.AddArg2(a, v1)
  8213  		v.AddArg(v0)
  8214  		return true
  8215  	}
  8216  	// match: (MADDW a (MOVDconst [c]) x)
  8217  	// cond: isPowerOfTwo(c+1) && int32(c)>=7
  8218  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [log64(c+1)])))
  8219  	for {
  8220  		a := v_0
  8221  		if v_1.Op != OpARM64MOVDconst {
  8222  			break
  8223  		}
  8224  		c := auxIntToInt64(v_1.AuxInt)
  8225  		x := v_2
  8226  		if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
  8227  			break
  8228  		}
  8229  		v.reset(OpARM64MOVWUreg)
  8230  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
  8231  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8232  		v1.AuxInt = int64ToAuxInt(log64(c + 1))
  8233  		v1.AddArg2(x, x)
  8234  		v0.AddArg2(a, v1)
  8235  		v.AddArg(v0)
  8236  		return true
  8237  	}
  8238  	// match: (MADDW a (MOVDconst [c]) x)
  8239  	// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
  8240  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)]))
  8241  	for {
  8242  		a := v_0
  8243  		if v_1.Op != OpARM64MOVDconst {
  8244  			break
  8245  		}
  8246  		c := auxIntToInt64(v_1.AuxInt)
  8247  		x := v_2
  8248  		if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
  8249  			break
  8250  		}
  8251  		v.reset(OpARM64MOVWUreg)
  8252  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
  8253  		v0.AuxInt = int64ToAuxInt(log64(c / 3))
  8254  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8255  		v1.AuxInt = int64ToAuxInt(2)
  8256  		v1.AddArg2(x, x)
  8257  		v0.AddArg2(a, v1)
  8258  		v.AddArg(v0)
  8259  		return true
  8260  	}
  8261  	// match: (MADDW a (MOVDconst [c]) x)
  8262  	// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
  8263  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)]))
  8264  	for {
  8265  		a := v_0
  8266  		if v_1.Op != OpARM64MOVDconst {
  8267  			break
  8268  		}
  8269  		c := auxIntToInt64(v_1.AuxInt)
  8270  		x := v_2
  8271  		if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
  8272  			break
  8273  		}
  8274  		v.reset(OpARM64MOVWUreg)
  8275  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
  8276  		v0.AuxInt = int64ToAuxInt(log64(c / 5))
  8277  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8278  		v1.AuxInt = int64ToAuxInt(2)
  8279  		v1.AddArg2(x, x)
  8280  		v0.AddArg2(a, v1)
  8281  		v.AddArg(v0)
  8282  		return true
  8283  	}
  8284  	// match: (MADDW a (MOVDconst [c]) x)
  8285  	// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
  8286  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)]))
  8287  	for {
  8288  		a := v_0
  8289  		if v_1.Op != OpARM64MOVDconst {
  8290  			break
  8291  		}
  8292  		c := auxIntToInt64(v_1.AuxInt)
  8293  		x := v_2
  8294  		if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
  8295  			break
  8296  		}
  8297  		v.reset(OpARM64MOVWUreg)
  8298  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
  8299  		v0.AuxInt = int64ToAuxInt(log64(c / 7))
  8300  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8301  		v1.AuxInt = int64ToAuxInt(3)
  8302  		v1.AddArg2(x, x)
  8303  		v0.AddArg2(a, v1)
  8304  		v.AddArg(v0)
  8305  		return true
  8306  	}
  8307  	// match: (MADDW a (MOVDconst [c]) x)
  8308  	// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
  8309  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)]))
  8310  	for {
  8311  		a := v_0
  8312  		if v_1.Op != OpARM64MOVDconst {
  8313  			break
  8314  		}
  8315  		c := auxIntToInt64(v_1.AuxInt)
  8316  		x := v_2
  8317  		if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
  8318  			break
  8319  		}
  8320  		v.reset(OpARM64MOVWUreg)
  8321  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
  8322  		v0.AuxInt = int64ToAuxInt(log64(c / 9))
  8323  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8324  		v1.AuxInt = int64ToAuxInt(3)
  8325  		v1.AddArg2(x, x)
  8326  		v0.AddArg2(a, v1)
  8327  		v.AddArg(v0)
  8328  		return true
  8329  	}
  8330  	// match: (MADDW (MOVDconst [c]) x y)
  8331  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MULW <x.Type> x y)))
  8332  	for {
  8333  		if v_0.Op != OpARM64MOVDconst {
  8334  			break
  8335  		}
  8336  		c := auxIntToInt64(v_0.AuxInt)
  8337  		x := v_1
  8338  		y := v_2
  8339  		v.reset(OpARM64MOVWUreg)
  8340  		v0 := b.NewValue0(v.Pos, OpARM64ADDconst, x.Type)
  8341  		v0.AuxInt = int64ToAuxInt(c)
  8342  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  8343  		v1.AddArg2(x, y)
  8344  		v0.AddArg(v1)
  8345  		v.AddArg(v0)
  8346  		return true
  8347  	}
  8348  	// match: (MADDW a (MOVDconst [c]) (MOVDconst [d]))
  8349  	// result: (MOVWUreg (ADDconst <a.Type> [c*d] a))
  8350  	for {
  8351  		a := v_0
  8352  		if v_1.Op != OpARM64MOVDconst {
  8353  			break
  8354  		}
  8355  		c := auxIntToInt64(v_1.AuxInt)
  8356  		if v_2.Op != OpARM64MOVDconst {
  8357  			break
  8358  		}
  8359  		d := auxIntToInt64(v_2.AuxInt)
  8360  		v.reset(OpARM64MOVWUreg)
  8361  		v0 := b.NewValue0(v.Pos, OpARM64ADDconst, a.Type)
  8362  		v0.AuxInt = int64ToAuxInt(c * d)
  8363  		v0.AddArg(a)
  8364  		v.AddArg(v0)
  8365  		return true
  8366  	}
  8367  	return false
  8368  }
  8369  func rewriteValueARM64_OpARM64MNEG(v *Value) bool {
  8370  	v_1 := v.Args[1]
  8371  	v_0 := v.Args[0]
  8372  	b := v.Block
  8373  	// match: (MNEG x (MOVDconst [-1]))
  8374  	// result: x
  8375  	for {
  8376  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8377  			x := v_0
  8378  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
  8379  				continue
  8380  			}
  8381  			v.copyOf(x)
  8382  			return true
  8383  		}
  8384  		break
  8385  	}
  8386  	// match: (MNEG _ (MOVDconst [0]))
  8387  	// result: (MOVDconst [0])
  8388  	for {
  8389  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8390  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  8391  				continue
  8392  			}
  8393  			v.reset(OpARM64MOVDconst)
  8394  			v.AuxInt = int64ToAuxInt(0)
  8395  			return true
  8396  		}
  8397  		break
  8398  	}
  8399  	// match: (MNEG x (MOVDconst [1]))
  8400  	// result: (NEG x)
  8401  	for {
  8402  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8403  			x := v_0
  8404  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  8405  				continue
  8406  			}
  8407  			v.reset(OpARM64NEG)
  8408  			v.AddArg(x)
  8409  			return true
  8410  		}
  8411  		break
  8412  	}
  8413  	// match: (MNEG x (MOVDconst [c]))
  8414  	// cond: isPowerOfTwo(c)
  8415  	// result: (NEG (SLLconst <x.Type> [log64(c)] x))
  8416  	for {
  8417  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8418  			x := v_0
  8419  			if v_1.Op != OpARM64MOVDconst {
  8420  				continue
  8421  			}
  8422  			c := auxIntToInt64(v_1.AuxInt)
  8423  			if !(isPowerOfTwo(c)) {
  8424  				continue
  8425  			}
  8426  			v.reset(OpARM64NEG)
  8427  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8428  			v0.AuxInt = int64ToAuxInt(log64(c))
  8429  			v0.AddArg(x)
  8430  			v.AddArg(v0)
  8431  			return true
  8432  		}
  8433  		break
  8434  	}
  8435  	// match: (MNEG x (MOVDconst [c]))
  8436  	// cond: isPowerOfTwo(c-1) && c >= 3
  8437  	// result: (NEG (ADDshiftLL <x.Type> x x [log64(c-1)]))
  8438  	for {
  8439  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8440  			x := v_0
  8441  			if v_1.Op != OpARM64MOVDconst {
  8442  				continue
  8443  			}
  8444  			c := auxIntToInt64(v_1.AuxInt)
  8445  			if !(isPowerOfTwo(c-1) && c >= 3) {
  8446  				continue
  8447  			}
  8448  			v.reset(OpARM64NEG)
  8449  			v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8450  			v0.AuxInt = int64ToAuxInt(log64(c - 1))
  8451  			v0.AddArg2(x, x)
  8452  			v.AddArg(v0)
  8453  			return true
  8454  		}
  8455  		break
  8456  	}
  8457  	// match: (MNEG x (MOVDconst [c]))
  8458  	// cond: isPowerOfTwo(c+1) && c >= 7
  8459  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log64(c+1)]))
  8460  	for {
  8461  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8462  			x := v_0
  8463  			if v_1.Op != OpARM64MOVDconst {
  8464  				continue
  8465  			}
  8466  			c := auxIntToInt64(v_1.AuxInt)
  8467  			if !(isPowerOfTwo(c+1) && c >= 7) {
  8468  				continue
  8469  			}
  8470  			v.reset(OpARM64NEG)
  8471  			v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8472  			v0.AuxInt = int64ToAuxInt(log64(c + 1))
  8473  			v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8474  			v1.AddArg(x)
  8475  			v0.AddArg2(v1, x)
  8476  			v.AddArg(v0)
  8477  			return true
  8478  		}
  8479  		break
  8480  	}
  8481  	// match: (MNEG x (MOVDconst [c]))
  8482  	// cond: c%3 == 0 && isPowerOfTwo(c/3)
  8483  	// result: (SLLconst <x.Type> [log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
  8484  	for {
  8485  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8486  			x := v_0
  8487  			if v_1.Op != OpARM64MOVDconst {
  8488  				continue
  8489  			}
  8490  			c := auxIntToInt64(v_1.AuxInt)
  8491  			if !(c%3 == 0 && isPowerOfTwo(c/3)) {
  8492  				continue
  8493  			}
  8494  			v.reset(OpARM64SLLconst)
  8495  			v.Type = x.Type
  8496  			v.AuxInt = int64ToAuxInt(log64(c / 3))
  8497  			v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8498  			v0.AuxInt = int64ToAuxInt(2)
  8499  			v0.AddArg2(x, x)
  8500  			v.AddArg(v0)
  8501  			return true
  8502  		}
  8503  		break
  8504  	}
  8505  	// match: (MNEG x (MOVDconst [c]))
  8506  	// cond: c%5 == 0 && isPowerOfTwo(c/5)
  8507  	// result: (NEG (SLLconst <x.Type> [log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
  8508  	for {
  8509  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8510  			x := v_0
  8511  			if v_1.Op != OpARM64MOVDconst {
  8512  				continue
  8513  			}
  8514  			c := auxIntToInt64(v_1.AuxInt)
  8515  			if !(c%5 == 0 && isPowerOfTwo(c/5)) {
  8516  				continue
  8517  			}
  8518  			v.reset(OpARM64NEG)
  8519  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8520  			v0.AuxInt = int64ToAuxInt(log64(c / 5))
  8521  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8522  			v1.AuxInt = int64ToAuxInt(2)
  8523  			v1.AddArg2(x, x)
  8524  			v0.AddArg(v1)
  8525  			v.AddArg(v0)
  8526  			return true
  8527  		}
  8528  		break
  8529  	}
  8530  	// match: (MNEG x (MOVDconst [c]))
  8531  	// cond: c%7 == 0 && isPowerOfTwo(c/7)
  8532  	// result: (SLLconst <x.Type> [log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
  8533  	for {
  8534  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8535  			x := v_0
  8536  			if v_1.Op != OpARM64MOVDconst {
  8537  				continue
  8538  			}
  8539  			c := auxIntToInt64(v_1.AuxInt)
  8540  			if !(c%7 == 0 && isPowerOfTwo(c/7)) {
  8541  				continue
  8542  			}
  8543  			v.reset(OpARM64SLLconst)
  8544  			v.Type = x.Type
  8545  			v.AuxInt = int64ToAuxInt(log64(c / 7))
  8546  			v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8547  			v0.AuxInt = int64ToAuxInt(3)
  8548  			v0.AddArg2(x, x)
  8549  			v.AddArg(v0)
  8550  			return true
  8551  		}
  8552  		break
  8553  	}
  8554  	// match: (MNEG x (MOVDconst [c]))
  8555  	// cond: c%9 == 0 && isPowerOfTwo(c/9)
  8556  	// result: (NEG (SLLconst <x.Type> [log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
  8557  	for {
  8558  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8559  			x := v_0
  8560  			if v_1.Op != OpARM64MOVDconst {
  8561  				continue
  8562  			}
  8563  			c := auxIntToInt64(v_1.AuxInt)
  8564  			if !(c%9 == 0 && isPowerOfTwo(c/9)) {
  8565  				continue
  8566  			}
  8567  			v.reset(OpARM64NEG)
  8568  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8569  			v0.AuxInt = int64ToAuxInt(log64(c / 9))
  8570  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8571  			v1.AuxInt = int64ToAuxInt(3)
  8572  			v1.AddArg2(x, x)
  8573  			v0.AddArg(v1)
  8574  			v.AddArg(v0)
  8575  			return true
  8576  		}
  8577  		break
  8578  	}
  8579  	// match: (MNEG (MOVDconst [c]) (MOVDconst [d]))
  8580  	// result: (MOVDconst [-c*d])
  8581  	for {
  8582  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8583  			if v_0.Op != OpARM64MOVDconst {
  8584  				continue
  8585  			}
  8586  			c := auxIntToInt64(v_0.AuxInt)
  8587  			if v_1.Op != OpARM64MOVDconst {
  8588  				continue
  8589  			}
  8590  			d := auxIntToInt64(v_1.AuxInt)
  8591  			v.reset(OpARM64MOVDconst)
  8592  			v.AuxInt = int64ToAuxInt(-c * d)
  8593  			return true
  8594  		}
  8595  		break
  8596  	}
  8597  	return false
  8598  }
  8599  func rewriteValueARM64_OpARM64MNEGW(v *Value) bool {
  8600  	v_1 := v.Args[1]
  8601  	v_0 := v.Args[0]
  8602  	b := v.Block
  8603  	// match: (MNEGW x (MOVDconst [c]))
  8604  	// cond: int32(c)==-1
  8605  	// result: (MOVWUreg x)
  8606  	for {
  8607  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8608  			x := v_0
  8609  			if v_1.Op != OpARM64MOVDconst {
  8610  				continue
  8611  			}
  8612  			c := auxIntToInt64(v_1.AuxInt)
  8613  			if !(int32(c) == -1) {
  8614  				continue
  8615  			}
  8616  			v.reset(OpARM64MOVWUreg)
  8617  			v.AddArg(x)
  8618  			return true
  8619  		}
  8620  		break
  8621  	}
  8622  	// match: (MNEGW _ (MOVDconst [c]))
  8623  	// cond: int32(c)==0
  8624  	// result: (MOVDconst [0])
  8625  	for {
  8626  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8627  			if v_1.Op != OpARM64MOVDconst {
  8628  				continue
  8629  			}
  8630  			c := auxIntToInt64(v_1.AuxInt)
  8631  			if !(int32(c) == 0) {
  8632  				continue
  8633  			}
  8634  			v.reset(OpARM64MOVDconst)
  8635  			v.AuxInt = int64ToAuxInt(0)
  8636  			return true
  8637  		}
  8638  		break
  8639  	}
  8640  	// match: (MNEGW x (MOVDconst [c]))
  8641  	// cond: int32(c)==1
  8642  	// result: (MOVWUreg (NEG <x.Type> x))
  8643  	for {
  8644  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8645  			x := v_0
  8646  			if v_1.Op != OpARM64MOVDconst {
  8647  				continue
  8648  			}
  8649  			c := auxIntToInt64(v_1.AuxInt)
  8650  			if !(int32(c) == 1) {
  8651  				continue
  8652  			}
  8653  			v.reset(OpARM64MOVWUreg)
  8654  			v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8655  			v0.AddArg(x)
  8656  			v.AddArg(v0)
  8657  			return true
  8658  		}
  8659  		break
  8660  	}
  8661  	// match: (MNEGW x (MOVDconst [c]))
  8662  	// cond: isPowerOfTwo(c)
  8663  	// result: (NEG (SLLconst <x.Type> [log64(c)] x))
  8664  	for {
  8665  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8666  			x := v_0
  8667  			if v_1.Op != OpARM64MOVDconst {
  8668  				continue
  8669  			}
  8670  			c := auxIntToInt64(v_1.AuxInt)
  8671  			if !(isPowerOfTwo(c)) {
  8672  				continue
  8673  			}
  8674  			v.reset(OpARM64NEG)
  8675  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8676  			v0.AuxInt = int64ToAuxInt(log64(c))
  8677  			v0.AddArg(x)
  8678  			v.AddArg(v0)
  8679  			return true
  8680  		}
  8681  		break
  8682  	}
  8683  	// match: (MNEGW x (MOVDconst [c]))
  8684  	// cond: isPowerOfTwo(c-1) && int32(c) >= 3
  8685  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> x x [log64(c-1)])))
  8686  	for {
  8687  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8688  			x := v_0
  8689  			if v_1.Op != OpARM64MOVDconst {
  8690  				continue
  8691  			}
  8692  			c := auxIntToInt64(v_1.AuxInt)
  8693  			if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
  8694  				continue
  8695  			}
  8696  			v.reset(OpARM64MOVWUreg)
  8697  			v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8698  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8699  			v1.AuxInt = int64ToAuxInt(log64(c - 1))
  8700  			v1.AddArg2(x, x)
  8701  			v0.AddArg(v1)
  8702  			v.AddArg(v0)
  8703  			return true
  8704  		}
  8705  		break
  8706  	}
  8707  	// match: (MNEGW x (MOVDconst [c]))
  8708  	// cond: isPowerOfTwo(c+1) && int32(c) >= 7
  8709  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log64(c+1)])))
  8710  	for {
  8711  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8712  			x := v_0
  8713  			if v_1.Op != OpARM64MOVDconst {
  8714  				continue
  8715  			}
  8716  			c := auxIntToInt64(v_1.AuxInt)
  8717  			if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
  8718  				continue
  8719  			}
  8720  			v.reset(OpARM64MOVWUreg)
  8721  			v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8722  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8723  			v1.AuxInt = int64ToAuxInt(log64(c + 1))
  8724  			v2 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8725  			v2.AddArg(x)
  8726  			v1.AddArg2(v2, x)
  8727  			v0.AddArg(v1)
  8728  			v.AddArg(v0)
  8729  			return true
  8730  		}
  8731  		break
  8732  	}
  8733  	// match: (MNEGW x (MOVDconst [c]))
  8734  	// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
  8735  	// result: (MOVWUreg (SLLconst <x.Type> [log64(c/3)] (SUBshiftLL <x.Type> x x [2])))
  8736  	for {
  8737  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8738  			x := v_0
  8739  			if v_1.Op != OpARM64MOVDconst {
  8740  				continue
  8741  			}
  8742  			c := auxIntToInt64(v_1.AuxInt)
  8743  			if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
  8744  				continue
  8745  			}
  8746  			v.reset(OpARM64MOVWUreg)
  8747  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8748  			v0.AuxInt = int64ToAuxInt(log64(c / 3))
  8749  			v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8750  			v1.AuxInt = int64ToAuxInt(2)
  8751  			v1.AddArg2(x, x)
  8752  			v0.AddArg(v1)
  8753  			v.AddArg(v0)
  8754  			return true
  8755  		}
  8756  		break
  8757  	}
  8758  	// match: (MNEGW x (MOVDconst [c]))
  8759  	// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
  8760  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [log64(c/5)] (ADDshiftLL <x.Type> x x [2]))))
  8761  	for {
  8762  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8763  			x := v_0
  8764  			if v_1.Op != OpARM64MOVDconst {
  8765  				continue
  8766  			}
  8767  			c := auxIntToInt64(v_1.AuxInt)
  8768  			if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
  8769  				continue
  8770  			}
  8771  			v.reset(OpARM64MOVWUreg)
  8772  			v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8773  			v1 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8774  			v1.AuxInt = int64ToAuxInt(log64(c / 5))
  8775  			v2 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8776  			v2.AuxInt = int64ToAuxInt(2)
  8777  			v2.AddArg2(x, x)
  8778  			v1.AddArg(v2)
  8779  			v0.AddArg(v1)
  8780  			v.AddArg(v0)
  8781  			return true
  8782  		}
  8783  		break
  8784  	}
  8785  	// match: (MNEGW x (MOVDconst [c]))
  8786  	// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
  8787  	// result: (MOVWUreg (SLLconst <x.Type> [log64(c/7)] (SUBshiftLL <x.Type> x x [3])))
  8788  	for {
  8789  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8790  			x := v_0
  8791  			if v_1.Op != OpARM64MOVDconst {
  8792  				continue
  8793  			}
  8794  			c := auxIntToInt64(v_1.AuxInt)
  8795  			if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
  8796  				continue
  8797  			}
  8798  			v.reset(OpARM64MOVWUreg)
  8799  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8800  			v0.AuxInt = int64ToAuxInt(log64(c / 7))
  8801  			v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  8802  			v1.AuxInt = int64ToAuxInt(3)
  8803  			v1.AddArg2(x, x)
  8804  			v0.AddArg(v1)
  8805  			v.AddArg(v0)
  8806  			return true
  8807  		}
  8808  		break
  8809  	}
  8810  	// match: (MNEGW x (MOVDconst [c]))
  8811  	// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
  8812  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [log64(c/9)] (ADDshiftLL <x.Type> x x [3]))))
  8813  	for {
  8814  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8815  			x := v_0
  8816  			if v_1.Op != OpARM64MOVDconst {
  8817  				continue
  8818  			}
  8819  			c := auxIntToInt64(v_1.AuxInt)
  8820  			if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
  8821  				continue
  8822  			}
  8823  			v.reset(OpARM64MOVWUreg)
  8824  			v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  8825  			v1 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  8826  			v1.AuxInt = int64ToAuxInt(log64(c / 9))
  8827  			v2 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  8828  			v2.AuxInt = int64ToAuxInt(3)
  8829  			v2.AddArg2(x, x)
  8830  			v1.AddArg(v2)
  8831  			v0.AddArg(v1)
  8832  			v.AddArg(v0)
  8833  			return true
  8834  		}
  8835  		break
  8836  	}
  8837  	// match: (MNEGW (MOVDconst [c]) (MOVDconst [d]))
  8838  	// result: (MOVDconst [int64(uint32(-c*d))])
  8839  	for {
  8840  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  8841  			if v_0.Op != OpARM64MOVDconst {
  8842  				continue
  8843  			}
  8844  			c := auxIntToInt64(v_0.AuxInt)
  8845  			if v_1.Op != OpARM64MOVDconst {
  8846  				continue
  8847  			}
  8848  			d := auxIntToInt64(v_1.AuxInt)
  8849  			v.reset(OpARM64MOVDconst)
  8850  			v.AuxInt = int64ToAuxInt(int64(uint32(-c * d)))
  8851  			return true
  8852  		}
  8853  		break
  8854  	}
  8855  	return false
  8856  }
  8857  func rewriteValueARM64_OpARM64MOD(v *Value) bool {
  8858  	v_1 := v.Args[1]
  8859  	v_0 := v.Args[0]
  8860  	// match: (MOD (MOVDconst [c]) (MOVDconst [d]))
  8861  	// cond: d != 0
  8862  	// result: (MOVDconst [c%d])
  8863  	for {
  8864  		if v_0.Op != OpARM64MOVDconst {
  8865  			break
  8866  		}
  8867  		c := auxIntToInt64(v_0.AuxInt)
  8868  		if v_1.Op != OpARM64MOVDconst {
  8869  			break
  8870  		}
  8871  		d := auxIntToInt64(v_1.AuxInt)
  8872  		if !(d != 0) {
  8873  			break
  8874  		}
  8875  		v.reset(OpARM64MOVDconst)
  8876  		v.AuxInt = int64ToAuxInt(c % d)
  8877  		return true
  8878  	}
  8879  	return false
  8880  }
  8881  func rewriteValueARM64_OpARM64MODW(v *Value) bool {
  8882  	v_1 := v.Args[1]
  8883  	v_0 := v.Args[0]
  8884  	// match: (MODW (MOVDconst [c]) (MOVDconst [d]))
  8885  	// cond: d != 0
  8886  	// result: (MOVDconst [int64(uint32(int32(c)%int32(d)))])
  8887  	for {
  8888  		if v_0.Op != OpARM64MOVDconst {
  8889  			break
  8890  		}
  8891  		c := auxIntToInt64(v_0.AuxInt)
  8892  		if v_1.Op != OpARM64MOVDconst {
  8893  			break
  8894  		}
  8895  		d := auxIntToInt64(v_1.AuxInt)
  8896  		if !(d != 0) {
  8897  			break
  8898  		}
  8899  		v.reset(OpARM64MOVDconst)
  8900  		v.AuxInt = int64ToAuxInt(int64(uint32(int32(c) % int32(d))))
  8901  		return true
  8902  	}
  8903  	return false
  8904  }
  8905  func rewriteValueARM64_OpARM64MOVBUload(v *Value) bool {
  8906  	v_1 := v.Args[1]
  8907  	v_0 := v.Args[0]
  8908  	b := v.Block
  8909  	config := b.Func.Config
  8910  	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
  8911  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  8912  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
  8913  	for {
  8914  		off1 := auxIntToInt32(v.AuxInt)
  8915  		sym := auxToSym(v.Aux)
  8916  		if v_0.Op != OpARM64ADDconst {
  8917  			break
  8918  		}
  8919  		off2 := auxIntToInt64(v_0.AuxInt)
  8920  		ptr := v_0.Args[0]
  8921  		mem := v_1
  8922  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  8923  			break
  8924  		}
  8925  		v.reset(OpARM64MOVBUload)
  8926  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  8927  		v.Aux = symToAux(sym)
  8928  		v.AddArg2(ptr, mem)
  8929  		return true
  8930  	}
  8931  	// match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
  8932  	// cond: off == 0 && sym == nil
  8933  	// result: (MOVBUloadidx ptr idx mem)
  8934  	for {
  8935  		off := auxIntToInt32(v.AuxInt)
  8936  		sym := auxToSym(v.Aux)
  8937  		if v_0.Op != OpARM64ADD {
  8938  			break
  8939  		}
  8940  		idx := v_0.Args[1]
  8941  		ptr := v_0.Args[0]
  8942  		mem := v_1
  8943  		if !(off == 0 && sym == nil) {
  8944  			break
  8945  		}
  8946  		v.reset(OpARM64MOVBUloadidx)
  8947  		v.AddArg3(ptr, idx, mem)
  8948  		return true
  8949  	}
  8950  	// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8951  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  8952  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8953  	for {
  8954  		off1 := auxIntToInt32(v.AuxInt)
  8955  		sym1 := auxToSym(v.Aux)
  8956  		if v_0.Op != OpARM64MOVDaddr {
  8957  			break
  8958  		}
  8959  		off2 := auxIntToInt32(v_0.AuxInt)
  8960  		sym2 := auxToSym(v_0.Aux)
  8961  		ptr := v_0.Args[0]
  8962  		mem := v_1
  8963  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  8964  			break
  8965  		}
  8966  		v.reset(OpARM64MOVBUload)
  8967  		v.AuxInt = int32ToAuxInt(off1 + off2)
  8968  		v.Aux = symToAux(mergeSym(sym1, sym2))
  8969  		v.AddArg2(ptr, mem)
  8970  		return true
  8971  	}
  8972  	// match: (MOVBUload [off] {sym} (SB) _)
  8973  	// cond: symIsRO(sym)
  8974  	// result: (MOVDconst [int64(read8(sym, int64(off)))])
  8975  	for {
  8976  		off := auxIntToInt32(v.AuxInt)
  8977  		sym := auxToSym(v.Aux)
  8978  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  8979  			break
  8980  		}
  8981  		v.reset(OpARM64MOVDconst)
  8982  		v.AuxInt = int64ToAuxInt(int64(read8(sym, int64(off))))
  8983  		return true
  8984  	}
  8985  	return false
  8986  }
  8987  func rewriteValueARM64_OpARM64MOVBUloadidx(v *Value) bool {
  8988  	v_2 := v.Args[2]
  8989  	v_1 := v.Args[1]
  8990  	v_0 := v.Args[0]
  8991  	// match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
  8992  	// cond: is32Bit(c)
  8993  	// result: (MOVBUload [int32(c)] ptr mem)
  8994  	for {
  8995  		ptr := v_0
  8996  		if v_1.Op != OpARM64MOVDconst {
  8997  			break
  8998  		}
  8999  		c := auxIntToInt64(v_1.AuxInt)
  9000  		mem := v_2
  9001  		if !(is32Bit(c)) {
  9002  			break
  9003  		}
  9004  		v.reset(OpARM64MOVBUload)
  9005  		v.AuxInt = int32ToAuxInt(int32(c))
  9006  		v.AddArg2(ptr, mem)
  9007  		return true
  9008  	}
  9009  	// match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
  9010  	// cond: is32Bit(c)
  9011  	// result: (MOVBUload [int32(c)] ptr mem)
  9012  	for {
  9013  		if v_0.Op != OpARM64MOVDconst {
  9014  			break
  9015  		}
  9016  		c := auxIntToInt64(v_0.AuxInt)
  9017  		ptr := v_1
  9018  		mem := v_2
  9019  		if !(is32Bit(c)) {
  9020  			break
  9021  		}
  9022  		v.reset(OpARM64MOVBUload)
  9023  		v.AuxInt = int32ToAuxInt(int32(c))
  9024  		v.AddArg2(ptr, mem)
  9025  		return true
  9026  	}
  9027  	return false
  9028  }
  9029  func rewriteValueARM64_OpARM64MOVBUreg(v *Value) bool {
  9030  	v_0 := v.Args[0]
  9031  	// match: (MOVBUreg (ANDconst [c] x))
  9032  	// result: (ANDconst [c&(1<<8-1)] x)
  9033  	for {
  9034  		if v_0.Op != OpARM64ANDconst {
  9035  			break
  9036  		}
  9037  		c := auxIntToInt64(v_0.AuxInt)
  9038  		x := v_0.Args[0]
  9039  		v.reset(OpARM64ANDconst)
  9040  		v.AuxInt = int64ToAuxInt(c & (1<<8 - 1))
  9041  		v.AddArg(x)
  9042  		return true
  9043  	}
  9044  	// match: (MOVBUreg (MOVDconst [c]))
  9045  	// result: (MOVDconst [int64(uint8(c))])
  9046  	for {
  9047  		if v_0.Op != OpARM64MOVDconst {
  9048  			break
  9049  		}
  9050  		c := auxIntToInt64(v_0.AuxInt)
  9051  		v.reset(OpARM64MOVDconst)
  9052  		v.AuxInt = int64ToAuxInt(int64(uint8(c)))
  9053  		return true
  9054  	}
  9055  	// match: (MOVBUreg x)
  9056  	// cond: v.Type.Size() <= 1
  9057  	// result: x
  9058  	for {
  9059  		x := v_0
  9060  		if !(v.Type.Size() <= 1) {
  9061  			break
  9062  		}
  9063  		v.copyOf(x)
  9064  		return true
  9065  	}
  9066  	// match: (MOVBUreg (SLLconst [lc] x))
  9067  	// cond: lc >= 8
  9068  	// result: (MOVDconst [0])
  9069  	for {
  9070  		if v_0.Op != OpARM64SLLconst {
  9071  			break
  9072  		}
  9073  		lc := auxIntToInt64(v_0.AuxInt)
  9074  		if !(lc >= 8) {
  9075  			break
  9076  		}
  9077  		v.reset(OpARM64MOVDconst)
  9078  		v.AuxInt = int64ToAuxInt(0)
  9079  		return true
  9080  	}
  9081  	// match: (MOVBUreg (SLLconst [lc] x))
  9082  	// cond: lc < 8
  9083  	// result: (UBFIZ [armBFAuxInt(lc, 8-lc)] x)
  9084  	for {
  9085  		if v_0.Op != OpARM64SLLconst {
  9086  			break
  9087  		}
  9088  		lc := auxIntToInt64(v_0.AuxInt)
  9089  		x := v_0.Args[0]
  9090  		if !(lc < 8) {
  9091  			break
  9092  		}
  9093  		v.reset(OpARM64UBFIZ)
  9094  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 8-lc))
  9095  		v.AddArg(x)
  9096  		return true
  9097  	}
  9098  	// match: (MOVBUreg (SRLconst [rc] x))
  9099  	// cond: rc < 8
  9100  	// result: (UBFX [armBFAuxInt(rc, 8)] x)
  9101  	for {
  9102  		if v_0.Op != OpARM64SRLconst {
  9103  			break
  9104  		}
  9105  		rc := auxIntToInt64(v_0.AuxInt)
  9106  		x := v_0.Args[0]
  9107  		if !(rc < 8) {
  9108  			break
  9109  		}
  9110  		v.reset(OpARM64UBFX)
  9111  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 8))
  9112  		v.AddArg(x)
  9113  		return true
  9114  	}
  9115  	// match: (MOVBUreg (UBFX [bfc] x))
  9116  	// cond: bfc.width() <= 8
  9117  	// result: (UBFX [bfc] x)
  9118  	for {
  9119  		if v_0.Op != OpARM64UBFX {
  9120  			break
  9121  		}
  9122  		bfc := auxIntToArm64BitField(v_0.AuxInt)
  9123  		x := v_0.Args[0]
  9124  		if !(bfc.width() <= 8) {
  9125  			break
  9126  		}
  9127  		v.reset(OpARM64UBFX)
  9128  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
  9129  		v.AddArg(x)
  9130  		return true
  9131  	}
  9132  	return false
  9133  }
  9134  func rewriteValueARM64_OpARM64MOVBload(v *Value) bool {
  9135  	v_1 := v.Args[1]
  9136  	v_0 := v.Args[0]
  9137  	b := v.Block
  9138  	config := b.Func.Config
  9139  	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
  9140  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9141  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
  9142  	for {
  9143  		off1 := auxIntToInt32(v.AuxInt)
  9144  		sym := auxToSym(v.Aux)
  9145  		if v_0.Op != OpARM64ADDconst {
  9146  			break
  9147  		}
  9148  		off2 := auxIntToInt64(v_0.AuxInt)
  9149  		ptr := v_0.Args[0]
  9150  		mem := v_1
  9151  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9152  			break
  9153  		}
  9154  		v.reset(OpARM64MOVBload)
  9155  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9156  		v.Aux = symToAux(sym)
  9157  		v.AddArg2(ptr, mem)
  9158  		return true
  9159  	}
  9160  	// match: (MOVBload [off] {sym} (ADD ptr idx) mem)
  9161  	// cond: off == 0 && sym == nil
  9162  	// result: (MOVBloadidx ptr idx mem)
  9163  	for {
  9164  		off := auxIntToInt32(v.AuxInt)
  9165  		sym := auxToSym(v.Aux)
  9166  		if v_0.Op != OpARM64ADD {
  9167  			break
  9168  		}
  9169  		idx := v_0.Args[1]
  9170  		ptr := v_0.Args[0]
  9171  		mem := v_1
  9172  		if !(off == 0 && sym == nil) {
  9173  			break
  9174  		}
  9175  		v.reset(OpARM64MOVBloadidx)
  9176  		v.AddArg3(ptr, idx, mem)
  9177  		return true
  9178  	}
  9179  	// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  9180  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9181  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9182  	for {
  9183  		off1 := auxIntToInt32(v.AuxInt)
  9184  		sym1 := auxToSym(v.Aux)
  9185  		if v_0.Op != OpARM64MOVDaddr {
  9186  			break
  9187  		}
  9188  		off2 := auxIntToInt32(v_0.AuxInt)
  9189  		sym2 := auxToSym(v_0.Aux)
  9190  		ptr := v_0.Args[0]
  9191  		mem := v_1
  9192  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9193  			break
  9194  		}
  9195  		v.reset(OpARM64MOVBload)
  9196  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9197  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9198  		v.AddArg2(ptr, mem)
  9199  		return true
  9200  	}
  9201  	// match: (MOVBload [off] {sym} (SB) _)
  9202  	// cond: symIsRO(sym)
  9203  	// result: (MOVDconst [int64(int8(read8(sym, int64(off))))])
  9204  	for {
  9205  		off := auxIntToInt32(v.AuxInt)
  9206  		sym := auxToSym(v.Aux)
  9207  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  9208  			break
  9209  		}
  9210  		v.reset(OpARM64MOVDconst)
  9211  		v.AuxInt = int64ToAuxInt(int64(int8(read8(sym, int64(off)))))
  9212  		return true
  9213  	}
  9214  	return false
  9215  }
  9216  func rewriteValueARM64_OpARM64MOVBloadidx(v *Value) bool {
  9217  	v_2 := v.Args[2]
  9218  	v_1 := v.Args[1]
  9219  	v_0 := v.Args[0]
  9220  	// match: (MOVBloadidx ptr (MOVDconst [c]) mem)
  9221  	// cond: is32Bit(c)
  9222  	// result: (MOVBload [int32(c)] ptr mem)
  9223  	for {
  9224  		ptr := v_0
  9225  		if v_1.Op != OpARM64MOVDconst {
  9226  			break
  9227  		}
  9228  		c := auxIntToInt64(v_1.AuxInt)
  9229  		mem := v_2
  9230  		if !(is32Bit(c)) {
  9231  			break
  9232  		}
  9233  		v.reset(OpARM64MOVBload)
  9234  		v.AuxInt = int32ToAuxInt(int32(c))
  9235  		v.AddArg2(ptr, mem)
  9236  		return true
  9237  	}
  9238  	// match: (MOVBloadidx (MOVDconst [c]) ptr mem)
  9239  	// cond: is32Bit(c)
  9240  	// result: (MOVBload [int32(c)] ptr mem)
  9241  	for {
  9242  		if v_0.Op != OpARM64MOVDconst {
  9243  			break
  9244  		}
  9245  		c := auxIntToInt64(v_0.AuxInt)
  9246  		ptr := v_1
  9247  		mem := v_2
  9248  		if !(is32Bit(c)) {
  9249  			break
  9250  		}
  9251  		v.reset(OpARM64MOVBload)
  9252  		v.AuxInt = int32ToAuxInt(int32(c))
  9253  		v.AddArg2(ptr, mem)
  9254  		return true
  9255  	}
  9256  	return false
  9257  }
  9258  func rewriteValueARM64_OpARM64MOVBreg(v *Value) bool {
  9259  	v_0 := v.Args[0]
  9260  	// match: (MOVBreg (MOVDconst [c]))
  9261  	// result: (MOVDconst [int64(int8(c))])
  9262  	for {
  9263  		if v_0.Op != OpARM64MOVDconst {
  9264  			break
  9265  		}
  9266  		c := auxIntToInt64(v_0.AuxInt)
  9267  		v.reset(OpARM64MOVDconst)
  9268  		v.AuxInt = int64ToAuxInt(int64(int8(c)))
  9269  		return true
  9270  	}
  9271  	// match: (MOVBreg x)
  9272  	// cond: v.Type.Size() <= 1
  9273  	// result: x
  9274  	for {
  9275  		x := v_0
  9276  		if !(v.Type.Size() <= 1) {
  9277  			break
  9278  		}
  9279  		v.copyOf(x)
  9280  		return true
  9281  	}
  9282  	// match: (MOVBreg <t> (ANDconst x [c]))
  9283  	// cond: uint64(c) & uint64(0xffffffffffffff80) == 0
  9284  	// result: (ANDconst <t> x [c])
  9285  	for {
  9286  		t := v.Type
  9287  		if v_0.Op != OpARM64ANDconst {
  9288  			break
  9289  		}
  9290  		c := auxIntToInt64(v_0.AuxInt)
  9291  		x := v_0.Args[0]
  9292  		if !(uint64(c)&uint64(0xffffffffffffff80) == 0) {
  9293  			break
  9294  		}
  9295  		v.reset(OpARM64ANDconst)
  9296  		v.Type = t
  9297  		v.AuxInt = int64ToAuxInt(c)
  9298  		v.AddArg(x)
  9299  		return true
  9300  	}
  9301  	// match: (MOVBreg (SLLconst [lc] x))
  9302  	// cond: lc < 8
  9303  	// result: (SBFIZ [armBFAuxInt(lc, 8-lc)] x)
  9304  	for {
  9305  		if v_0.Op != OpARM64SLLconst {
  9306  			break
  9307  		}
  9308  		lc := auxIntToInt64(v_0.AuxInt)
  9309  		x := v_0.Args[0]
  9310  		if !(lc < 8) {
  9311  			break
  9312  		}
  9313  		v.reset(OpARM64SBFIZ)
  9314  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 8-lc))
  9315  		v.AddArg(x)
  9316  		return true
  9317  	}
  9318  	// match: (MOVBreg (SBFX [bfc] x))
  9319  	// cond: bfc.width() <= 8
  9320  	// result: (SBFX [bfc] x)
  9321  	for {
  9322  		if v_0.Op != OpARM64SBFX {
  9323  			break
  9324  		}
  9325  		bfc := auxIntToArm64BitField(v_0.AuxInt)
  9326  		x := v_0.Args[0]
  9327  		if !(bfc.width() <= 8) {
  9328  			break
  9329  		}
  9330  		v.reset(OpARM64SBFX)
  9331  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
  9332  		v.AddArg(x)
  9333  		return true
  9334  	}
  9335  	return false
  9336  }
  9337  func rewriteValueARM64_OpARM64MOVBstore(v *Value) bool {
  9338  	v_2 := v.Args[2]
  9339  	v_1 := v.Args[1]
  9340  	v_0 := v.Args[0]
  9341  	b := v.Block
  9342  	config := b.Func.Config
  9343  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  9344  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9345  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
  9346  	for {
  9347  		off1 := auxIntToInt32(v.AuxInt)
  9348  		sym := auxToSym(v.Aux)
  9349  		if v_0.Op != OpARM64ADDconst {
  9350  			break
  9351  		}
  9352  		off2 := auxIntToInt64(v_0.AuxInt)
  9353  		ptr := v_0.Args[0]
  9354  		val := v_1
  9355  		mem := v_2
  9356  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9357  			break
  9358  		}
  9359  		v.reset(OpARM64MOVBstore)
  9360  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9361  		v.Aux = symToAux(sym)
  9362  		v.AddArg3(ptr, val, mem)
  9363  		return true
  9364  	}
  9365  	// match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
  9366  	// cond: off == 0 && sym == nil
  9367  	// result: (MOVBstoreidx ptr idx val mem)
  9368  	for {
  9369  		off := auxIntToInt32(v.AuxInt)
  9370  		sym := auxToSym(v.Aux)
  9371  		if v_0.Op != OpARM64ADD {
  9372  			break
  9373  		}
  9374  		idx := v_0.Args[1]
  9375  		ptr := v_0.Args[0]
  9376  		val := v_1
  9377  		mem := v_2
  9378  		if !(off == 0 && sym == nil) {
  9379  			break
  9380  		}
  9381  		v.reset(OpARM64MOVBstoreidx)
  9382  		v.AddArg4(ptr, idx, val, mem)
  9383  		return true
  9384  	}
  9385  	// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  9386  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9387  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  9388  	for {
  9389  		off1 := auxIntToInt32(v.AuxInt)
  9390  		sym1 := auxToSym(v.Aux)
  9391  		if v_0.Op != OpARM64MOVDaddr {
  9392  			break
  9393  		}
  9394  		off2 := auxIntToInt32(v_0.AuxInt)
  9395  		sym2 := auxToSym(v_0.Aux)
  9396  		ptr := v_0.Args[0]
  9397  		val := v_1
  9398  		mem := v_2
  9399  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9400  			break
  9401  		}
  9402  		v.reset(OpARM64MOVBstore)
  9403  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9404  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9405  		v.AddArg3(ptr, val, mem)
  9406  		return true
  9407  	}
  9408  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  9409  	// result: (MOVBstore [off] {sym} ptr x mem)
  9410  	for {
  9411  		off := auxIntToInt32(v.AuxInt)
  9412  		sym := auxToSym(v.Aux)
  9413  		ptr := v_0
  9414  		if v_1.Op != OpARM64MOVBreg {
  9415  			break
  9416  		}
  9417  		x := v_1.Args[0]
  9418  		mem := v_2
  9419  		v.reset(OpARM64MOVBstore)
  9420  		v.AuxInt = int32ToAuxInt(off)
  9421  		v.Aux = symToAux(sym)
  9422  		v.AddArg3(ptr, x, mem)
  9423  		return true
  9424  	}
  9425  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  9426  	// result: (MOVBstore [off] {sym} ptr x mem)
  9427  	for {
  9428  		off := auxIntToInt32(v.AuxInt)
  9429  		sym := auxToSym(v.Aux)
  9430  		ptr := v_0
  9431  		if v_1.Op != OpARM64MOVBUreg {
  9432  			break
  9433  		}
  9434  		x := v_1.Args[0]
  9435  		mem := v_2
  9436  		v.reset(OpARM64MOVBstore)
  9437  		v.AuxInt = int32ToAuxInt(off)
  9438  		v.Aux = symToAux(sym)
  9439  		v.AddArg3(ptr, x, mem)
  9440  		return true
  9441  	}
  9442  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  9443  	// result: (MOVBstore [off] {sym} ptr x mem)
  9444  	for {
  9445  		off := auxIntToInt32(v.AuxInt)
  9446  		sym := auxToSym(v.Aux)
  9447  		ptr := v_0
  9448  		if v_1.Op != OpARM64MOVHreg {
  9449  			break
  9450  		}
  9451  		x := v_1.Args[0]
  9452  		mem := v_2
  9453  		v.reset(OpARM64MOVBstore)
  9454  		v.AuxInt = int32ToAuxInt(off)
  9455  		v.Aux = symToAux(sym)
  9456  		v.AddArg3(ptr, x, mem)
  9457  		return true
  9458  	}
  9459  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  9460  	// result: (MOVBstore [off] {sym} ptr x mem)
  9461  	for {
  9462  		off := auxIntToInt32(v.AuxInt)
  9463  		sym := auxToSym(v.Aux)
  9464  		ptr := v_0
  9465  		if v_1.Op != OpARM64MOVHUreg {
  9466  			break
  9467  		}
  9468  		x := v_1.Args[0]
  9469  		mem := v_2
  9470  		v.reset(OpARM64MOVBstore)
  9471  		v.AuxInt = int32ToAuxInt(off)
  9472  		v.Aux = symToAux(sym)
  9473  		v.AddArg3(ptr, x, mem)
  9474  		return true
  9475  	}
  9476  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  9477  	// result: (MOVBstore [off] {sym} ptr x mem)
  9478  	for {
  9479  		off := auxIntToInt32(v.AuxInt)
  9480  		sym := auxToSym(v.Aux)
  9481  		ptr := v_0
  9482  		if v_1.Op != OpARM64MOVWreg {
  9483  			break
  9484  		}
  9485  		x := v_1.Args[0]
  9486  		mem := v_2
  9487  		v.reset(OpARM64MOVBstore)
  9488  		v.AuxInt = int32ToAuxInt(off)
  9489  		v.Aux = symToAux(sym)
  9490  		v.AddArg3(ptr, x, mem)
  9491  		return true
  9492  	}
  9493  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
  9494  	// result: (MOVBstore [off] {sym} ptr x mem)
  9495  	for {
  9496  		off := auxIntToInt32(v.AuxInt)
  9497  		sym := auxToSym(v.Aux)
  9498  		ptr := v_0
  9499  		if v_1.Op != OpARM64MOVWUreg {
  9500  			break
  9501  		}
  9502  		x := v_1.Args[0]
  9503  		mem := v_2
  9504  		v.reset(OpARM64MOVBstore)
  9505  		v.AuxInt = int32ToAuxInt(off)
  9506  		v.Aux = symToAux(sym)
  9507  		v.AddArg3(ptr, x, mem)
  9508  		return true
  9509  	}
  9510  	return false
  9511  }
  9512  func rewriteValueARM64_OpARM64MOVBstoreidx(v *Value) bool {
  9513  	v_3 := v.Args[3]
  9514  	v_2 := v.Args[2]
  9515  	v_1 := v.Args[1]
  9516  	v_0 := v.Args[0]
  9517  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
  9518  	// cond: is32Bit(c)
  9519  	// result: (MOVBstore [int32(c)] ptr val mem)
  9520  	for {
  9521  		ptr := v_0
  9522  		if v_1.Op != OpARM64MOVDconst {
  9523  			break
  9524  		}
  9525  		c := auxIntToInt64(v_1.AuxInt)
  9526  		val := v_2
  9527  		mem := v_3
  9528  		if !(is32Bit(c)) {
  9529  			break
  9530  		}
  9531  		v.reset(OpARM64MOVBstore)
  9532  		v.AuxInt = int32ToAuxInt(int32(c))
  9533  		v.AddArg3(ptr, val, mem)
  9534  		return true
  9535  	}
  9536  	// match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
  9537  	// cond: is32Bit(c)
  9538  	// result: (MOVBstore [int32(c)] idx val mem)
  9539  	for {
  9540  		if v_0.Op != OpARM64MOVDconst {
  9541  			break
  9542  		}
  9543  		c := auxIntToInt64(v_0.AuxInt)
  9544  		idx := v_1
  9545  		val := v_2
  9546  		mem := v_3
  9547  		if !(is32Bit(c)) {
  9548  			break
  9549  		}
  9550  		v.reset(OpARM64MOVBstore)
  9551  		v.AuxInt = int32ToAuxInt(int32(c))
  9552  		v.AddArg3(idx, val, mem)
  9553  		return true
  9554  	}
  9555  	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
  9556  	// result: (MOVBstoreidx ptr idx x mem)
  9557  	for {
  9558  		ptr := v_0
  9559  		idx := v_1
  9560  		if v_2.Op != OpARM64MOVBreg {
  9561  			break
  9562  		}
  9563  		x := v_2.Args[0]
  9564  		mem := v_3
  9565  		v.reset(OpARM64MOVBstoreidx)
  9566  		v.AddArg4(ptr, idx, x, mem)
  9567  		return true
  9568  	}
  9569  	// match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
  9570  	// result: (MOVBstoreidx ptr idx x mem)
  9571  	for {
  9572  		ptr := v_0
  9573  		idx := v_1
  9574  		if v_2.Op != OpARM64MOVBUreg {
  9575  			break
  9576  		}
  9577  		x := v_2.Args[0]
  9578  		mem := v_3
  9579  		v.reset(OpARM64MOVBstoreidx)
  9580  		v.AddArg4(ptr, idx, x, mem)
  9581  		return true
  9582  	}
  9583  	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
  9584  	// result: (MOVBstoreidx ptr idx x mem)
  9585  	for {
  9586  		ptr := v_0
  9587  		idx := v_1
  9588  		if v_2.Op != OpARM64MOVHreg {
  9589  			break
  9590  		}
  9591  		x := v_2.Args[0]
  9592  		mem := v_3
  9593  		v.reset(OpARM64MOVBstoreidx)
  9594  		v.AddArg4(ptr, idx, x, mem)
  9595  		return true
  9596  	}
  9597  	// match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
  9598  	// result: (MOVBstoreidx ptr idx x mem)
  9599  	for {
  9600  		ptr := v_0
  9601  		idx := v_1
  9602  		if v_2.Op != OpARM64MOVHUreg {
  9603  			break
  9604  		}
  9605  		x := v_2.Args[0]
  9606  		mem := v_3
  9607  		v.reset(OpARM64MOVBstoreidx)
  9608  		v.AddArg4(ptr, idx, x, mem)
  9609  		return true
  9610  	}
  9611  	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
  9612  	// result: (MOVBstoreidx ptr idx x mem)
  9613  	for {
  9614  		ptr := v_0
  9615  		idx := v_1
  9616  		if v_2.Op != OpARM64MOVWreg {
  9617  			break
  9618  		}
  9619  		x := v_2.Args[0]
  9620  		mem := v_3
  9621  		v.reset(OpARM64MOVBstoreidx)
  9622  		v.AddArg4(ptr, idx, x, mem)
  9623  		return true
  9624  	}
  9625  	// match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
  9626  	// result: (MOVBstoreidx ptr idx x mem)
  9627  	for {
  9628  		ptr := v_0
  9629  		idx := v_1
  9630  		if v_2.Op != OpARM64MOVWUreg {
  9631  			break
  9632  		}
  9633  		x := v_2.Args[0]
  9634  		mem := v_3
  9635  		v.reset(OpARM64MOVBstoreidx)
  9636  		v.AddArg4(ptr, idx, x, mem)
  9637  		return true
  9638  	}
  9639  	return false
  9640  }
  9641  func rewriteValueARM64_OpARM64MOVDload(v *Value) bool {
  9642  	v_1 := v.Args[1]
  9643  	v_0 := v.Args[0]
  9644  	b := v.Block
  9645  	config := b.Func.Config
  9646  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr val _))
  9647  	// result: (FMOVDfpgp val)
  9648  	for {
  9649  		off := auxIntToInt32(v.AuxInt)
  9650  		sym := auxToSym(v.Aux)
  9651  		ptr := v_0
  9652  		if v_1.Op != OpARM64FMOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  9653  			break
  9654  		}
  9655  		val := v_1.Args[1]
  9656  		if ptr != v_1.Args[0] {
  9657  			break
  9658  		}
  9659  		v.reset(OpARM64FMOVDfpgp)
  9660  		v.AddArg(val)
  9661  		return true
  9662  	}
  9663  	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  9664  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9665  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
  9666  	for {
  9667  		off1 := auxIntToInt32(v.AuxInt)
  9668  		sym := auxToSym(v.Aux)
  9669  		if v_0.Op != OpARM64ADDconst {
  9670  			break
  9671  		}
  9672  		off2 := auxIntToInt64(v_0.AuxInt)
  9673  		ptr := v_0.Args[0]
  9674  		mem := v_1
  9675  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9676  			break
  9677  		}
  9678  		v.reset(OpARM64MOVDload)
  9679  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9680  		v.Aux = symToAux(sym)
  9681  		v.AddArg2(ptr, mem)
  9682  		return true
  9683  	}
  9684  	// match: (MOVDload [off] {sym} (ADD ptr idx) mem)
  9685  	// cond: off == 0 && sym == nil
  9686  	// result: (MOVDloadidx ptr idx mem)
  9687  	for {
  9688  		off := auxIntToInt32(v.AuxInt)
  9689  		sym := auxToSym(v.Aux)
  9690  		if v_0.Op != OpARM64ADD {
  9691  			break
  9692  		}
  9693  		idx := v_0.Args[1]
  9694  		ptr := v_0.Args[0]
  9695  		mem := v_1
  9696  		if !(off == 0 && sym == nil) {
  9697  			break
  9698  		}
  9699  		v.reset(OpARM64MOVDloadidx)
  9700  		v.AddArg3(ptr, idx, mem)
  9701  		return true
  9702  	}
  9703  	// match: (MOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  9704  	// cond: off == 0 && sym == nil
  9705  	// result: (MOVDloadidx8 ptr idx mem)
  9706  	for {
  9707  		off := auxIntToInt32(v.AuxInt)
  9708  		sym := auxToSym(v.Aux)
  9709  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  9710  			break
  9711  		}
  9712  		idx := v_0.Args[1]
  9713  		ptr := v_0.Args[0]
  9714  		mem := v_1
  9715  		if !(off == 0 && sym == nil) {
  9716  			break
  9717  		}
  9718  		v.reset(OpARM64MOVDloadidx8)
  9719  		v.AddArg3(ptr, idx, mem)
  9720  		return true
  9721  	}
  9722  	// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  9723  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9724  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9725  	for {
  9726  		off1 := auxIntToInt32(v.AuxInt)
  9727  		sym1 := auxToSym(v.Aux)
  9728  		if v_0.Op != OpARM64MOVDaddr {
  9729  			break
  9730  		}
  9731  		off2 := auxIntToInt32(v_0.AuxInt)
  9732  		sym2 := auxToSym(v_0.Aux)
  9733  		ptr := v_0.Args[0]
  9734  		mem := v_1
  9735  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9736  			break
  9737  		}
  9738  		v.reset(OpARM64MOVDload)
  9739  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9740  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9741  		v.AddArg2(ptr, mem)
  9742  		return true
  9743  	}
  9744  	// match: (MOVDload [off] {sym} (SB) _)
  9745  	// cond: symIsRO(sym)
  9746  	// result: (MOVDconst [int64(read64(sym, int64(off), config.ctxt.Arch.ByteOrder))])
  9747  	for {
  9748  		off := auxIntToInt32(v.AuxInt)
  9749  		sym := auxToSym(v.Aux)
  9750  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  9751  			break
  9752  		}
  9753  		v.reset(OpARM64MOVDconst)
  9754  		v.AuxInt = int64ToAuxInt(int64(read64(sym, int64(off), config.ctxt.Arch.ByteOrder)))
  9755  		return true
  9756  	}
  9757  	return false
  9758  }
  9759  func rewriteValueARM64_OpARM64MOVDloadidx(v *Value) bool {
  9760  	v_2 := v.Args[2]
  9761  	v_1 := v.Args[1]
  9762  	v_0 := v.Args[0]
  9763  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
  9764  	// cond: is32Bit(c)
  9765  	// result: (MOVDload [int32(c)] ptr mem)
  9766  	for {
  9767  		ptr := v_0
  9768  		if v_1.Op != OpARM64MOVDconst {
  9769  			break
  9770  		}
  9771  		c := auxIntToInt64(v_1.AuxInt)
  9772  		mem := v_2
  9773  		if !(is32Bit(c)) {
  9774  			break
  9775  		}
  9776  		v.reset(OpARM64MOVDload)
  9777  		v.AuxInt = int32ToAuxInt(int32(c))
  9778  		v.AddArg2(ptr, mem)
  9779  		return true
  9780  	}
  9781  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
  9782  	// cond: is32Bit(c)
  9783  	// result: (MOVDload [int32(c)] ptr mem)
  9784  	for {
  9785  		if v_0.Op != OpARM64MOVDconst {
  9786  			break
  9787  		}
  9788  		c := auxIntToInt64(v_0.AuxInt)
  9789  		ptr := v_1
  9790  		mem := v_2
  9791  		if !(is32Bit(c)) {
  9792  			break
  9793  		}
  9794  		v.reset(OpARM64MOVDload)
  9795  		v.AuxInt = int32ToAuxInt(int32(c))
  9796  		v.AddArg2(ptr, mem)
  9797  		return true
  9798  	}
  9799  	// match: (MOVDloadidx ptr (SLLconst [3] idx) mem)
  9800  	// result: (MOVDloadidx8 ptr idx mem)
  9801  	for {
  9802  		ptr := v_0
  9803  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
  9804  			break
  9805  		}
  9806  		idx := v_1.Args[0]
  9807  		mem := v_2
  9808  		v.reset(OpARM64MOVDloadidx8)
  9809  		v.AddArg3(ptr, idx, mem)
  9810  		return true
  9811  	}
  9812  	// match: (MOVDloadidx (SLLconst [3] idx) ptr mem)
  9813  	// result: (MOVDloadidx8 ptr idx mem)
  9814  	for {
  9815  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
  9816  			break
  9817  		}
  9818  		idx := v_0.Args[0]
  9819  		ptr := v_1
  9820  		mem := v_2
  9821  		v.reset(OpARM64MOVDloadidx8)
  9822  		v.AddArg3(ptr, idx, mem)
  9823  		return true
  9824  	}
  9825  	return false
  9826  }
  9827  func rewriteValueARM64_OpARM64MOVDloadidx8(v *Value) bool {
  9828  	v_2 := v.Args[2]
  9829  	v_1 := v.Args[1]
  9830  	v_0 := v.Args[0]
  9831  	// match: (MOVDloadidx8 ptr (MOVDconst [c]) mem)
  9832  	// cond: is32Bit(c<<3)
  9833  	// result: (MOVDload [int32(c)<<3] ptr mem)
  9834  	for {
  9835  		ptr := v_0
  9836  		if v_1.Op != OpARM64MOVDconst {
  9837  			break
  9838  		}
  9839  		c := auxIntToInt64(v_1.AuxInt)
  9840  		mem := v_2
  9841  		if !(is32Bit(c << 3)) {
  9842  			break
  9843  		}
  9844  		v.reset(OpARM64MOVDload)
  9845  		v.AuxInt = int32ToAuxInt(int32(c) << 3)
  9846  		v.AddArg2(ptr, mem)
  9847  		return true
  9848  	}
  9849  	return false
  9850  }
  9851  func rewriteValueARM64_OpARM64MOVDnop(v *Value) bool {
  9852  	v_0 := v.Args[0]
  9853  	// match: (MOVDnop (MOVDconst [c]))
  9854  	// result: (MOVDconst [c])
  9855  	for {
  9856  		if v_0.Op != OpARM64MOVDconst {
  9857  			break
  9858  		}
  9859  		c := auxIntToInt64(v_0.AuxInt)
  9860  		v.reset(OpARM64MOVDconst)
  9861  		v.AuxInt = int64ToAuxInt(c)
  9862  		return true
  9863  	}
  9864  	return false
  9865  }
  9866  func rewriteValueARM64_OpARM64MOVDreg(v *Value) bool {
  9867  	v_0 := v.Args[0]
  9868  	// match: (MOVDreg x)
  9869  	// cond: x.Uses == 1
  9870  	// result: (MOVDnop x)
  9871  	for {
  9872  		x := v_0
  9873  		if !(x.Uses == 1) {
  9874  			break
  9875  		}
  9876  		v.reset(OpARM64MOVDnop)
  9877  		v.AddArg(x)
  9878  		return true
  9879  	}
  9880  	// match: (MOVDreg (MOVDconst [c]))
  9881  	// result: (MOVDconst [c])
  9882  	for {
  9883  		if v_0.Op != OpARM64MOVDconst {
  9884  			break
  9885  		}
  9886  		c := auxIntToInt64(v_0.AuxInt)
  9887  		v.reset(OpARM64MOVDconst)
  9888  		v.AuxInt = int64ToAuxInt(c)
  9889  		return true
  9890  	}
  9891  	return false
  9892  }
  9893  func rewriteValueARM64_OpARM64MOVDstore(v *Value) bool {
  9894  	v_2 := v.Args[2]
  9895  	v_1 := v.Args[1]
  9896  	v_0 := v.Args[0]
  9897  	b := v.Block
  9898  	config := b.Func.Config
  9899  	// match: (MOVDstore [off] {sym} ptr (FMOVDfpgp val) mem)
  9900  	// result: (FMOVDstore [off] {sym} ptr val mem)
  9901  	for {
  9902  		off := auxIntToInt32(v.AuxInt)
  9903  		sym := auxToSym(v.Aux)
  9904  		ptr := v_0
  9905  		if v_1.Op != OpARM64FMOVDfpgp {
  9906  			break
  9907  		}
  9908  		val := v_1.Args[0]
  9909  		mem := v_2
  9910  		v.reset(OpARM64FMOVDstore)
  9911  		v.AuxInt = int32ToAuxInt(off)
  9912  		v.Aux = symToAux(sym)
  9913  		v.AddArg3(ptr, val, mem)
  9914  		return true
  9915  	}
  9916  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  9917  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9918  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
  9919  	for {
  9920  		off1 := auxIntToInt32(v.AuxInt)
  9921  		sym := auxToSym(v.Aux)
  9922  		if v_0.Op != OpARM64ADDconst {
  9923  			break
  9924  		}
  9925  		off2 := auxIntToInt64(v_0.AuxInt)
  9926  		ptr := v_0.Args[0]
  9927  		val := v_1
  9928  		mem := v_2
  9929  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9930  			break
  9931  		}
  9932  		v.reset(OpARM64MOVDstore)
  9933  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9934  		v.Aux = symToAux(sym)
  9935  		v.AddArg3(ptr, val, mem)
  9936  		return true
  9937  	}
  9938  	// match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
  9939  	// cond: off == 0 && sym == nil
  9940  	// result: (MOVDstoreidx ptr idx val mem)
  9941  	for {
  9942  		off := auxIntToInt32(v.AuxInt)
  9943  		sym := auxToSym(v.Aux)
  9944  		if v_0.Op != OpARM64ADD {
  9945  			break
  9946  		}
  9947  		idx := v_0.Args[1]
  9948  		ptr := v_0.Args[0]
  9949  		val := v_1
  9950  		mem := v_2
  9951  		if !(off == 0 && sym == nil) {
  9952  			break
  9953  		}
  9954  		v.reset(OpARM64MOVDstoreidx)
  9955  		v.AddArg4(ptr, idx, val, mem)
  9956  		return true
  9957  	}
  9958  	// match: (MOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  9959  	// cond: off == 0 && sym == nil
  9960  	// result: (MOVDstoreidx8 ptr idx val mem)
  9961  	for {
  9962  		off := auxIntToInt32(v.AuxInt)
  9963  		sym := auxToSym(v.Aux)
  9964  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  9965  			break
  9966  		}
  9967  		idx := v_0.Args[1]
  9968  		ptr := v_0.Args[0]
  9969  		val := v_1
  9970  		mem := v_2
  9971  		if !(off == 0 && sym == nil) {
  9972  			break
  9973  		}
  9974  		v.reset(OpARM64MOVDstoreidx8)
  9975  		v.AddArg4(ptr, idx, val, mem)
  9976  		return true
  9977  	}
  9978  	// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  9979  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
  9980  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  9981  	for {
  9982  		off1 := auxIntToInt32(v.AuxInt)
  9983  		sym1 := auxToSym(v.Aux)
  9984  		if v_0.Op != OpARM64MOVDaddr {
  9985  			break
  9986  		}
  9987  		off2 := auxIntToInt32(v_0.AuxInt)
  9988  		sym2 := auxToSym(v_0.Aux)
  9989  		ptr := v_0.Args[0]
  9990  		val := v_1
  9991  		mem := v_2
  9992  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
  9993  			break
  9994  		}
  9995  		v.reset(OpARM64MOVDstore)
  9996  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9997  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9998  		v.AddArg3(ptr, val, mem)
  9999  		return true
 10000  	}
 10001  	return false
 10002  }
 10003  func rewriteValueARM64_OpARM64MOVDstoreidx(v *Value) bool {
 10004  	v_3 := v.Args[3]
 10005  	v_2 := v.Args[2]
 10006  	v_1 := v.Args[1]
 10007  	v_0 := v.Args[0]
 10008  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
 10009  	// cond: is32Bit(c)
 10010  	// result: (MOVDstore [int32(c)] ptr val mem)
 10011  	for {
 10012  		ptr := v_0
 10013  		if v_1.Op != OpARM64MOVDconst {
 10014  			break
 10015  		}
 10016  		c := auxIntToInt64(v_1.AuxInt)
 10017  		val := v_2
 10018  		mem := v_3
 10019  		if !(is32Bit(c)) {
 10020  			break
 10021  		}
 10022  		v.reset(OpARM64MOVDstore)
 10023  		v.AuxInt = int32ToAuxInt(int32(c))
 10024  		v.AddArg3(ptr, val, mem)
 10025  		return true
 10026  	}
 10027  	// match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
 10028  	// cond: is32Bit(c)
 10029  	// result: (MOVDstore [int32(c)] idx val mem)
 10030  	for {
 10031  		if v_0.Op != OpARM64MOVDconst {
 10032  			break
 10033  		}
 10034  		c := auxIntToInt64(v_0.AuxInt)
 10035  		idx := v_1
 10036  		val := v_2
 10037  		mem := v_3
 10038  		if !(is32Bit(c)) {
 10039  			break
 10040  		}
 10041  		v.reset(OpARM64MOVDstore)
 10042  		v.AuxInt = int32ToAuxInt(int32(c))
 10043  		v.AddArg3(idx, val, mem)
 10044  		return true
 10045  	}
 10046  	// match: (MOVDstoreidx ptr (SLLconst [3] idx) val mem)
 10047  	// result: (MOVDstoreidx8 ptr idx val mem)
 10048  	for {
 10049  		ptr := v_0
 10050  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
 10051  			break
 10052  		}
 10053  		idx := v_1.Args[0]
 10054  		val := v_2
 10055  		mem := v_3
 10056  		v.reset(OpARM64MOVDstoreidx8)
 10057  		v.AddArg4(ptr, idx, val, mem)
 10058  		return true
 10059  	}
 10060  	// match: (MOVDstoreidx (SLLconst [3] idx) ptr val mem)
 10061  	// result: (MOVDstoreidx8 ptr idx val mem)
 10062  	for {
 10063  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
 10064  			break
 10065  		}
 10066  		idx := v_0.Args[0]
 10067  		ptr := v_1
 10068  		val := v_2
 10069  		mem := v_3
 10070  		v.reset(OpARM64MOVDstoreidx8)
 10071  		v.AddArg4(ptr, idx, val, mem)
 10072  		return true
 10073  	}
 10074  	return false
 10075  }
 10076  func rewriteValueARM64_OpARM64MOVDstoreidx8(v *Value) bool {
 10077  	v_3 := v.Args[3]
 10078  	v_2 := v.Args[2]
 10079  	v_1 := v.Args[1]
 10080  	v_0 := v.Args[0]
 10081  	// match: (MOVDstoreidx8 ptr (MOVDconst [c]) val mem)
 10082  	// cond: is32Bit(c<<3)
 10083  	// result: (MOVDstore [int32(c)<<3] ptr val mem)
 10084  	for {
 10085  		ptr := v_0
 10086  		if v_1.Op != OpARM64MOVDconst {
 10087  			break
 10088  		}
 10089  		c := auxIntToInt64(v_1.AuxInt)
 10090  		val := v_2
 10091  		mem := v_3
 10092  		if !(is32Bit(c << 3)) {
 10093  			break
 10094  		}
 10095  		v.reset(OpARM64MOVDstore)
 10096  		v.AuxInt = int32ToAuxInt(int32(c) << 3)
 10097  		v.AddArg3(ptr, val, mem)
 10098  		return true
 10099  	}
 10100  	return false
 10101  }
 10102  func rewriteValueARM64_OpARM64MOVHUload(v *Value) bool {
 10103  	v_1 := v.Args[1]
 10104  	v_0 := v.Args[0]
 10105  	b := v.Block
 10106  	config := b.Func.Config
 10107  	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
 10108  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 10109  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
 10110  	for {
 10111  		off1 := auxIntToInt32(v.AuxInt)
 10112  		sym := auxToSym(v.Aux)
 10113  		if v_0.Op != OpARM64ADDconst {
 10114  			break
 10115  		}
 10116  		off2 := auxIntToInt64(v_0.AuxInt)
 10117  		ptr := v_0.Args[0]
 10118  		mem := v_1
 10119  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 10120  			break
 10121  		}
 10122  		v.reset(OpARM64MOVHUload)
 10123  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 10124  		v.Aux = symToAux(sym)
 10125  		v.AddArg2(ptr, mem)
 10126  		return true
 10127  	}
 10128  	// match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
 10129  	// cond: off == 0 && sym == nil
 10130  	// result: (MOVHUloadidx ptr idx mem)
 10131  	for {
 10132  		off := auxIntToInt32(v.AuxInt)
 10133  		sym := auxToSym(v.Aux)
 10134  		if v_0.Op != OpARM64ADD {
 10135  			break
 10136  		}
 10137  		idx := v_0.Args[1]
 10138  		ptr := v_0.Args[0]
 10139  		mem := v_1
 10140  		if !(off == 0 && sym == nil) {
 10141  			break
 10142  		}
 10143  		v.reset(OpARM64MOVHUloadidx)
 10144  		v.AddArg3(ptr, idx, mem)
 10145  		return true
 10146  	}
 10147  	// match: (MOVHUload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 10148  	// cond: off == 0 && sym == nil
 10149  	// result: (MOVHUloadidx2 ptr idx mem)
 10150  	for {
 10151  		off := auxIntToInt32(v.AuxInt)
 10152  		sym := auxToSym(v.Aux)
 10153  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10154  			break
 10155  		}
 10156  		idx := v_0.Args[1]
 10157  		ptr := v_0.Args[0]
 10158  		mem := v_1
 10159  		if !(off == 0 && sym == nil) {
 10160  			break
 10161  		}
 10162  		v.reset(OpARM64MOVHUloadidx2)
 10163  		v.AddArg3(ptr, idx, mem)
 10164  		return true
 10165  	}
 10166  	// match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10167  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 10168  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 10169  	for {
 10170  		off1 := auxIntToInt32(v.AuxInt)
 10171  		sym1 := auxToSym(v.Aux)
 10172  		if v_0.Op != OpARM64MOVDaddr {
 10173  			break
 10174  		}
 10175  		off2 := auxIntToInt32(v_0.AuxInt)
 10176  		sym2 := auxToSym(v_0.Aux)
 10177  		ptr := v_0.Args[0]
 10178  		mem := v_1
 10179  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 10180  			break
 10181  		}
 10182  		v.reset(OpARM64MOVHUload)
 10183  		v.AuxInt = int32ToAuxInt(off1 + off2)
 10184  		v.Aux = symToAux(mergeSym(sym1, sym2))
 10185  		v.AddArg2(ptr, mem)
 10186  		return true
 10187  	}
 10188  	// match: (MOVHUload [off] {sym} (SB) _)
 10189  	// cond: symIsRO(sym)
 10190  	// result: (MOVDconst [int64(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))])
 10191  	for {
 10192  		off := auxIntToInt32(v.AuxInt)
 10193  		sym := auxToSym(v.Aux)
 10194  		if v_0.Op != OpSB || !(symIsRO(sym)) {
 10195  			break
 10196  		}
 10197  		v.reset(OpARM64MOVDconst)
 10198  		v.AuxInt = int64ToAuxInt(int64(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))
 10199  		return true
 10200  	}
 10201  	return false
 10202  }
 10203  func rewriteValueARM64_OpARM64MOVHUloadidx(v *Value) bool {
 10204  	v_2 := v.Args[2]
 10205  	v_1 := v.Args[1]
 10206  	v_0 := v.Args[0]
 10207  	// match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
 10208  	// cond: is32Bit(c)
 10209  	// result: (MOVHUload [int32(c)] ptr mem)
 10210  	for {
 10211  		ptr := v_0
 10212  		if v_1.Op != OpARM64MOVDconst {
 10213  			break
 10214  		}
 10215  		c := auxIntToInt64(v_1.AuxInt)
 10216  		mem := v_2
 10217  		if !(is32Bit(c)) {
 10218  			break
 10219  		}
 10220  		v.reset(OpARM64MOVHUload)
 10221  		v.AuxInt = int32ToAuxInt(int32(c))
 10222  		v.AddArg2(ptr, mem)
 10223  		return true
 10224  	}
 10225  	// match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
 10226  	// cond: is32Bit(c)
 10227  	// result: (MOVHUload [int32(c)] ptr mem)
 10228  	for {
 10229  		if v_0.Op != OpARM64MOVDconst {
 10230  			break
 10231  		}
 10232  		c := auxIntToInt64(v_0.AuxInt)
 10233  		ptr := v_1
 10234  		mem := v_2
 10235  		if !(is32Bit(c)) {
 10236  			break
 10237  		}
 10238  		v.reset(OpARM64MOVHUload)
 10239  		v.AuxInt = int32ToAuxInt(int32(c))
 10240  		v.AddArg2(ptr, mem)
 10241  		return true
 10242  	}
 10243  	// match: (MOVHUloadidx ptr (SLLconst [1] idx) mem)
 10244  	// result: (MOVHUloadidx2 ptr idx mem)
 10245  	for {
 10246  		ptr := v_0
 10247  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
 10248  			break
 10249  		}
 10250  		idx := v_1.Args[0]
 10251  		mem := v_2
 10252  		v.reset(OpARM64MOVHUloadidx2)
 10253  		v.AddArg3(ptr, idx, mem)
 10254  		return true
 10255  	}
 10256  	// match: (MOVHUloadidx ptr (ADD idx idx) mem)
 10257  	// result: (MOVHUloadidx2 ptr idx mem)
 10258  	for {
 10259  		ptr := v_0
 10260  		if v_1.Op != OpARM64ADD {
 10261  			break
 10262  		}
 10263  		idx := v_1.Args[1]
 10264  		if idx != v_1.Args[0] {
 10265  			break
 10266  		}
 10267  		mem := v_2
 10268  		v.reset(OpARM64MOVHUloadidx2)
 10269  		v.AddArg3(ptr, idx, mem)
 10270  		return true
 10271  	}
 10272  	// match: (MOVHUloadidx (ADD idx idx) ptr mem)
 10273  	// result: (MOVHUloadidx2 ptr idx mem)
 10274  	for {
 10275  		if v_0.Op != OpARM64ADD {
 10276  			break
 10277  		}
 10278  		idx := v_0.Args[1]
 10279  		if idx != v_0.Args[0] {
 10280  			break
 10281  		}
 10282  		ptr := v_1
 10283  		mem := v_2
 10284  		v.reset(OpARM64MOVHUloadidx2)
 10285  		v.AddArg3(ptr, idx, mem)
 10286  		return true
 10287  	}
 10288  	return false
 10289  }
 10290  func rewriteValueARM64_OpARM64MOVHUloadidx2(v *Value) bool {
 10291  	v_2 := v.Args[2]
 10292  	v_1 := v.Args[1]
 10293  	v_0 := v.Args[0]
 10294  	// match: (MOVHUloadidx2 ptr (MOVDconst [c]) mem)
 10295  	// cond: is32Bit(c<<1)
 10296  	// result: (MOVHUload [int32(c)<<1] ptr mem)
 10297  	for {
 10298  		ptr := v_0
 10299  		if v_1.Op != OpARM64MOVDconst {
 10300  			break
 10301  		}
 10302  		c := auxIntToInt64(v_1.AuxInt)
 10303  		mem := v_2
 10304  		if !(is32Bit(c << 1)) {
 10305  			break
 10306  		}
 10307  		v.reset(OpARM64MOVHUload)
 10308  		v.AuxInt = int32ToAuxInt(int32(c) << 1)
 10309  		v.AddArg2(ptr, mem)
 10310  		return true
 10311  	}
 10312  	return false
 10313  }
 10314  func rewriteValueARM64_OpARM64MOVHUreg(v *Value) bool {
 10315  	v_0 := v.Args[0]
 10316  	// match: (MOVHUreg (ANDconst [c] x))
 10317  	// result: (ANDconst [c&(1<<16-1)] x)
 10318  	for {
 10319  		if v_0.Op != OpARM64ANDconst {
 10320  			break
 10321  		}
 10322  		c := auxIntToInt64(v_0.AuxInt)
 10323  		x := v_0.Args[0]
 10324  		v.reset(OpARM64ANDconst)
 10325  		v.AuxInt = int64ToAuxInt(c & (1<<16 - 1))
 10326  		v.AddArg(x)
 10327  		return true
 10328  	}
 10329  	// match: (MOVHUreg (MOVDconst [c]))
 10330  	// result: (MOVDconst [int64(uint16(c))])
 10331  	for {
 10332  		if v_0.Op != OpARM64MOVDconst {
 10333  			break
 10334  		}
 10335  		c := auxIntToInt64(v_0.AuxInt)
 10336  		v.reset(OpARM64MOVDconst)
 10337  		v.AuxInt = int64ToAuxInt(int64(uint16(c)))
 10338  		return true
 10339  	}
 10340  	// match: (MOVHUreg x)
 10341  	// cond: v.Type.Size() <= 2
 10342  	// result: x
 10343  	for {
 10344  		x := v_0
 10345  		if !(v.Type.Size() <= 2) {
 10346  			break
 10347  		}
 10348  		v.copyOf(x)
 10349  		return true
 10350  	}
 10351  	// match: (MOVHUreg (SLLconst [lc] x))
 10352  	// cond: lc >= 16
 10353  	// result: (MOVDconst [0])
 10354  	for {
 10355  		if v_0.Op != OpARM64SLLconst {
 10356  			break
 10357  		}
 10358  		lc := auxIntToInt64(v_0.AuxInt)
 10359  		if !(lc >= 16) {
 10360  			break
 10361  		}
 10362  		v.reset(OpARM64MOVDconst)
 10363  		v.AuxInt = int64ToAuxInt(0)
 10364  		return true
 10365  	}
 10366  	// match: (MOVHUreg (SLLconst [lc] x))
 10367  	// cond: lc < 16
 10368  	// result: (UBFIZ [armBFAuxInt(lc, 16-lc)] x)
 10369  	for {
 10370  		if v_0.Op != OpARM64SLLconst {
 10371  			break
 10372  		}
 10373  		lc := auxIntToInt64(v_0.AuxInt)
 10374  		x := v_0.Args[0]
 10375  		if !(lc < 16) {
 10376  			break
 10377  		}
 10378  		v.reset(OpARM64UBFIZ)
 10379  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 16-lc))
 10380  		v.AddArg(x)
 10381  		return true
 10382  	}
 10383  	// match: (MOVHUreg (SRLconst [rc] x))
 10384  	// cond: rc < 16
 10385  	// result: (UBFX [armBFAuxInt(rc, 16)] x)
 10386  	for {
 10387  		if v_0.Op != OpARM64SRLconst {
 10388  			break
 10389  		}
 10390  		rc := auxIntToInt64(v_0.AuxInt)
 10391  		x := v_0.Args[0]
 10392  		if !(rc < 16) {
 10393  			break
 10394  		}
 10395  		v.reset(OpARM64UBFX)
 10396  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 16))
 10397  		v.AddArg(x)
 10398  		return true
 10399  	}
 10400  	// match: (MOVHUreg (UBFX [bfc] x))
 10401  	// cond: bfc.width() <= 16
 10402  	// result: (UBFX [bfc] x)
 10403  	for {
 10404  		if v_0.Op != OpARM64UBFX {
 10405  			break
 10406  		}
 10407  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 10408  		x := v_0.Args[0]
 10409  		if !(bfc.width() <= 16) {
 10410  			break
 10411  		}
 10412  		v.reset(OpARM64UBFX)
 10413  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
 10414  		v.AddArg(x)
 10415  		return true
 10416  	}
 10417  	return false
 10418  }
 10419  func rewriteValueARM64_OpARM64MOVHload(v *Value) bool {
 10420  	v_1 := v.Args[1]
 10421  	v_0 := v.Args[0]
 10422  	b := v.Block
 10423  	config := b.Func.Config
 10424  	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
 10425  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 10426  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
 10427  	for {
 10428  		off1 := auxIntToInt32(v.AuxInt)
 10429  		sym := auxToSym(v.Aux)
 10430  		if v_0.Op != OpARM64ADDconst {
 10431  			break
 10432  		}
 10433  		off2 := auxIntToInt64(v_0.AuxInt)
 10434  		ptr := v_0.Args[0]
 10435  		mem := v_1
 10436  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 10437  			break
 10438  		}
 10439  		v.reset(OpARM64MOVHload)
 10440  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 10441  		v.Aux = symToAux(sym)
 10442  		v.AddArg2(ptr, mem)
 10443  		return true
 10444  	}
 10445  	// match: (MOVHload [off] {sym} (ADD ptr idx) mem)
 10446  	// cond: off == 0 && sym == nil
 10447  	// result: (MOVHloadidx ptr idx mem)
 10448  	for {
 10449  		off := auxIntToInt32(v.AuxInt)
 10450  		sym := auxToSym(v.Aux)
 10451  		if v_0.Op != OpARM64ADD {
 10452  			break
 10453  		}
 10454  		idx := v_0.Args[1]
 10455  		ptr := v_0.Args[0]
 10456  		mem := v_1
 10457  		if !(off == 0 && sym == nil) {
 10458  			break
 10459  		}
 10460  		v.reset(OpARM64MOVHloadidx)
 10461  		v.AddArg3(ptr, idx, mem)
 10462  		return true
 10463  	}
 10464  	// match: (MOVHload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 10465  	// cond: off == 0 && sym == nil
 10466  	// result: (MOVHloadidx2 ptr idx mem)
 10467  	for {
 10468  		off := auxIntToInt32(v.AuxInt)
 10469  		sym := auxToSym(v.Aux)
 10470  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10471  			break
 10472  		}
 10473  		idx := v_0.Args[1]
 10474  		ptr := v_0.Args[0]
 10475  		mem := v_1
 10476  		if !(off == 0 && sym == nil) {
 10477  			break
 10478  		}
 10479  		v.reset(OpARM64MOVHloadidx2)
 10480  		v.AddArg3(ptr, idx, mem)
 10481  		return true
 10482  	}
 10483  	// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10484  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 10485  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 10486  	for {
 10487  		off1 := auxIntToInt32(v.AuxInt)
 10488  		sym1 := auxToSym(v.Aux)
 10489  		if v_0.Op != OpARM64MOVDaddr {
 10490  			break
 10491  		}
 10492  		off2 := auxIntToInt32(v_0.AuxInt)
 10493  		sym2 := auxToSym(v_0.Aux)
 10494  		ptr := v_0.Args[0]
 10495  		mem := v_1
 10496  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 10497  			break
 10498  		}
 10499  		v.reset(OpARM64MOVHload)
 10500  		v.AuxInt = int32ToAuxInt(off1 + off2)
 10501  		v.Aux = symToAux(mergeSym(sym1, sym2))
 10502  		v.AddArg2(ptr, mem)
 10503  		return true
 10504  	}
 10505  	// match: (MOVHload [off] {sym} (SB) _)
 10506  	// cond: symIsRO(sym)
 10507  	// result: (MOVDconst [int64(int16(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))])
 10508  	for {
 10509  		off := auxIntToInt32(v.AuxInt)
 10510  		sym := auxToSym(v.Aux)
 10511  		if v_0.Op != OpSB || !(symIsRO(sym)) {
 10512  			break
 10513  		}
 10514  		v.reset(OpARM64MOVDconst)
 10515  		v.AuxInt = int64ToAuxInt(int64(int16(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))))
 10516  		return true
 10517  	}
 10518  	return false
 10519  }
 10520  func rewriteValueARM64_OpARM64MOVHloadidx(v *Value) bool {
 10521  	v_2 := v.Args[2]
 10522  	v_1 := v.Args[1]
 10523  	v_0 := v.Args[0]
 10524  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 10525  	// cond: is32Bit(c)
 10526  	// result: (MOVHload [int32(c)] ptr mem)
 10527  	for {
 10528  		ptr := v_0
 10529  		if v_1.Op != OpARM64MOVDconst {
 10530  			break
 10531  		}
 10532  		c := auxIntToInt64(v_1.AuxInt)
 10533  		mem := v_2
 10534  		if !(is32Bit(c)) {
 10535  			break
 10536  		}
 10537  		v.reset(OpARM64MOVHload)
 10538  		v.AuxInt = int32ToAuxInt(int32(c))
 10539  		v.AddArg2(ptr, mem)
 10540  		return true
 10541  	}
 10542  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 10543  	// cond: is32Bit(c)
 10544  	// result: (MOVHload [int32(c)] ptr mem)
 10545  	for {
 10546  		if v_0.Op != OpARM64MOVDconst {
 10547  			break
 10548  		}
 10549  		c := auxIntToInt64(v_0.AuxInt)
 10550  		ptr := v_1
 10551  		mem := v_2
 10552  		if !(is32Bit(c)) {
 10553  			break
 10554  		}
 10555  		v.reset(OpARM64MOVHload)
 10556  		v.AuxInt = int32ToAuxInt(int32(c))
 10557  		v.AddArg2(ptr, mem)
 10558  		return true
 10559  	}
 10560  	// match: (MOVHloadidx ptr (SLLconst [1] idx) mem)
 10561  	// result: (MOVHloadidx2 ptr idx mem)
 10562  	for {
 10563  		ptr := v_0
 10564  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
 10565  			break
 10566  		}
 10567  		idx := v_1.Args[0]
 10568  		mem := v_2
 10569  		v.reset(OpARM64MOVHloadidx2)
 10570  		v.AddArg3(ptr, idx, mem)
 10571  		return true
 10572  	}
 10573  	// match: (MOVHloadidx ptr (ADD idx idx) mem)
 10574  	// result: (MOVHloadidx2 ptr idx mem)
 10575  	for {
 10576  		ptr := v_0
 10577  		if v_1.Op != OpARM64ADD {
 10578  			break
 10579  		}
 10580  		idx := v_1.Args[1]
 10581  		if idx != v_1.Args[0] {
 10582  			break
 10583  		}
 10584  		mem := v_2
 10585  		v.reset(OpARM64MOVHloadidx2)
 10586  		v.AddArg3(ptr, idx, mem)
 10587  		return true
 10588  	}
 10589  	// match: (MOVHloadidx (ADD idx idx) ptr mem)
 10590  	// result: (MOVHloadidx2 ptr idx mem)
 10591  	for {
 10592  		if v_0.Op != OpARM64ADD {
 10593  			break
 10594  		}
 10595  		idx := v_0.Args[1]
 10596  		if idx != v_0.Args[0] {
 10597  			break
 10598  		}
 10599  		ptr := v_1
 10600  		mem := v_2
 10601  		v.reset(OpARM64MOVHloadidx2)
 10602  		v.AddArg3(ptr, idx, mem)
 10603  		return true
 10604  	}
 10605  	return false
 10606  }
 10607  func rewriteValueARM64_OpARM64MOVHloadidx2(v *Value) bool {
 10608  	v_2 := v.Args[2]
 10609  	v_1 := v.Args[1]
 10610  	v_0 := v.Args[0]
 10611  	// match: (MOVHloadidx2 ptr (MOVDconst [c]) mem)
 10612  	// cond: is32Bit(c<<1)
 10613  	// result: (MOVHload [int32(c)<<1] ptr mem)
 10614  	for {
 10615  		ptr := v_0
 10616  		if v_1.Op != OpARM64MOVDconst {
 10617  			break
 10618  		}
 10619  		c := auxIntToInt64(v_1.AuxInt)
 10620  		mem := v_2
 10621  		if !(is32Bit(c << 1)) {
 10622  			break
 10623  		}
 10624  		v.reset(OpARM64MOVHload)
 10625  		v.AuxInt = int32ToAuxInt(int32(c) << 1)
 10626  		v.AddArg2(ptr, mem)
 10627  		return true
 10628  	}
 10629  	return false
 10630  }
 10631  func rewriteValueARM64_OpARM64MOVHreg(v *Value) bool {
 10632  	v_0 := v.Args[0]
 10633  	// match: (MOVHreg (MOVDconst [c]))
 10634  	// result: (MOVDconst [int64(int16(c))])
 10635  	for {
 10636  		if v_0.Op != OpARM64MOVDconst {
 10637  			break
 10638  		}
 10639  		c := auxIntToInt64(v_0.AuxInt)
 10640  		v.reset(OpARM64MOVDconst)
 10641  		v.AuxInt = int64ToAuxInt(int64(int16(c)))
 10642  		return true
 10643  	}
 10644  	// match: (MOVHreg x)
 10645  	// cond: v.Type.Size() <= 2
 10646  	// result: x
 10647  	for {
 10648  		x := v_0
 10649  		if !(v.Type.Size() <= 2) {
 10650  			break
 10651  		}
 10652  		v.copyOf(x)
 10653  		return true
 10654  	}
 10655  	// match: (MOVHreg <t> (ANDconst x [c]))
 10656  	// cond: uint64(c) & uint64(0xffffffffffff8000) == 0
 10657  	// result: (ANDconst <t> x [c])
 10658  	for {
 10659  		t := v.Type
 10660  		if v_0.Op != OpARM64ANDconst {
 10661  			break
 10662  		}
 10663  		c := auxIntToInt64(v_0.AuxInt)
 10664  		x := v_0.Args[0]
 10665  		if !(uint64(c)&uint64(0xffffffffffff8000) == 0) {
 10666  			break
 10667  		}
 10668  		v.reset(OpARM64ANDconst)
 10669  		v.Type = t
 10670  		v.AuxInt = int64ToAuxInt(c)
 10671  		v.AddArg(x)
 10672  		return true
 10673  	}
 10674  	// match: (MOVHreg (SLLconst [lc] x))
 10675  	// cond: lc < 16
 10676  	// result: (SBFIZ [armBFAuxInt(lc, 16-lc)] x)
 10677  	for {
 10678  		if v_0.Op != OpARM64SLLconst {
 10679  			break
 10680  		}
 10681  		lc := auxIntToInt64(v_0.AuxInt)
 10682  		x := v_0.Args[0]
 10683  		if !(lc < 16) {
 10684  			break
 10685  		}
 10686  		v.reset(OpARM64SBFIZ)
 10687  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 16-lc))
 10688  		v.AddArg(x)
 10689  		return true
 10690  	}
 10691  	// match: (MOVHreg (SBFX [bfc] x))
 10692  	// cond: bfc.width() <= 16
 10693  	// result: (SBFX [bfc] x)
 10694  	for {
 10695  		if v_0.Op != OpARM64SBFX {
 10696  			break
 10697  		}
 10698  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 10699  		x := v_0.Args[0]
 10700  		if !(bfc.width() <= 16) {
 10701  			break
 10702  		}
 10703  		v.reset(OpARM64SBFX)
 10704  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
 10705  		v.AddArg(x)
 10706  		return true
 10707  	}
 10708  	return false
 10709  }
 10710  func rewriteValueARM64_OpARM64MOVHstore(v *Value) bool {
 10711  	v_2 := v.Args[2]
 10712  	v_1 := v.Args[1]
 10713  	v_0 := v.Args[0]
 10714  	b := v.Block
 10715  	config := b.Func.Config
 10716  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 10717  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 10718  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
 10719  	for {
 10720  		off1 := auxIntToInt32(v.AuxInt)
 10721  		sym := auxToSym(v.Aux)
 10722  		if v_0.Op != OpARM64ADDconst {
 10723  			break
 10724  		}
 10725  		off2 := auxIntToInt64(v_0.AuxInt)
 10726  		ptr := v_0.Args[0]
 10727  		val := v_1
 10728  		mem := v_2
 10729  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 10730  			break
 10731  		}
 10732  		v.reset(OpARM64MOVHstore)
 10733  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 10734  		v.Aux = symToAux(sym)
 10735  		v.AddArg3(ptr, val, mem)
 10736  		return true
 10737  	}
 10738  	// match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
 10739  	// cond: off == 0 && sym == nil
 10740  	// result: (MOVHstoreidx ptr idx val mem)
 10741  	for {
 10742  		off := auxIntToInt32(v.AuxInt)
 10743  		sym := auxToSym(v.Aux)
 10744  		if v_0.Op != OpARM64ADD {
 10745  			break
 10746  		}
 10747  		idx := v_0.Args[1]
 10748  		ptr := v_0.Args[0]
 10749  		val := v_1
 10750  		mem := v_2
 10751  		if !(off == 0 && sym == nil) {
 10752  			break
 10753  		}
 10754  		v.reset(OpARM64MOVHstoreidx)
 10755  		v.AddArg4(ptr, idx, val, mem)
 10756  		return true
 10757  	}
 10758  	// match: (MOVHstore [off] {sym} (ADDshiftLL [1] ptr idx) val mem)
 10759  	// cond: off == 0 && sym == nil
 10760  	// result: (MOVHstoreidx2 ptr idx val mem)
 10761  	for {
 10762  		off := auxIntToInt32(v.AuxInt)
 10763  		sym := auxToSym(v.Aux)
 10764  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10765  			break
 10766  		}
 10767  		idx := v_0.Args[1]
 10768  		ptr := v_0.Args[0]
 10769  		val := v_1
 10770  		mem := v_2
 10771  		if !(off == 0 && sym == nil) {
 10772  			break
 10773  		}
 10774  		v.reset(OpARM64MOVHstoreidx2)
 10775  		v.AddArg4(ptr, idx, val, mem)
 10776  		return true
 10777  	}
 10778  	// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 10779  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 10780  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 10781  	for {
 10782  		off1 := auxIntToInt32(v.AuxInt)
 10783  		sym1 := auxToSym(v.Aux)
 10784  		if v_0.Op != OpARM64MOVDaddr {
 10785  			break
 10786  		}
 10787  		off2 := auxIntToInt32(v_0.AuxInt)
 10788  		sym2 := auxToSym(v_0.Aux)
 10789  		ptr := v_0.Args[0]
 10790  		val := v_1
 10791  		mem := v_2
 10792  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 10793  			break
 10794  		}
 10795  		v.reset(OpARM64MOVHstore)
 10796  		v.AuxInt = int32ToAuxInt(off1 + off2)
 10797  		v.Aux = symToAux(mergeSym(sym1, sym2))
 10798  		v.AddArg3(ptr, val, mem)
 10799  		return true
 10800  	}
 10801  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 10802  	// result: (MOVHstore [off] {sym} ptr x mem)
 10803  	for {
 10804  		off := auxIntToInt32(v.AuxInt)
 10805  		sym := auxToSym(v.Aux)
 10806  		ptr := v_0
 10807  		if v_1.Op != OpARM64MOVHreg {
 10808  			break
 10809  		}
 10810  		x := v_1.Args[0]
 10811  		mem := v_2
 10812  		v.reset(OpARM64MOVHstore)
 10813  		v.AuxInt = int32ToAuxInt(off)
 10814  		v.Aux = symToAux(sym)
 10815  		v.AddArg3(ptr, x, mem)
 10816  		return true
 10817  	}
 10818  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
 10819  	// result: (MOVHstore [off] {sym} ptr x mem)
 10820  	for {
 10821  		off := auxIntToInt32(v.AuxInt)
 10822  		sym := auxToSym(v.Aux)
 10823  		ptr := v_0
 10824  		if v_1.Op != OpARM64MOVHUreg {
 10825  			break
 10826  		}
 10827  		x := v_1.Args[0]
 10828  		mem := v_2
 10829  		v.reset(OpARM64MOVHstore)
 10830  		v.AuxInt = int32ToAuxInt(off)
 10831  		v.Aux = symToAux(sym)
 10832  		v.AddArg3(ptr, x, mem)
 10833  		return true
 10834  	}
 10835  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 10836  	// result: (MOVHstore [off] {sym} ptr x mem)
 10837  	for {
 10838  		off := auxIntToInt32(v.AuxInt)
 10839  		sym := auxToSym(v.Aux)
 10840  		ptr := v_0
 10841  		if v_1.Op != OpARM64MOVWreg {
 10842  			break
 10843  		}
 10844  		x := v_1.Args[0]
 10845  		mem := v_2
 10846  		v.reset(OpARM64MOVHstore)
 10847  		v.AuxInt = int32ToAuxInt(off)
 10848  		v.Aux = symToAux(sym)
 10849  		v.AddArg3(ptr, x, mem)
 10850  		return true
 10851  	}
 10852  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
 10853  	// result: (MOVHstore [off] {sym} ptr x mem)
 10854  	for {
 10855  		off := auxIntToInt32(v.AuxInt)
 10856  		sym := auxToSym(v.Aux)
 10857  		ptr := v_0
 10858  		if v_1.Op != OpARM64MOVWUreg {
 10859  			break
 10860  		}
 10861  		x := v_1.Args[0]
 10862  		mem := v_2
 10863  		v.reset(OpARM64MOVHstore)
 10864  		v.AuxInt = int32ToAuxInt(off)
 10865  		v.Aux = symToAux(sym)
 10866  		v.AddArg3(ptr, x, mem)
 10867  		return true
 10868  	}
 10869  	return false
 10870  }
 10871  func rewriteValueARM64_OpARM64MOVHstoreidx(v *Value) bool {
 10872  	v_3 := v.Args[3]
 10873  	v_2 := v.Args[2]
 10874  	v_1 := v.Args[1]
 10875  	v_0 := v.Args[0]
 10876  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 10877  	// cond: is32Bit(c)
 10878  	// result: (MOVHstore [int32(c)] ptr val mem)
 10879  	for {
 10880  		ptr := v_0
 10881  		if v_1.Op != OpARM64MOVDconst {
 10882  			break
 10883  		}
 10884  		c := auxIntToInt64(v_1.AuxInt)
 10885  		val := v_2
 10886  		mem := v_3
 10887  		if !(is32Bit(c)) {
 10888  			break
 10889  		}
 10890  		v.reset(OpARM64MOVHstore)
 10891  		v.AuxInt = int32ToAuxInt(int32(c))
 10892  		v.AddArg3(ptr, val, mem)
 10893  		return true
 10894  	}
 10895  	// match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
 10896  	// cond: is32Bit(c)
 10897  	// result: (MOVHstore [int32(c)] idx val mem)
 10898  	for {
 10899  		if v_0.Op != OpARM64MOVDconst {
 10900  			break
 10901  		}
 10902  		c := auxIntToInt64(v_0.AuxInt)
 10903  		idx := v_1
 10904  		val := v_2
 10905  		mem := v_3
 10906  		if !(is32Bit(c)) {
 10907  			break
 10908  		}
 10909  		v.reset(OpARM64MOVHstore)
 10910  		v.AuxInt = int32ToAuxInt(int32(c))
 10911  		v.AddArg3(idx, val, mem)
 10912  		return true
 10913  	}
 10914  	// match: (MOVHstoreidx ptr (SLLconst [1] idx) val mem)
 10915  	// result: (MOVHstoreidx2 ptr idx val mem)
 10916  	for {
 10917  		ptr := v_0
 10918  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
 10919  			break
 10920  		}
 10921  		idx := v_1.Args[0]
 10922  		val := v_2
 10923  		mem := v_3
 10924  		v.reset(OpARM64MOVHstoreidx2)
 10925  		v.AddArg4(ptr, idx, val, mem)
 10926  		return true
 10927  	}
 10928  	// match: (MOVHstoreidx ptr (ADD idx idx) val mem)
 10929  	// result: (MOVHstoreidx2 ptr idx val mem)
 10930  	for {
 10931  		ptr := v_0
 10932  		if v_1.Op != OpARM64ADD {
 10933  			break
 10934  		}
 10935  		idx := v_1.Args[1]
 10936  		if idx != v_1.Args[0] {
 10937  			break
 10938  		}
 10939  		val := v_2
 10940  		mem := v_3
 10941  		v.reset(OpARM64MOVHstoreidx2)
 10942  		v.AddArg4(ptr, idx, val, mem)
 10943  		return true
 10944  	}
 10945  	// match: (MOVHstoreidx (SLLconst [1] idx) ptr val mem)
 10946  	// result: (MOVHstoreidx2 ptr idx val mem)
 10947  	for {
 10948  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 1 {
 10949  			break
 10950  		}
 10951  		idx := v_0.Args[0]
 10952  		ptr := v_1
 10953  		val := v_2
 10954  		mem := v_3
 10955  		v.reset(OpARM64MOVHstoreidx2)
 10956  		v.AddArg4(ptr, idx, val, mem)
 10957  		return true
 10958  	}
 10959  	// match: (MOVHstoreidx (ADD idx idx) ptr val mem)
 10960  	// result: (MOVHstoreidx2 ptr idx val mem)
 10961  	for {
 10962  		if v_0.Op != OpARM64ADD {
 10963  			break
 10964  		}
 10965  		idx := v_0.Args[1]
 10966  		if idx != v_0.Args[0] {
 10967  			break
 10968  		}
 10969  		ptr := v_1
 10970  		val := v_2
 10971  		mem := v_3
 10972  		v.reset(OpARM64MOVHstoreidx2)
 10973  		v.AddArg4(ptr, idx, val, mem)
 10974  		return true
 10975  	}
 10976  	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
 10977  	// result: (MOVHstoreidx ptr idx x mem)
 10978  	for {
 10979  		ptr := v_0
 10980  		idx := v_1
 10981  		if v_2.Op != OpARM64MOVHreg {
 10982  			break
 10983  		}
 10984  		x := v_2.Args[0]
 10985  		mem := v_3
 10986  		v.reset(OpARM64MOVHstoreidx)
 10987  		v.AddArg4(ptr, idx, x, mem)
 10988  		return true
 10989  	}
 10990  	// match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
 10991  	// result: (MOVHstoreidx ptr idx x mem)
 10992  	for {
 10993  		ptr := v_0
 10994  		idx := v_1
 10995  		if v_2.Op != OpARM64MOVHUreg {
 10996  			break
 10997  		}
 10998  		x := v_2.Args[0]
 10999  		mem := v_3
 11000  		v.reset(OpARM64MOVHstoreidx)
 11001  		v.AddArg4(ptr, idx, x, mem)
 11002  		return true
 11003  	}
 11004  	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
 11005  	// result: (MOVHstoreidx ptr idx x mem)
 11006  	for {
 11007  		ptr := v_0
 11008  		idx := v_1
 11009  		if v_2.Op != OpARM64MOVWreg {
 11010  			break
 11011  		}
 11012  		x := v_2.Args[0]
 11013  		mem := v_3
 11014  		v.reset(OpARM64MOVHstoreidx)
 11015  		v.AddArg4(ptr, idx, x, mem)
 11016  		return true
 11017  	}
 11018  	// match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
 11019  	// result: (MOVHstoreidx ptr idx x mem)
 11020  	for {
 11021  		ptr := v_0
 11022  		idx := v_1
 11023  		if v_2.Op != OpARM64MOVWUreg {
 11024  			break
 11025  		}
 11026  		x := v_2.Args[0]
 11027  		mem := v_3
 11028  		v.reset(OpARM64MOVHstoreidx)
 11029  		v.AddArg4(ptr, idx, x, mem)
 11030  		return true
 11031  	}
 11032  	return false
 11033  }
 11034  func rewriteValueARM64_OpARM64MOVHstoreidx2(v *Value) bool {
 11035  	v_3 := v.Args[3]
 11036  	v_2 := v.Args[2]
 11037  	v_1 := v.Args[1]
 11038  	v_0 := v.Args[0]
 11039  	// match: (MOVHstoreidx2 ptr (MOVDconst [c]) val mem)
 11040  	// cond: is32Bit(c<<1)
 11041  	// result: (MOVHstore [int32(c)<<1] ptr val mem)
 11042  	for {
 11043  		ptr := v_0
 11044  		if v_1.Op != OpARM64MOVDconst {
 11045  			break
 11046  		}
 11047  		c := auxIntToInt64(v_1.AuxInt)
 11048  		val := v_2
 11049  		mem := v_3
 11050  		if !(is32Bit(c << 1)) {
 11051  			break
 11052  		}
 11053  		v.reset(OpARM64MOVHstore)
 11054  		v.AuxInt = int32ToAuxInt(int32(c) << 1)
 11055  		v.AddArg3(ptr, val, mem)
 11056  		return true
 11057  	}
 11058  	// match: (MOVHstoreidx2 ptr idx (MOVHreg x) mem)
 11059  	// result: (MOVHstoreidx2 ptr idx x mem)
 11060  	for {
 11061  		ptr := v_0
 11062  		idx := v_1
 11063  		if v_2.Op != OpARM64MOVHreg {
 11064  			break
 11065  		}
 11066  		x := v_2.Args[0]
 11067  		mem := v_3
 11068  		v.reset(OpARM64MOVHstoreidx2)
 11069  		v.AddArg4(ptr, idx, x, mem)
 11070  		return true
 11071  	}
 11072  	// match: (MOVHstoreidx2 ptr idx (MOVHUreg x) mem)
 11073  	// result: (MOVHstoreidx2 ptr idx x mem)
 11074  	for {
 11075  		ptr := v_0
 11076  		idx := v_1
 11077  		if v_2.Op != OpARM64MOVHUreg {
 11078  			break
 11079  		}
 11080  		x := v_2.Args[0]
 11081  		mem := v_3
 11082  		v.reset(OpARM64MOVHstoreidx2)
 11083  		v.AddArg4(ptr, idx, x, mem)
 11084  		return true
 11085  	}
 11086  	// match: (MOVHstoreidx2 ptr idx (MOVWreg x) mem)
 11087  	// result: (MOVHstoreidx2 ptr idx x mem)
 11088  	for {
 11089  		ptr := v_0
 11090  		idx := v_1
 11091  		if v_2.Op != OpARM64MOVWreg {
 11092  			break
 11093  		}
 11094  		x := v_2.Args[0]
 11095  		mem := v_3
 11096  		v.reset(OpARM64MOVHstoreidx2)
 11097  		v.AddArg4(ptr, idx, x, mem)
 11098  		return true
 11099  	}
 11100  	// match: (MOVHstoreidx2 ptr idx (MOVWUreg x) mem)
 11101  	// result: (MOVHstoreidx2 ptr idx x mem)
 11102  	for {
 11103  		ptr := v_0
 11104  		idx := v_1
 11105  		if v_2.Op != OpARM64MOVWUreg {
 11106  			break
 11107  		}
 11108  		x := v_2.Args[0]
 11109  		mem := v_3
 11110  		v.reset(OpARM64MOVHstoreidx2)
 11111  		v.AddArg4(ptr, idx, x, mem)
 11112  		return true
 11113  	}
 11114  	return false
 11115  }
 11116  func rewriteValueARM64_OpARM64MOVWUload(v *Value) bool {
 11117  	v_1 := v.Args[1]
 11118  	v_0 := v.Args[0]
 11119  	b := v.Block
 11120  	config := b.Func.Config
 11121  	// match: (MOVWUload [off] {sym} ptr (FMOVSstore [off] {sym} ptr val _))
 11122  	// result: (FMOVSfpgp val)
 11123  	for {
 11124  		off := auxIntToInt32(v.AuxInt)
 11125  		sym := auxToSym(v.Aux)
 11126  		ptr := v_0
 11127  		if v_1.Op != OpARM64FMOVSstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
 11128  			break
 11129  		}
 11130  		val := v_1.Args[1]
 11131  		if ptr != v_1.Args[0] {
 11132  			break
 11133  		}
 11134  		v.reset(OpARM64FMOVSfpgp)
 11135  		v.AddArg(val)
 11136  		return true
 11137  	}
 11138  	// match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
 11139  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 11140  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
 11141  	for {
 11142  		off1 := auxIntToInt32(v.AuxInt)
 11143  		sym := auxToSym(v.Aux)
 11144  		if v_0.Op != OpARM64ADDconst {
 11145  			break
 11146  		}
 11147  		off2 := auxIntToInt64(v_0.AuxInt)
 11148  		ptr := v_0.Args[0]
 11149  		mem := v_1
 11150  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 11151  			break
 11152  		}
 11153  		v.reset(OpARM64MOVWUload)
 11154  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 11155  		v.Aux = symToAux(sym)
 11156  		v.AddArg2(ptr, mem)
 11157  		return true
 11158  	}
 11159  	// match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
 11160  	// cond: off == 0 && sym == nil
 11161  	// result: (MOVWUloadidx ptr idx mem)
 11162  	for {
 11163  		off := auxIntToInt32(v.AuxInt)
 11164  		sym := auxToSym(v.Aux)
 11165  		if v_0.Op != OpARM64ADD {
 11166  			break
 11167  		}
 11168  		idx := v_0.Args[1]
 11169  		ptr := v_0.Args[0]
 11170  		mem := v_1
 11171  		if !(off == 0 && sym == nil) {
 11172  			break
 11173  		}
 11174  		v.reset(OpARM64MOVWUloadidx)
 11175  		v.AddArg3(ptr, idx, mem)
 11176  		return true
 11177  	}
 11178  	// match: (MOVWUload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 11179  	// cond: off == 0 && sym == nil
 11180  	// result: (MOVWUloadidx4 ptr idx mem)
 11181  	for {
 11182  		off := auxIntToInt32(v.AuxInt)
 11183  		sym := auxToSym(v.Aux)
 11184  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 11185  			break
 11186  		}
 11187  		idx := v_0.Args[1]
 11188  		ptr := v_0.Args[0]
 11189  		mem := v_1
 11190  		if !(off == 0 && sym == nil) {
 11191  			break
 11192  		}
 11193  		v.reset(OpARM64MOVWUloadidx4)
 11194  		v.AddArg3(ptr, idx, mem)
 11195  		return true
 11196  	}
 11197  	// match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11198  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 11199  	// result: (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11200  	for {
 11201  		off1 := auxIntToInt32(v.AuxInt)
 11202  		sym1 := auxToSym(v.Aux)
 11203  		if v_0.Op != OpARM64MOVDaddr {
 11204  			break
 11205  		}
 11206  		off2 := auxIntToInt32(v_0.AuxInt)
 11207  		sym2 := auxToSym(v_0.Aux)
 11208  		ptr := v_0.Args[0]
 11209  		mem := v_1
 11210  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 11211  			break
 11212  		}
 11213  		v.reset(OpARM64MOVWUload)
 11214  		v.AuxInt = int32ToAuxInt(off1 + off2)
 11215  		v.Aux = symToAux(mergeSym(sym1, sym2))
 11216  		v.AddArg2(ptr, mem)
 11217  		return true
 11218  	}
 11219  	// match: (MOVWUload [off] {sym} (SB) _)
 11220  	// cond: symIsRO(sym)
 11221  	// result: (MOVDconst [int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))])
 11222  	for {
 11223  		off := auxIntToInt32(v.AuxInt)
 11224  		sym := auxToSym(v.Aux)
 11225  		if v_0.Op != OpSB || !(symIsRO(sym)) {
 11226  			break
 11227  		}
 11228  		v.reset(OpARM64MOVDconst)
 11229  		v.AuxInt = int64ToAuxInt(int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))
 11230  		return true
 11231  	}
 11232  	return false
 11233  }
 11234  func rewriteValueARM64_OpARM64MOVWUloadidx(v *Value) bool {
 11235  	v_2 := v.Args[2]
 11236  	v_1 := v.Args[1]
 11237  	v_0 := v.Args[0]
 11238  	// match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
 11239  	// cond: is32Bit(c)
 11240  	// result: (MOVWUload [int32(c)] ptr mem)
 11241  	for {
 11242  		ptr := v_0
 11243  		if v_1.Op != OpARM64MOVDconst {
 11244  			break
 11245  		}
 11246  		c := auxIntToInt64(v_1.AuxInt)
 11247  		mem := v_2
 11248  		if !(is32Bit(c)) {
 11249  			break
 11250  		}
 11251  		v.reset(OpARM64MOVWUload)
 11252  		v.AuxInt = int32ToAuxInt(int32(c))
 11253  		v.AddArg2(ptr, mem)
 11254  		return true
 11255  	}
 11256  	// match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
 11257  	// cond: is32Bit(c)
 11258  	// result: (MOVWUload [int32(c)] ptr mem)
 11259  	for {
 11260  		if v_0.Op != OpARM64MOVDconst {
 11261  			break
 11262  		}
 11263  		c := auxIntToInt64(v_0.AuxInt)
 11264  		ptr := v_1
 11265  		mem := v_2
 11266  		if !(is32Bit(c)) {
 11267  			break
 11268  		}
 11269  		v.reset(OpARM64MOVWUload)
 11270  		v.AuxInt = int32ToAuxInt(int32(c))
 11271  		v.AddArg2(ptr, mem)
 11272  		return true
 11273  	}
 11274  	// match: (MOVWUloadidx ptr (SLLconst [2] idx) mem)
 11275  	// result: (MOVWUloadidx4 ptr idx mem)
 11276  	for {
 11277  		ptr := v_0
 11278  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
 11279  			break
 11280  		}
 11281  		idx := v_1.Args[0]
 11282  		mem := v_2
 11283  		v.reset(OpARM64MOVWUloadidx4)
 11284  		v.AddArg3(ptr, idx, mem)
 11285  		return true
 11286  	}
 11287  	// match: (MOVWUloadidx (SLLconst [2] idx) ptr mem)
 11288  	// result: (MOVWUloadidx4 ptr idx mem)
 11289  	for {
 11290  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
 11291  			break
 11292  		}
 11293  		idx := v_0.Args[0]
 11294  		ptr := v_1
 11295  		mem := v_2
 11296  		v.reset(OpARM64MOVWUloadidx4)
 11297  		v.AddArg3(ptr, idx, mem)
 11298  		return true
 11299  	}
 11300  	return false
 11301  }
 11302  func rewriteValueARM64_OpARM64MOVWUloadidx4(v *Value) bool {
 11303  	v_2 := v.Args[2]
 11304  	v_1 := v.Args[1]
 11305  	v_0 := v.Args[0]
 11306  	// match: (MOVWUloadidx4 ptr (MOVDconst [c]) mem)
 11307  	// cond: is32Bit(c<<2)
 11308  	// result: (MOVWUload [int32(c)<<2] ptr mem)
 11309  	for {
 11310  		ptr := v_0
 11311  		if v_1.Op != OpARM64MOVDconst {
 11312  			break
 11313  		}
 11314  		c := auxIntToInt64(v_1.AuxInt)
 11315  		mem := v_2
 11316  		if !(is32Bit(c << 2)) {
 11317  			break
 11318  		}
 11319  		v.reset(OpARM64MOVWUload)
 11320  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
 11321  		v.AddArg2(ptr, mem)
 11322  		return true
 11323  	}
 11324  	return false
 11325  }
 11326  func rewriteValueARM64_OpARM64MOVWUreg(v *Value) bool {
 11327  	v_0 := v.Args[0]
 11328  	// match: (MOVWUreg (ANDconst [c] x))
 11329  	// result: (ANDconst [c&(1<<32-1)] x)
 11330  	for {
 11331  		if v_0.Op != OpARM64ANDconst {
 11332  			break
 11333  		}
 11334  		c := auxIntToInt64(v_0.AuxInt)
 11335  		x := v_0.Args[0]
 11336  		v.reset(OpARM64ANDconst)
 11337  		v.AuxInt = int64ToAuxInt(c & (1<<32 - 1))
 11338  		v.AddArg(x)
 11339  		return true
 11340  	}
 11341  	// match: (MOVWUreg (MOVDconst [c]))
 11342  	// result: (MOVDconst [int64(uint32(c))])
 11343  	for {
 11344  		if v_0.Op != OpARM64MOVDconst {
 11345  			break
 11346  		}
 11347  		c := auxIntToInt64(v_0.AuxInt)
 11348  		v.reset(OpARM64MOVDconst)
 11349  		v.AuxInt = int64ToAuxInt(int64(uint32(c)))
 11350  		return true
 11351  	}
 11352  	// match: (MOVWUreg x)
 11353  	// cond: v.Type.Size() <= 4
 11354  	// result: x
 11355  	for {
 11356  		x := v_0
 11357  		if !(v.Type.Size() <= 4) {
 11358  			break
 11359  		}
 11360  		v.copyOf(x)
 11361  		return true
 11362  	}
 11363  	// match: (MOVWUreg (SLLconst [lc] x))
 11364  	// cond: lc >= 32
 11365  	// result: (MOVDconst [0])
 11366  	for {
 11367  		if v_0.Op != OpARM64SLLconst {
 11368  			break
 11369  		}
 11370  		lc := auxIntToInt64(v_0.AuxInt)
 11371  		if !(lc >= 32) {
 11372  			break
 11373  		}
 11374  		v.reset(OpARM64MOVDconst)
 11375  		v.AuxInt = int64ToAuxInt(0)
 11376  		return true
 11377  	}
 11378  	// match: (MOVWUreg (SLLconst [lc] x))
 11379  	// cond: lc < 32
 11380  	// result: (UBFIZ [armBFAuxInt(lc, 32-lc)] x)
 11381  	for {
 11382  		if v_0.Op != OpARM64SLLconst {
 11383  			break
 11384  		}
 11385  		lc := auxIntToInt64(v_0.AuxInt)
 11386  		x := v_0.Args[0]
 11387  		if !(lc < 32) {
 11388  			break
 11389  		}
 11390  		v.reset(OpARM64UBFIZ)
 11391  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 32-lc))
 11392  		v.AddArg(x)
 11393  		return true
 11394  	}
 11395  	// match: (MOVWUreg (SRLconst [rc] x))
 11396  	// cond: rc < 32
 11397  	// result: (UBFX [armBFAuxInt(rc, 32)] x)
 11398  	for {
 11399  		if v_0.Op != OpARM64SRLconst {
 11400  			break
 11401  		}
 11402  		rc := auxIntToInt64(v_0.AuxInt)
 11403  		x := v_0.Args[0]
 11404  		if !(rc < 32) {
 11405  			break
 11406  		}
 11407  		v.reset(OpARM64UBFX)
 11408  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 32))
 11409  		v.AddArg(x)
 11410  		return true
 11411  	}
 11412  	// match: (MOVWUreg (UBFX [bfc] x))
 11413  	// cond: bfc.width() <= 32
 11414  	// result: (UBFX [bfc] x)
 11415  	for {
 11416  		if v_0.Op != OpARM64UBFX {
 11417  			break
 11418  		}
 11419  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 11420  		x := v_0.Args[0]
 11421  		if !(bfc.width() <= 32) {
 11422  			break
 11423  		}
 11424  		v.reset(OpARM64UBFX)
 11425  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
 11426  		v.AddArg(x)
 11427  		return true
 11428  	}
 11429  	return false
 11430  }
 11431  func rewriteValueARM64_OpARM64MOVWload(v *Value) bool {
 11432  	v_1 := v.Args[1]
 11433  	v_0 := v.Args[0]
 11434  	b := v.Block
 11435  	config := b.Func.Config
 11436  	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
 11437  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 11438  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
 11439  	for {
 11440  		off1 := auxIntToInt32(v.AuxInt)
 11441  		sym := auxToSym(v.Aux)
 11442  		if v_0.Op != OpARM64ADDconst {
 11443  			break
 11444  		}
 11445  		off2 := auxIntToInt64(v_0.AuxInt)
 11446  		ptr := v_0.Args[0]
 11447  		mem := v_1
 11448  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 11449  			break
 11450  		}
 11451  		v.reset(OpARM64MOVWload)
 11452  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 11453  		v.Aux = symToAux(sym)
 11454  		v.AddArg2(ptr, mem)
 11455  		return true
 11456  	}
 11457  	// match: (MOVWload [off] {sym} (ADD ptr idx) mem)
 11458  	// cond: off == 0 && sym == nil
 11459  	// result: (MOVWloadidx ptr idx mem)
 11460  	for {
 11461  		off := auxIntToInt32(v.AuxInt)
 11462  		sym := auxToSym(v.Aux)
 11463  		if v_0.Op != OpARM64ADD {
 11464  			break
 11465  		}
 11466  		idx := v_0.Args[1]
 11467  		ptr := v_0.Args[0]
 11468  		mem := v_1
 11469  		if !(off == 0 && sym == nil) {
 11470  			break
 11471  		}
 11472  		v.reset(OpARM64MOVWloadidx)
 11473  		v.AddArg3(ptr, idx, mem)
 11474  		return true
 11475  	}
 11476  	// match: (MOVWload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 11477  	// cond: off == 0 && sym == nil
 11478  	// result: (MOVWloadidx4 ptr idx mem)
 11479  	for {
 11480  		off := auxIntToInt32(v.AuxInt)
 11481  		sym := auxToSym(v.Aux)
 11482  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 11483  			break
 11484  		}
 11485  		idx := v_0.Args[1]
 11486  		ptr := v_0.Args[0]
 11487  		mem := v_1
 11488  		if !(off == 0 && sym == nil) {
 11489  			break
 11490  		}
 11491  		v.reset(OpARM64MOVWloadidx4)
 11492  		v.AddArg3(ptr, idx, mem)
 11493  		return true
 11494  	}
 11495  	// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11496  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 11497  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11498  	for {
 11499  		off1 := auxIntToInt32(v.AuxInt)
 11500  		sym1 := auxToSym(v.Aux)
 11501  		if v_0.Op != OpARM64MOVDaddr {
 11502  			break
 11503  		}
 11504  		off2 := auxIntToInt32(v_0.AuxInt)
 11505  		sym2 := auxToSym(v_0.Aux)
 11506  		ptr := v_0.Args[0]
 11507  		mem := v_1
 11508  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 11509  			break
 11510  		}
 11511  		v.reset(OpARM64MOVWload)
 11512  		v.AuxInt = int32ToAuxInt(off1 + off2)
 11513  		v.Aux = symToAux(mergeSym(sym1, sym2))
 11514  		v.AddArg2(ptr, mem)
 11515  		return true
 11516  	}
 11517  	// match: (MOVWload [off] {sym} (SB) _)
 11518  	// cond: symIsRO(sym)
 11519  	// result: (MOVDconst [int64(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))])
 11520  	for {
 11521  		off := auxIntToInt32(v.AuxInt)
 11522  		sym := auxToSym(v.Aux)
 11523  		if v_0.Op != OpSB || !(symIsRO(sym)) {
 11524  			break
 11525  		}
 11526  		v.reset(OpARM64MOVDconst)
 11527  		v.AuxInt = int64ToAuxInt(int64(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))))
 11528  		return true
 11529  	}
 11530  	return false
 11531  }
 11532  func rewriteValueARM64_OpARM64MOVWloadidx(v *Value) bool {
 11533  	v_2 := v.Args[2]
 11534  	v_1 := v.Args[1]
 11535  	v_0 := v.Args[0]
 11536  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 11537  	// cond: is32Bit(c)
 11538  	// result: (MOVWload [int32(c)] ptr mem)
 11539  	for {
 11540  		ptr := v_0
 11541  		if v_1.Op != OpARM64MOVDconst {
 11542  			break
 11543  		}
 11544  		c := auxIntToInt64(v_1.AuxInt)
 11545  		mem := v_2
 11546  		if !(is32Bit(c)) {
 11547  			break
 11548  		}
 11549  		v.reset(OpARM64MOVWload)
 11550  		v.AuxInt = int32ToAuxInt(int32(c))
 11551  		v.AddArg2(ptr, mem)
 11552  		return true
 11553  	}
 11554  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 11555  	// cond: is32Bit(c)
 11556  	// result: (MOVWload [int32(c)] ptr mem)
 11557  	for {
 11558  		if v_0.Op != OpARM64MOVDconst {
 11559  			break
 11560  		}
 11561  		c := auxIntToInt64(v_0.AuxInt)
 11562  		ptr := v_1
 11563  		mem := v_2
 11564  		if !(is32Bit(c)) {
 11565  			break
 11566  		}
 11567  		v.reset(OpARM64MOVWload)
 11568  		v.AuxInt = int32ToAuxInt(int32(c))
 11569  		v.AddArg2(ptr, mem)
 11570  		return true
 11571  	}
 11572  	// match: (MOVWloadidx ptr (SLLconst [2] idx) mem)
 11573  	// result: (MOVWloadidx4 ptr idx mem)
 11574  	for {
 11575  		ptr := v_0
 11576  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
 11577  			break
 11578  		}
 11579  		idx := v_1.Args[0]
 11580  		mem := v_2
 11581  		v.reset(OpARM64MOVWloadidx4)
 11582  		v.AddArg3(ptr, idx, mem)
 11583  		return true
 11584  	}
 11585  	// match: (MOVWloadidx (SLLconst [2] idx) ptr mem)
 11586  	// result: (MOVWloadidx4 ptr idx mem)
 11587  	for {
 11588  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
 11589  			break
 11590  		}
 11591  		idx := v_0.Args[0]
 11592  		ptr := v_1
 11593  		mem := v_2
 11594  		v.reset(OpARM64MOVWloadidx4)
 11595  		v.AddArg3(ptr, idx, mem)
 11596  		return true
 11597  	}
 11598  	return false
 11599  }
 11600  func rewriteValueARM64_OpARM64MOVWloadidx4(v *Value) bool {
 11601  	v_2 := v.Args[2]
 11602  	v_1 := v.Args[1]
 11603  	v_0 := v.Args[0]
 11604  	// match: (MOVWloadidx4 ptr (MOVDconst [c]) mem)
 11605  	// cond: is32Bit(c<<2)
 11606  	// result: (MOVWload [int32(c)<<2] ptr mem)
 11607  	for {
 11608  		ptr := v_0
 11609  		if v_1.Op != OpARM64MOVDconst {
 11610  			break
 11611  		}
 11612  		c := auxIntToInt64(v_1.AuxInt)
 11613  		mem := v_2
 11614  		if !(is32Bit(c << 2)) {
 11615  			break
 11616  		}
 11617  		v.reset(OpARM64MOVWload)
 11618  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
 11619  		v.AddArg2(ptr, mem)
 11620  		return true
 11621  	}
 11622  	return false
 11623  }
 11624  func rewriteValueARM64_OpARM64MOVWreg(v *Value) bool {
 11625  	v_0 := v.Args[0]
 11626  	// match: (MOVWreg (MOVDconst [c]))
 11627  	// result: (MOVDconst [int64(int32(c))])
 11628  	for {
 11629  		if v_0.Op != OpARM64MOVDconst {
 11630  			break
 11631  		}
 11632  		c := auxIntToInt64(v_0.AuxInt)
 11633  		v.reset(OpARM64MOVDconst)
 11634  		v.AuxInt = int64ToAuxInt(int64(int32(c)))
 11635  		return true
 11636  	}
 11637  	// match: (MOVWreg x)
 11638  	// cond: v.Type.Size() <= 4
 11639  	// result: x
 11640  	for {
 11641  		x := v_0
 11642  		if !(v.Type.Size() <= 4) {
 11643  			break
 11644  		}
 11645  		v.copyOf(x)
 11646  		return true
 11647  	}
 11648  	// match: (MOVWreg <t> (ANDconst x [c]))
 11649  	// cond: uint64(c) & uint64(0xffffffff80000000) == 0
 11650  	// result: (ANDconst <t> x [c])
 11651  	for {
 11652  		t := v.Type
 11653  		if v_0.Op != OpARM64ANDconst {
 11654  			break
 11655  		}
 11656  		c := auxIntToInt64(v_0.AuxInt)
 11657  		x := v_0.Args[0]
 11658  		if !(uint64(c)&uint64(0xffffffff80000000) == 0) {
 11659  			break
 11660  		}
 11661  		v.reset(OpARM64ANDconst)
 11662  		v.Type = t
 11663  		v.AuxInt = int64ToAuxInt(c)
 11664  		v.AddArg(x)
 11665  		return true
 11666  	}
 11667  	// match: (MOVWreg (SLLconst [lc] x))
 11668  	// cond: lc < 32
 11669  	// result: (SBFIZ [armBFAuxInt(lc, 32-lc)] x)
 11670  	for {
 11671  		if v_0.Op != OpARM64SLLconst {
 11672  			break
 11673  		}
 11674  		lc := auxIntToInt64(v_0.AuxInt)
 11675  		x := v_0.Args[0]
 11676  		if !(lc < 32) {
 11677  			break
 11678  		}
 11679  		v.reset(OpARM64SBFIZ)
 11680  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 32-lc))
 11681  		v.AddArg(x)
 11682  		return true
 11683  	}
 11684  	// match: (MOVWreg (SBFX [bfc] x))
 11685  	// cond: bfc.width() <= 32
 11686  	// result: (SBFX [bfc] x)
 11687  	for {
 11688  		if v_0.Op != OpARM64SBFX {
 11689  			break
 11690  		}
 11691  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 11692  		x := v_0.Args[0]
 11693  		if !(bfc.width() <= 32) {
 11694  			break
 11695  		}
 11696  		v.reset(OpARM64SBFX)
 11697  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
 11698  		v.AddArg(x)
 11699  		return true
 11700  	}
 11701  	return false
 11702  }
 11703  func rewriteValueARM64_OpARM64MOVWstore(v *Value) bool {
 11704  	v_2 := v.Args[2]
 11705  	v_1 := v.Args[1]
 11706  	v_0 := v.Args[0]
 11707  	b := v.Block
 11708  	config := b.Func.Config
 11709  	// match: (MOVWstore [off] {sym} ptr (FMOVSfpgp val) mem)
 11710  	// result: (FMOVSstore [off] {sym} ptr val mem)
 11711  	for {
 11712  		off := auxIntToInt32(v.AuxInt)
 11713  		sym := auxToSym(v.Aux)
 11714  		ptr := v_0
 11715  		if v_1.Op != OpARM64FMOVSfpgp {
 11716  			break
 11717  		}
 11718  		val := v_1.Args[0]
 11719  		mem := v_2
 11720  		v.reset(OpARM64FMOVSstore)
 11721  		v.AuxInt = int32ToAuxInt(off)
 11722  		v.Aux = symToAux(sym)
 11723  		v.AddArg3(ptr, val, mem)
 11724  		return true
 11725  	}
 11726  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11727  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 11728  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
 11729  	for {
 11730  		off1 := auxIntToInt32(v.AuxInt)
 11731  		sym := auxToSym(v.Aux)
 11732  		if v_0.Op != OpARM64ADDconst {
 11733  			break
 11734  		}
 11735  		off2 := auxIntToInt64(v_0.AuxInt)
 11736  		ptr := v_0.Args[0]
 11737  		val := v_1
 11738  		mem := v_2
 11739  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 11740  			break
 11741  		}
 11742  		v.reset(OpARM64MOVWstore)
 11743  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 11744  		v.Aux = symToAux(sym)
 11745  		v.AddArg3(ptr, val, mem)
 11746  		return true
 11747  	}
 11748  	// match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
 11749  	// cond: off == 0 && sym == nil
 11750  	// result: (MOVWstoreidx ptr idx val mem)
 11751  	for {
 11752  		off := auxIntToInt32(v.AuxInt)
 11753  		sym := auxToSym(v.Aux)
 11754  		if v_0.Op != OpARM64ADD {
 11755  			break
 11756  		}
 11757  		idx := v_0.Args[1]
 11758  		ptr := v_0.Args[0]
 11759  		val := v_1
 11760  		mem := v_2
 11761  		if !(off == 0 && sym == nil) {
 11762  			break
 11763  		}
 11764  		v.reset(OpARM64MOVWstoreidx)
 11765  		v.AddArg4(ptr, idx, val, mem)
 11766  		return true
 11767  	}
 11768  	// match: (MOVWstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
 11769  	// cond: off == 0 && sym == nil
 11770  	// result: (MOVWstoreidx4 ptr idx val mem)
 11771  	for {
 11772  		off := auxIntToInt32(v.AuxInt)
 11773  		sym := auxToSym(v.Aux)
 11774  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 11775  			break
 11776  		}
 11777  		idx := v_0.Args[1]
 11778  		ptr := v_0.Args[0]
 11779  		val := v_1
 11780  		mem := v_2
 11781  		if !(off == 0 && sym == nil) {
 11782  			break
 11783  		}
 11784  		v.reset(OpARM64MOVWstoreidx4)
 11785  		v.AddArg4(ptr, idx, val, mem)
 11786  		return true
 11787  	}
 11788  	// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11789  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 11790  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 11791  	for {
 11792  		off1 := auxIntToInt32(v.AuxInt)
 11793  		sym1 := auxToSym(v.Aux)
 11794  		if v_0.Op != OpARM64MOVDaddr {
 11795  			break
 11796  		}
 11797  		off2 := auxIntToInt32(v_0.AuxInt)
 11798  		sym2 := auxToSym(v_0.Aux)
 11799  		ptr := v_0.Args[0]
 11800  		val := v_1
 11801  		mem := v_2
 11802  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 11803  			break
 11804  		}
 11805  		v.reset(OpARM64MOVWstore)
 11806  		v.AuxInt = int32ToAuxInt(off1 + off2)
 11807  		v.Aux = symToAux(mergeSym(sym1, sym2))
 11808  		v.AddArg3(ptr, val, mem)
 11809  		return true
 11810  	}
 11811  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 11812  	// result: (MOVWstore [off] {sym} ptr x mem)
 11813  	for {
 11814  		off := auxIntToInt32(v.AuxInt)
 11815  		sym := auxToSym(v.Aux)
 11816  		ptr := v_0
 11817  		if v_1.Op != OpARM64MOVWreg {
 11818  			break
 11819  		}
 11820  		x := v_1.Args[0]
 11821  		mem := v_2
 11822  		v.reset(OpARM64MOVWstore)
 11823  		v.AuxInt = int32ToAuxInt(off)
 11824  		v.Aux = symToAux(sym)
 11825  		v.AddArg3(ptr, x, mem)
 11826  		return true
 11827  	}
 11828  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
 11829  	// result: (MOVWstore [off] {sym} ptr x mem)
 11830  	for {
 11831  		off := auxIntToInt32(v.AuxInt)
 11832  		sym := auxToSym(v.Aux)
 11833  		ptr := v_0
 11834  		if v_1.Op != OpARM64MOVWUreg {
 11835  			break
 11836  		}
 11837  		x := v_1.Args[0]
 11838  		mem := v_2
 11839  		v.reset(OpARM64MOVWstore)
 11840  		v.AuxInt = int32ToAuxInt(off)
 11841  		v.Aux = symToAux(sym)
 11842  		v.AddArg3(ptr, x, mem)
 11843  		return true
 11844  	}
 11845  	return false
 11846  }
 11847  func rewriteValueARM64_OpARM64MOVWstoreidx(v *Value) bool {
 11848  	v_3 := v.Args[3]
 11849  	v_2 := v.Args[2]
 11850  	v_1 := v.Args[1]
 11851  	v_0 := v.Args[0]
 11852  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 11853  	// cond: is32Bit(c)
 11854  	// result: (MOVWstore [int32(c)] ptr val mem)
 11855  	for {
 11856  		ptr := v_0
 11857  		if v_1.Op != OpARM64MOVDconst {
 11858  			break
 11859  		}
 11860  		c := auxIntToInt64(v_1.AuxInt)
 11861  		val := v_2
 11862  		mem := v_3
 11863  		if !(is32Bit(c)) {
 11864  			break
 11865  		}
 11866  		v.reset(OpARM64MOVWstore)
 11867  		v.AuxInt = int32ToAuxInt(int32(c))
 11868  		v.AddArg3(ptr, val, mem)
 11869  		return true
 11870  	}
 11871  	// match: (MOVWstoreidx (MOVDconst [c]) idx val mem)
 11872  	// cond: is32Bit(c)
 11873  	// result: (MOVWstore [int32(c)] idx val mem)
 11874  	for {
 11875  		if v_0.Op != OpARM64MOVDconst {
 11876  			break
 11877  		}
 11878  		c := auxIntToInt64(v_0.AuxInt)
 11879  		idx := v_1
 11880  		val := v_2
 11881  		mem := v_3
 11882  		if !(is32Bit(c)) {
 11883  			break
 11884  		}
 11885  		v.reset(OpARM64MOVWstore)
 11886  		v.AuxInt = int32ToAuxInt(int32(c))
 11887  		v.AddArg3(idx, val, mem)
 11888  		return true
 11889  	}
 11890  	// match: (MOVWstoreidx ptr (SLLconst [2] idx) val mem)
 11891  	// result: (MOVWstoreidx4 ptr idx val mem)
 11892  	for {
 11893  		ptr := v_0
 11894  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
 11895  			break
 11896  		}
 11897  		idx := v_1.Args[0]
 11898  		val := v_2
 11899  		mem := v_3
 11900  		v.reset(OpARM64MOVWstoreidx4)
 11901  		v.AddArg4(ptr, idx, val, mem)
 11902  		return true
 11903  	}
 11904  	// match: (MOVWstoreidx (SLLconst [2] idx) ptr val mem)
 11905  	// result: (MOVWstoreidx4 ptr idx val mem)
 11906  	for {
 11907  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
 11908  			break
 11909  		}
 11910  		idx := v_0.Args[0]
 11911  		ptr := v_1
 11912  		val := v_2
 11913  		mem := v_3
 11914  		v.reset(OpARM64MOVWstoreidx4)
 11915  		v.AddArg4(ptr, idx, val, mem)
 11916  		return true
 11917  	}
 11918  	// match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
 11919  	// result: (MOVWstoreidx ptr idx x mem)
 11920  	for {
 11921  		ptr := v_0
 11922  		idx := v_1
 11923  		if v_2.Op != OpARM64MOVWreg {
 11924  			break
 11925  		}
 11926  		x := v_2.Args[0]
 11927  		mem := v_3
 11928  		v.reset(OpARM64MOVWstoreidx)
 11929  		v.AddArg4(ptr, idx, x, mem)
 11930  		return true
 11931  	}
 11932  	// match: (MOVWstoreidx ptr idx (MOVWUreg x) mem)
 11933  	// result: (MOVWstoreidx ptr idx x mem)
 11934  	for {
 11935  		ptr := v_0
 11936  		idx := v_1
 11937  		if v_2.Op != OpARM64MOVWUreg {
 11938  			break
 11939  		}
 11940  		x := v_2.Args[0]
 11941  		mem := v_3
 11942  		v.reset(OpARM64MOVWstoreidx)
 11943  		v.AddArg4(ptr, idx, x, mem)
 11944  		return true
 11945  	}
 11946  	return false
 11947  }
 11948  func rewriteValueARM64_OpARM64MOVWstoreidx4(v *Value) bool {
 11949  	v_3 := v.Args[3]
 11950  	v_2 := v.Args[2]
 11951  	v_1 := v.Args[1]
 11952  	v_0 := v.Args[0]
 11953  	// match: (MOVWstoreidx4 ptr (MOVDconst [c]) val mem)
 11954  	// cond: is32Bit(c<<2)
 11955  	// result: (MOVWstore [int32(c)<<2] ptr val mem)
 11956  	for {
 11957  		ptr := v_0
 11958  		if v_1.Op != OpARM64MOVDconst {
 11959  			break
 11960  		}
 11961  		c := auxIntToInt64(v_1.AuxInt)
 11962  		val := v_2
 11963  		mem := v_3
 11964  		if !(is32Bit(c << 2)) {
 11965  			break
 11966  		}
 11967  		v.reset(OpARM64MOVWstore)
 11968  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
 11969  		v.AddArg3(ptr, val, mem)
 11970  		return true
 11971  	}
 11972  	// match: (MOVWstoreidx4 ptr idx (MOVWreg x) mem)
 11973  	// result: (MOVWstoreidx4 ptr idx x mem)
 11974  	for {
 11975  		ptr := v_0
 11976  		idx := v_1
 11977  		if v_2.Op != OpARM64MOVWreg {
 11978  			break
 11979  		}
 11980  		x := v_2.Args[0]
 11981  		mem := v_3
 11982  		v.reset(OpARM64MOVWstoreidx4)
 11983  		v.AddArg4(ptr, idx, x, mem)
 11984  		return true
 11985  	}
 11986  	// match: (MOVWstoreidx4 ptr idx (MOVWUreg x) mem)
 11987  	// result: (MOVWstoreidx4 ptr idx x mem)
 11988  	for {
 11989  		ptr := v_0
 11990  		idx := v_1
 11991  		if v_2.Op != OpARM64MOVWUreg {
 11992  			break
 11993  		}
 11994  		x := v_2.Args[0]
 11995  		mem := v_3
 11996  		v.reset(OpARM64MOVWstoreidx4)
 11997  		v.AddArg4(ptr, idx, x, mem)
 11998  		return true
 11999  	}
 12000  	return false
 12001  }
 12002  func rewriteValueARM64_OpARM64MSUB(v *Value) bool {
 12003  	v_2 := v.Args[2]
 12004  	v_1 := v.Args[1]
 12005  	v_0 := v.Args[0]
 12006  	b := v.Block
 12007  	// match: (MSUB a x (MOVDconst [-1]))
 12008  	// result: (ADD a x)
 12009  	for {
 12010  		a := v_0
 12011  		x := v_1
 12012  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != -1 {
 12013  			break
 12014  		}
 12015  		v.reset(OpARM64ADD)
 12016  		v.AddArg2(a, x)
 12017  		return true
 12018  	}
 12019  	// match: (MSUB a _ (MOVDconst [0]))
 12020  	// result: a
 12021  	for {
 12022  		a := v_0
 12023  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
 12024  			break
 12025  		}
 12026  		v.copyOf(a)
 12027  		return true
 12028  	}
 12029  	// match: (MSUB a x (MOVDconst [1]))
 12030  	// result: (SUB a x)
 12031  	for {
 12032  		a := v_0
 12033  		x := v_1
 12034  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 1 {
 12035  			break
 12036  		}
 12037  		v.reset(OpARM64SUB)
 12038  		v.AddArg2(a, x)
 12039  		return true
 12040  	}
 12041  	// match: (MSUB a x (MOVDconst [c]))
 12042  	// cond: isPowerOfTwo(c)
 12043  	// result: (SUBshiftLL a x [log64(c)])
 12044  	for {
 12045  		a := v_0
 12046  		x := v_1
 12047  		if v_2.Op != OpARM64MOVDconst {
 12048  			break
 12049  		}
 12050  		c := auxIntToInt64(v_2.AuxInt)
 12051  		if !(isPowerOfTwo(c)) {
 12052  			break
 12053  		}
 12054  		v.reset(OpARM64SUBshiftLL)
 12055  		v.AuxInt = int64ToAuxInt(log64(c))
 12056  		v.AddArg2(a, x)
 12057  		return true
 12058  	}
 12059  	// match: (MSUB a x (MOVDconst [c]))
 12060  	// cond: isPowerOfTwo(c-1) && c>=3
 12061  	// result: (SUB a (ADDshiftLL <x.Type> x x [log64(c-1)]))
 12062  	for {
 12063  		a := v_0
 12064  		x := v_1
 12065  		if v_2.Op != OpARM64MOVDconst {
 12066  			break
 12067  		}
 12068  		c := auxIntToInt64(v_2.AuxInt)
 12069  		if !(isPowerOfTwo(c-1) && c >= 3) {
 12070  			break
 12071  		}
 12072  		v.reset(OpARM64SUB)
 12073  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12074  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
 12075  		v0.AddArg2(x, x)
 12076  		v.AddArg2(a, v0)
 12077  		return true
 12078  	}
 12079  	// match: (MSUB a x (MOVDconst [c]))
 12080  	// cond: isPowerOfTwo(c+1) && c>=7
 12081  	// result: (ADD a (SUBshiftLL <x.Type> x x [log64(c+1)]))
 12082  	for {
 12083  		a := v_0
 12084  		x := v_1
 12085  		if v_2.Op != OpARM64MOVDconst {
 12086  			break
 12087  		}
 12088  		c := auxIntToInt64(v_2.AuxInt)
 12089  		if !(isPowerOfTwo(c+1) && c >= 7) {
 12090  			break
 12091  		}
 12092  		v.reset(OpARM64ADD)
 12093  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12094  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
 12095  		v0.AddArg2(x, x)
 12096  		v.AddArg2(a, v0)
 12097  		return true
 12098  	}
 12099  	// match: (MSUB a x (MOVDconst [c]))
 12100  	// cond: c%3 == 0 && isPowerOfTwo(c/3)
 12101  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
 12102  	for {
 12103  		a := v_0
 12104  		x := v_1
 12105  		if v_2.Op != OpARM64MOVDconst {
 12106  			break
 12107  		}
 12108  		c := auxIntToInt64(v_2.AuxInt)
 12109  		if !(c%3 == 0 && isPowerOfTwo(c/3)) {
 12110  			break
 12111  		}
 12112  		v.reset(OpARM64ADDshiftLL)
 12113  		v.AuxInt = int64ToAuxInt(log64(c / 3))
 12114  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12115  		v0.AuxInt = int64ToAuxInt(2)
 12116  		v0.AddArg2(x, x)
 12117  		v.AddArg2(a, v0)
 12118  		return true
 12119  	}
 12120  	// match: (MSUB a x (MOVDconst [c]))
 12121  	// cond: c%5 == 0 && isPowerOfTwo(c/5)
 12122  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
 12123  	for {
 12124  		a := v_0
 12125  		x := v_1
 12126  		if v_2.Op != OpARM64MOVDconst {
 12127  			break
 12128  		}
 12129  		c := auxIntToInt64(v_2.AuxInt)
 12130  		if !(c%5 == 0 && isPowerOfTwo(c/5)) {
 12131  			break
 12132  		}
 12133  		v.reset(OpARM64SUBshiftLL)
 12134  		v.AuxInt = int64ToAuxInt(log64(c / 5))
 12135  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12136  		v0.AuxInt = int64ToAuxInt(2)
 12137  		v0.AddArg2(x, x)
 12138  		v.AddArg2(a, v0)
 12139  		return true
 12140  	}
 12141  	// match: (MSUB a x (MOVDconst [c]))
 12142  	// cond: c%7 == 0 && isPowerOfTwo(c/7)
 12143  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
 12144  	for {
 12145  		a := v_0
 12146  		x := v_1
 12147  		if v_2.Op != OpARM64MOVDconst {
 12148  			break
 12149  		}
 12150  		c := auxIntToInt64(v_2.AuxInt)
 12151  		if !(c%7 == 0 && isPowerOfTwo(c/7)) {
 12152  			break
 12153  		}
 12154  		v.reset(OpARM64ADDshiftLL)
 12155  		v.AuxInt = int64ToAuxInt(log64(c / 7))
 12156  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12157  		v0.AuxInt = int64ToAuxInt(3)
 12158  		v0.AddArg2(x, x)
 12159  		v.AddArg2(a, v0)
 12160  		return true
 12161  	}
 12162  	// match: (MSUB a x (MOVDconst [c]))
 12163  	// cond: c%9 == 0 && isPowerOfTwo(c/9)
 12164  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
 12165  	for {
 12166  		a := v_0
 12167  		x := v_1
 12168  		if v_2.Op != OpARM64MOVDconst {
 12169  			break
 12170  		}
 12171  		c := auxIntToInt64(v_2.AuxInt)
 12172  		if !(c%9 == 0 && isPowerOfTwo(c/9)) {
 12173  			break
 12174  		}
 12175  		v.reset(OpARM64SUBshiftLL)
 12176  		v.AuxInt = int64ToAuxInt(log64(c / 9))
 12177  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12178  		v0.AuxInt = int64ToAuxInt(3)
 12179  		v0.AddArg2(x, x)
 12180  		v.AddArg2(a, v0)
 12181  		return true
 12182  	}
 12183  	// match: (MSUB a (MOVDconst [-1]) x)
 12184  	// result: (ADD a x)
 12185  	for {
 12186  		a := v_0
 12187  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
 12188  			break
 12189  		}
 12190  		x := v_2
 12191  		v.reset(OpARM64ADD)
 12192  		v.AddArg2(a, x)
 12193  		return true
 12194  	}
 12195  	// match: (MSUB a (MOVDconst [0]) _)
 12196  	// result: a
 12197  	for {
 12198  		a := v_0
 12199  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
 12200  			break
 12201  		}
 12202  		v.copyOf(a)
 12203  		return true
 12204  	}
 12205  	// match: (MSUB a (MOVDconst [1]) x)
 12206  	// result: (SUB a x)
 12207  	for {
 12208  		a := v_0
 12209  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 12210  			break
 12211  		}
 12212  		x := v_2
 12213  		v.reset(OpARM64SUB)
 12214  		v.AddArg2(a, x)
 12215  		return true
 12216  	}
 12217  	// match: (MSUB a (MOVDconst [c]) x)
 12218  	// cond: isPowerOfTwo(c)
 12219  	// result: (SUBshiftLL a x [log64(c)])
 12220  	for {
 12221  		a := v_0
 12222  		if v_1.Op != OpARM64MOVDconst {
 12223  			break
 12224  		}
 12225  		c := auxIntToInt64(v_1.AuxInt)
 12226  		x := v_2
 12227  		if !(isPowerOfTwo(c)) {
 12228  			break
 12229  		}
 12230  		v.reset(OpARM64SUBshiftLL)
 12231  		v.AuxInt = int64ToAuxInt(log64(c))
 12232  		v.AddArg2(a, x)
 12233  		return true
 12234  	}
 12235  	// match: (MSUB a (MOVDconst [c]) x)
 12236  	// cond: isPowerOfTwo(c-1) && c>=3
 12237  	// result: (SUB a (ADDshiftLL <x.Type> x x [log64(c-1)]))
 12238  	for {
 12239  		a := v_0
 12240  		if v_1.Op != OpARM64MOVDconst {
 12241  			break
 12242  		}
 12243  		c := auxIntToInt64(v_1.AuxInt)
 12244  		x := v_2
 12245  		if !(isPowerOfTwo(c-1) && c >= 3) {
 12246  			break
 12247  		}
 12248  		v.reset(OpARM64SUB)
 12249  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12250  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
 12251  		v0.AddArg2(x, x)
 12252  		v.AddArg2(a, v0)
 12253  		return true
 12254  	}
 12255  	// match: (MSUB a (MOVDconst [c]) x)
 12256  	// cond: isPowerOfTwo(c+1) && c>=7
 12257  	// result: (ADD a (SUBshiftLL <x.Type> x x [log64(c+1)]))
 12258  	for {
 12259  		a := v_0
 12260  		if v_1.Op != OpARM64MOVDconst {
 12261  			break
 12262  		}
 12263  		c := auxIntToInt64(v_1.AuxInt)
 12264  		x := v_2
 12265  		if !(isPowerOfTwo(c+1) && c >= 7) {
 12266  			break
 12267  		}
 12268  		v.reset(OpARM64ADD)
 12269  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12270  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
 12271  		v0.AddArg2(x, x)
 12272  		v.AddArg2(a, v0)
 12273  		return true
 12274  	}
 12275  	// match: (MSUB a (MOVDconst [c]) x)
 12276  	// cond: c%3 == 0 && isPowerOfTwo(c/3)
 12277  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
 12278  	for {
 12279  		a := v_0
 12280  		if v_1.Op != OpARM64MOVDconst {
 12281  			break
 12282  		}
 12283  		c := auxIntToInt64(v_1.AuxInt)
 12284  		x := v_2
 12285  		if !(c%3 == 0 && isPowerOfTwo(c/3)) {
 12286  			break
 12287  		}
 12288  		v.reset(OpARM64ADDshiftLL)
 12289  		v.AuxInt = int64ToAuxInt(log64(c / 3))
 12290  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12291  		v0.AuxInt = int64ToAuxInt(2)
 12292  		v0.AddArg2(x, x)
 12293  		v.AddArg2(a, v0)
 12294  		return true
 12295  	}
 12296  	// match: (MSUB a (MOVDconst [c]) x)
 12297  	// cond: c%5 == 0 && isPowerOfTwo(c/5)
 12298  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
 12299  	for {
 12300  		a := v_0
 12301  		if v_1.Op != OpARM64MOVDconst {
 12302  			break
 12303  		}
 12304  		c := auxIntToInt64(v_1.AuxInt)
 12305  		x := v_2
 12306  		if !(c%5 == 0 && isPowerOfTwo(c/5)) {
 12307  			break
 12308  		}
 12309  		v.reset(OpARM64SUBshiftLL)
 12310  		v.AuxInt = int64ToAuxInt(log64(c / 5))
 12311  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12312  		v0.AuxInt = int64ToAuxInt(2)
 12313  		v0.AddArg2(x, x)
 12314  		v.AddArg2(a, v0)
 12315  		return true
 12316  	}
 12317  	// match: (MSUB a (MOVDconst [c]) x)
 12318  	// cond: c%7 == 0 && isPowerOfTwo(c/7)
 12319  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
 12320  	for {
 12321  		a := v_0
 12322  		if v_1.Op != OpARM64MOVDconst {
 12323  			break
 12324  		}
 12325  		c := auxIntToInt64(v_1.AuxInt)
 12326  		x := v_2
 12327  		if !(c%7 == 0 && isPowerOfTwo(c/7)) {
 12328  			break
 12329  		}
 12330  		v.reset(OpARM64ADDshiftLL)
 12331  		v.AuxInt = int64ToAuxInt(log64(c / 7))
 12332  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12333  		v0.AuxInt = int64ToAuxInt(3)
 12334  		v0.AddArg2(x, x)
 12335  		v.AddArg2(a, v0)
 12336  		return true
 12337  	}
 12338  	// match: (MSUB a (MOVDconst [c]) x)
 12339  	// cond: c%9 == 0 && isPowerOfTwo(c/9)
 12340  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
 12341  	for {
 12342  		a := v_0
 12343  		if v_1.Op != OpARM64MOVDconst {
 12344  			break
 12345  		}
 12346  		c := auxIntToInt64(v_1.AuxInt)
 12347  		x := v_2
 12348  		if !(c%9 == 0 && isPowerOfTwo(c/9)) {
 12349  			break
 12350  		}
 12351  		v.reset(OpARM64SUBshiftLL)
 12352  		v.AuxInt = int64ToAuxInt(log64(c / 9))
 12353  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12354  		v0.AuxInt = int64ToAuxInt(3)
 12355  		v0.AddArg2(x, x)
 12356  		v.AddArg2(a, v0)
 12357  		return true
 12358  	}
 12359  	// match: (MSUB (MOVDconst [c]) x y)
 12360  	// result: (ADDconst [c] (MNEG <x.Type> x y))
 12361  	for {
 12362  		if v_0.Op != OpARM64MOVDconst {
 12363  			break
 12364  		}
 12365  		c := auxIntToInt64(v_0.AuxInt)
 12366  		x := v_1
 12367  		y := v_2
 12368  		v.reset(OpARM64ADDconst)
 12369  		v.AuxInt = int64ToAuxInt(c)
 12370  		v0 := b.NewValue0(v.Pos, OpARM64MNEG, x.Type)
 12371  		v0.AddArg2(x, y)
 12372  		v.AddArg(v0)
 12373  		return true
 12374  	}
 12375  	// match: (MSUB a (MOVDconst [c]) (MOVDconst [d]))
 12376  	// result: (SUBconst [c*d] a)
 12377  	for {
 12378  		a := v_0
 12379  		if v_1.Op != OpARM64MOVDconst {
 12380  			break
 12381  		}
 12382  		c := auxIntToInt64(v_1.AuxInt)
 12383  		if v_2.Op != OpARM64MOVDconst {
 12384  			break
 12385  		}
 12386  		d := auxIntToInt64(v_2.AuxInt)
 12387  		v.reset(OpARM64SUBconst)
 12388  		v.AuxInt = int64ToAuxInt(c * d)
 12389  		v.AddArg(a)
 12390  		return true
 12391  	}
 12392  	return false
 12393  }
 12394  func rewriteValueARM64_OpARM64MSUBW(v *Value) bool {
 12395  	v_2 := v.Args[2]
 12396  	v_1 := v.Args[1]
 12397  	v_0 := v.Args[0]
 12398  	b := v.Block
 12399  	// match: (MSUBW a x (MOVDconst [c]))
 12400  	// cond: int32(c)==-1
 12401  	// result: (MOVWUreg (ADD <a.Type> a x))
 12402  	for {
 12403  		a := v_0
 12404  		x := v_1
 12405  		if v_2.Op != OpARM64MOVDconst {
 12406  			break
 12407  		}
 12408  		c := auxIntToInt64(v_2.AuxInt)
 12409  		if !(int32(c) == -1) {
 12410  			break
 12411  		}
 12412  		v.reset(OpARM64MOVWUreg)
 12413  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
 12414  		v0.AddArg2(a, x)
 12415  		v.AddArg(v0)
 12416  		return true
 12417  	}
 12418  	// match: (MSUBW a _ (MOVDconst [c]))
 12419  	// cond: int32(c)==0
 12420  	// result: (MOVWUreg a)
 12421  	for {
 12422  		a := v_0
 12423  		if v_2.Op != OpARM64MOVDconst {
 12424  			break
 12425  		}
 12426  		c := auxIntToInt64(v_2.AuxInt)
 12427  		if !(int32(c) == 0) {
 12428  			break
 12429  		}
 12430  		v.reset(OpARM64MOVWUreg)
 12431  		v.AddArg(a)
 12432  		return true
 12433  	}
 12434  	// match: (MSUBW a x (MOVDconst [c]))
 12435  	// cond: int32(c)==1
 12436  	// result: (MOVWUreg (SUB <a.Type> a x))
 12437  	for {
 12438  		a := v_0
 12439  		x := v_1
 12440  		if v_2.Op != OpARM64MOVDconst {
 12441  			break
 12442  		}
 12443  		c := auxIntToInt64(v_2.AuxInt)
 12444  		if !(int32(c) == 1) {
 12445  			break
 12446  		}
 12447  		v.reset(OpARM64MOVWUreg)
 12448  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
 12449  		v0.AddArg2(a, x)
 12450  		v.AddArg(v0)
 12451  		return true
 12452  	}
 12453  	// match: (MSUBW a x (MOVDconst [c]))
 12454  	// cond: isPowerOfTwo(c)
 12455  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [log64(c)]))
 12456  	for {
 12457  		a := v_0
 12458  		x := v_1
 12459  		if v_2.Op != OpARM64MOVDconst {
 12460  			break
 12461  		}
 12462  		c := auxIntToInt64(v_2.AuxInt)
 12463  		if !(isPowerOfTwo(c)) {
 12464  			break
 12465  		}
 12466  		v.reset(OpARM64MOVWUreg)
 12467  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
 12468  		v0.AuxInt = int64ToAuxInt(log64(c))
 12469  		v0.AddArg2(a, x)
 12470  		v.AddArg(v0)
 12471  		return true
 12472  	}
 12473  	// match: (MSUBW a x (MOVDconst [c]))
 12474  	// cond: isPowerOfTwo(c-1) && int32(c)>=3
 12475  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [log64(c-1)])))
 12476  	for {
 12477  		a := v_0
 12478  		x := v_1
 12479  		if v_2.Op != OpARM64MOVDconst {
 12480  			break
 12481  		}
 12482  		c := auxIntToInt64(v_2.AuxInt)
 12483  		if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
 12484  			break
 12485  		}
 12486  		v.reset(OpARM64MOVWUreg)
 12487  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
 12488  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12489  		v1.AuxInt = int64ToAuxInt(log64(c - 1))
 12490  		v1.AddArg2(x, x)
 12491  		v0.AddArg2(a, v1)
 12492  		v.AddArg(v0)
 12493  		return true
 12494  	}
 12495  	// match: (MSUBW a x (MOVDconst [c]))
 12496  	// cond: isPowerOfTwo(c+1) && int32(c)>=7
 12497  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [log64(c+1)])))
 12498  	for {
 12499  		a := v_0
 12500  		x := v_1
 12501  		if v_2.Op != OpARM64MOVDconst {
 12502  			break
 12503  		}
 12504  		c := auxIntToInt64(v_2.AuxInt)
 12505  		if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
 12506  			break
 12507  		}
 12508  		v.reset(OpARM64MOVWUreg)
 12509  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
 12510  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12511  		v1.AuxInt = int64ToAuxInt(log64(c + 1))
 12512  		v1.AddArg2(x, x)
 12513  		v0.AddArg2(a, v1)
 12514  		v.AddArg(v0)
 12515  		return true
 12516  	}
 12517  	// match: (MSUBW a x (MOVDconst [c]))
 12518  	// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
 12519  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)]))
 12520  	for {
 12521  		a := v_0
 12522  		x := v_1
 12523  		if v_2.Op != OpARM64MOVDconst {
 12524  			break
 12525  		}
 12526  		c := auxIntToInt64(v_2.AuxInt)
 12527  		if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
 12528  			break
 12529  		}
 12530  		v.reset(OpARM64MOVWUreg)
 12531  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
 12532  		v0.AuxInt = int64ToAuxInt(log64(c / 3))
 12533  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12534  		v1.AuxInt = int64ToAuxInt(2)
 12535  		v1.AddArg2(x, x)
 12536  		v0.AddArg2(a, v1)
 12537  		v.AddArg(v0)
 12538  		return true
 12539  	}
 12540  	// match: (MSUBW a x (MOVDconst [c]))
 12541  	// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
 12542  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)]))
 12543  	for {
 12544  		a := v_0
 12545  		x := v_1
 12546  		if v_2.Op != OpARM64MOVDconst {
 12547  			break
 12548  		}
 12549  		c := auxIntToInt64(v_2.AuxInt)
 12550  		if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
 12551  			break
 12552  		}
 12553  		v.reset(OpARM64MOVWUreg)
 12554  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
 12555  		v0.AuxInt = int64ToAuxInt(log64(c / 5))
 12556  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12557  		v1.AuxInt = int64ToAuxInt(2)
 12558  		v1.AddArg2(x, x)
 12559  		v0.AddArg2(a, v1)
 12560  		v.AddArg(v0)
 12561  		return true
 12562  	}
 12563  	// match: (MSUBW a x (MOVDconst [c]))
 12564  	// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
 12565  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)]))
 12566  	for {
 12567  		a := v_0
 12568  		x := v_1
 12569  		if v_2.Op != OpARM64MOVDconst {
 12570  			break
 12571  		}
 12572  		c := auxIntToInt64(v_2.AuxInt)
 12573  		if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
 12574  			break
 12575  		}
 12576  		v.reset(OpARM64MOVWUreg)
 12577  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
 12578  		v0.AuxInt = int64ToAuxInt(log64(c / 7))
 12579  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12580  		v1.AuxInt = int64ToAuxInt(3)
 12581  		v1.AddArg2(x, x)
 12582  		v0.AddArg2(a, v1)
 12583  		v.AddArg(v0)
 12584  		return true
 12585  	}
 12586  	// match: (MSUBW a x (MOVDconst [c]))
 12587  	// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
 12588  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)]))
 12589  	for {
 12590  		a := v_0
 12591  		x := v_1
 12592  		if v_2.Op != OpARM64MOVDconst {
 12593  			break
 12594  		}
 12595  		c := auxIntToInt64(v_2.AuxInt)
 12596  		if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
 12597  			break
 12598  		}
 12599  		v.reset(OpARM64MOVWUreg)
 12600  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
 12601  		v0.AuxInt = int64ToAuxInt(log64(c / 9))
 12602  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12603  		v1.AuxInt = int64ToAuxInt(3)
 12604  		v1.AddArg2(x, x)
 12605  		v0.AddArg2(a, v1)
 12606  		v.AddArg(v0)
 12607  		return true
 12608  	}
 12609  	// match: (MSUBW a (MOVDconst [c]) x)
 12610  	// cond: int32(c)==-1
 12611  	// result: (MOVWUreg (ADD <a.Type> a x))
 12612  	for {
 12613  		a := v_0
 12614  		if v_1.Op != OpARM64MOVDconst {
 12615  			break
 12616  		}
 12617  		c := auxIntToInt64(v_1.AuxInt)
 12618  		x := v_2
 12619  		if !(int32(c) == -1) {
 12620  			break
 12621  		}
 12622  		v.reset(OpARM64MOVWUreg)
 12623  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
 12624  		v0.AddArg2(a, x)
 12625  		v.AddArg(v0)
 12626  		return true
 12627  	}
 12628  	// match: (MSUBW a (MOVDconst [c]) _)
 12629  	// cond: int32(c)==0
 12630  	// result: (MOVWUreg a)
 12631  	for {
 12632  		a := v_0
 12633  		if v_1.Op != OpARM64MOVDconst {
 12634  			break
 12635  		}
 12636  		c := auxIntToInt64(v_1.AuxInt)
 12637  		if !(int32(c) == 0) {
 12638  			break
 12639  		}
 12640  		v.reset(OpARM64MOVWUreg)
 12641  		v.AddArg(a)
 12642  		return true
 12643  	}
 12644  	// match: (MSUBW a (MOVDconst [c]) x)
 12645  	// cond: int32(c)==1
 12646  	// result: (MOVWUreg (SUB <a.Type> a x))
 12647  	for {
 12648  		a := v_0
 12649  		if v_1.Op != OpARM64MOVDconst {
 12650  			break
 12651  		}
 12652  		c := auxIntToInt64(v_1.AuxInt)
 12653  		x := v_2
 12654  		if !(int32(c) == 1) {
 12655  			break
 12656  		}
 12657  		v.reset(OpARM64MOVWUreg)
 12658  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
 12659  		v0.AddArg2(a, x)
 12660  		v.AddArg(v0)
 12661  		return true
 12662  	}
 12663  	// match: (MSUBW a (MOVDconst [c]) x)
 12664  	// cond: isPowerOfTwo(c)
 12665  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [log64(c)]))
 12666  	for {
 12667  		a := v_0
 12668  		if v_1.Op != OpARM64MOVDconst {
 12669  			break
 12670  		}
 12671  		c := auxIntToInt64(v_1.AuxInt)
 12672  		x := v_2
 12673  		if !(isPowerOfTwo(c)) {
 12674  			break
 12675  		}
 12676  		v.reset(OpARM64MOVWUreg)
 12677  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
 12678  		v0.AuxInt = int64ToAuxInt(log64(c))
 12679  		v0.AddArg2(a, x)
 12680  		v.AddArg(v0)
 12681  		return true
 12682  	}
 12683  	// match: (MSUBW a (MOVDconst [c]) x)
 12684  	// cond: isPowerOfTwo(c-1) && int32(c)>=3
 12685  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [log64(c-1)])))
 12686  	for {
 12687  		a := v_0
 12688  		if v_1.Op != OpARM64MOVDconst {
 12689  			break
 12690  		}
 12691  		c := auxIntToInt64(v_1.AuxInt)
 12692  		x := v_2
 12693  		if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
 12694  			break
 12695  		}
 12696  		v.reset(OpARM64MOVWUreg)
 12697  		v0 := b.NewValue0(v.Pos, OpARM64SUB, a.Type)
 12698  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12699  		v1.AuxInt = int64ToAuxInt(log64(c - 1))
 12700  		v1.AddArg2(x, x)
 12701  		v0.AddArg2(a, v1)
 12702  		v.AddArg(v0)
 12703  		return true
 12704  	}
 12705  	// match: (MSUBW a (MOVDconst [c]) x)
 12706  	// cond: isPowerOfTwo(c+1) && int32(c)>=7
 12707  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [log64(c+1)])))
 12708  	for {
 12709  		a := v_0
 12710  		if v_1.Op != OpARM64MOVDconst {
 12711  			break
 12712  		}
 12713  		c := auxIntToInt64(v_1.AuxInt)
 12714  		x := v_2
 12715  		if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
 12716  			break
 12717  		}
 12718  		v.reset(OpARM64MOVWUreg)
 12719  		v0 := b.NewValue0(v.Pos, OpARM64ADD, a.Type)
 12720  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12721  		v1.AuxInt = int64ToAuxInt(log64(c + 1))
 12722  		v1.AddArg2(x, x)
 12723  		v0.AddArg2(a, v1)
 12724  		v.AddArg(v0)
 12725  		return true
 12726  	}
 12727  	// match: (MSUBW a (MOVDconst [c]) x)
 12728  	// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
 12729  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)]))
 12730  	for {
 12731  		a := v_0
 12732  		if v_1.Op != OpARM64MOVDconst {
 12733  			break
 12734  		}
 12735  		c := auxIntToInt64(v_1.AuxInt)
 12736  		x := v_2
 12737  		if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
 12738  			break
 12739  		}
 12740  		v.reset(OpARM64MOVWUreg)
 12741  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
 12742  		v0.AuxInt = int64ToAuxInt(log64(c / 3))
 12743  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12744  		v1.AuxInt = int64ToAuxInt(2)
 12745  		v1.AddArg2(x, x)
 12746  		v0.AddArg2(a, v1)
 12747  		v.AddArg(v0)
 12748  		return true
 12749  	}
 12750  	// match: (MSUBW a (MOVDconst [c]) x)
 12751  	// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
 12752  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)]))
 12753  	for {
 12754  		a := v_0
 12755  		if v_1.Op != OpARM64MOVDconst {
 12756  			break
 12757  		}
 12758  		c := auxIntToInt64(v_1.AuxInt)
 12759  		x := v_2
 12760  		if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
 12761  			break
 12762  		}
 12763  		v.reset(OpARM64MOVWUreg)
 12764  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
 12765  		v0.AuxInt = int64ToAuxInt(log64(c / 5))
 12766  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12767  		v1.AuxInt = int64ToAuxInt(2)
 12768  		v1.AddArg2(x, x)
 12769  		v0.AddArg2(a, v1)
 12770  		v.AddArg(v0)
 12771  		return true
 12772  	}
 12773  	// match: (MSUBW a (MOVDconst [c]) x)
 12774  	// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
 12775  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)]))
 12776  	for {
 12777  		a := v_0
 12778  		if v_1.Op != OpARM64MOVDconst {
 12779  			break
 12780  		}
 12781  		c := auxIntToInt64(v_1.AuxInt)
 12782  		x := v_2
 12783  		if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
 12784  			break
 12785  		}
 12786  		v.reset(OpARM64MOVWUreg)
 12787  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, a.Type)
 12788  		v0.AuxInt = int64ToAuxInt(log64(c / 7))
 12789  		v1 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
 12790  		v1.AuxInt = int64ToAuxInt(3)
 12791  		v1.AddArg2(x, x)
 12792  		v0.AddArg2(a, v1)
 12793  		v.AddArg(v0)
 12794  		return true
 12795  	}
 12796  	// match: (MSUBW a (MOVDconst [c]) x)
 12797  	// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
 12798  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)]))
 12799  	for {
 12800  		a := v_0
 12801  		if v_1.Op != OpARM64MOVDconst {
 12802  			break
 12803  		}
 12804  		c := auxIntToInt64(v_1.AuxInt)
 12805  		x := v_2
 12806  		if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
 12807  			break
 12808  		}
 12809  		v.reset(OpARM64MOVWUreg)
 12810  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, a.Type)
 12811  		v0.AuxInt = int64ToAuxInt(log64(c / 9))
 12812  		v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
 12813  		v1.AuxInt = int64ToAuxInt(3)
 12814  		v1.AddArg2(x, x)
 12815  		v0.AddArg2(a, v1)
 12816  		v.AddArg(v0)
 12817  		return true
 12818  	}
 12819  	// match: (MSUBW (MOVDconst [c]) x y)
 12820  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MNEGW <x.Type> x y)))
 12821  	for {
 12822  		if v_0.Op != OpARM64MOVDconst {
 12823  			break
 12824  		}
 12825  		c := auxIntToInt64(v_0.AuxInt)
 12826  		x := v_1
 12827  		y := v_2
 12828  		v.reset(OpARM64MOVWUreg)
 12829  		v0 := b.NewValue0(v.Pos, OpARM64ADDconst, x.Type)
 12830  		v0.AuxInt = int64ToAuxInt(c)
 12831  		v1 := b.NewValue0(v.Pos, OpARM64MNEGW, x.Type)
 12832  		v1.AddArg2(x, y)
 12833  		v0.AddArg(v1)
 12834  		v.AddArg(v0)
 12835  		return true
 12836  	}
 12837  	// match: (MSUBW a (MOVDconst [c]) (MOVDconst [d]))
 12838  	// result: (MOVWUreg (SUBconst <a.Type> [c*d] a))
 12839  	for {
 12840  		a := v_0
 12841  		if v_1.Op != OpARM64MOVDconst {
 12842  			break
 12843  		}
 12844  		c := auxIntToInt64(v_1.AuxInt)
 12845  		if v_2.Op != OpARM64MOVDconst {
 12846  			break
 12847  		}
 12848  		d := auxIntToInt64(v_2.AuxInt)
 12849  		v.reset(OpARM64MOVWUreg)
 12850  		v0 := b.NewValue0(v.Pos, OpARM64SUBconst, a.Type)
 12851  		v0.AuxInt = int64ToAuxInt(c * d)
 12852  		v0.AddArg(a)
 12853  		v.AddArg(v0)
 12854  		return true
 12855  	}
 12856  	return false
 12857  }
 12858  func rewriteValueARM64_OpARM64MUL(v *Value) bool {
 12859  	v_1 := v.Args[1]
 12860  	v_0 := v.Args[0]
 12861  	b := v.Block
 12862  	config := b.Func.Config
 12863  	// match: (MUL (NEG x) y)
 12864  	// result: (MNEG x y)
 12865  	for {
 12866  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12867  			if v_0.Op != OpARM64NEG {
 12868  				continue
 12869  			}
 12870  			x := v_0.Args[0]
 12871  			y := v_1
 12872  			v.reset(OpARM64MNEG)
 12873  			v.AddArg2(x, y)
 12874  			return true
 12875  		}
 12876  		break
 12877  	}
 12878  	// match: (MUL _ (MOVDconst [0]))
 12879  	// result: (MOVDconst [0])
 12880  	for {
 12881  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12882  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
 12883  				continue
 12884  			}
 12885  			v.reset(OpARM64MOVDconst)
 12886  			v.AuxInt = int64ToAuxInt(0)
 12887  			return true
 12888  		}
 12889  		break
 12890  	}
 12891  	// match: (MUL x (MOVDconst [1]))
 12892  	// result: x
 12893  	for {
 12894  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12895  			x := v_0
 12896  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 12897  				continue
 12898  			}
 12899  			v.copyOf(x)
 12900  			return true
 12901  		}
 12902  		break
 12903  	}
 12904  	// match: (MUL x (MOVDconst [c]))
 12905  	// cond: canMulStrengthReduce(config, c)
 12906  	// result: {mulStrengthReduce(v, x, c)}
 12907  	for {
 12908  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12909  			x := v_0
 12910  			if v_1.Op != OpARM64MOVDconst {
 12911  				continue
 12912  			}
 12913  			c := auxIntToInt64(v_1.AuxInt)
 12914  			if !(canMulStrengthReduce(config, c)) {
 12915  				continue
 12916  			}
 12917  			v.copyOf(mulStrengthReduce(v, x, c))
 12918  			return true
 12919  		}
 12920  		break
 12921  	}
 12922  	// match: (MUL (MOVDconst [c]) (MOVDconst [d]))
 12923  	// result: (MOVDconst [c*d])
 12924  	for {
 12925  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12926  			if v_0.Op != OpARM64MOVDconst {
 12927  				continue
 12928  			}
 12929  			c := auxIntToInt64(v_0.AuxInt)
 12930  			if v_1.Op != OpARM64MOVDconst {
 12931  				continue
 12932  			}
 12933  			d := auxIntToInt64(v_1.AuxInt)
 12934  			v.reset(OpARM64MOVDconst)
 12935  			v.AuxInt = int64ToAuxInt(c * d)
 12936  			return true
 12937  		}
 12938  		break
 12939  	}
 12940  	// match: (MUL r:(MOVWUreg x) s:(MOVWUreg y))
 12941  	// cond: r.Uses == 1 && s.Uses == 1
 12942  	// result: (UMULL x y)
 12943  	for {
 12944  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12945  			r := v_0
 12946  			if r.Op != OpARM64MOVWUreg {
 12947  				continue
 12948  			}
 12949  			x := r.Args[0]
 12950  			s := v_1
 12951  			if s.Op != OpARM64MOVWUreg {
 12952  				continue
 12953  			}
 12954  			y := s.Args[0]
 12955  			if !(r.Uses == 1 && s.Uses == 1) {
 12956  				continue
 12957  			}
 12958  			v.reset(OpARM64UMULL)
 12959  			v.AddArg2(x, y)
 12960  			return true
 12961  		}
 12962  		break
 12963  	}
 12964  	// match: (MUL r:(MOVWreg x) s:(MOVWreg y))
 12965  	// cond: r.Uses == 1 && s.Uses == 1
 12966  	// result: (MULL x y)
 12967  	for {
 12968  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12969  			r := v_0
 12970  			if r.Op != OpARM64MOVWreg {
 12971  				continue
 12972  			}
 12973  			x := r.Args[0]
 12974  			s := v_1
 12975  			if s.Op != OpARM64MOVWreg {
 12976  				continue
 12977  			}
 12978  			y := s.Args[0]
 12979  			if !(r.Uses == 1 && s.Uses == 1) {
 12980  				continue
 12981  			}
 12982  			v.reset(OpARM64MULL)
 12983  			v.AddArg2(x, y)
 12984  			return true
 12985  		}
 12986  		break
 12987  	}
 12988  	return false
 12989  }
 12990  func rewriteValueARM64_OpARM64MULW(v *Value) bool {
 12991  	v_1 := v.Args[1]
 12992  	v_0 := v.Args[0]
 12993  	b := v.Block
 12994  	config := b.Func.Config
 12995  	// match: (MULW (NEG x) y)
 12996  	// result: (MNEGW x y)
 12997  	for {
 12998  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 12999  			if v_0.Op != OpARM64NEG {
 13000  				continue
 13001  			}
 13002  			x := v_0.Args[0]
 13003  			y := v_1
 13004  			v.reset(OpARM64MNEGW)
 13005  			v.AddArg2(x, y)
 13006  			return true
 13007  		}
 13008  		break
 13009  	}
 13010  	// match: (MULW _ (MOVDconst [c]))
 13011  	// cond: int32(c)==0
 13012  	// result: (MOVDconst [0])
 13013  	for {
 13014  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13015  			if v_1.Op != OpARM64MOVDconst {
 13016  				continue
 13017  			}
 13018  			c := auxIntToInt64(v_1.AuxInt)
 13019  			if !(int32(c) == 0) {
 13020  				continue
 13021  			}
 13022  			v.reset(OpARM64MOVDconst)
 13023  			v.AuxInt = int64ToAuxInt(0)
 13024  			return true
 13025  		}
 13026  		break
 13027  	}
 13028  	// match: (MULW x (MOVDconst [c]))
 13029  	// cond: int32(c)==1
 13030  	// result: (MOVWUreg x)
 13031  	for {
 13032  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13033  			x := v_0
 13034  			if v_1.Op != OpARM64MOVDconst {
 13035  				continue
 13036  			}
 13037  			c := auxIntToInt64(v_1.AuxInt)
 13038  			if !(int32(c) == 1) {
 13039  				continue
 13040  			}
 13041  			v.reset(OpARM64MOVWUreg)
 13042  			v.AddArg(x)
 13043  			return true
 13044  		}
 13045  		break
 13046  	}
 13047  	// match: (MULW x (MOVDconst [c]))
 13048  	// cond: v.Type.Size() <= 4 && canMulStrengthReduce32(config, int32(c))
 13049  	// result: {mulStrengthReduce32(v, x, int32(c))}
 13050  	for {
 13051  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13052  			x := v_0
 13053  			if v_1.Op != OpARM64MOVDconst {
 13054  				continue
 13055  			}
 13056  			c := auxIntToInt64(v_1.AuxInt)
 13057  			if !(v.Type.Size() <= 4 && canMulStrengthReduce32(config, int32(c))) {
 13058  				continue
 13059  			}
 13060  			v.copyOf(mulStrengthReduce32(v, x, int32(c)))
 13061  			return true
 13062  		}
 13063  		break
 13064  	}
 13065  	// match: (MULW (MOVDconst [c]) (MOVDconst [d]))
 13066  	// result: (MOVDconst [int64(uint32(c*d))])
 13067  	for {
 13068  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13069  			if v_0.Op != OpARM64MOVDconst {
 13070  				continue
 13071  			}
 13072  			c := auxIntToInt64(v_0.AuxInt)
 13073  			if v_1.Op != OpARM64MOVDconst {
 13074  				continue
 13075  			}
 13076  			d := auxIntToInt64(v_1.AuxInt)
 13077  			v.reset(OpARM64MOVDconst)
 13078  			v.AuxInt = int64ToAuxInt(int64(uint32(c * d)))
 13079  			return true
 13080  		}
 13081  		break
 13082  	}
 13083  	return false
 13084  }
 13085  func rewriteValueARM64_OpARM64MVN(v *Value) bool {
 13086  	v_0 := v.Args[0]
 13087  	// match: (MVN (XOR x y))
 13088  	// result: (EON x y)
 13089  	for {
 13090  		if v_0.Op != OpARM64XOR {
 13091  			break
 13092  		}
 13093  		y := v_0.Args[1]
 13094  		x := v_0.Args[0]
 13095  		v.reset(OpARM64EON)
 13096  		v.AddArg2(x, y)
 13097  		return true
 13098  	}
 13099  	// match: (MVN (MOVDconst [c]))
 13100  	// result: (MOVDconst [^c])
 13101  	for {
 13102  		if v_0.Op != OpARM64MOVDconst {
 13103  			break
 13104  		}
 13105  		c := auxIntToInt64(v_0.AuxInt)
 13106  		v.reset(OpARM64MOVDconst)
 13107  		v.AuxInt = int64ToAuxInt(^c)
 13108  		return true
 13109  	}
 13110  	// match: (MVN x:(SLLconst [c] y))
 13111  	// cond: clobberIfDead(x)
 13112  	// result: (MVNshiftLL [c] y)
 13113  	for {
 13114  		x := v_0
 13115  		if x.Op != OpARM64SLLconst {
 13116  			break
 13117  		}
 13118  		c := auxIntToInt64(x.AuxInt)
 13119  		y := x.Args[0]
 13120  		if !(clobberIfDead(x)) {
 13121  			break
 13122  		}
 13123  		v.reset(OpARM64MVNshiftLL)
 13124  		v.AuxInt = int64ToAuxInt(c)
 13125  		v.AddArg(y)
 13126  		return true
 13127  	}
 13128  	// match: (MVN x:(SRLconst [c] y))
 13129  	// cond: clobberIfDead(x)
 13130  	// result: (MVNshiftRL [c] y)
 13131  	for {
 13132  		x := v_0
 13133  		if x.Op != OpARM64SRLconst {
 13134  			break
 13135  		}
 13136  		c := auxIntToInt64(x.AuxInt)
 13137  		y := x.Args[0]
 13138  		if !(clobberIfDead(x)) {
 13139  			break
 13140  		}
 13141  		v.reset(OpARM64MVNshiftRL)
 13142  		v.AuxInt = int64ToAuxInt(c)
 13143  		v.AddArg(y)
 13144  		return true
 13145  	}
 13146  	// match: (MVN x:(SRAconst [c] y))
 13147  	// cond: clobberIfDead(x)
 13148  	// result: (MVNshiftRA [c] y)
 13149  	for {
 13150  		x := v_0
 13151  		if x.Op != OpARM64SRAconst {
 13152  			break
 13153  		}
 13154  		c := auxIntToInt64(x.AuxInt)
 13155  		y := x.Args[0]
 13156  		if !(clobberIfDead(x)) {
 13157  			break
 13158  		}
 13159  		v.reset(OpARM64MVNshiftRA)
 13160  		v.AuxInt = int64ToAuxInt(c)
 13161  		v.AddArg(y)
 13162  		return true
 13163  	}
 13164  	// match: (MVN x:(RORconst [c] y))
 13165  	// cond: clobberIfDead(x)
 13166  	// result: (MVNshiftRO [c] y)
 13167  	for {
 13168  		x := v_0
 13169  		if x.Op != OpARM64RORconst {
 13170  			break
 13171  		}
 13172  		c := auxIntToInt64(x.AuxInt)
 13173  		y := x.Args[0]
 13174  		if !(clobberIfDead(x)) {
 13175  			break
 13176  		}
 13177  		v.reset(OpARM64MVNshiftRO)
 13178  		v.AuxInt = int64ToAuxInt(c)
 13179  		v.AddArg(y)
 13180  		return true
 13181  	}
 13182  	return false
 13183  }
 13184  func rewriteValueARM64_OpARM64MVNshiftLL(v *Value) bool {
 13185  	v_0 := v.Args[0]
 13186  	// match: (MVNshiftLL (MOVDconst [c]) [d])
 13187  	// result: (MOVDconst [^int64(uint64(c)<<uint64(d))])
 13188  	for {
 13189  		d := auxIntToInt64(v.AuxInt)
 13190  		if v_0.Op != OpARM64MOVDconst {
 13191  			break
 13192  		}
 13193  		c := auxIntToInt64(v_0.AuxInt)
 13194  		v.reset(OpARM64MOVDconst)
 13195  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 13196  		return true
 13197  	}
 13198  	return false
 13199  }
 13200  func rewriteValueARM64_OpARM64MVNshiftRA(v *Value) bool {
 13201  	v_0 := v.Args[0]
 13202  	// match: (MVNshiftRA (MOVDconst [c]) [d])
 13203  	// result: (MOVDconst [^(c>>uint64(d))])
 13204  	for {
 13205  		d := auxIntToInt64(v.AuxInt)
 13206  		if v_0.Op != OpARM64MOVDconst {
 13207  			break
 13208  		}
 13209  		c := auxIntToInt64(v_0.AuxInt)
 13210  		v.reset(OpARM64MOVDconst)
 13211  		v.AuxInt = int64ToAuxInt(^(c >> uint64(d)))
 13212  		return true
 13213  	}
 13214  	return false
 13215  }
 13216  func rewriteValueARM64_OpARM64MVNshiftRL(v *Value) bool {
 13217  	v_0 := v.Args[0]
 13218  	// match: (MVNshiftRL (MOVDconst [c]) [d])
 13219  	// result: (MOVDconst [^int64(uint64(c)>>uint64(d))])
 13220  	for {
 13221  		d := auxIntToInt64(v.AuxInt)
 13222  		if v_0.Op != OpARM64MOVDconst {
 13223  			break
 13224  		}
 13225  		c := auxIntToInt64(v_0.AuxInt)
 13226  		v.reset(OpARM64MOVDconst)
 13227  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 13228  		return true
 13229  	}
 13230  	return false
 13231  }
 13232  func rewriteValueARM64_OpARM64MVNshiftRO(v *Value) bool {
 13233  	v_0 := v.Args[0]
 13234  	// match: (MVNshiftRO (MOVDconst [c]) [d])
 13235  	// result: (MOVDconst [^rotateRight64(c, d)])
 13236  	for {
 13237  		d := auxIntToInt64(v.AuxInt)
 13238  		if v_0.Op != OpARM64MOVDconst {
 13239  			break
 13240  		}
 13241  		c := auxIntToInt64(v_0.AuxInt)
 13242  		v.reset(OpARM64MOVDconst)
 13243  		v.AuxInt = int64ToAuxInt(^rotateRight64(c, d))
 13244  		return true
 13245  	}
 13246  	return false
 13247  }
 13248  func rewriteValueARM64_OpARM64NEG(v *Value) bool {
 13249  	v_0 := v.Args[0]
 13250  	// match: (NEG (MUL x y))
 13251  	// result: (MNEG x y)
 13252  	for {
 13253  		if v_0.Op != OpARM64MUL {
 13254  			break
 13255  		}
 13256  		y := v_0.Args[1]
 13257  		x := v_0.Args[0]
 13258  		v.reset(OpARM64MNEG)
 13259  		v.AddArg2(x, y)
 13260  		return true
 13261  	}
 13262  	// match: (NEG (MULW x y))
 13263  	// cond: v.Type.Size() <= 4
 13264  	// result: (MNEGW x y)
 13265  	for {
 13266  		if v_0.Op != OpARM64MULW {
 13267  			break
 13268  		}
 13269  		y := v_0.Args[1]
 13270  		x := v_0.Args[0]
 13271  		if !(v.Type.Size() <= 4) {
 13272  			break
 13273  		}
 13274  		v.reset(OpARM64MNEGW)
 13275  		v.AddArg2(x, y)
 13276  		return true
 13277  	}
 13278  	// match: (NEG (SUB x y))
 13279  	// result: (SUB y x)
 13280  	for {
 13281  		if v_0.Op != OpARM64SUB {
 13282  			break
 13283  		}
 13284  		y := v_0.Args[1]
 13285  		x := v_0.Args[0]
 13286  		v.reset(OpARM64SUB)
 13287  		v.AddArg2(y, x)
 13288  		return true
 13289  	}
 13290  	// match: (NEG (NEG x))
 13291  	// result: x
 13292  	for {
 13293  		if v_0.Op != OpARM64NEG {
 13294  			break
 13295  		}
 13296  		x := v_0.Args[0]
 13297  		v.copyOf(x)
 13298  		return true
 13299  	}
 13300  	// match: (NEG (MOVDconst [c]))
 13301  	// result: (MOVDconst [-c])
 13302  	for {
 13303  		if v_0.Op != OpARM64MOVDconst {
 13304  			break
 13305  		}
 13306  		c := auxIntToInt64(v_0.AuxInt)
 13307  		v.reset(OpARM64MOVDconst)
 13308  		v.AuxInt = int64ToAuxInt(-c)
 13309  		return true
 13310  	}
 13311  	// match: (NEG x:(SLLconst [c] y))
 13312  	// cond: clobberIfDead(x)
 13313  	// result: (NEGshiftLL [c] y)
 13314  	for {
 13315  		x := v_0
 13316  		if x.Op != OpARM64SLLconst {
 13317  			break
 13318  		}
 13319  		c := auxIntToInt64(x.AuxInt)
 13320  		y := x.Args[0]
 13321  		if !(clobberIfDead(x)) {
 13322  			break
 13323  		}
 13324  		v.reset(OpARM64NEGshiftLL)
 13325  		v.AuxInt = int64ToAuxInt(c)
 13326  		v.AddArg(y)
 13327  		return true
 13328  	}
 13329  	// match: (NEG x:(SRLconst [c] y))
 13330  	// cond: clobberIfDead(x)
 13331  	// result: (NEGshiftRL [c] y)
 13332  	for {
 13333  		x := v_0
 13334  		if x.Op != OpARM64SRLconst {
 13335  			break
 13336  		}
 13337  		c := auxIntToInt64(x.AuxInt)
 13338  		y := x.Args[0]
 13339  		if !(clobberIfDead(x)) {
 13340  			break
 13341  		}
 13342  		v.reset(OpARM64NEGshiftRL)
 13343  		v.AuxInt = int64ToAuxInt(c)
 13344  		v.AddArg(y)
 13345  		return true
 13346  	}
 13347  	// match: (NEG x:(SRAconst [c] y))
 13348  	// cond: clobberIfDead(x)
 13349  	// result: (NEGshiftRA [c] y)
 13350  	for {
 13351  		x := v_0
 13352  		if x.Op != OpARM64SRAconst {
 13353  			break
 13354  		}
 13355  		c := auxIntToInt64(x.AuxInt)
 13356  		y := x.Args[0]
 13357  		if !(clobberIfDead(x)) {
 13358  			break
 13359  		}
 13360  		v.reset(OpARM64NEGshiftRA)
 13361  		v.AuxInt = int64ToAuxInt(c)
 13362  		v.AddArg(y)
 13363  		return true
 13364  	}
 13365  	return false
 13366  }
 13367  func rewriteValueARM64_OpARM64NEGshiftLL(v *Value) bool {
 13368  	v_0 := v.Args[0]
 13369  	// match: (NEGshiftLL (MOVDconst [c]) [d])
 13370  	// result: (MOVDconst [-int64(uint64(c)<<uint64(d))])
 13371  	for {
 13372  		d := auxIntToInt64(v.AuxInt)
 13373  		if v_0.Op != OpARM64MOVDconst {
 13374  			break
 13375  		}
 13376  		c := auxIntToInt64(v_0.AuxInt)
 13377  		v.reset(OpARM64MOVDconst)
 13378  		v.AuxInt = int64ToAuxInt(-int64(uint64(c) << uint64(d)))
 13379  		return true
 13380  	}
 13381  	return false
 13382  }
 13383  func rewriteValueARM64_OpARM64NEGshiftRA(v *Value) bool {
 13384  	v_0 := v.Args[0]
 13385  	// match: (NEGshiftRA (MOVDconst [c]) [d])
 13386  	// result: (MOVDconst [-(c>>uint64(d))])
 13387  	for {
 13388  		d := auxIntToInt64(v.AuxInt)
 13389  		if v_0.Op != OpARM64MOVDconst {
 13390  			break
 13391  		}
 13392  		c := auxIntToInt64(v_0.AuxInt)
 13393  		v.reset(OpARM64MOVDconst)
 13394  		v.AuxInt = int64ToAuxInt(-(c >> uint64(d)))
 13395  		return true
 13396  	}
 13397  	return false
 13398  }
 13399  func rewriteValueARM64_OpARM64NEGshiftRL(v *Value) bool {
 13400  	v_0 := v.Args[0]
 13401  	// match: (NEGshiftRL (MOVDconst [c]) [d])
 13402  	// result: (MOVDconst [-int64(uint64(c)>>uint64(d))])
 13403  	for {
 13404  		d := auxIntToInt64(v.AuxInt)
 13405  		if v_0.Op != OpARM64MOVDconst {
 13406  			break
 13407  		}
 13408  		c := auxIntToInt64(v_0.AuxInt)
 13409  		v.reset(OpARM64MOVDconst)
 13410  		v.AuxInt = int64ToAuxInt(-int64(uint64(c) >> uint64(d)))
 13411  		return true
 13412  	}
 13413  	return false
 13414  }
 13415  func rewriteValueARM64_OpARM64NotEqual(v *Value) bool {
 13416  	v_0 := v.Args[0]
 13417  	b := v.Block
 13418  	// match: (NotEqual (CMPconst [0] z:(AND x y)))
 13419  	// cond: z.Uses == 1
 13420  	// result: (NotEqual (TST x y))
 13421  	for {
 13422  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
 13423  			break
 13424  		}
 13425  		z := v_0.Args[0]
 13426  		if z.Op != OpARM64AND {
 13427  			break
 13428  		}
 13429  		y := z.Args[1]
 13430  		x := z.Args[0]
 13431  		if !(z.Uses == 1) {
 13432  			break
 13433  		}
 13434  		v.reset(OpARM64NotEqual)
 13435  		v0 := b.NewValue0(v.Pos, OpARM64TST, types.TypeFlags)
 13436  		v0.AddArg2(x, y)
 13437  		v.AddArg(v0)
 13438  		return true
 13439  	}
 13440  	// match: (NotEqual (CMPWconst [0] x:(ANDconst [c] y)))
 13441  	// cond: x.Uses == 1
 13442  	// result: (NotEqual (TSTWconst [int32(c)] y))
 13443  	for {
 13444  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
 13445  			break
 13446  		}
 13447  		x := v_0.Args[0]
 13448  		if x.Op != OpARM64ANDconst {
 13449  			break
 13450  		}
 13451  		c := auxIntToInt64(x.AuxInt)
 13452  		y := x.Args[0]
 13453  		if !(x.Uses == 1) {
 13454  			break
 13455  		}
 13456  		v.reset(OpARM64NotEqual)
 13457  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
 13458  		v0.AuxInt = int32ToAuxInt(int32(c))
 13459  		v0.AddArg(y)
 13460  		v.AddArg(v0)
 13461  		return true
 13462  	}
 13463  	// match: (NotEqual (CMPWconst [0] z:(AND x y)))
 13464  	// cond: z.Uses == 1
 13465  	// result: (NotEqual (TSTW x y))
 13466  	for {
 13467  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
 13468  			break
 13469  		}
 13470  		z := v_0.Args[0]
 13471  		if z.Op != OpARM64AND {
 13472  			break
 13473  		}
 13474  		y := z.Args[1]
 13475  		x := z.Args[0]
 13476  		if !(z.Uses == 1) {
 13477  			break
 13478  		}
 13479  		v.reset(OpARM64NotEqual)
 13480  		v0 := b.NewValue0(v.Pos, OpARM64TSTW, types.TypeFlags)
 13481  		v0.AddArg2(x, y)
 13482  		v.AddArg(v0)
 13483  		return true
 13484  	}
 13485  	// match: (NotEqual (CMPconst [0] x:(ANDconst [c] y)))
 13486  	// cond: x.Uses == 1
 13487  	// result: (NotEqual (TSTconst [c] y))
 13488  	for {
 13489  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
 13490  			break
 13491  		}
 13492  		x := v_0.Args[0]
 13493  		if x.Op != OpARM64ANDconst {
 13494  			break
 13495  		}
 13496  		c := auxIntToInt64(x.AuxInt)
 13497  		y := x.Args[0]
 13498  		if !(x.Uses == 1) {
 13499  			break
 13500  		}
 13501  		v.reset(OpARM64NotEqual)
 13502  		v0 := b.NewValue0(v.Pos, OpARM64TSTconst, types.TypeFlags)
 13503  		v0.AuxInt = int64ToAuxInt(c)
 13504  		v0.AddArg(y)
 13505  		v.AddArg(v0)
 13506  		return true
 13507  	}
 13508  	// match: (NotEqual (CMP x z:(NEG y)))
 13509  	// cond: z.Uses == 1
 13510  	// result: (NotEqual (CMN x y))
 13511  	for {
 13512  		if v_0.Op != OpARM64CMP {
 13513  			break
 13514  		}
 13515  		_ = v_0.Args[1]
 13516  		x := v_0.Args[0]
 13517  		z := v_0.Args[1]
 13518  		if z.Op != OpARM64NEG {
 13519  			break
 13520  		}
 13521  		y := z.Args[0]
 13522  		if !(z.Uses == 1) {
 13523  			break
 13524  		}
 13525  		v.reset(OpARM64NotEqual)
 13526  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
 13527  		v0.AddArg2(x, y)
 13528  		v.AddArg(v0)
 13529  		return true
 13530  	}
 13531  	// match: (NotEqual (CMPW x z:(NEG y)))
 13532  	// cond: z.Uses == 1
 13533  	// result: (NotEqual (CMNW x y))
 13534  	for {
 13535  		if v_0.Op != OpARM64CMPW {
 13536  			break
 13537  		}
 13538  		_ = v_0.Args[1]
 13539  		x := v_0.Args[0]
 13540  		z := v_0.Args[1]
 13541  		if z.Op != OpARM64NEG {
 13542  			break
 13543  		}
 13544  		y := z.Args[0]
 13545  		if !(z.Uses == 1) {
 13546  			break
 13547  		}
 13548  		v.reset(OpARM64NotEqual)
 13549  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
 13550  		v0.AddArg2(x, y)
 13551  		v.AddArg(v0)
 13552  		return true
 13553  	}
 13554  	// match: (NotEqual (CMPconst [0] x:(ADDconst [c] y)))
 13555  	// cond: x.Uses == 1
 13556  	// result: (NotEqual (CMNconst [c] y))
 13557  	for {
 13558  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
 13559  			break
 13560  		}
 13561  		x := v_0.Args[0]
 13562  		if x.Op != OpARM64ADDconst {
 13563  			break
 13564  		}
 13565  		c := auxIntToInt64(x.AuxInt)
 13566  		y := x.Args[0]
 13567  		if !(x.Uses == 1) {
 13568  			break
 13569  		}
 13570  		v.reset(OpARM64NotEqual)
 13571  		v0 := b.NewValue0(v.Pos, OpARM64CMNconst, types.TypeFlags)
 13572  		v0.AuxInt = int64ToAuxInt(c)
 13573  		v0.AddArg(y)
 13574  		v.AddArg(v0)
 13575  		return true
 13576  	}
 13577  	// match: (NotEqual (CMPWconst [0] x:(ADDconst [c] y)))
 13578  	// cond: x.Uses == 1
 13579  	// result: (NotEqual (CMNWconst [int32(c)] y))
 13580  	for {
 13581  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
 13582  			break
 13583  		}
 13584  		x := v_0.Args[0]
 13585  		if x.Op != OpARM64ADDconst {
 13586  			break
 13587  		}
 13588  		c := auxIntToInt64(x.AuxInt)
 13589  		y := x.Args[0]
 13590  		if !(x.Uses == 1) {
 13591  			break
 13592  		}
 13593  		v.reset(OpARM64NotEqual)
 13594  		v0 := b.NewValue0(v.Pos, OpARM64CMNWconst, types.TypeFlags)
 13595  		v0.AuxInt = int32ToAuxInt(int32(c))
 13596  		v0.AddArg(y)
 13597  		v.AddArg(v0)
 13598  		return true
 13599  	}
 13600  	// match: (NotEqual (CMPconst [0] z:(ADD x y)))
 13601  	// cond: z.Uses == 1
 13602  	// result: (NotEqual (CMN x y))
 13603  	for {
 13604  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
 13605  			break
 13606  		}
 13607  		z := v_0.Args[0]
 13608  		if z.Op != OpARM64ADD {
 13609  			break
 13610  		}
 13611  		y := z.Args[1]
 13612  		x := z.Args[0]
 13613  		if !(z.Uses == 1) {
 13614  			break
 13615  		}
 13616  		v.reset(OpARM64NotEqual)
 13617  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
 13618  		v0.AddArg2(x, y)
 13619  		v.AddArg(v0)
 13620  		return true
 13621  	}
 13622  	// match: (NotEqual (CMPWconst [0] z:(ADD x y)))
 13623  	// cond: z.Uses == 1
 13624  	// result: (NotEqual (CMNW x y))
 13625  	for {
 13626  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
 13627  			break
 13628  		}
 13629  		z := v_0.Args[0]
 13630  		if z.Op != OpARM64ADD {
 13631  			break
 13632  		}
 13633  		y := z.Args[1]
 13634  		x := z.Args[0]
 13635  		if !(z.Uses == 1) {
 13636  			break
 13637  		}
 13638  		v.reset(OpARM64NotEqual)
 13639  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
 13640  		v0.AddArg2(x, y)
 13641  		v.AddArg(v0)
 13642  		return true
 13643  	}
 13644  	// match: (NotEqual (CMPconst [0] z:(MADD a x y)))
 13645  	// cond: z.Uses == 1
 13646  	// result: (NotEqual (CMN a (MUL <x.Type> x y)))
 13647  	for {
 13648  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
 13649  			break
 13650  		}
 13651  		z := v_0.Args[0]
 13652  		if z.Op != OpARM64MADD {
 13653  			break
 13654  		}
 13655  		y := z.Args[2]
 13656  		a := z.Args[0]
 13657  		x := z.Args[1]
 13658  		if !(z.Uses == 1) {
 13659  			break
 13660  		}
 13661  		v.reset(OpARM64NotEqual)
 13662  		v0 := b.NewValue0(v.Pos, OpARM64CMN, types.TypeFlags)
 13663  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
 13664  		v1.AddArg2(x, y)
 13665  		v0.AddArg2(a, v1)
 13666  		v.AddArg(v0)
 13667  		return true
 13668  	}
 13669  	// match: (NotEqual (CMPconst [0] z:(MSUB a x y)))
 13670  	// cond: z.Uses == 1
 13671  	// result: (NotEqual (CMP a (MUL <x.Type> x y)))
 13672  	for {
 13673  		if v_0.Op != OpARM64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
 13674  			break
 13675  		}
 13676  		z := v_0.Args[0]
 13677  		if z.Op != OpARM64MSUB {
 13678  			break
 13679  		}
 13680  		y := z.Args[2]
 13681  		a := z.Args[0]
 13682  		x := z.Args[1]
 13683  		if !(z.Uses == 1) {
 13684  			break
 13685  		}
 13686  		v.reset(OpARM64NotEqual)
 13687  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 13688  		v1 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
 13689  		v1.AddArg2(x, y)
 13690  		v0.AddArg2(a, v1)
 13691  		v.AddArg(v0)
 13692  		return true
 13693  	}
 13694  	// match: (NotEqual (CMPWconst [0] z:(MADDW a x y)))
 13695  	// cond: z.Uses == 1
 13696  	// result: (NotEqual (CMNW a (MULW <x.Type> x y)))
 13697  	for {
 13698  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
 13699  			break
 13700  		}
 13701  		z := v_0.Args[0]
 13702  		if z.Op != OpARM64MADDW {
 13703  			break
 13704  		}
 13705  		y := z.Args[2]
 13706  		a := z.Args[0]
 13707  		x := z.Args[1]
 13708  		if !(z.Uses == 1) {
 13709  			break
 13710  		}
 13711  		v.reset(OpARM64NotEqual)
 13712  		v0 := b.NewValue0(v.Pos, OpARM64CMNW, types.TypeFlags)
 13713  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
 13714  		v1.AddArg2(x, y)
 13715  		v0.AddArg2(a, v1)
 13716  		v.AddArg(v0)
 13717  		return true
 13718  	}
 13719  	// match: (NotEqual (CMPWconst [0] z:(MSUBW a x y)))
 13720  	// cond: z.Uses == 1
 13721  	// result: (NotEqual (CMPW a (MULW <x.Type> x y)))
 13722  	for {
 13723  		if v_0.Op != OpARM64CMPWconst || auxIntToInt32(v_0.AuxInt) != 0 {
 13724  			break
 13725  		}
 13726  		z := v_0.Args[0]
 13727  		if z.Op != OpARM64MSUBW {
 13728  			break
 13729  		}
 13730  		y := z.Args[2]
 13731  		a := z.Args[0]
 13732  		x := z.Args[1]
 13733  		if !(z.Uses == 1) {
 13734  			break
 13735  		}
 13736  		v.reset(OpARM64NotEqual)
 13737  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 13738  		v1 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
 13739  		v1.AddArg2(x, y)
 13740  		v0.AddArg2(a, v1)
 13741  		v.AddArg(v0)
 13742  		return true
 13743  	}
 13744  	// match: (NotEqual (FlagConstant [fc]))
 13745  	// result: (MOVDconst [b2i(fc.ne())])
 13746  	for {
 13747  		if v_0.Op != OpARM64FlagConstant {
 13748  			break
 13749  		}
 13750  		fc := auxIntToFlagConstant(v_0.AuxInt)
 13751  		v.reset(OpARM64MOVDconst)
 13752  		v.AuxInt = int64ToAuxInt(b2i(fc.ne()))
 13753  		return true
 13754  	}
 13755  	// match: (NotEqual (InvertFlags x))
 13756  	// result: (NotEqual x)
 13757  	for {
 13758  		if v_0.Op != OpARM64InvertFlags {
 13759  			break
 13760  		}
 13761  		x := v_0.Args[0]
 13762  		v.reset(OpARM64NotEqual)
 13763  		v.AddArg(x)
 13764  		return true
 13765  	}
 13766  	return false
 13767  }
 13768  func rewriteValueARM64_OpARM64OR(v *Value) bool {
 13769  	v_1 := v.Args[1]
 13770  	v_0 := v.Args[0]
 13771  	// match: (OR x (MOVDconst [c]))
 13772  	// result: (ORconst [c] x)
 13773  	for {
 13774  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13775  			x := v_0
 13776  			if v_1.Op != OpARM64MOVDconst {
 13777  				continue
 13778  			}
 13779  			c := auxIntToInt64(v_1.AuxInt)
 13780  			v.reset(OpARM64ORconst)
 13781  			v.AuxInt = int64ToAuxInt(c)
 13782  			v.AddArg(x)
 13783  			return true
 13784  		}
 13785  		break
 13786  	}
 13787  	// match: (OR x x)
 13788  	// result: x
 13789  	for {
 13790  		x := v_0
 13791  		if x != v_1 {
 13792  			break
 13793  		}
 13794  		v.copyOf(x)
 13795  		return true
 13796  	}
 13797  	// match: (OR x (MVN y))
 13798  	// result: (ORN x y)
 13799  	for {
 13800  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13801  			x := v_0
 13802  			if v_1.Op != OpARM64MVN {
 13803  				continue
 13804  			}
 13805  			y := v_1.Args[0]
 13806  			v.reset(OpARM64ORN)
 13807  			v.AddArg2(x, y)
 13808  			return true
 13809  		}
 13810  		break
 13811  	}
 13812  	// match: (OR x0 x1:(SLLconst [c] y))
 13813  	// cond: clobberIfDead(x1)
 13814  	// result: (ORshiftLL x0 y [c])
 13815  	for {
 13816  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13817  			x0 := v_0
 13818  			x1 := v_1
 13819  			if x1.Op != OpARM64SLLconst {
 13820  				continue
 13821  			}
 13822  			c := auxIntToInt64(x1.AuxInt)
 13823  			y := x1.Args[0]
 13824  			if !(clobberIfDead(x1)) {
 13825  				continue
 13826  			}
 13827  			v.reset(OpARM64ORshiftLL)
 13828  			v.AuxInt = int64ToAuxInt(c)
 13829  			v.AddArg2(x0, y)
 13830  			return true
 13831  		}
 13832  		break
 13833  	}
 13834  	// match: (OR x0 x1:(SRLconst [c] y))
 13835  	// cond: clobberIfDead(x1)
 13836  	// result: (ORshiftRL x0 y [c])
 13837  	for {
 13838  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13839  			x0 := v_0
 13840  			x1 := v_1
 13841  			if x1.Op != OpARM64SRLconst {
 13842  				continue
 13843  			}
 13844  			c := auxIntToInt64(x1.AuxInt)
 13845  			y := x1.Args[0]
 13846  			if !(clobberIfDead(x1)) {
 13847  				continue
 13848  			}
 13849  			v.reset(OpARM64ORshiftRL)
 13850  			v.AuxInt = int64ToAuxInt(c)
 13851  			v.AddArg2(x0, y)
 13852  			return true
 13853  		}
 13854  		break
 13855  	}
 13856  	// match: (OR x0 x1:(SRAconst [c] y))
 13857  	// cond: clobberIfDead(x1)
 13858  	// result: (ORshiftRA x0 y [c])
 13859  	for {
 13860  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13861  			x0 := v_0
 13862  			x1 := v_1
 13863  			if x1.Op != OpARM64SRAconst {
 13864  				continue
 13865  			}
 13866  			c := auxIntToInt64(x1.AuxInt)
 13867  			y := x1.Args[0]
 13868  			if !(clobberIfDead(x1)) {
 13869  				continue
 13870  			}
 13871  			v.reset(OpARM64ORshiftRA)
 13872  			v.AuxInt = int64ToAuxInt(c)
 13873  			v.AddArg2(x0, y)
 13874  			return true
 13875  		}
 13876  		break
 13877  	}
 13878  	// match: (OR x0 x1:(RORconst [c] y))
 13879  	// cond: clobberIfDead(x1)
 13880  	// result: (ORshiftRO x0 y [c])
 13881  	for {
 13882  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13883  			x0 := v_0
 13884  			x1 := v_1
 13885  			if x1.Op != OpARM64RORconst {
 13886  				continue
 13887  			}
 13888  			c := auxIntToInt64(x1.AuxInt)
 13889  			y := x1.Args[0]
 13890  			if !(clobberIfDead(x1)) {
 13891  				continue
 13892  			}
 13893  			v.reset(OpARM64ORshiftRO)
 13894  			v.AuxInt = int64ToAuxInt(c)
 13895  			v.AddArg2(x0, y)
 13896  			return true
 13897  		}
 13898  		break
 13899  	}
 13900  	// match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
 13901  	// cond: ac == ^((1<<uint(bfc.width())-1) << uint(bfc.lsb()))
 13902  	// result: (BFI [bfc] y x)
 13903  	for {
 13904  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13905  			if v_0.Op != OpARM64UBFIZ {
 13906  				continue
 13907  			}
 13908  			bfc := auxIntToArm64BitField(v_0.AuxInt)
 13909  			x := v_0.Args[0]
 13910  			if v_1.Op != OpARM64ANDconst {
 13911  				continue
 13912  			}
 13913  			ac := auxIntToInt64(v_1.AuxInt)
 13914  			y := v_1.Args[0]
 13915  			if !(ac == ^((1<<uint(bfc.width()) - 1) << uint(bfc.lsb()))) {
 13916  				continue
 13917  			}
 13918  			v.reset(OpARM64BFI)
 13919  			v.AuxInt = arm64BitFieldToAuxInt(bfc)
 13920  			v.AddArg2(y, x)
 13921  			return true
 13922  		}
 13923  		break
 13924  	}
 13925  	// match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
 13926  	// cond: ac == ^(1<<uint(bfc.width())-1)
 13927  	// result: (BFXIL [bfc] y x)
 13928  	for {
 13929  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 13930  			if v_0.Op != OpARM64UBFX {
 13931  				continue
 13932  			}
 13933  			bfc := auxIntToArm64BitField(v_0.AuxInt)
 13934  			x := v_0.Args[0]
 13935  			if v_1.Op != OpARM64ANDconst {
 13936  				continue
 13937  			}
 13938  			ac := auxIntToInt64(v_1.AuxInt)
 13939  			y := v_1.Args[0]
 13940  			if !(ac == ^(1<<uint(bfc.width()) - 1)) {
 13941  				continue
 13942  			}
 13943  			v.reset(OpARM64BFXIL)
 13944  			v.AuxInt = arm64BitFieldToAuxInt(bfc)
 13945  			v.AddArg2(y, x)
 13946  			return true
 13947  		}
 13948  		break
 13949  	}
 13950  	return false
 13951  }
 13952  func rewriteValueARM64_OpARM64ORN(v *Value) bool {
 13953  	v_1 := v.Args[1]
 13954  	v_0 := v.Args[0]
 13955  	// match: (ORN x (MOVDconst [c]))
 13956  	// result: (ORconst [^c] x)
 13957  	for {
 13958  		x := v_0
 13959  		if v_1.Op != OpARM64MOVDconst {
 13960  			break
 13961  		}
 13962  		c := auxIntToInt64(v_1.AuxInt)
 13963  		v.reset(OpARM64ORconst)
 13964  		v.AuxInt = int64ToAuxInt(^c)
 13965  		v.AddArg(x)
 13966  		return true
 13967  	}
 13968  	// match: (ORN x x)
 13969  	// result: (MOVDconst [-1])
 13970  	for {
 13971  		x := v_0
 13972  		if x != v_1 {
 13973  			break
 13974  		}
 13975  		v.reset(OpARM64MOVDconst)
 13976  		v.AuxInt = int64ToAuxInt(-1)
 13977  		return true
 13978  	}
 13979  	// match: (ORN x0 x1:(SLLconst [c] y))
 13980  	// cond: clobberIfDead(x1)
 13981  	// result: (ORNshiftLL x0 y [c])
 13982  	for {
 13983  		x0 := v_0
 13984  		x1 := v_1
 13985  		if x1.Op != OpARM64SLLconst {
 13986  			break
 13987  		}
 13988  		c := auxIntToInt64(x1.AuxInt)
 13989  		y := x1.Args[0]
 13990  		if !(clobberIfDead(x1)) {
 13991  			break
 13992  		}
 13993  		v.reset(OpARM64ORNshiftLL)
 13994  		v.AuxInt = int64ToAuxInt(c)
 13995  		v.AddArg2(x0, y)
 13996  		return true
 13997  	}
 13998  	// match: (ORN x0 x1:(SRLconst [c] y))
 13999  	// cond: clobberIfDead(x1)
 14000  	// result: (ORNshiftRL x0 y [c])
 14001  	for {
 14002  		x0 := v_0
 14003  		x1 := v_1
 14004  		if x1.Op != OpARM64SRLconst {
 14005  			break
 14006  		}
 14007  		c := auxIntToInt64(x1.AuxInt)
 14008  		y := x1.Args[0]
 14009  		if !(clobberIfDead(x1)) {
 14010  			break
 14011  		}
 14012  		v.reset(OpARM64ORNshiftRL)
 14013  		v.AuxInt = int64ToAuxInt(c)
 14014  		v.AddArg2(x0, y)
 14015  		return true
 14016  	}
 14017  	// match: (ORN x0 x1:(SRAconst [c] y))
 14018  	// cond: clobberIfDead(x1)
 14019  	// result: (ORNshiftRA x0 y [c])
 14020  	for {
 14021  		x0 := v_0
 14022  		x1 := v_1
 14023  		if x1.Op != OpARM64SRAconst {
 14024  			break
 14025  		}
 14026  		c := auxIntToInt64(x1.AuxInt)
 14027  		y := x1.Args[0]
 14028  		if !(clobberIfDead(x1)) {
 14029  			break
 14030  		}
 14031  		v.reset(OpARM64ORNshiftRA)
 14032  		v.AuxInt = int64ToAuxInt(c)
 14033  		v.AddArg2(x0, y)
 14034  		return true
 14035  	}
 14036  	// match: (ORN x0 x1:(RORconst [c] y))
 14037  	// cond: clobberIfDead(x1)
 14038  	// result: (ORNshiftRO x0 y [c])
 14039  	for {
 14040  		x0 := v_0
 14041  		x1 := v_1
 14042  		if x1.Op != OpARM64RORconst {
 14043  			break
 14044  		}
 14045  		c := auxIntToInt64(x1.AuxInt)
 14046  		y := x1.Args[0]
 14047  		if !(clobberIfDead(x1)) {
 14048  			break
 14049  		}
 14050  		v.reset(OpARM64ORNshiftRO)
 14051  		v.AuxInt = int64ToAuxInt(c)
 14052  		v.AddArg2(x0, y)
 14053  		return true
 14054  	}
 14055  	return false
 14056  }
 14057  func rewriteValueARM64_OpARM64ORNshiftLL(v *Value) bool {
 14058  	v_1 := v.Args[1]
 14059  	v_0 := v.Args[0]
 14060  	// match: (ORNshiftLL x (MOVDconst [c]) [d])
 14061  	// result: (ORconst x [^int64(uint64(c)<<uint64(d))])
 14062  	for {
 14063  		d := auxIntToInt64(v.AuxInt)
 14064  		x := v_0
 14065  		if v_1.Op != OpARM64MOVDconst {
 14066  			break
 14067  		}
 14068  		c := auxIntToInt64(v_1.AuxInt)
 14069  		v.reset(OpARM64ORconst)
 14070  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 14071  		v.AddArg(x)
 14072  		return true
 14073  	}
 14074  	// match: (ORNshiftLL (SLLconst x [c]) x [c])
 14075  	// result: (MOVDconst [-1])
 14076  	for {
 14077  		c := auxIntToInt64(v.AuxInt)
 14078  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != c {
 14079  			break
 14080  		}
 14081  		x := v_0.Args[0]
 14082  		if x != v_1 {
 14083  			break
 14084  		}
 14085  		v.reset(OpARM64MOVDconst)
 14086  		v.AuxInt = int64ToAuxInt(-1)
 14087  		return true
 14088  	}
 14089  	return false
 14090  }
 14091  func rewriteValueARM64_OpARM64ORNshiftRA(v *Value) bool {
 14092  	v_1 := v.Args[1]
 14093  	v_0 := v.Args[0]
 14094  	// match: (ORNshiftRA x (MOVDconst [c]) [d])
 14095  	// result: (ORconst x [^(c>>uint64(d))])
 14096  	for {
 14097  		d := auxIntToInt64(v.AuxInt)
 14098  		x := v_0
 14099  		if v_1.Op != OpARM64MOVDconst {
 14100  			break
 14101  		}
 14102  		c := auxIntToInt64(v_1.AuxInt)
 14103  		v.reset(OpARM64ORconst)
 14104  		v.AuxInt = int64ToAuxInt(^(c >> uint64(d)))
 14105  		v.AddArg(x)
 14106  		return true
 14107  	}
 14108  	// match: (ORNshiftRA (SRAconst x [c]) x [c])
 14109  	// result: (MOVDconst [-1])
 14110  	for {
 14111  		c := auxIntToInt64(v.AuxInt)
 14112  		if v_0.Op != OpARM64SRAconst || auxIntToInt64(v_0.AuxInt) != c {
 14113  			break
 14114  		}
 14115  		x := v_0.Args[0]
 14116  		if x != v_1 {
 14117  			break
 14118  		}
 14119  		v.reset(OpARM64MOVDconst)
 14120  		v.AuxInt = int64ToAuxInt(-1)
 14121  		return true
 14122  	}
 14123  	return false
 14124  }
 14125  func rewriteValueARM64_OpARM64ORNshiftRL(v *Value) bool {
 14126  	v_1 := v.Args[1]
 14127  	v_0 := v.Args[0]
 14128  	// match: (ORNshiftRL x (MOVDconst [c]) [d])
 14129  	// result: (ORconst x [^int64(uint64(c)>>uint64(d))])
 14130  	for {
 14131  		d := auxIntToInt64(v.AuxInt)
 14132  		x := v_0
 14133  		if v_1.Op != OpARM64MOVDconst {
 14134  			break
 14135  		}
 14136  		c := auxIntToInt64(v_1.AuxInt)
 14137  		v.reset(OpARM64ORconst)
 14138  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 14139  		v.AddArg(x)
 14140  		return true
 14141  	}
 14142  	// match: (ORNshiftRL (SRLconst x [c]) x [c])
 14143  	// result: (MOVDconst [-1])
 14144  	for {
 14145  		c := auxIntToInt64(v.AuxInt)
 14146  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != c {
 14147  			break
 14148  		}
 14149  		x := v_0.Args[0]
 14150  		if x != v_1 {
 14151  			break
 14152  		}
 14153  		v.reset(OpARM64MOVDconst)
 14154  		v.AuxInt = int64ToAuxInt(-1)
 14155  		return true
 14156  	}
 14157  	return false
 14158  }
 14159  func rewriteValueARM64_OpARM64ORNshiftRO(v *Value) bool {
 14160  	v_1 := v.Args[1]
 14161  	v_0 := v.Args[0]
 14162  	// match: (ORNshiftRO x (MOVDconst [c]) [d])
 14163  	// result: (ORconst x [^rotateRight64(c, d)])
 14164  	for {
 14165  		d := auxIntToInt64(v.AuxInt)
 14166  		x := v_0
 14167  		if v_1.Op != OpARM64MOVDconst {
 14168  			break
 14169  		}
 14170  		c := auxIntToInt64(v_1.AuxInt)
 14171  		v.reset(OpARM64ORconst)
 14172  		v.AuxInt = int64ToAuxInt(^rotateRight64(c, d))
 14173  		v.AddArg(x)
 14174  		return true
 14175  	}
 14176  	// match: (ORNshiftRO (RORconst x [c]) x [c])
 14177  	// result: (MOVDconst [-1])
 14178  	for {
 14179  		c := auxIntToInt64(v.AuxInt)
 14180  		if v_0.Op != OpARM64RORconst || auxIntToInt64(v_0.AuxInt) != c {
 14181  			break
 14182  		}
 14183  		x := v_0.Args[0]
 14184  		if x != v_1 {
 14185  			break
 14186  		}
 14187  		v.reset(OpARM64MOVDconst)
 14188  		v.AuxInt = int64ToAuxInt(-1)
 14189  		return true
 14190  	}
 14191  	return false
 14192  }
 14193  func rewriteValueARM64_OpARM64ORconst(v *Value) bool {
 14194  	v_0 := v.Args[0]
 14195  	// match: (ORconst [0] x)
 14196  	// result: x
 14197  	for {
 14198  		if auxIntToInt64(v.AuxInt) != 0 {
 14199  			break
 14200  		}
 14201  		x := v_0
 14202  		v.copyOf(x)
 14203  		return true
 14204  	}
 14205  	// match: (ORconst [-1] _)
 14206  	// result: (MOVDconst [-1])
 14207  	for {
 14208  		if auxIntToInt64(v.AuxInt) != -1 {
 14209  			break
 14210  		}
 14211  		v.reset(OpARM64MOVDconst)
 14212  		v.AuxInt = int64ToAuxInt(-1)
 14213  		return true
 14214  	}
 14215  	// match: (ORconst [c] (MOVDconst [d]))
 14216  	// result: (MOVDconst [c|d])
 14217  	for {
 14218  		c := auxIntToInt64(v.AuxInt)
 14219  		if v_0.Op != OpARM64MOVDconst {
 14220  			break
 14221  		}
 14222  		d := auxIntToInt64(v_0.AuxInt)
 14223  		v.reset(OpARM64MOVDconst)
 14224  		v.AuxInt = int64ToAuxInt(c | d)
 14225  		return true
 14226  	}
 14227  	// match: (ORconst [c] (ORconst [d] x))
 14228  	// result: (ORconst [c|d] x)
 14229  	for {
 14230  		c := auxIntToInt64(v.AuxInt)
 14231  		if v_0.Op != OpARM64ORconst {
 14232  			break
 14233  		}
 14234  		d := auxIntToInt64(v_0.AuxInt)
 14235  		x := v_0.Args[0]
 14236  		v.reset(OpARM64ORconst)
 14237  		v.AuxInt = int64ToAuxInt(c | d)
 14238  		v.AddArg(x)
 14239  		return true
 14240  	}
 14241  	// match: (ORconst [c1] (ANDconst [c2] x))
 14242  	// cond: c2|c1 == ^0
 14243  	// result: (ORconst [c1] x)
 14244  	for {
 14245  		c1 := auxIntToInt64(v.AuxInt)
 14246  		if v_0.Op != OpARM64ANDconst {
 14247  			break
 14248  		}
 14249  		c2 := auxIntToInt64(v_0.AuxInt)
 14250  		x := v_0.Args[0]
 14251  		if !(c2|c1 == ^0) {
 14252  			break
 14253  		}
 14254  		v.reset(OpARM64ORconst)
 14255  		v.AuxInt = int64ToAuxInt(c1)
 14256  		v.AddArg(x)
 14257  		return true
 14258  	}
 14259  	return false
 14260  }
 14261  func rewriteValueARM64_OpARM64ORshiftLL(v *Value) bool {
 14262  	v_1 := v.Args[1]
 14263  	v_0 := v.Args[0]
 14264  	b := v.Block
 14265  	typ := &b.Func.Config.Types
 14266  	// match: (ORshiftLL (MOVDconst [c]) x [d])
 14267  	// result: (ORconst [c] (SLLconst <x.Type> x [d]))
 14268  	for {
 14269  		d := auxIntToInt64(v.AuxInt)
 14270  		if v_0.Op != OpARM64MOVDconst {
 14271  			break
 14272  		}
 14273  		c := auxIntToInt64(v_0.AuxInt)
 14274  		x := v_1
 14275  		v.reset(OpARM64ORconst)
 14276  		v.AuxInt = int64ToAuxInt(c)
 14277  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
 14278  		v0.AuxInt = int64ToAuxInt(d)
 14279  		v0.AddArg(x)
 14280  		v.AddArg(v0)
 14281  		return true
 14282  	}
 14283  	// match: (ORshiftLL x (MOVDconst [c]) [d])
 14284  	// result: (ORconst x [int64(uint64(c)<<uint64(d))])
 14285  	for {
 14286  		d := auxIntToInt64(v.AuxInt)
 14287  		x := v_0
 14288  		if v_1.Op != OpARM64MOVDconst {
 14289  			break
 14290  		}
 14291  		c := auxIntToInt64(v_1.AuxInt)
 14292  		v.reset(OpARM64ORconst)
 14293  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
 14294  		v.AddArg(x)
 14295  		return true
 14296  	}
 14297  	// match: (ORshiftLL y:(SLLconst x [c]) x [c])
 14298  	// result: y
 14299  	for {
 14300  		c := auxIntToInt64(v.AuxInt)
 14301  		y := v_0
 14302  		if y.Op != OpARM64SLLconst || auxIntToInt64(y.AuxInt) != c {
 14303  			break
 14304  		}
 14305  		x := y.Args[0]
 14306  		if x != v_1 {
 14307  			break
 14308  		}
 14309  		v.copyOf(y)
 14310  		return true
 14311  	}
 14312  	// match: (ORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [armBFAuxInt(8, 8)] x) x)
 14313  	// result: (REV16W x)
 14314  	for {
 14315  		if v.Type != typ.UInt16 || auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || v_0.Type != typ.UInt16 || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 8) {
 14316  			break
 14317  		}
 14318  		x := v_0.Args[0]
 14319  		if x != v_1 {
 14320  			break
 14321  		}
 14322  		v.reset(OpARM64REV16W)
 14323  		v.AddArg(x)
 14324  		return true
 14325  	}
 14326  	// match: (ORshiftLL [8] (UBFX [armBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 14327  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 14328  	// result: (REV16W x)
 14329  	for {
 14330  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 24) {
 14331  			break
 14332  		}
 14333  		v_0_0 := v_0.Args[0]
 14334  		if v_0_0.Op != OpARM64ANDconst {
 14335  			break
 14336  		}
 14337  		c1 := auxIntToInt64(v_0_0.AuxInt)
 14338  		x := v_0_0.Args[0]
 14339  		if v_1.Op != OpARM64ANDconst {
 14340  			break
 14341  		}
 14342  		c2 := auxIntToInt64(v_1.AuxInt)
 14343  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 14344  			break
 14345  		}
 14346  		v.reset(OpARM64REV16W)
 14347  		v.AddArg(x)
 14348  		return true
 14349  	}
 14350  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 14351  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 14352  	// result: (REV16 x)
 14353  	for {
 14354  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 8 {
 14355  			break
 14356  		}
 14357  		v_0_0 := v_0.Args[0]
 14358  		if v_0_0.Op != OpARM64ANDconst {
 14359  			break
 14360  		}
 14361  		c1 := auxIntToInt64(v_0_0.AuxInt)
 14362  		x := v_0_0.Args[0]
 14363  		if v_1.Op != OpARM64ANDconst {
 14364  			break
 14365  		}
 14366  		c2 := auxIntToInt64(v_1.AuxInt)
 14367  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 14368  			break
 14369  		}
 14370  		v.reset(OpARM64REV16)
 14371  		v.AddArg(x)
 14372  		return true
 14373  	}
 14374  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 14375  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 14376  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 14377  	for {
 14378  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 8 {
 14379  			break
 14380  		}
 14381  		v_0_0 := v_0.Args[0]
 14382  		if v_0_0.Op != OpARM64ANDconst {
 14383  			break
 14384  		}
 14385  		c1 := auxIntToInt64(v_0_0.AuxInt)
 14386  		x := v_0_0.Args[0]
 14387  		if v_1.Op != OpARM64ANDconst {
 14388  			break
 14389  		}
 14390  		c2 := auxIntToInt64(v_1.AuxInt)
 14391  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 14392  			break
 14393  		}
 14394  		v.reset(OpARM64REV16)
 14395  		v0 := b.NewValue0(v.Pos, OpARM64ANDconst, x.Type)
 14396  		v0.AuxInt = int64ToAuxInt(0xffffffff)
 14397  		v0.AddArg(x)
 14398  		v.AddArg(v0)
 14399  		return true
 14400  	}
 14401  	// match: ( ORshiftLL [c] (SRLconst x [64-c]) x2)
 14402  	// result: (EXTRconst [64-c] x2 x)
 14403  	for {
 14404  		c := auxIntToInt64(v.AuxInt)
 14405  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 64-c {
 14406  			break
 14407  		}
 14408  		x := v_0.Args[0]
 14409  		x2 := v_1
 14410  		v.reset(OpARM64EXTRconst)
 14411  		v.AuxInt = int64ToAuxInt(64 - c)
 14412  		v.AddArg2(x2, x)
 14413  		return true
 14414  	}
 14415  	// match: ( ORshiftLL <t> [c] (UBFX [bfc] x) x2)
 14416  	// cond: c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
 14417  	// result: (EXTRWconst [32-c] x2 x)
 14418  	for {
 14419  		t := v.Type
 14420  		c := auxIntToInt64(v.AuxInt)
 14421  		if v_0.Op != OpARM64UBFX {
 14422  			break
 14423  		}
 14424  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 14425  		x := v_0.Args[0]
 14426  		x2 := v_1
 14427  		if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
 14428  			break
 14429  		}
 14430  		v.reset(OpARM64EXTRWconst)
 14431  		v.AuxInt = int64ToAuxInt(32 - c)
 14432  		v.AddArg2(x2, x)
 14433  		return true
 14434  	}
 14435  	// match: (ORshiftLL [s] (ANDconst [xc] x) (ANDconst [yc] y))
 14436  	// cond: xc == ^(yc << s) && yc & (yc+1) == 0 && yc > 0 && s+log64(yc+1) <= 64
 14437  	// result: (BFI [armBFAuxInt(s, log64(yc+1))] x y)
 14438  	for {
 14439  		s := auxIntToInt64(v.AuxInt)
 14440  		if v_0.Op != OpARM64ANDconst {
 14441  			break
 14442  		}
 14443  		xc := auxIntToInt64(v_0.AuxInt)
 14444  		x := v_0.Args[0]
 14445  		if v_1.Op != OpARM64ANDconst {
 14446  			break
 14447  		}
 14448  		yc := auxIntToInt64(v_1.AuxInt)
 14449  		y := v_1.Args[0]
 14450  		if !(xc == ^(yc<<s) && yc&(yc+1) == 0 && yc > 0 && s+log64(yc+1) <= 64) {
 14451  			break
 14452  		}
 14453  		v.reset(OpARM64BFI)
 14454  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(s, log64(yc+1)))
 14455  		v.AddArg2(x, y)
 14456  		return true
 14457  	}
 14458  	// match: (ORshiftLL [sc] (UBFX [bfc] x) (SRLconst [sc] y))
 14459  	// cond: sc == bfc.width()
 14460  	// result: (BFXIL [bfc] y x)
 14461  	for {
 14462  		sc := auxIntToInt64(v.AuxInt)
 14463  		if v_0.Op != OpARM64UBFX {
 14464  			break
 14465  		}
 14466  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 14467  		x := v_0.Args[0]
 14468  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != sc {
 14469  			break
 14470  		}
 14471  		y := v_1.Args[0]
 14472  		if !(sc == bfc.width()) {
 14473  			break
 14474  		}
 14475  		v.reset(OpARM64BFXIL)
 14476  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
 14477  		v.AddArg2(y, x)
 14478  		return true
 14479  	}
 14480  	return false
 14481  }
 14482  func rewriteValueARM64_OpARM64ORshiftRA(v *Value) bool {
 14483  	v_1 := v.Args[1]
 14484  	v_0 := v.Args[0]
 14485  	b := v.Block
 14486  	// match: (ORshiftRA (MOVDconst [c]) x [d])
 14487  	// result: (ORconst [c] (SRAconst <x.Type> x [d]))
 14488  	for {
 14489  		d := auxIntToInt64(v.AuxInt)
 14490  		if v_0.Op != OpARM64MOVDconst {
 14491  			break
 14492  		}
 14493  		c := auxIntToInt64(v_0.AuxInt)
 14494  		x := v_1
 14495  		v.reset(OpARM64ORconst)
 14496  		v.AuxInt = int64ToAuxInt(c)
 14497  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
 14498  		v0.AuxInt = int64ToAuxInt(d)
 14499  		v0.AddArg(x)
 14500  		v.AddArg(v0)
 14501  		return true
 14502  	}
 14503  	// match: (ORshiftRA x (MOVDconst [c]) [d])
 14504  	// result: (ORconst x [c>>uint64(d)])
 14505  	for {
 14506  		d := auxIntToInt64(v.AuxInt)
 14507  		x := v_0
 14508  		if v_1.Op != OpARM64MOVDconst {
 14509  			break
 14510  		}
 14511  		c := auxIntToInt64(v_1.AuxInt)
 14512  		v.reset(OpARM64ORconst)
 14513  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
 14514  		v.AddArg(x)
 14515  		return true
 14516  	}
 14517  	// match: (ORshiftRA y:(SRAconst x [c]) x [c])
 14518  	// result: y
 14519  	for {
 14520  		c := auxIntToInt64(v.AuxInt)
 14521  		y := v_0
 14522  		if y.Op != OpARM64SRAconst || auxIntToInt64(y.AuxInt) != c {
 14523  			break
 14524  		}
 14525  		x := y.Args[0]
 14526  		if x != v_1 {
 14527  			break
 14528  		}
 14529  		v.copyOf(y)
 14530  		return true
 14531  	}
 14532  	return false
 14533  }
 14534  func rewriteValueARM64_OpARM64ORshiftRL(v *Value) bool {
 14535  	v_1 := v.Args[1]
 14536  	v_0 := v.Args[0]
 14537  	b := v.Block
 14538  	// match: (ORshiftRL (MOVDconst [c]) x [d])
 14539  	// result: (ORconst [c] (SRLconst <x.Type> x [d]))
 14540  	for {
 14541  		d := auxIntToInt64(v.AuxInt)
 14542  		if v_0.Op != OpARM64MOVDconst {
 14543  			break
 14544  		}
 14545  		c := auxIntToInt64(v_0.AuxInt)
 14546  		x := v_1
 14547  		v.reset(OpARM64ORconst)
 14548  		v.AuxInt = int64ToAuxInt(c)
 14549  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
 14550  		v0.AuxInt = int64ToAuxInt(d)
 14551  		v0.AddArg(x)
 14552  		v.AddArg(v0)
 14553  		return true
 14554  	}
 14555  	// match: (ORshiftRL x (MOVDconst [c]) [d])
 14556  	// result: (ORconst x [int64(uint64(c)>>uint64(d))])
 14557  	for {
 14558  		d := auxIntToInt64(v.AuxInt)
 14559  		x := v_0
 14560  		if v_1.Op != OpARM64MOVDconst {
 14561  			break
 14562  		}
 14563  		c := auxIntToInt64(v_1.AuxInt)
 14564  		v.reset(OpARM64ORconst)
 14565  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 14566  		v.AddArg(x)
 14567  		return true
 14568  	}
 14569  	// match: (ORshiftRL y:(SRLconst x [c]) x [c])
 14570  	// result: y
 14571  	for {
 14572  		c := auxIntToInt64(v.AuxInt)
 14573  		y := v_0
 14574  		if y.Op != OpARM64SRLconst || auxIntToInt64(y.AuxInt) != c {
 14575  			break
 14576  		}
 14577  		x := y.Args[0]
 14578  		if x != v_1 {
 14579  			break
 14580  		}
 14581  		v.copyOf(y)
 14582  		return true
 14583  	}
 14584  	// match: (ORshiftRL [rc] (ANDconst [ac] x) (SLLconst [lc] y))
 14585  	// cond: lc > rc && ac == ^((1<<uint(64-lc)-1) << uint64(lc-rc))
 14586  	// result: (BFI [armBFAuxInt(lc-rc, 64-lc)] x y)
 14587  	for {
 14588  		rc := auxIntToInt64(v.AuxInt)
 14589  		if v_0.Op != OpARM64ANDconst {
 14590  			break
 14591  		}
 14592  		ac := auxIntToInt64(v_0.AuxInt)
 14593  		x := v_0.Args[0]
 14594  		if v_1.Op != OpARM64SLLconst {
 14595  			break
 14596  		}
 14597  		lc := auxIntToInt64(v_1.AuxInt)
 14598  		y := v_1.Args[0]
 14599  		if !(lc > rc && ac == ^((1<<uint(64-lc)-1)<<uint64(lc-rc))) {
 14600  			break
 14601  		}
 14602  		v.reset(OpARM64BFI)
 14603  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc-rc, 64-lc))
 14604  		v.AddArg2(x, y)
 14605  		return true
 14606  	}
 14607  	// match: (ORshiftRL [rc] (ANDconst [ac] y) (SLLconst [lc] x))
 14608  	// cond: lc < rc && ac == ^((1<<uint(64-rc)-1))
 14609  	// result: (BFXIL [armBFAuxInt(rc-lc, 64-rc)] y x)
 14610  	for {
 14611  		rc := auxIntToInt64(v.AuxInt)
 14612  		if v_0.Op != OpARM64ANDconst {
 14613  			break
 14614  		}
 14615  		ac := auxIntToInt64(v_0.AuxInt)
 14616  		y := v_0.Args[0]
 14617  		if v_1.Op != OpARM64SLLconst {
 14618  			break
 14619  		}
 14620  		lc := auxIntToInt64(v_1.AuxInt)
 14621  		x := v_1.Args[0]
 14622  		if !(lc < rc && ac == ^(1<<uint(64-rc)-1)) {
 14623  			break
 14624  		}
 14625  		v.reset(OpARM64BFXIL)
 14626  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc-lc, 64-rc))
 14627  		v.AddArg2(y, x)
 14628  		return true
 14629  	}
 14630  	return false
 14631  }
 14632  func rewriteValueARM64_OpARM64ORshiftRO(v *Value) bool {
 14633  	v_1 := v.Args[1]
 14634  	v_0 := v.Args[0]
 14635  	b := v.Block
 14636  	// match: (ORshiftRO (MOVDconst [c]) x [d])
 14637  	// result: (ORconst [c] (RORconst <x.Type> x [d]))
 14638  	for {
 14639  		d := auxIntToInt64(v.AuxInt)
 14640  		if v_0.Op != OpARM64MOVDconst {
 14641  			break
 14642  		}
 14643  		c := auxIntToInt64(v_0.AuxInt)
 14644  		x := v_1
 14645  		v.reset(OpARM64ORconst)
 14646  		v.AuxInt = int64ToAuxInt(c)
 14647  		v0 := b.NewValue0(v.Pos, OpARM64RORconst, x.Type)
 14648  		v0.AuxInt = int64ToAuxInt(d)
 14649  		v0.AddArg(x)
 14650  		v.AddArg(v0)
 14651  		return true
 14652  	}
 14653  	// match: (ORshiftRO x (MOVDconst [c]) [d])
 14654  	// result: (ORconst x [rotateRight64(c, d)])
 14655  	for {
 14656  		d := auxIntToInt64(v.AuxInt)
 14657  		x := v_0
 14658  		if v_1.Op != OpARM64MOVDconst {
 14659  			break
 14660  		}
 14661  		c := auxIntToInt64(v_1.AuxInt)
 14662  		v.reset(OpARM64ORconst)
 14663  		v.AuxInt = int64ToAuxInt(rotateRight64(c, d))
 14664  		v.AddArg(x)
 14665  		return true
 14666  	}
 14667  	// match: (ORshiftRO y:(RORconst x [c]) x [c])
 14668  	// result: y
 14669  	for {
 14670  		c := auxIntToInt64(v.AuxInt)
 14671  		y := v_0
 14672  		if y.Op != OpARM64RORconst || auxIntToInt64(y.AuxInt) != c {
 14673  			break
 14674  		}
 14675  		x := y.Args[0]
 14676  		if x != v_1 {
 14677  			break
 14678  		}
 14679  		v.copyOf(y)
 14680  		return true
 14681  	}
 14682  	return false
 14683  }
 14684  func rewriteValueARM64_OpARM64REV(v *Value) bool {
 14685  	v_0 := v.Args[0]
 14686  	// match: (REV (REV p))
 14687  	// result: p
 14688  	for {
 14689  		if v_0.Op != OpARM64REV {
 14690  			break
 14691  		}
 14692  		p := v_0.Args[0]
 14693  		v.copyOf(p)
 14694  		return true
 14695  	}
 14696  	return false
 14697  }
 14698  func rewriteValueARM64_OpARM64REV16(v *Value) bool {
 14699  	v_0 := v.Args[0]
 14700  	// match: (REV16 (MOVWUreg x))
 14701  	// result: (REV16W x)
 14702  	for {
 14703  		if v_0.Op != OpARM64MOVWUreg {
 14704  			break
 14705  		}
 14706  		x := v_0.Args[0]
 14707  		v.reset(OpARM64REV16W)
 14708  		v.AddArg(x)
 14709  		return true
 14710  	}
 14711  	return false
 14712  }
 14713  func rewriteValueARM64_OpARM64REVW(v *Value) bool {
 14714  	v_0 := v.Args[0]
 14715  	// match: (REVW (REVW p))
 14716  	// result: p
 14717  	for {
 14718  		if v_0.Op != OpARM64REVW {
 14719  			break
 14720  		}
 14721  		p := v_0.Args[0]
 14722  		v.copyOf(p)
 14723  		return true
 14724  	}
 14725  	return false
 14726  }
 14727  func rewriteValueARM64_OpARM64ROR(v *Value) bool {
 14728  	v_1 := v.Args[1]
 14729  	v_0 := v.Args[0]
 14730  	// match: (ROR x (MOVDconst [c]))
 14731  	// result: (RORconst x [c&63])
 14732  	for {
 14733  		x := v_0
 14734  		if v_1.Op != OpARM64MOVDconst {
 14735  			break
 14736  		}
 14737  		c := auxIntToInt64(v_1.AuxInt)
 14738  		v.reset(OpARM64RORconst)
 14739  		v.AuxInt = int64ToAuxInt(c & 63)
 14740  		v.AddArg(x)
 14741  		return true
 14742  	}
 14743  	return false
 14744  }
 14745  func rewriteValueARM64_OpARM64RORW(v *Value) bool {
 14746  	v_1 := v.Args[1]
 14747  	v_0 := v.Args[0]
 14748  	// match: (RORW x (MOVDconst [c]))
 14749  	// result: (RORWconst x [c&31])
 14750  	for {
 14751  		x := v_0
 14752  		if v_1.Op != OpARM64MOVDconst {
 14753  			break
 14754  		}
 14755  		c := auxIntToInt64(v_1.AuxInt)
 14756  		v.reset(OpARM64RORWconst)
 14757  		v.AuxInt = int64ToAuxInt(c & 31)
 14758  		v.AddArg(x)
 14759  		return true
 14760  	}
 14761  	return false
 14762  }
 14763  func rewriteValueARM64_OpARM64SBCSflags(v *Value) bool {
 14764  	v_2 := v.Args[2]
 14765  	v_1 := v.Args[1]
 14766  	v_0 := v.Args[0]
 14767  	b := v.Block
 14768  	typ := &b.Func.Config.Types
 14769  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo)))))
 14770  	// result: (SBCSflags x y bo)
 14771  	for {
 14772  		x := v_0
 14773  		y := v_1
 14774  		if v_2.Op != OpSelect1 || v_2.Type != types.TypeFlags {
 14775  			break
 14776  		}
 14777  		v_2_0 := v_2.Args[0]
 14778  		if v_2_0.Op != OpARM64NEGSflags {
 14779  			break
 14780  		}
 14781  		v_2_0_0 := v_2_0.Args[0]
 14782  		if v_2_0_0.Op != OpARM64NEG || v_2_0_0.Type != typ.UInt64 {
 14783  			break
 14784  		}
 14785  		v_2_0_0_0 := v_2_0_0.Args[0]
 14786  		if v_2_0_0_0.Op != OpARM64NGCzerocarry || v_2_0_0_0.Type != typ.UInt64 {
 14787  			break
 14788  		}
 14789  		bo := v_2_0_0_0.Args[0]
 14790  		v.reset(OpARM64SBCSflags)
 14791  		v.AddArg3(x, y, bo)
 14792  		return true
 14793  	}
 14794  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0]))))
 14795  	// result: (SUBSflags x y)
 14796  	for {
 14797  		x := v_0
 14798  		y := v_1
 14799  		if v_2.Op != OpSelect1 || v_2.Type != types.TypeFlags {
 14800  			break
 14801  		}
 14802  		v_2_0 := v_2.Args[0]
 14803  		if v_2_0.Op != OpARM64NEGSflags {
 14804  			break
 14805  		}
 14806  		v_2_0_0 := v_2_0.Args[0]
 14807  		if v_2_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_2_0_0.AuxInt) != 0 {
 14808  			break
 14809  		}
 14810  		v.reset(OpARM64SUBSflags)
 14811  		v.AddArg2(x, y)
 14812  		return true
 14813  	}
 14814  	return false
 14815  }
 14816  func rewriteValueARM64_OpARM64SBFX(v *Value) bool {
 14817  	v_0 := v.Args[0]
 14818  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 14819  	// cond: s.Uses == 1 && sc <= bfc.lsb()
 14820  	// result: (SBFX [armBFAuxInt(bfc.lsb() - sc, bfc.width())] x)
 14821  	for {
 14822  		bfc := auxIntToArm64BitField(v.AuxInt)
 14823  		s := v_0
 14824  		if s.Op != OpARM64SLLconst {
 14825  			break
 14826  		}
 14827  		sc := auxIntToInt64(s.AuxInt)
 14828  		x := s.Args[0]
 14829  		if !(s.Uses == 1 && sc <= bfc.lsb()) {
 14830  			break
 14831  		}
 14832  		v.reset(OpARM64SBFX)
 14833  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()-sc, bfc.width()))
 14834  		v.AddArg(x)
 14835  		return true
 14836  	}
 14837  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 14838  	// cond: s.Uses == 1 && sc > bfc.lsb()
 14839  	// result: (SBFIZ [armBFAuxInt(sc - bfc.lsb(), bfc.width() - (sc-bfc.lsb()))] x)
 14840  	for {
 14841  		bfc := auxIntToArm64BitField(v.AuxInt)
 14842  		s := v_0
 14843  		if s.Op != OpARM64SLLconst {
 14844  			break
 14845  		}
 14846  		sc := auxIntToInt64(s.AuxInt)
 14847  		x := s.Args[0]
 14848  		if !(s.Uses == 1 && sc > bfc.lsb()) {
 14849  			break
 14850  		}
 14851  		v.reset(OpARM64SBFIZ)
 14852  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc-bfc.lsb(), bfc.width()-(sc-bfc.lsb())))
 14853  		v.AddArg(x)
 14854  		return true
 14855  	}
 14856  	return false
 14857  }
 14858  func rewriteValueARM64_OpARM64SLL(v *Value) bool {
 14859  	v_1 := v.Args[1]
 14860  	v_0 := v.Args[0]
 14861  	// match: (SLL x (MOVDconst [c]))
 14862  	// result: (SLLconst x [c&63])
 14863  	for {
 14864  		x := v_0
 14865  		if v_1.Op != OpARM64MOVDconst {
 14866  			break
 14867  		}
 14868  		c := auxIntToInt64(v_1.AuxInt)
 14869  		v.reset(OpARM64SLLconst)
 14870  		v.AuxInt = int64ToAuxInt(c & 63)
 14871  		v.AddArg(x)
 14872  		return true
 14873  	}
 14874  	// match: (SLL x (ANDconst [63] y))
 14875  	// result: (SLL x y)
 14876  	for {
 14877  		x := v_0
 14878  		if v_1.Op != OpARM64ANDconst || auxIntToInt64(v_1.AuxInt) != 63 {
 14879  			break
 14880  		}
 14881  		y := v_1.Args[0]
 14882  		v.reset(OpARM64SLL)
 14883  		v.AddArg2(x, y)
 14884  		return true
 14885  	}
 14886  	return false
 14887  }
 14888  func rewriteValueARM64_OpARM64SLLconst(v *Value) bool {
 14889  	v_0 := v.Args[0]
 14890  	// match: (SLLconst [c] (MOVDconst [d]))
 14891  	// result: (MOVDconst [d<<uint64(c)])
 14892  	for {
 14893  		c := auxIntToInt64(v.AuxInt)
 14894  		if v_0.Op != OpARM64MOVDconst {
 14895  			break
 14896  		}
 14897  		d := auxIntToInt64(v_0.AuxInt)
 14898  		v.reset(OpARM64MOVDconst)
 14899  		v.AuxInt = int64ToAuxInt(d << uint64(c))
 14900  		return true
 14901  	}
 14902  	// match: (SLLconst [c] (SRLconst [c] x))
 14903  	// cond: 0 < c && c < 64
 14904  	// result: (ANDconst [^(1<<uint(c)-1)] x)
 14905  	for {
 14906  		c := auxIntToInt64(v.AuxInt)
 14907  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != c {
 14908  			break
 14909  		}
 14910  		x := v_0.Args[0]
 14911  		if !(0 < c && c < 64) {
 14912  			break
 14913  		}
 14914  		v.reset(OpARM64ANDconst)
 14915  		v.AuxInt = int64ToAuxInt(^(1<<uint(c) - 1))
 14916  		v.AddArg(x)
 14917  		return true
 14918  	}
 14919  	// match: (SLLconst [lc] (MOVWreg x))
 14920  	// result: (SBFIZ [armBFAuxInt(lc, min(32, 64-lc))] x)
 14921  	for {
 14922  		lc := auxIntToInt64(v.AuxInt)
 14923  		if v_0.Op != OpARM64MOVWreg {
 14924  			break
 14925  		}
 14926  		x := v_0.Args[0]
 14927  		v.reset(OpARM64SBFIZ)
 14928  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, min(32, 64-lc)))
 14929  		v.AddArg(x)
 14930  		return true
 14931  	}
 14932  	// match: (SLLconst [lc] (MOVHreg x))
 14933  	// result: (SBFIZ [armBFAuxInt(lc, min(16, 64-lc))] x)
 14934  	for {
 14935  		lc := auxIntToInt64(v.AuxInt)
 14936  		if v_0.Op != OpARM64MOVHreg {
 14937  			break
 14938  		}
 14939  		x := v_0.Args[0]
 14940  		v.reset(OpARM64SBFIZ)
 14941  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, min(16, 64-lc)))
 14942  		v.AddArg(x)
 14943  		return true
 14944  	}
 14945  	// match: (SLLconst [lc] (MOVBreg x))
 14946  	// result: (SBFIZ [armBFAuxInt(lc, min(8, 64-lc))] x)
 14947  	for {
 14948  		lc := auxIntToInt64(v.AuxInt)
 14949  		if v_0.Op != OpARM64MOVBreg {
 14950  			break
 14951  		}
 14952  		x := v_0.Args[0]
 14953  		v.reset(OpARM64SBFIZ)
 14954  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, min(8, 64-lc)))
 14955  		v.AddArg(x)
 14956  		return true
 14957  	}
 14958  	// match: (SLLconst [lc] (MOVWUreg x))
 14959  	// result: (UBFIZ [armBFAuxInt(lc, min(32, 64-lc))] x)
 14960  	for {
 14961  		lc := auxIntToInt64(v.AuxInt)
 14962  		if v_0.Op != OpARM64MOVWUreg {
 14963  			break
 14964  		}
 14965  		x := v_0.Args[0]
 14966  		v.reset(OpARM64UBFIZ)
 14967  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, min(32, 64-lc)))
 14968  		v.AddArg(x)
 14969  		return true
 14970  	}
 14971  	// match: (SLLconst [lc] (MOVHUreg x))
 14972  	// result: (UBFIZ [armBFAuxInt(lc, min(16, 64-lc))] x)
 14973  	for {
 14974  		lc := auxIntToInt64(v.AuxInt)
 14975  		if v_0.Op != OpARM64MOVHUreg {
 14976  			break
 14977  		}
 14978  		x := v_0.Args[0]
 14979  		v.reset(OpARM64UBFIZ)
 14980  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, min(16, 64-lc)))
 14981  		v.AddArg(x)
 14982  		return true
 14983  	}
 14984  	// match: (SLLconst [lc] (MOVBUreg x))
 14985  	// result: (UBFIZ [armBFAuxInt(lc, min(8, 64-lc))] x)
 14986  	for {
 14987  		lc := auxIntToInt64(v.AuxInt)
 14988  		if v_0.Op != OpARM64MOVBUreg {
 14989  			break
 14990  		}
 14991  		x := v_0.Args[0]
 14992  		v.reset(OpARM64UBFIZ)
 14993  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, min(8, 64-lc)))
 14994  		v.AddArg(x)
 14995  		return true
 14996  	}
 14997  	// match: (SLLconst [sc] (ANDconst [ac] x))
 14998  	// cond: isARM64BFMask(sc, ac, 0)
 14999  	// result: (UBFIZ [armBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
 15000  	for {
 15001  		sc := auxIntToInt64(v.AuxInt)
 15002  		if v_0.Op != OpARM64ANDconst {
 15003  			break
 15004  		}
 15005  		ac := auxIntToInt64(v_0.AuxInt)
 15006  		x := v_0.Args[0]
 15007  		if !(isARM64BFMask(sc, ac, 0)) {
 15008  			break
 15009  		}
 15010  		v.reset(OpARM64UBFIZ)
 15011  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, 0)))
 15012  		v.AddArg(x)
 15013  		return true
 15014  	}
 15015  	// match: (SLLconst [sc] (UBFIZ [bfc] x))
 15016  	// cond: sc+bfc.width()+bfc.lsb() < 64
 15017  	// result: (UBFIZ [armBFAuxInt(bfc.lsb()+sc, bfc.width())] x)
 15018  	for {
 15019  		sc := auxIntToInt64(v.AuxInt)
 15020  		if v_0.Op != OpARM64UBFIZ {
 15021  			break
 15022  		}
 15023  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15024  		x := v_0.Args[0]
 15025  		if !(sc+bfc.width()+bfc.lsb() < 64) {
 15026  			break
 15027  		}
 15028  		v.reset(OpARM64UBFIZ)
 15029  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()+sc, bfc.width()))
 15030  		v.AddArg(x)
 15031  		return true
 15032  	}
 15033  	return false
 15034  }
 15035  func rewriteValueARM64_OpARM64SRA(v *Value) bool {
 15036  	v_1 := v.Args[1]
 15037  	v_0 := v.Args[0]
 15038  	// match: (SRA x (MOVDconst [c]))
 15039  	// result: (SRAconst x [c&63])
 15040  	for {
 15041  		x := v_0
 15042  		if v_1.Op != OpARM64MOVDconst {
 15043  			break
 15044  		}
 15045  		c := auxIntToInt64(v_1.AuxInt)
 15046  		v.reset(OpARM64SRAconst)
 15047  		v.AuxInt = int64ToAuxInt(c & 63)
 15048  		v.AddArg(x)
 15049  		return true
 15050  	}
 15051  	// match: (SRA x (ANDconst [63] y))
 15052  	// result: (SRA x y)
 15053  	for {
 15054  		x := v_0
 15055  		if v_1.Op != OpARM64ANDconst || auxIntToInt64(v_1.AuxInt) != 63 {
 15056  			break
 15057  		}
 15058  		y := v_1.Args[0]
 15059  		v.reset(OpARM64SRA)
 15060  		v.AddArg2(x, y)
 15061  		return true
 15062  	}
 15063  	return false
 15064  }
 15065  func rewriteValueARM64_OpARM64SRAconst(v *Value) bool {
 15066  	v_0 := v.Args[0]
 15067  	// match: (SRAconst [c] (MOVDconst [d]))
 15068  	// result: (MOVDconst [d>>uint64(c)])
 15069  	for {
 15070  		c := auxIntToInt64(v.AuxInt)
 15071  		if v_0.Op != OpARM64MOVDconst {
 15072  			break
 15073  		}
 15074  		d := auxIntToInt64(v_0.AuxInt)
 15075  		v.reset(OpARM64MOVDconst)
 15076  		v.AuxInt = int64ToAuxInt(d >> uint64(c))
 15077  		return true
 15078  	}
 15079  	// match: (SRAconst [rc] (SLLconst [lc] x))
 15080  	// cond: lc > rc
 15081  	// result: (SBFIZ [armBFAuxInt(lc-rc, 64-lc)] x)
 15082  	for {
 15083  		rc := auxIntToInt64(v.AuxInt)
 15084  		if v_0.Op != OpARM64SLLconst {
 15085  			break
 15086  		}
 15087  		lc := auxIntToInt64(v_0.AuxInt)
 15088  		x := v_0.Args[0]
 15089  		if !(lc > rc) {
 15090  			break
 15091  		}
 15092  		v.reset(OpARM64SBFIZ)
 15093  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc-rc, 64-lc))
 15094  		v.AddArg(x)
 15095  		return true
 15096  	}
 15097  	// match: (SRAconst [rc] (SLLconst [lc] x))
 15098  	// cond: lc <= rc
 15099  	// result: (SBFX [armBFAuxInt(rc-lc, 64-rc)] x)
 15100  	for {
 15101  		rc := auxIntToInt64(v.AuxInt)
 15102  		if v_0.Op != OpARM64SLLconst {
 15103  			break
 15104  		}
 15105  		lc := auxIntToInt64(v_0.AuxInt)
 15106  		x := v_0.Args[0]
 15107  		if !(lc <= rc) {
 15108  			break
 15109  		}
 15110  		v.reset(OpARM64SBFX)
 15111  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc-lc, 64-rc))
 15112  		v.AddArg(x)
 15113  		return true
 15114  	}
 15115  	// match: (SRAconst [rc] (MOVWreg x))
 15116  	// cond: rc < 32
 15117  	// result: (SBFX [armBFAuxInt(rc, 32-rc)] x)
 15118  	for {
 15119  		rc := auxIntToInt64(v.AuxInt)
 15120  		if v_0.Op != OpARM64MOVWreg {
 15121  			break
 15122  		}
 15123  		x := v_0.Args[0]
 15124  		if !(rc < 32) {
 15125  			break
 15126  		}
 15127  		v.reset(OpARM64SBFX)
 15128  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 32-rc))
 15129  		v.AddArg(x)
 15130  		return true
 15131  	}
 15132  	// match: (SRAconst [rc] (MOVHreg x))
 15133  	// cond: rc < 16
 15134  	// result: (SBFX [armBFAuxInt(rc, 16-rc)] x)
 15135  	for {
 15136  		rc := auxIntToInt64(v.AuxInt)
 15137  		if v_0.Op != OpARM64MOVHreg {
 15138  			break
 15139  		}
 15140  		x := v_0.Args[0]
 15141  		if !(rc < 16) {
 15142  			break
 15143  		}
 15144  		v.reset(OpARM64SBFX)
 15145  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 16-rc))
 15146  		v.AddArg(x)
 15147  		return true
 15148  	}
 15149  	// match: (SRAconst [rc] (MOVBreg x))
 15150  	// cond: rc < 8
 15151  	// result: (SBFX [armBFAuxInt(rc, 8-rc)] x)
 15152  	for {
 15153  		rc := auxIntToInt64(v.AuxInt)
 15154  		if v_0.Op != OpARM64MOVBreg {
 15155  			break
 15156  		}
 15157  		x := v_0.Args[0]
 15158  		if !(rc < 8) {
 15159  			break
 15160  		}
 15161  		v.reset(OpARM64SBFX)
 15162  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 8-rc))
 15163  		v.AddArg(x)
 15164  		return true
 15165  	}
 15166  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 15167  	// cond: sc < bfc.lsb()
 15168  	// result: (SBFIZ [armBFAuxInt(bfc.lsb()-sc, bfc.width())] x)
 15169  	for {
 15170  		sc := auxIntToInt64(v.AuxInt)
 15171  		if v_0.Op != OpARM64SBFIZ {
 15172  			break
 15173  		}
 15174  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15175  		x := v_0.Args[0]
 15176  		if !(sc < bfc.lsb()) {
 15177  			break
 15178  		}
 15179  		v.reset(OpARM64SBFIZ)
 15180  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()-sc, bfc.width()))
 15181  		v.AddArg(x)
 15182  		return true
 15183  	}
 15184  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 15185  	// cond: sc >= bfc.lsb() && sc < bfc.lsb()+bfc.width()
 15186  	// result: (SBFX [armBFAuxInt(sc-bfc.lsb(), bfc.lsb()+bfc.width()-sc)] x)
 15187  	for {
 15188  		sc := auxIntToInt64(v.AuxInt)
 15189  		if v_0.Op != OpARM64SBFIZ {
 15190  			break
 15191  		}
 15192  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15193  		x := v_0.Args[0]
 15194  		if !(sc >= bfc.lsb() && sc < bfc.lsb()+bfc.width()) {
 15195  			break
 15196  		}
 15197  		v.reset(OpARM64SBFX)
 15198  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc-bfc.lsb(), bfc.lsb()+bfc.width()-sc))
 15199  		v.AddArg(x)
 15200  		return true
 15201  	}
 15202  	return false
 15203  }
 15204  func rewriteValueARM64_OpARM64SRL(v *Value) bool {
 15205  	v_1 := v.Args[1]
 15206  	v_0 := v.Args[0]
 15207  	// match: (SRL x (MOVDconst [c]))
 15208  	// result: (SRLconst x [c&63])
 15209  	for {
 15210  		x := v_0
 15211  		if v_1.Op != OpARM64MOVDconst {
 15212  			break
 15213  		}
 15214  		c := auxIntToInt64(v_1.AuxInt)
 15215  		v.reset(OpARM64SRLconst)
 15216  		v.AuxInt = int64ToAuxInt(c & 63)
 15217  		v.AddArg(x)
 15218  		return true
 15219  	}
 15220  	// match: (SRL x (ANDconst [63] y))
 15221  	// result: (SRL x y)
 15222  	for {
 15223  		x := v_0
 15224  		if v_1.Op != OpARM64ANDconst || auxIntToInt64(v_1.AuxInt) != 63 {
 15225  			break
 15226  		}
 15227  		y := v_1.Args[0]
 15228  		v.reset(OpARM64SRL)
 15229  		v.AddArg2(x, y)
 15230  		return true
 15231  	}
 15232  	return false
 15233  }
 15234  func rewriteValueARM64_OpARM64SRLconst(v *Value) bool {
 15235  	v_0 := v.Args[0]
 15236  	// match: (SRLconst [c] (MOVDconst [d]))
 15237  	// result: (MOVDconst [int64(uint64(d)>>uint64(c))])
 15238  	for {
 15239  		c := auxIntToInt64(v.AuxInt)
 15240  		if v_0.Op != OpARM64MOVDconst {
 15241  			break
 15242  		}
 15243  		d := auxIntToInt64(v_0.AuxInt)
 15244  		v.reset(OpARM64MOVDconst)
 15245  		v.AuxInt = int64ToAuxInt(int64(uint64(d) >> uint64(c)))
 15246  		return true
 15247  	}
 15248  	// match: (SRLconst [c] (SLLconst [c] x))
 15249  	// cond: 0 < c && c < 64
 15250  	// result: (ANDconst [1<<uint(64-c)-1] x)
 15251  	for {
 15252  		c := auxIntToInt64(v.AuxInt)
 15253  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != c {
 15254  			break
 15255  		}
 15256  		x := v_0.Args[0]
 15257  		if !(0 < c && c < 64) {
 15258  			break
 15259  		}
 15260  		v.reset(OpARM64ANDconst)
 15261  		v.AuxInt = int64ToAuxInt(1<<uint(64-c) - 1)
 15262  		v.AddArg(x)
 15263  		return true
 15264  	}
 15265  	// match: (SRLconst [rc] (MOVWUreg x))
 15266  	// cond: rc >= 32
 15267  	// result: (MOVDconst [0])
 15268  	for {
 15269  		rc := auxIntToInt64(v.AuxInt)
 15270  		if v_0.Op != OpARM64MOVWUreg {
 15271  			break
 15272  		}
 15273  		if !(rc >= 32) {
 15274  			break
 15275  		}
 15276  		v.reset(OpARM64MOVDconst)
 15277  		v.AuxInt = int64ToAuxInt(0)
 15278  		return true
 15279  	}
 15280  	// match: (SRLconst [rc] (MOVHUreg x))
 15281  	// cond: rc >= 16
 15282  	// result: (MOVDconst [0])
 15283  	for {
 15284  		rc := auxIntToInt64(v.AuxInt)
 15285  		if v_0.Op != OpARM64MOVHUreg {
 15286  			break
 15287  		}
 15288  		if !(rc >= 16) {
 15289  			break
 15290  		}
 15291  		v.reset(OpARM64MOVDconst)
 15292  		v.AuxInt = int64ToAuxInt(0)
 15293  		return true
 15294  	}
 15295  	// match: (SRLconst [rc] (MOVBUreg x))
 15296  	// cond: rc >= 8
 15297  	// result: (MOVDconst [0])
 15298  	for {
 15299  		rc := auxIntToInt64(v.AuxInt)
 15300  		if v_0.Op != OpARM64MOVBUreg {
 15301  			break
 15302  		}
 15303  		if !(rc >= 8) {
 15304  			break
 15305  		}
 15306  		v.reset(OpARM64MOVDconst)
 15307  		v.AuxInt = int64ToAuxInt(0)
 15308  		return true
 15309  	}
 15310  	// match: (SRLconst [rc] (SLLconst [lc] x))
 15311  	// cond: lc > rc
 15312  	// result: (UBFIZ [armBFAuxInt(lc-rc, 64-lc)] x)
 15313  	for {
 15314  		rc := auxIntToInt64(v.AuxInt)
 15315  		if v_0.Op != OpARM64SLLconst {
 15316  			break
 15317  		}
 15318  		lc := auxIntToInt64(v_0.AuxInt)
 15319  		x := v_0.Args[0]
 15320  		if !(lc > rc) {
 15321  			break
 15322  		}
 15323  		v.reset(OpARM64UBFIZ)
 15324  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc-rc, 64-lc))
 15325  		v.AddArg(x)
 15326  		return true
 15327  	}
 15328  	// match: (SRLconst [rc] (SLLconst [lc] x))
 15329  	// cond: lc < rc
 15330  	// result: (UBFX [armBFAuxInt(rc-lc, 64-rc)] x)
 15331  	for {
 15332  		rc := auxIntToInt64(v.AuxInt)
 15333  		if v_0.Op != OpARM64SLLconst {
 15334  			break
 15335  		}
 15336  		lc := auxIntToInt64(v_0.AuxInt)
 15337  		x := v_0.Args[0]
 15338  		if !(lc < rc) {
 15339  			break
 15340  		}
 15341  		v.reset(OpARM64UBFX)
 15342  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc-lc, 64-rc))
 15343  		v.AddArg(x)
 15344  		return true
 15345  	}
 15346  	// match: (SRLconst [rc] (MOVWUreg x))
 15347  	// cond: rc < 32
 15348  	// result: (UBFX [armBFAuxInt(rc, 32-rc)] x)
 15349  	for {
 15350  		rc := auxIntToInt64(v.AuxInt)
 15351  		if v_0.Op != OpARM64MOVWUreg {
 15352  			break
 15353  		}
 15354  		x := v_0.Args[0]
 15355  		if !(rc < 32) {
 15356  			break
 15357  		}
 15358  		v.reset(OpARM64UBFX)
 15359  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 32-rc))
 15360  		v.AddArg(x)
 15361  		return true
 15362  	}
 15363  	// match: (SRLconst [rc] (MOVHUreg x))
 15364  	// cond: rc < 16
 15365  	// result: (UBFX [armBFAuxInt(rc, 16-rc)] x)
 15366  	for {
 15367  		rc := auxIntToInt64(v.AuxInt)
 15368  		if v_0.Op != OpARM64MOVHUreg {
 15369  			break
 15370  		}
 15371  		x := v_0.Args[0]
 15372  		if !(rc < 16) {
 15373  			break
 15374  		}
 15375  		v.reset(OpARM64UBFX)
 15376  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 16-rc))
 15377  		v.AddArg(x)
 15378  		return true
 15379  	}
 15380  	// match: (SRLconst [rc] (MOVBUreg x))
 15381  	// cond: rc < 8
 15382  	// result: (UBFX [armBFAuxInt(rc, 8-rc)] x)
 15383  	for {
 15384  		rc := auxIntToInt64(v.AuxInt)
 15385  		if v_0.Op != OpARM64MOVBUreg {
 15386  			break
 15387  		}
 15388  		x := v_0.Args[0]
 15389  		if !(rc < 8) {
 15390  			break
 15391  		}
 15392  		v.reset(OpARM64UBFX)
 15393  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(rc, 8-rc))
 15394  		v.AddArg(x)
 15395  		return true
 15396  	}
 15397  	// match: (SRLconst [sc] (ANDconst [ac] x))
 15398  	// cond: isARM64BFMask(sc, ac, sc)
 15399  	// result: (UBFX [armBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
 15400  	for {
 15401  		sc := auxIntToInt64(v.AuxInt)
 15402  		if v_0.Op != OpARM64ANDconst {
 15403  			break
 15404  		}
 15405  		ac := auxIntToInt64(v_0.AuxInt)
 15406  		x := v_0.Args[0]
 15407  		if !(isARM64BFMask(sc, ac, sc)) {
 15408  			break
 15409  		}
 15410  		v.reset(OpARM64UBFX)
 15411  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, sc)))
 15412  		v.AddArg(x)
 15413  		return true
 15414  	}
 15415  	// match: (SRLconst [sc] (UBFX [bfc] x))
 15416  	// cond: sc < bfc.width()
 15417  	// result: (UBFX [armBFAuxInt(bfc.lsb()+sc, bfc.width()-sc)] x)
 15418  	for {
 15419  		sc := auxIntToInt64(v.AuxInt)
 15420  		if v_0.Op != OpARM64UBFX {
 15421  			break
 15422  		}
 15423  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15424  		x := v_0.Args[0]
 15425  		if !(sc < bfc.width()) {
 15426  			break
 15427  		}
 15428  		v.reset(OpARM64UBFX)
 15429  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()+sc, bfc.width()-sc))
 15430  		v.AddArg(x)
 15431  		return true
 15432  	}
 15433  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 15434  	// cond: sc == bfc.lsb()
 15435  	// result: (ANDconst [1<<uint(bfc.width())-1] x)
 15436  	for {
 15437  		sc := auxIntToInt64(v.AuxInt)
 15438  		if v_0.Op != OpARM64UBFIZ {
 15439  			break
 15440  		}
 15441  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15442  		x := v_0.Args[0]
 15443  		if !(sc == bfc.lsb()) {
 15444  			break
 15445  		}
 15446  		v.reset(OpARM64ANDconst)
 15447  		v.AuxInt = int64ToAuxInt(1<<uint(bfc.width()) - 1)
 15448  		v.AddArg(x)
 15449  		return true
 15450  	}
 15451  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 15452  	// cond: sc < bfc.lsb()
 15453  	// result: (UBFIZ [armBFAuxInt(bfc.lsb()-sc, bfc.width())] x)
 15454  	for {
 15455  		sc := auxIntToInt64(v.AuxInt)
 15456  		if v_0.Op != OpARM64UBFIZ {
 15457  			break
 15458  		}
 15459  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15460  		x := v_0.Args[0]
 15461  		if !(sc < bfc.lsb()) {
 15462  			break
 15463  		}
 15464  		v.reset(OpARM64UBFIZ)
 15465  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()-sc, bfc.width()))
 15466  		v.AddArg(x)
 15467  		return true
 15468  	}
 15469  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 15470  	// cond: sc > bfc.lsb() && sc < bfc.lsb()+bfc.width()
 15471  	// result: (UBFX [armBFAuxInt(sc-bfc.lsb(), bfc.lsb()+bfc.width()-sc)] x)
 15472  	for {
 15473  		sc := auxIntToInt64(v.AuxInt)
 15474  		if v_0.Op != OpARM64UBFIZ {
 15475  			break
 15476  		}
 15477  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 15478  		x := v_0.Args[0]
 15479  		if !(sc > bfc.lsb() && sc < bfc.lsb()+bfc.width()) {
 15480  			break
 15481  		}
 15482  		v.reset(OpARM64UBFX)
 15483  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc-bfc.lsb(), bfc.lsb()+bfc.width()-sc))
 15484  		v.AddArg(x)
 15485  		return true
 15486  	}
 15487  	return false
 15488  }
 15489  func rewriteValueARM64_OpARM64STP(v *Value) bool {
 15490  	v_3 := v.Args[3]
 15491  	v_2 := v.Args[2]
 15492  	v_1 := v.Args[1]
 15493  	v_0 := v.Args[0]
 15494  	b := v.Block
 15495  	config := b.Func.Config
 15496  	// match: (STP [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
 15497  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 15498  	// result: (STP [off1+int32(off2)] {sym} ptr val1 val2 mem)
 15499  	for {
 15500  		off1 := auxIntToInt32(v.AuxInt)
 15501  		sym := auxToSym(v.Aux)
 15502  		if v_0.Op != OpARM64ADDconst {
 15503  			break
 15504  		}
 15505  		off2 := auxIntToInt64(v_0.AuxInt)
 15506  		ptr := v_0.Args[0]
 15507  		val1 := v_1
 15508  		val2 := v_2
 15509  		mem := v_3
 15510  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 15511  			break
 15512  		}
 15513  		v.reset(OpARM64STP)
 15514  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 15515  		v.Aux = symToAux(sym)
 15516  		v.AddArg4(ptr, val1, val2, mem)
 15517  		return true
 15518  	}
 15519  	// match: (STP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
 15520  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)
 15521  	// result: (STP [off1+off2] {mergeSym(sym1,sym2)} ptr val1 val2 mem)
 15522  	for {
 15523  		off1 := auxIntToInt32(v.AuxInt)
 15524  		sym1 := auxToSym(v.Aux)
 15525  		if v_0.Op != OpARM64MOVDaddr {
 15526  			break
 15527  		}
 15528  		off2 := auxIntToInt32(v_0.AuxInt)
 15529  		sym2 := auxToSym(v_0.Aux)
 15530  		ptr := v_0.Args[0]
 15531  		val1 := v_1
 15532  		val2 := v_2
 15533  		mem := v_3
 15534  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink)) {
 15535  			break
 15536  		}
 15537  		v.reset(OpARM64STP)
 15538  		v.AuxInt = int32ToAuxInt(off1 + off2)
 15539  		v.Aux = symToAux(mergeSym(sym1, sym2))
 15540  		v.AddArg4(ptr, val1, val2, mem)
 15541  		return true
 15542  	}
 15543  	return false
 15544  }
 15545  func rewriteValueARM64_OpARM64SUB(v *Value) bool {
 15546  	v_1 := v.Args[1]
 15547  	v_0 := v.Args[0]
 15548  	b := v.Block
 15549  	// match: (SUB x (MOVDconst [c]))
 15550  	// result: (SUBconst [c] x)
 15551  	for {
 15552  		x := v_0
 15553  		if v_1.Op != OpARM64MOVDconst {
 15554  			break
 15555  		}
 15556  		c := auxIntToInt64(v_1.AuxInt)
 15557  		v.reset(OpARM64SUBconst)
 15558  		v.AuxInt = int64ToAuxInt(c)
 15559  		v.AddArg(x)
 15560  		return true
 15561  	}
 15562  	// match: (SUB a l:(MUL x y))
 15563  	// cond: l.Uses==1 && clobber(l)
 15564  	// result: (MSUB a x y)
 15565  	for {
 15566  		a := v_0
 15567  		l := v_1
 15568  		if l.Op != OpARM64MUL {
 15569  			break
 15570  		}
 15571  		y := l.Args[1]
 15572  		x := l.Args[0]
 15573  		if !(l.Uses == 1 && clobber(l)) {
 15574  			break
 15575  		}
 15576  		v.reset(OpARM64MSUB)
 15577  		v.AddArg3(a, x, y)
 15578  		return true
 15579  	}
 15580  	// match: (SUB a l:(MNEG x y))
 15581  	// cond: l.Uses==1 && clobber(l)
 15582  	// result: (MADD a x y)
 15583  	for {
 15584  		a := v_0
 15585  		l := v_1
 15586  		if l.Op != OpARM64MNEG {
 15587  			break
 15588  		}
 15589  		y := l.Args[1]
 15590  		x := l.Args[0]
 15591  		if !(l.Uses == 1 && clobber(l)) {
 15592  			break
 15593  		}
 15594  		v.reset(OpARM64MADD)
 15595  		v.AddArg3(a, x, y)
 15596  		return true
 15597  	}
 15598  	// match: (SUB a l:(MULW x y))
 15599  	// cond: v.Type.Size() <= 4 && l.Uses==1 && clobber(l)
 15600  	// result: (MSUBW a x y)
 15601  	for {
 15602  		a := v_0
 15603  		l := v_1
 15604  		if l.Op != OpARM64MULW {
 15605  			break
 15606  		}
 15607  		y := l.Args[1]
 15608  		x := l.Args[0]
 15609  		if !(v.Type.Size() <= 4 && l.Uses == 1 && clobber(l)) {
 15610  			break
 15611  		}
 15612  		v.reset(OpARM64MSUBW)
 15613  		v.AddArg3(a, x, y)
 15614  		return true
 15615  	}
 15616  	// match: (SUB a l:(MNEGW x y))
 15617  	// cond: v.Type.Size() <= 4 && l.Uses==1 && clobber(l)
 15618  	// result: (MADDW a x y)
 15619  	for {
 15620  		a := v_0
 15621  		l := v_1
 15622  		if l.Op != OpARM64MNEGW {
 15623  			break
 15624  		}
 15625  		y := l.Args[1]
 15626  		x := l.Args[0]
 15627  		if !(v.Type.Size() <= 4 && l.Uses == 1 && clobber(l)) {
 15628  			break
 15629  		}
 15630  		v.reset(OpARM64MADDW)
 15631  		v.AddArg3(a, x, y)
 15632  		return true
 15633  	}
 15634  	// match: (SUB <t> a p:(ADDconst [c] m:(MUL _ _)))
 15635  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15636  	// result: (SUBconst [c] (SUB <v.Type> a m))
 15637  	for {
 15638  		t := v.Type
 15639  		a := v_0
 15640  		p := v_1
 15641  		if p.Op != OpARM64ADDconst {
 15642  			break
 15643  		}
 15644  		c := auxIntToInt64(p.AuxInt)
 15645  		m := p.Args[0]
 15646  		if m.Op != OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15647  			break
 15648  		}
 15649  		v.reset(OpARM64SUBconst)
 15650  		v.AuxInt = int64ToAuxInt(c)
 15651  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15652  		v0.AddArg2(a, m)
 15653  		v.AddArg(v0)
 15654  		return true
 15655  	}
 15656  	// match: (SUB <t> a p:(ADDconst [c] m:(MULW _ _)))
 15657  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15658  	// result: (SUBconst [c] (SUB <v.Type> a m))
 15659  	for {
 15660  		t := v.Type
 15661  		a := v_0
 15662  		p := v_1
 15663  		if p.Op != OpARM64ADDconst {
 15664  			break
 15665  		}
 15666  		c := auxIntToInt64(p.AuxInt)
 15667  		m := p.Args[0]
 15668  		if m.Op != OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15669  			break
 15670  		}
 15671  		v.reset(OpARM64SUBconst)
 15672  		v.AuxInt = int64ToAuxInt(c)
 15673  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15674  		v0.AddArg2(a, m)
 15675  		v.AddArg(v0)
 15676  		return true
 15677  	}
 15678  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEG _ _)))
 15679  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15680  	// result: (SUBconst [c] (SUB <v.Type> a m))
 15681  	for {
 15682  		t := v.Type
 15683  		a := v_0
 15684  		p := v_1
 15685  		if p.Op != OpARM64ADDconst {
 15686  			break
 15687  		}
 15688  		c := auxIntToInt64(p.AuxInt)
 15689  		m := p.Args[0]
 15690  		if m.Op != OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15691  			break
 15692  		}
 15693  		v.reset(OpARM64SUBconst)
 15694  		v.AuxInt = int64ToAuxInt(c)
 15695  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15696  		v0.AddArg2(a, m)
 15697  		v.AddArg(v0)
 15698  		return true
 15699  	}
 15700  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEGW _ _)))
 15701  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15702  	// result: (SUBconst [c] (SUB <v.Type> a m))
 15703  	for {
 15704  		t := v.Type
 15705  		a := v_0
 15706  		p := v_1
 15707  		if p.Op != OpARM64ADDconst {
 15708  			break
 15709  		}
 15710  		c := auxIntToInt64(p.AuxInt)
 15711  		m := p.Args[0]
 15712  		if m.Op != OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15713  			break
 15714  		}
 15715  		v.reset(OpARM64SUBconst)
 15716  		v.AuxInt = int64ToAuxInt(c)
 15717  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15718  		v0.AddArg2(a, m)
 15719  		v.AddArg(v0)
 15720  		return true
 15721  	}
 15722  	// match: (SUB <t> a p:(SUBconst [c] m:(MUL _ _)))
 15723  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15724  	// result: (ADDconst [c] (SUB <v.Type> a m))
 15725  	for {
 15726  		t := v.Type
 15727  		a := v_0
 15728  		p := v_1
 15729  		if p.Op != OpARM64SUBconst {
 15730  			break
 15731  		}
 15732  		c := auxIntToInt64(p.AuxInt)
 15733  		m := p.Args[0]
 15734  		if m.Op != OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15735  			break
 15736  		}
 15737  		v.reset(OpARM64ADDconst)
 15738  		v.AuxInt = int64ToAuxInt(c)
 15739  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15740  		v0.AddArg2(a, m)
 15741  		v.AddArg(v0)
 15742  		return true
 15743  	}
 15744  	// match: (SUB <t> a p:(SUBconst [c] m:(MULW _ _)))
 15745  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15746  	// result: (ADDconst [c] (SUB <v.Type> a m))
 15747  	for {
 15748  		t := v.Type
 15749  		a := v_0
 15750  		p := v_1
 15751  		if p.Op != OpARM64SUBconst {
 15752  			break
 15753  		}
 15754  		c := auxIntToInt64(p.AuxInt)
 15755  		m := p.Args[0]
 15756  		if m.Op != OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15757  			break
 15758  		}
 15759  		v.reset(OpARM64ADDconst)
 15760  		v.AuxInt = int64ToAuxInt(c)
 15761  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15762  		v0.AddArg2(a, m)
 15763  		v.AddArg(v0)
 15764  		return true
 15765  	}
 15766  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEG _ _)))
 15767  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15768  	// result: (ADDconst [c] (SUB <v.Type> a m))
 15769  	for {
 15770  		t := v.Type
 15771  		a := v_0
 15772  		p := v_1
 15773  		if p.Op != OpARM64SUBconst {
 15774  			break
 15775  		}
 15776  		c := auxIntToInt64(p.AuxInt)
 15777  		m := p.Args[0]
 15778  		if m.Op != OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15779  			break
 15780  		}
 15781  		v.reset(OpARM64ADDconst)
 15782  		v.AuxInt = int64ToAuxInt(c)
 15783  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15784  		v0.AddArg2(a, m)
 15785  		v.AddArg(v0)
 15786  		return true
 15787  	}
 15788  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEGW _ _)))
 15789  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 15790  	// result: (ADDconst [c] (SUB <v.Type> a m))
 15791  	for {
 15792  		t := v.Type
 15793  		a := v_0
 15794  		p := v_1
 15795  		if p.Op != OpARM64SUBconst {
 15796  			break
 15797  		}
 15798  		c := auxIntToInt64(p.AuxInt)
 15799  		m := p.Args[0]
 15800  		if m.Op != OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 15801  			break
 15802  		}
 15803  		v.reset(OpARM64ADDconst)
 15804  		v.AuxInt = int64ToAuxInt(c)
 15805  		v0 := b.NewValue0(v.Pos, OpARM64SUB, v.Type)
 15806  		v0.AddArg2(a, m)
 15807  		v.AddArg(v0)
 15808  		return true
 15809  	}
 15810  	// match: (SUB x (NEG y))
 15811  	// result: (ADD x y)
 15812  	for {
 15813  		x := v_0
 15814  		if v_1.Op != OpARM64NEG {
 15815  			break
 15816  		}
 15817  		y := v_1.Args[0]
 15818  		v.reset(OpARM64ADD)
 15819  		v.AddArg2(x, y)
 15820  		return true
 15821  	}
 15822  	// match: (SUB x x)
 15823  	// result: (MOVDconst [0])
 15824  	for {
 15825  		x := v_0
 15826  		if x != v_1 {
 15827  			break
 15828  		}
 15829  		v.reset(OpARM64MOVDconst)
 15830  		v.AuxInt = int64ToAuxInt(0)
 15831  		return true
 15832  	}
 15833  	// match: (SUB x (SUB y z))
 15834  	// result: (SUB (ADD <v.Type> x z) y)
 15835  	for {
 15836  		x := v_0
 15837  		if v_1.Op != OpARM64SUB {
 15838  			break
 15839  		}
 15840  		z := v_1.Args[1]
 15841  		y := v_1.Args[0]
 15842  		v.reset(OpARM64SUB)
 15843  		v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
 15844  		v0.AddArg2(x, z)
 15845  		v.AddArg2(v0, y)
 15846  		return true
 15847  	}
 15848  	// match: (SUB (SUB x y) z)
 15849  	// result: (SUB x (ADD <y.Type> y z))
 15850  	for {
 15851  		if v_0.Op != OpARM64SUB {
 15852  			break
 15853  		}
 15854  		y := v_0.Args[1]
 15855  		x := v_0.Args[0]
 15856  		z := v_1
 15857  		v.reset(OpARM64SUB)
 15858  		v0 := b.NewValue0(v.Pos, OpARM64ADD, y.Type)
 15859  		v0.AddArg2(y, z)
 15860  		v.AddArg2(x, v0)
 15861  		return true
 15862  	}
 15863  	// match: (SUB x0 x1:(SLLconst [c] y))
 15864  	// cond: clobberIfDead(x1)
 15865  	// result: (SUBshiftLL x0 y [c])
 15866  	for {
 15867  		x0 := v_0
 15868  		x1 := v_1
 15869  		if x1.Op != OpARM64SLLconst {
 15870  			break
 15871  		}
 15872  		c := auxIntToInt64(x1.AuxInt)
 15873  		y := x1.Args[0]
 15874  		if !(clobberIfDead(x1)) {
 15875  			break
 15876  		}
 15877  		v.reset(OpARM64SUBshiftLL)
 15878  		v.AuxInt = int64ToAuxInt(c)
 15879  		v.AddArg2(x0, y)
 15880  		return true
 15881  	}
 15882  	// match: (SUB x0 x1:(SRLconst [c] y))
 15883  	// cond: clobberIfDead(x1)
 15884  	// result: (SUBshiftRL x0 y [c])
 15885  	for {
 15886  		x0 := v_0
 15887  		x1 := v_1
 15888  		if x1.Op != OpARM64SRLconst {
 15889  			break
 15890  		}
 15891  		c := auxIntToInt64(x1.AuxInt)
 15892  		y := x1.Args[0]
 15893  		if !(clobberIfDead(x1)) {
 15894  			break
 15895  		}
 15896  		v.reset(OpARM64SUBshiftRL)
 15897  		v.AuxInt = int64ToAuxInt(c)
 15898  		v.AddArg2(x0, y)
 15899  		return true
 15900  	}
 15901  	// match: (SUB x0 x1:(SRAconst [c] y))
 15902  	// cond: clobberIfDead(x1)
 15903  	// result: (SUBshiftRA x0 y [c])
 15904  	for {
 15905  		x0 := v_0
 15906  		x1 := v_1
 15907  		if x1.Op != OpARM64SRAconst {
 15908  			break
 15909  		}
 15910  		c := auxIntToInt64(x1.AuxInt)
 15911  		y := x1.Args[0]
 15912  		if !(clobberIfDead(x1)) {
 15913  			break
 15914  		}
 15915  		v.reset(OpARM64SUBshiftRA)
 15916  		v.AuxInt = int64ToAuxInt(c)
 15917  		v.AddArg2(x0, y)
 15918  		return true
 15919  	}
 15920  	return false
 15921  }
 15922  func rewriteValueARM64_OpARM64SUBconst(v *Value) bool {
 15923  	v_0 := v.Args[0]
 15924  	// match: (SUBconst [0] x)
 15925  	// result: x
 15926  	for {
 15927  		if auxIntToInt64(v.AuxInt) != 0 {
 15928  			break
 15929  		}
 15930  		x := v_0
 15931  		v.copyOf(x)
 15932  		return true
 15933  	}
 15934  	// match: (SUBconst [c] (MOVDconst [d]))
 15935  	// result: (MOVDconst [d-c])
 15936  	for {
 15937  		c := auxIntToInt64(v.AuxInt)
 15938  		if v_0.Op != OpARM64MOVDconst {
 15939  			break
 15940  		}
 15941  		d := auxIntToInt64(v_0.AuxInt)
 15942  		v.reset(OpARM64MOVDconst)
 15943  		v.AuxInt = int64ToAuxInt(d - c)
 15944  		return true
 15945  	}
 15946  	// match: (SUBconst [c] (SUBconst [d] x))
 15947  	// result: (ADDconst [-c-d] x)
 15948  	for {
 15949  		c := auxIntToInt64(v.AuxInt)
 15950  		if v_0.Op != OpARM64SUBconst {
 15951  			break
 15952  		}
 15953  		d := auxIntToInt64(v_0.AuxInt)
 15954  		x := v_0.Args[0]
 15955  		v.reset(OpARM64ADDconst)
 15956  		v.AuxInt = int64ToAuxInt(-c - d)
 15957  		v.AddArg(x)
 15958  		return true
 15959  	}
 15960  	// match: (SUBconst [c] (ADDconst [d] x))
 15961  	// result: (ADDconst [-c+d] x)
 15962  	for {
 15963  		c := auxIntToInt64(v.AuxInt)
 15964  		if v_0.Op != OpARM64ADDconst {
 15965  			break
 15966  		}
 15967  		d := auxIntToInt64(v_0.AuxInt)
 15968  		x := v_0.Args[0]
 15969  		v.reset(OpARM64ADDconst)
 15970  		v.AuxInt = int64ToAuxInt(-c + d)
 15971  		v.AddArg(x)
 15972  		return true
 15973  	}
 15974  	return false
 15975  }
 15976  func rewriteValueARM64_OpARM64SUBshiftLL(v *Value) bool {
 15977  	v_1 := v.Args[1]
 15978  	v_0 := v.Args[0]
 15979  	// match: (SUBshiftLL x (MOVDconst [c]) [d])
 15980  	// result: (SUBconst x [int64(uint64(c)<<uint64(d))])
 15981  	for {
 15982  		d := auxIntToInt64(v.AuxInt)
 15983  		x := v_0
 15984  		if v_1.Op != OpARM64MOVDconst {
 15985  			break
 15986  		}
 15987  		c := auxIntToInt64(v_1.AuxInt)
 15988  		v.reset(OpARM64SUBconst)
 15989  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
 15990  		v.AddArg(x)
 15991  		return true
 15992  	}
 15993  	// match: (SUBshiftLL (SLLconst x [c]) x [c])
 15994  	// result: (MOVDconst [0])
 15995  	for {
 15996  		c := auxIntToInt64(v.AuxInt)
 15997  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != c {
 15998  			break
 15999  		}
 16000  		x := v_0.Args[0]
 16001  		if x != v_1 {
 16002  			break
 16003  		}
 16004  		v.reset(OpARM64MOVDconst)
 16005  		v.AuxInt = int64ToAuxInt(0)
 16006  		return true
 16007  	}
 16008  	return false
 16009  }
 16010  func rewriteValueARM64_OpARM64SUBshiftRA(v *Value) bool {
 16011  	v_1 := v.Args[1]
 16012  	v_0 := v.Args[0]
 16013  	// match: (SUBshiftRA x (MOVDconst [c]) [d])
 16014  	// result: (SUBconst x [c>>uint64(d)])
 16015  	for {
 16016  		d := auxIntToInt64(v.AuxInt)
 16017  		x := v_0
 16018  		if v_1.Op != OpARM64MOVDconst {
 16019  			break
 16020  		}
 16021  		c := auxIntToInt64(v_1.AuxInt)
 16022  		v.reset(OpARM64SUBconst)
 16023  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
 16024  		v.AddArg(x)
 16025  		return true
 16026  	}
 16027  	// match: (SUBshiftRA (SRAconst x [c]) x [c])
 16028  	// result: (MOVDconst [0])
 16029  	for {
 16030  		c := auxIntToInt64(v.AuxInt)
 16031  		if v_0.Op != OpARM64SRAconst || auxIntToInt64(v_0.AuxInt) != c {
 16032  			break
 16033  		}
 16034  		x := v_0.Args[0]
 16035  		if x != v_1 {
 16036  			break
 16037  		}
 16038  		v.reset(OpARM64MOVDconst)
 16039  		v.AuxInt = int64ToAuxInt(0)
 16040  		return true
 16041  	}
 16042  	return false
 16043  }
 16044  func rewriteValueARM64_OpARM64SUBshiftRL(v *Value) bool {
 16045  	v_1 := v.Args[1]
 16046  	v_0 := v.Args[0]
 16047  	// match: (SUBshiftRL x (MOVDconst [c]) [d])
 16048  	// result: (SUBconst x [int64(uint64(c)>>uint64(d))])
 16049  	for {
 16050  		d := auxIntToInt64(v.AuxInt)
 16051  		x := v_0
 16052  		if v_1.Op != OpARM64MOVDconst {
 16053  			break
 16054  		}
 16055  		c := auxIntToInt64(v_1.AuxInt)
 16056  		v.reset(OpARM64SUBconst)
 16057  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 16058  		v.AddArg(x)
 16059  		return true
 16060  	}
 16061  	// match: (SUBshiftRL (SRLconst x [c]) x [c])
 16062  	// result: (MOVDconst [0])
 16063  	for {
 16064  		c := auxIntToInt64(v.AuxInt)
 16065  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != c {
 16066  			break
 16067  		}
 16068  		x := v_0.Args[0]
 16069  		if x != v_1 {
 16070  			break
 16071  		}
 16072  		v.reset(OpARM64MOVDconst)
 16073  		v.AuxInt = int64ToAuxInt(0)
 16074  		return true
 16075  	}
 16076  	return false
 16077  }
 16078  func rewriteValueARM64_OpARM64TST(v *Value) bool {
 16079  	v_1 := v.Args[1]
 16080  	v_0 := v.Args[0]
 16081  	// match: (TST x (MOVDconst [c]))
 16082  	// result: (TSTconst [c] x)
 16083  	for {
 16084  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16085  			x := v_0
 16086  			if v_1.Op != OpARM64MOVDconst {
 16087  				continue
 16088  			}
 16089  			c := auxIntToInt64(v_1.AuxInt)
 16090  			v.reset(OpARM64TSTconst)
 16091  			v.AuxInt = int64ToAuxInt(c)
 16092  			v.AddArg(x)
 16093  			return true
 16094  		}
 16095  		break
 16096  	}
 16097  	// match: (TST x0 x1:(SLLconst [c] y))
 16098  	// cond: clobberIfDead(x1)
 16099  	// result: (TSTshiftLL x0 y [c])
 16100  	for {
 16101  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16102  			x0 := v_0
 16103  			x1 := v_1
 16104  			if x1.Op != OpARM64SLLconst {
 16105  				continue
 16106  			}
 16107  			c := auxIntToInt64(x1.AuxInt)
 16108  			y := x1.Args[0]
 16109  			if !(clobberIfDead(x1)) {
 16110  				continue
 16111  			}
 16112  			v.reset(OpARM64TSTshiftLL)
 16113  			v.AuxInt = int64ToAuxInt(c)
 16114  			v.AddArg2(x0, y)
 16115  			return true
 16116  		}
 16117  		break
 16118  	}
 16119  	// match: (TST x0 x1:(SRLconst [c] y))
 16120  	// cond: clobberIfDead(x1)
 16121  	// result: (TSTshiftRL x0 y [c])
 16122  	for {
 16123  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16124  			x0 := v_0
 16125  			x1 := v_1
 16126  			if x1.Op != OpARM64SRLconst {
 16127  				continue
 16128  			}
 16129  			c := auxIntToInt64(x1.AuxInt)
 16130  			y := x1.Args[0]
 16131  			if !(clobberIfDead(x1)) {
 16132  				continue
 16133  			}
 16134  			v.reset(OpARM64TSTshiftRL)
 16135  			v.AuxInt = int64ToAuxInt(c)
 16136  			v.AddArg2(x0, y)
 16137  			return true
 16138  		}
 16139  		break
 16140  	}
 16141  	// match: (TST x0 x1:(SRAconst [c] y))
 16142  	// cond: clobberIfDead(x1)
 16143  	// result: (TSTshiftRA x0 y [c])
 16144  	for {
 16145  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16146  			x0 := v_0
 16147  			x1 := v_1
 16148  			if x1.Op != OpARM64SRAconst {
 16149  				continue
 16150  			}
 16151  			c := auxIntToInt64(x1.AuxInt)
 16152  			y := x1.Args[0]
 16153  			if !(clobberIfDead(x1)) {
 16154  				continue
 16155  			}
 16156  			v.reset(OpARM64TSTshiftRA)
 16157  			v.AuxInt = int64ToAuxInt(c)
 16158  			v.AddArg2(x0, y)
 16159  			return true
 16160  		}
 16161  		break
 16162  	}
 16163  	// match: (TST x0 x1:(RORconst [c] y))
 16164  	// cond: clobberIfDead(x1)
 16165  	// result: (TSTshiftRO x0 y [c])
 16166  	for {
 16167  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16168  			x0 := v_0
 16169  			x1 := v_1
 16170  			if x1.Op != OpARM64RORconst {
 16171  				continue
 16172  			}
 16173  			c := auxIntToInt64(x1.AuxInt)
 16174  			y := x1.Args[0]
 16175  			if !(clobberIfDead(x1)) {
 16176  				continue
 16177  			}
 16178  			v.reset(OpARM64TSTshiftRO)
 16179  			v.AuxInt = int64ToAuxInt(c)
 16180  			v.AddArg2(x0, y)
 16181  			return true
 16182  		}
 16183  		break
 16184  	}
 16185  	return false
 16186  }
 16187  func rewriteValueARM64_OpARM64TSTW(v *Value) bool {
 16188  	v_1 := v.Args[1]
 16189  	v_0 := v.Args[0]
 16190  	// match: (TSTW x (MOVDconst [c]))
 16191  	// result: (TSTWconst [int32(c)] x)
 16192  	for {
 16193  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16194  			x := v_0
 16195  			if v_1.Op != OpARM64MOVDconst {
 16196  				continue
 16197  			}
 16198  			c := auxIntToInt64(v_1.AuxInt)
 16199  			v.reset(OpARM64TSTWconst)
 16200  			v.AuxInt = int32ToAuxInt(int32(c))
 16201  			v.AddArg(x)
 16202  			return true
 16203  		}
 16204  		break
 16205  	}
 16206  	return false
 16207  }
 16208  func rewriteValueARM64_OpARM64TSTWconst(v *Value) bool {
 16209  	v_0 := v.Args[0]
 16210  	// match: (TSTWconst (MOVDconst [x]) [y])
 16211  	// result: (FlagConstant [logicFlags32(int32(x)&y)])
 16212  	for {
 16213  		y := auxIntToInt32(v.AuxInt)
 16214  		if v_0.Op != OpARM64MOVDconst {
 16215  			break
 16216  		}
 16217  		x := auxIntToInt64(v_0.AuxInt)
 16218  		v.reset(OpARM64FlagConstant)
 16219  		v.AuxInt = flagConstantToAuxInt(logicFlags32(int32(x) & y))
 16220  		return true
 16221  	}
 16222  	return false
 16223  }
 16224  func rewriteValueARM64_OpARM64TSTconst(v *Value) bool {
 16225  	v_0 := v.Args[0]
 16226  	// match: (TSTconst (MOVDconst [x]) [y])
 16227  	// result: (FlagConstant [logicFlags64(x&y)])
 16228  	for {
 16229  		y := auxIntToInt64(v.AuxInt)
 16230  		if v_0.Op != OpARM64MOVDconst {
 16231  			break
 16232  		}
 16233  		x := auxIntToInt64(v_0.AuxInt)
 16234  		v.reset(OpARM64FlagConstant)
 16235  		v.AuxInt = flagConstantToAuxInt(logicFlags64(x & y))
 16236  		return true
 16237  	}
 16238  	return false
 16239  }
 16240  func rewriteValueARM64_OpARM64TSTshiftLL(v *Value) bool {
 16241  	v_1 := v.Args[1]
 16242  	v_0 := v.Args[0]
 16243  	b := v.Block
 16244  	// match: (TSTshiftLL (MOVDconst [c]) x [d])
 16245  	// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
 16246  	for {
 16247  		d := auxIntToInt64(v.AuxInt)
 16248  		if v_0.Op != OpARM64MOVDconst {
 16249  			break
 16250  		}
 16251  		c := auxIntToInt64(v_0.AuxInt)
 16252  		x := v_1
 16253  		v.reset(OpARM64TSTconst)
 16254  		v.AuxInt = int64ToAuxInt(c)
 16255  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
 16256  		v0.AuxInt = int64ToAuxInt(d)
 16257  		v0.AddArg(x)
 16258  		v.AddArg(v0)
 16259  		return true
 16260  	}
 16261  	// match: (TSTshiftLL x (MOVDconst [c]) [d])
 16262  	// result: (TSTconst x [int64(uint64(c)<<uint64(d))])
 16263  	for {
 16264  		d := auxIntToInt64(v.AuxInt)
 16265  		x := v_0
 16266  		if v_1.Op != OpARM64MOVDconst {
 16267  			break
 16268  		}
 16269  		c := auxIntToInt64(v_1.AuxInt)
 16270  		v.reset(OpARM64TSTconst)
 16271  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
 16272  		v.AddArg(x)
 16273  		return true
 16274  	}
 16275  	return false
 16276  }
 16277  func rewriteValueARM64_OpARM64TSTshiftRA(v *Value) bool {
 16278  	v_1 := v.Args[1]
 16279  	v_0 := v.Args[0]
 16280  	b := v.Block
 16281  	// match: (TSTshiftRA (MOVDconst [c]) x [d])
 16282  	// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
 16283  	for {
 16284  		d := auxIntToInt64(v.AuxInt)
 16285  		if v_0.Op != OpARM64MOVDconst {
 16286  			break
 16287  		}
 16288  		c := auxIntToInt64(v_0.AuxInt)
 16289  		x := v_1
 16290  		v.reset(OpARM64TSTconst)
 16291  		v.AuxInt = int64ToAuxInt(c)
 16292  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
 16293  		v0.AuxInt = int64ToAuxInt(d)
 16294  		v0.AddArg(x)
 16295  		v.AddArg(v0)
 16296  		return true
 16297  	}
 16298  	// match: (TSTshiftRA x (MOVDconst [c]) [d])
 16299  	// result: (TSTconst x [c>>uint64(d)])
 16300  	for {
 16301  		d := auxIntToInt64(v.AuxInt)
 16302  		x := v_0
 16303  		if v_1.Op != OpARM64MOVDconst {
 16304  			break
 16305  		}
 16306  		c := auxIntToInt64(v_1.AuxInt)
 16307  		v.reset(OpARM64TSTconst)
 16308  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
 16309  		v.AddArg(x)
 16310  		return true
 16311  	}
 16312  	return false
 16313  }
 16314  func rewriteValueARM64_OpARM64TSTshiftRL(v *Value) bool {
 16315  	v_1 := v.Args[1]
 16316  	v_0 := v.Args[0]
 16317  	b := v.Block
 16318  	// match: (TSTshiftRL (MOVDconst [c]) x [d])
 16319  	// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
 16320  	for {
 16321  		d := auxIntToInt64(v.AuxInt)
 16322  		if v_0.Op != OpARM64MOVDconst {
 16323  			break
 16324  		}
 16325  		c := auxIntToInt64(v_0.AuxInt)
 16326  		x := v_1
 16327  		v.reset(OpARM64TSTconst)
 16328  		v.AuxInt = int64ToAuxInt(c)
 16329  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
 16330  		v0.AuxInt = int64ToAuxInt(d)
 16331  		v0.AddArg(x)
 16332  		v.AddArg(v0)
 16333  		return true
 16334  	}
 16335  	// match: (TSTshiftRL x (MOVDconst [c]) [d])
 16336  	// result: (TSTconst x [int64(uint64(c)>>uint64(d))])
 16337  	for {
 16338  		d := auxIntToInt64(v.AuxInt)
 16339  		x := v_0
 16340  		if v_1.Op != OpARM64MOVDconst {
 16341  			break
 16342  		}
 16343  		c := auxIntToInt64(v_1.AuxInt)
 16344  		v.reset(OpARM64TSTconst)
 16345  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 16346  		v.AddArg(x)
 16347  		return true
 16348  	}
 16349  	return false
 16350  }
 16351  func rewriteValueARM64_OpARM64TSTshiftRO(v *Value) bool {
 16352  	v_1 := v.Args[1]
 16353  	v_0 := v.Args[0]
 16354  	b := v.Block
 16355  	// match: (TSTshiftRO (MOVDconst [c]) x [d])
 16356  	// result: (TSTconst [c] (RORconst <x.Type> x [d]))
 16357  	for {
 16358  		d := auxIntToInt64(v.AuxInt)
 16359  		if v_0.Op != OpARM64MOVDconst {
 16360  			break
 16361  		}
 16362  		c := auxIntToInt64(v_0.AuxInt)
 16363  		x := v_1
 16364  		v.reset(OpARM64TSTconst)
 16365  		v.AuxInt = int64ToAuxInt(c)
 16366  		v0 := b.NewValue0(v.Pos, OpARM64RORconst, x.Type)
 16367  		v0.AuxInt = int64ToAuxInt(d)
 16368  		v0.AddArg(x)
 16369  		v.AddArg(v0)
 16370  		return true
 16371  	}
 16372  	// match: (TSTshiftRO x (MOVDconst [c]) [d])
 16373  	// result: (TSTconst x [rotateRight64(c, d)])
 16374  	for {
 16375  		d := auxIntToInt64(v.AuxInt)
 16376  		x := v_0
 16377  		if v_1.Op != OpARM64MOVDconst {
 16378  			break
 16379  		}
 16380  		c := auxIntToInt64(v_1.AuxInt)
 16381  		v.reset(OpARM64TSTconst)
 16382  		v.AuxInt = int64ToAuxInt(rotateRight64(c, d))
 16383  		v.AddArg(x)
 16384  		return true
 16385  	}
 16386  	return false
 16387  }
 16388  func rewriteValueARM64_OpARM64UBFIZ(v *Value) bool {
 16389  	v_0 := v.Args[0]
 16390  	// match: (UBFIZ [bfc] (SLLconst [sc] x))
 16391  	// cond: sc < bfc.width()
 16392  	// result: (UBFIZ [armBFAuxInt(bfc.lsb()+sc, bfc.width()-sc)] x)
 16393  	for {
 16394  		bfc := auxIntToArm64BitField(v.AuxInt)
 16395  		if v_0.Op != OpARM64SLLconst {
 16396  			break
 16397  		}
 16398  		sc := auxIntToInt64(v_0.AuxInt)
 16399  		x := v_0.Args[0]
 16400  		if !(sc < bfc.width()) {
 16401  			break
 16402  		}
 16403  		v.reset(OpARM64UBFIZ)
 16404  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()+sc, bfc.width()-sc))
 16405  		v.AddArg(x)
 16406  		return true
 16407  	}
 16408  	return false
 16409  }
 16410  func rewriteValueARM64_OpARM64UBFX(v *Value) bool {
 16411  	v_0 := v.Args[0]
 16412  	// match: (UBFX [bfc] (ANDconst [c] x))
 16413  	// cond: isARM64BFMask(0, c, 0) && bfc.lsb() + bfc.width() <= arm64BFWidth(c, 0)
 16414  	// result: (UBFX [bfc] x)
 16415  	for {
 16416  		bfc := auxIntToArm64BitField(v.AuxInt)
 16417  		if v_0.Op != OpARM64ANDconst {
 16418  			break
 16419  		}
 16420  		c := auxIntToInt64(v_0.AuxInt)
 16421  		x := v_0.Args[0]
 16422  		if !(isARM64BFMask(0, c, 0) && bfc.lsb()+bfc.width() <= arm64BFWidth(c, 0)) {
 16423  			break
 16424  		}
 16425  		v.reset(OpARM64UBFX)
 16426  		v.AuxInt = arm64BitFieldToAuxInt(bfc)
 16427  		v.AddArg(x)
 16428  		return true
 16429  	}
 16430  	// match: (UBFX [bfc] e:(MOVWUreg x))
 16431  	// cond: e.Uses == 1 && bfc.lsb() < 32
 16432  	// result: (UBFX [armBFAuxInt(bfc.lsb(), min(bfc.width(), 32-bfc.lsb()))] x)
 16433  	for {
 16434  		bfc := auxIntToArm64BitField(v.AuxInt)
 16435  		e := v_0
 16436  		if e.Op != OpARM64MOVWUreg {
 16437  			break
 16438  		}
 16439  		x := e.Args[0]
 16440  		if !(e.Uses == 1 && bfc.lsb() < 32) {
 16441  			break
 16442  		}
 16443  		v.reset(OpARM64UBFX)
 16444  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb(), min(bfc.width(), 32-bfc.lsb())))
 16445  		v.AddArg(x)
 16446  		return true
 16447  	}
 16448  	// match: (UBFX [bfc] e:(MOVHUreg x))
 16449  	// cond: e.Uses == 1 && bfc.lsb() < 16
 16450  	// result: (UBFX [armBFAuxInt(bfc.lsb(), min(bfc.width(), 16-bfc.lsb()))] x)
 16451  	for {
 16452  		bfc := auxIntToArm64BitField(v.AuxInt)
 16453  		e := v_0
 16454  		if e.Op != OpARM64MOVHUreg {
 16455  			break
 16456  		}
 16457  		x := e.Args[0]
 16458  		if !(e.Uses == 1 && bfc.lsb() < 16) {
 16459  			break
 16460  		}
 16461  		v.reset(OpARM64UBFX)
 16462  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb(), min(bfc.width(), 16-bfc.lsb())))
 16463  		v.AddArg(x)
 16464  		return true
 16465  	}
 16466  	// match: (UBFX [bfc] e:(MOVBUreg x))
 16467  	// cond: e.Uses == 1 && bfc.lsb() < 8
 16468  	// result: (UBFX [armBFAuxInt(bfc.lsb(), min(bfc.width(), 8-bfc.lsb()))] x)
 16469  	for {
 16470  		bfc := auxIntToArm64BitField(v.AuxInt)
 16471  		e := v_0
 16472  		if e.Op != OpARM64MOVBUreg {
 16473  			break
 16474  		}
 16475  		x := e.Args[0]
 16476  		if !(e.Uses == 1 && bfc.lsb() < 8) {
 16477  			break
 16478  		}
 16479  		v.reset(OpARM64UBFX)
 16480  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb(), min(bfc.width(), 8-bfc.lsb())))
 16481  		v.AddArg(x)
 16482  		return true
 16483  	}
 16484  	// match: (UBFX [bfc] (SRLconst [sc] x))
 16485  	// cond: sc+bfc.width()+bfc.lsb() < 64
 16486  	// result: (UBFX [armBFAuxInt(bfc.lsb()+sc, bfc.width())] x)
 16487  	for {
 16488  		bfc := auxIntToArm64BitField(v.AuxInt)
 16489  		if v_0.Op != OpARM64SRLconst {
 16490  			break
 16491  		}
 16492  		sc := auxIntToInt64(v_0.AuxInt)
 16493  		x := v_0.Args[0]
 16494  		if !(sc+bfc.width()+bfc.lsb() < 64) {
 16495  			break
 16496  		}
 16497  		v.reset(OpARM64UBFX)
 16498  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()+sc, bfc.width()))
 16499  		v.AddArg(x)
 16500  		return true
 16501  	}
 16502  	// match: (UBFX [bfc] (SLLconst [sc] x))
 16503  	// cond: sc == bfc.lsb()
 16504  	// result: (ANDconst [1<<uint(bfc.width())-1] x)
 16505  	for {
 16506  		bfc := auxIntToArm64BitField(v.AuxInt)
 16507  		if v_0.Op != OpARM64SLLconst {
 16508  			break
 16509  		}
 16510  		sc := auxIntToInt64(v_0.AuxInt)
 16511  		x := v_0.Args[0]
 16512  		if !(sc == bfc.lsb()) {
 16513  			break
 16514  		}
 16515  		v.reset(OpARM64ANDconst)
 16516  		v.AuxInt = int64ToAuxInt(1<<uint(bfc.width()) - 1)
 16517  		v.AddArg(x)
 16518  		return true
 16519  	}
 16520  	// match: (UBFX [bfc] (SLLconst [sc] x))
 16521  	// cond: sc < bfc.lsb()
 16522  	// result: (UBFX [armBFAuxInt(bfc.lsb()-sc, bfc.width())] x)
 16523  	for {
 16524  		bfc := auxIntToArm64BitField(v.AuxInt)
 16525  		if v_0.Op != OpARM64SLLconst {
 16526  			break
 16527  		}
 16528  		sc := auxIntToInt64(v_0.AuxInt)
 16529  		x := v_0.Args[0]
 16530  		if !(sc < bfc.lsb()) {
 16531  			break
 16532  		}
 16533  		v.reset(OpARM64UBFX)
 16534  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(bfc.lsb()-sc, bfc.width()))
 16535  		v.AddArg(x)
 16536  		return true
 16537  	}
 16538  	// match: (UBFX [bfc] (SLLconst [sc] x))
 16539  	// cond: sc > bfc.lsb() && sc < bfc.lsb()+bfc.width()
 16540  	// result: (UBFIZ [armBFAuxInt(sc-bfc.lsb(), bfc.lsb()+bfc.width()-sc)] x)
 16541  	for {
 16542  		bfc := auxIntToArm64BitField(v.AuxInt)
 16543  		if v_0.Op != OpARM64SLLconst {
 16544  			break
 16545  		}
 16546  		sc := auxIntToInt64(v_0.AuxInt)
 16547  		x := v_0.Args[0]
 16548  		if !(sc > bfc.lsb() && sc < bfc.lsb()+bfc.width()) {
 16549  			break
 16550  		}
 16551  		v.reset(OpARM64UBFIZ)
 16552  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc-bfc.lsb(), bfc.lsb()+bfc.width()-sc))
 16553  		v.AddArg(x)
 16554  		return true
 16555  	}
 16556  	return false
 16557  }
 16558  func rewriteValueARM64_OpARM64UDIV(v *Value) bool {
 16559  	v_1 := v.Args[1]
 16560  	v_0 := v.Args[0]
 16561  	// match: (UDIV x (MOVDconst [1]))
 16562  	// result: x
 16563  	for {
 16564  		x := v_0
 16565  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 16566  			break
 16567  		}
 16568  		v.copyOf(x)
 16569  		return true
 16570  	}
 16571  	// match: (UDIV x (MOVDconst [c]))
 16572  	// cond: isPowerOfTwo(c)
 16573  	// result: (SRLconst [log64(c)] x)
 16574  	for {
 16575  		x := v_0
 16576  		if v_1.Op != OpARM64MOVDconst {
 16577  			break
 16578  		}
 16579  		c := auxIntToInt64(v_1.AuxInt)
 16580  		if !(isPowerOfTwo(c)) {
 16581  			break
 16582  		}
 16583  		v.reset(OpARM64SRLconst)
 16584  		v.AuxInt = int64ToAuxInt(log64(c))
 16585  		v.AddArg(x)
 16586  		return true
 16587  	}
 16588  	// match: (UDIV (MOVDconst [c]) (MOVDconst [d]))
 16589  	// cond: d != 0
 16590  	// result: (MOVDconst [int64(uint64(c)/uint64(d))])
 16591  	for {
 16592  		if v_0.Op != OpARM64MOVDconst {
 16593  			break
 16594  		}
 16595  		c := auxIntToInt64(v_0.AuxInt)
 16596  		if v_1.Op != OpARM64MOVDconst {
 16597  			break
 16598  		}
 16599  		d := auxIntToInt64(v_1.AuxInt)
 16600  		if !(d != 0) {
 16601  			break
 16602  		}
 16603  		v.reset(OpARM64MOVDconst)
 16604  		v.AuxInt = int64ToAuxInt(int64(uint64(c) / uint64(d)))
 16605  		return true
 16606  	}
 16607  	return false
 16608  }
 16609  func rewriteValueARM64_OpARM64UDIVW(v *Value) bool {
 16610  	v_1 := v.Args[1]
 16611  	v_0 := v.Args[0]
 16612  	b := v.Block
 16613  	// match: (UDIVW x (MOVDconst [c]))
 16614  	// cond: uint32(c)==1
 16615  	// result: (MOVWUreg x)
 16616  	for {
 16617  		x := v_0
 16618  		if v_1.Op != OpARM64MOVDconst {
 16619  			break
 16620  		}
 16621  		c := auxIntToInt64(v_1.AuxInt)
 16622  		if !(uint32(c) == 1) {
 16623  			break
 16624  		}
 16625  		v.reset(OpARM64MOVWUreg)
 16626  		v.AddArg(x)
 16627  		return true
 16628  	}
 16629  	// match: (UDIVW x (MOVDconst [c]))
 16630  	// cond: isPowerOfTwo(c) && is32Bit(c)
 16631  	// result: (SRLconst [log64(c)] (MOVWUreg <v.Type> x))
 16632  	for {
 16633  		x := v_0
 16634  		if v_1.Op != OpARM64MOVDconst {
 16635  			break
 16636  		}
 16637  		c := auxIntToInt64(v_1.AuxInt)
 16638  		if !(isPowerOfTwo(c) && is32Bit(c)) {
 16639  			break
 16640  		}
 16641  		v.reset(OpARM64SRLconst)
 16642  		v.AuxInt = int64ToAuxInt(log64(c))
 16643  		v0 := b.NewValue0(v.Pos, OpARM64MOVWUreg, v.Type)
 16644  		v0.AddArg(x)
 16645  		v.AddArg(v0)
 16646  		return true
 16647  	}
 16648  	// match: (UDIVW (MOVDconst [c]) (MOVDconst [d]))
 16649  	// cond: d != 0
 16650  	// result: (MOVDconst [int64(uint32(c)/uint32(d))])
 16651  	for {
 16652  		if v_0.Op != OpARM64MOVDconst {
 16653  			break
 16654  		}
 16655  		c := auxIntToInt64(v_0.AuxInt)
 16656  		if v_1.Op != OpARM64MOVDconst {
 16657  			break
 16658  		}
 16659  		d := auxIntToInt64(v_1.AuxInt)
 16660  		if !(d != 0) {
 16661  			break
 16662  		}
 16663  		v.reset(OpARM64MOVDconst)
 16664  		v.AuxInt = int64ToAuxInt(int64(uint32(c) / uint32(d)))
 16665  		return true
 16666  	}
 16667  	return false
 16668  }
 16669  func rewriteValueARM64_OpARM64UMOD(v *Value) bool {
 16670  	v_1 := v.Args[1]
 16671  	v_0 := v.Args[0]
 16672  	b := v.Block
 16673  	typ := &b.Func.Config.Types
 16674  	// match: (UMOD <typ.UInt64> x y)
 16675  	// result: (MSUB <typ.UInt64> x y (UDIV <typ.UInt64> x y))
 16676  	for {
 16677  		if v.Type != typ.UInt64 {
 16678  			break
 16679  		}
 16680  		x := v_0
 16681  		y := v_1
 16682  		v.reset(OpARM64MSUB)
 16683  		v.Type = typ.UInt64
 16684  		v0 := b.NewValue0(v.Pos, OpARM64UDIV, typ.UInt64)
 16685  		v0.AddArg2(x, y)
 16686  		v.AddArg3(x, y, v0)
 16687  		return true
 16688  	}
 16689  	// match: (UMOD _ (MOVDconst [1]))
 16690  	// result: (MOVDconst [0])
 16691  	for {
 16692  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 16693  			break
 16694  		}
 16695  		v.reset(OpARM64MOVDconst)
 16696  		v.AuxInt = int64ToAuxInt(0)
 16697  		return true
 16698  	}
 16699  	// match: (UMOD x (MOVDconst [c]))
 16700  	// cond: isPowerOfTwo(c)
 16701  	// result: (ANDconst [c-1] x)
 16702  	for {
 16703  		x := v_0
 16704  		if v_1.Op != OpARM64MOVDconst {
 16705  			break
 16706  		}
 16707  		c := auxIntToInt64(v_1.AuxInt)
 16708  		if !(isPowerOfTwo(c)) {
 16709  			break
 16710  		}
 16711  		v.reset(OpARM64ANDconst)
 16712  		v.AuxInt = int64ToAuxInt(c - 1)
 16713  		v.AddArg(x)
 16714  		return true
 16715  	}
 16716  	// match: (UMOD (MOVDconst [c]) (MOVDconst [d]))
 16717  	// cond: d != 0
 16718  	// result: (MOVDconst [int64(uint64(c)%uint64(d))])
 16719  	for {
 16720  		if v_0.Op != OpARM64MOVDconst {
 16721  			break
 16722  		}
 16723  		c := auxIntToInt64(v_0.AuxInt)
 16724  		if v_1.Op != OpARM64MOVDconst {
 16725  			break
 16726  		}
 16727  		d := auxIntToInt64(v_1.AuxInt)
 16728  		if !(d != 0) {
 16729  			break
 16730  		}
 16731  		v.reset(OpARM64MOVDconst)
 16732  		v.AuxInt = int64ToAuxInt(int64(uint64(c) % uint64(d)))
 16733  		return true
 16734  	}
 16735  	return false
 16736  }
 16737  func rewriteValueARM64_OpARM64UMODW(v *Value) bool {
 16738  	v_1 := v.Args[1]
 16739  	v_0 := v.Args[0]
 16740  	b := v.Block
 16741  	typ := &b.Func.Config.Types
 16742  	// match: (UMODW <typ.UInt32> x y)
 16743  	// result: (MSUBW <typ.UInt32> x y (UDIVW <typ.UInt32> x y))
 16744  	for {
 16745  		if v.Type != typ.UInt32 {
 16746  			break
 16747  		}
 16748  		x := v_0
 16749  		y := v_1
 16750  		v.reset(OpARM64MSUBW)
 16751  		v.Type = typ.UInt32
 16752  		v0 := b.NewValue0(v.Pos, OpARM64UDIVW, typ.UInt32)
 16753  		v0.AddArg2(x, y)
 16754  		v.AddArg3(x, y, v0)
 16755  		return true
 16756  	}
 16757  	// match: (UMODW _ (MOVDconst [c]))
 16758  	// cond: uint32(c)==1
 16759  	// result: (MOVDconst [0])
 16760  	for {
 16761  		if v_1.Op != OpARM64MOVDconst {
 16762  			break
 16763  		}
 16764  		c := auxIntToInt64(v_1.AuxInt)
 16765  		if !(uint32(c) == 1) {
 16766  			break
 16767  		}
 16768  		v.reset(OpARM64MOVDconst)
 16769  		v.AuxInt = int64ToAuxInt(0)
 16770  		return true
 16771  	}
 16772  	// match: (UMODW x (MOVDconst [c]))
 16773  	// cond: isPowerOfTwo(c) && is32Bit(c)
 16774  	// result: (ANDconst [c-1] x)
 16775  	for {
 16776  		x := v_0
 16777  		if v_1.Op != OpARM64MOVDconst {
 16778  			break
 16779  		}
 16780  		c := auxIntToInt64(v_1.AuxInt)
 16781  		if !(isPowerOfTwo(c) && is32Bit(c)) {
 16782  			break
 16783  		}
 16784  		v.reset(OpARM64ANDconst)
 16785  		v.AuxInt = int64ToAuxInt(c - 1)
 16786  		v.AddArg(x)
 16787  		return true
 16788  	}
 16789  	// match: (UMODW (MOVDconst [c]) (MOVDconst [d]))
 16790  	// cond: d != 0
 16791  	// result: (MOVDconst [int64(uint32(c)%uint32(d))])
 16792  	for {
 16793  		if v_0.Op != OpARM64MOVDconst {
 16794  			break
 16795  		}
 16796  		c := auxIntToInt64(v_0.AuxInt)
 16797  		if v_1.Op != OpARM64MOVDconst {
 16798  			break
 16799  		}
 16800  		d := auxIntToInt64(v_1.AuxInt)
 16801  		if !(d != 0) {
 16802  			break
 16803  		}
 16804  		v.reset(OpARM64MOVDconst)
 16805  		v.AuxInt = int64ToAuxInt(int64(uint32(c) % uint32(d)))
 16806  		return true
 16807  	}
 16808  	return false
 16809  }
 16810  func rewriteValueARM64_OpARM64XOR(v *Value) bool {
 16811  	v_1 := v.Args[1]
 16812  	v_0 := v.Args[0]
 16813  	// match: (XOR x (MOVDconst [c]))
 16814  	// result: (XORconst [c] x)
 16815  	for {
 16816  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16817  			x := v_0
 16818  			if v_1.Op != OpARM64MOVDconst {
 16819  				continue
 16820  			}
 16821  			c := auxIntToInt64(v_1.AuxInt)
 16822  			v.reset(OpARM64XORconst)
 16823  			v.AuxInt = int64ToAuxInt(c)
 16824  			v.AddArg(x)
 16825  			return true
 16826  		}
 16827  		break
 16828  	}
 16829  	// match: (XOR x x)
 16830  	// result: (MOVDconst [0])
 16831  	for {
 16832  		x := v_0
 16833  		if x != v_1 {
 16834  			break
 16835  		}
 16836  		v.reset(OpARM64MOVDconst)
 16837  		v.AuxInt = int64ToAuxInt(0)
 16838  		return true
 16839  	}
 16840  	// match: (XOR x (MVN y))
 16841  	// result: (EON x y)
 16842  	for {
 16843  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16844  			x := v_0
 16845  			if v_1.Op != OpARM64MVN {
 16846  				continue
 16847  			}
 16848  			y := v_1.Args[0]
 16849  			v.reset(OpARM64EON)
 16850  			v.AddArg2(x, y)
 16851  			return true
 16852  		}
 16853  		break
 16854  	}
 16855  	// match: (XOR x0 x1:(SLLconst [c] y))
 16856  	// cond: clobberIfDead(x1)
 16857  	// result: (XORshiftLL x0 y [c])
 16858  	for {
 16859  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16860  			x0 := v_0
 16861  			x1 := v_1
 16862  			if x1.Op != OpARM64SLLconst {
 16863  				continue
 16864  			}
 16865  			c := auxIntToInt64(x1.AuxInt)
 16866  			y := x1.Args[0]
 16867  			if !(clobberIfDead(x1)) {
 16868  				continue
 16869  			}
 16870  			v.reset(OpARM64XORshiftLL)
 16871  			v.AuxInt = int64ToAuxInt(c)
 16872  			v.AddArg2(x0, y)
 16873  			return true
 16874  		}
 16875  		break
 16876  	}
 16877  	// match: (XOR x0 x1:(SRLconst [c] y))
 16878  	// cond: clobberIfDead(x1)
 16879  	// result: (XORshiftRL x0 y [c])
 16880  	for {
 16881  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16882  			x0 := v_0
 16883  			x1 := v_1
 16884  			if x1.Op != OpARM64SRLconst {
 16885  				continue
 16886  			}
 16887  			c := auxIntToInt64(x1.AuxInt)
 16888  			y := x1.Args[0]
 16889  			if !(clobberIfDead(x1)) {
 16890  				continue
 16891  			}
 16892  			v.reset(OpARM64XORshiftRL)
 16893  			v.AuxInt = int64ToAuxInt(c)
 16894  			v.AddArg2(x0, y)
 16895  			return true
 16896  		}
 16897  		break
 16898  	}
 16899  	// match: (XOR x0 x1:(SRAconst [c] y))
 16900  	// cond: clobberIfDead(x1)
 16901  	// result: (XORshiftRA x0 y [c])
 16902  	for {
 16903  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16904  			x0 := v_0
 16905  			x1 := v_1
 16906  			if x1.Op != OpARM64SRAconst {
 16907  				continue
 16908  			}
 16909  			c := auxIntToInt64(x1.AuxInt)
 16910  			y := x1.Args[0]
 16911  			if !(clobberIfDead(x1)) {
 16912  				continue
 16913  			}
 16914  			v.reset(OpARM64XORshiftRA)
 16915  			v.AuxInt = int64ToAuxInt(c)
 16916  			v.AddArg2(x0, y)
 16917  			return true
 16918  		}
 16919  		break
 16920  	}
 16921  	// match: (XOR x0 x1:(RORconst [c] y))
 16922  	// cond: clobberIfDead(x1)
 16923  	// result: (XORshiftRO x0 y [c])
 16924  	for {
 16925  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 16926  			x0 := v_0
 16927  			x1 := v_1
 16928  			if x1.Op != OpARM64RORconst {
 16929  				continue
 16930  			}
 16931  			c := auxIntToInt64(x1.AuxInt)
 16932  			y := x1.Args[0]
 16933  			if !(clobberIfDead(x1)) {
 16934  				continue
 16935  			}
 16936  			v.reset(OpARM64XORshiftRO)
 16937  			v.AuxInt = int64ToAuxInt(c)
 16938  			v.AddArg2(x0, y)
 16939  			return true
 16940  		}
 16941  		break
 16942  	}
 16943  	return false
 16944  }
 16945  func rewriteValueARM64_OpARM64XORconst(v *Value) bool {
 16946  	v_0 := v.Args[0]
 16947  	// match: (XORconst [0] x)
 16948  	// result: x
 16949  	for {
 16950  		if auxIntToInt64(v.AuxInt) != 0 {
 16951  			break
 16952  		}
 16953  		x := v_0
 16954  		v.copyOf(x)
 16955  		return true
 16956  	}
 16957  	// match: (XORconst [-1] x)
 16958  	// result: (MVN x)
 16959  	for {
 16960  		if auxIntToInt64(v.AuxInt) != -1 {
 16961  			break
 16962  		}
 16963  		x := v_0
 16964  		v.reset(OpARM64MVN)
 16965  		v.AddArg(x)
 16966  		return true
 16967  	}
 16968  	// match: (XORconst [c] (MOVDconst [d]))
 16969  	// result: (MOVDconst [c^d])
 16970  	for {
 16971  		c := auxIntToInt64(v.AuxInt)
 16972  		if v_0.Op != OpARM64MOVDconst {
 16973  			break
 16974  		}
 16975  		d := auxIntToInt64(v_0.AuxInt)
 16976  		v.reset(OpARM64MOVDconst)
 16977  		v.AuxInt = int64ToAuxInt(c ^ d)
 16978  		return true
 16979  	}
 16980  	// match: (XORconst [c] (XORconst [d] x))
 16981  	// result: (XORconst [c^d] x)
 16982  	for {
 16983  		c := auxIntToInt64(v.AuxInt)
 16984  		if v_0.Op != OpARM64XORconst {
 16985  			break
 16986  		}
 16987  		d := auxIntToInt64(v_0.AuxInt)
 16988  		x := v_0.Args[0]
 16989  		v.reset(OpARM64XORconst)
 16990  		v.AuxInt = int64ToAuxInt(c ^ d)
 16991  		v.AddArg(x)
 16992  		return true
 16993  	}
 16994  	return false
 16995  }
 16996  func rewriteValueARM64_OpARM64XORshiftLL(v *Value) bool {
 16997  	v_1 := v.Args[1]
 16998  	v_0 := v.Args[0]
 16999  	b := v.Block
 17000  	typ := &b.Func.Config.Types
 17001  	// match: (XORshiftLL (MOVDconst [c]) x [d])
 17002  	// result: (XORconst [c] (SLLconst <x.Type> x [d]))
 17003  	for {
 17004  		d := auxIntToInt64(v.AuxInt)
 17005  		if v_0.Op != OpARM64MOVDconst {
 17006  			break
 17007  		}
 17008  		c := auxIntToInt64(v_0.AuxInt)
 17009  		x := v_1
 17010  		v.reset(OpARM64XORconst)
 17011  		v.AuxInt = int64ToAuxInt(c)
 17012  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
 17013  		v0.AuxInt = int64ToAuxInt(d)
 17014  		v0.AddArg(x)
 17015  		v.AddArg(v0)
 17016  		return true
 17017  	}
 17018  	// match: (XORshiftLL x (MOVDconst [c]) [d])
 17019  	// result: (XORconst x [int64(uint64(c)<<uint64(d))])
 17020  	for {
 17021  		d := auxIntToInt64(v.AuxInt)
 17022  		x := v_0
 17023  		if v_1.Op != OpARM64MOVDconst {
 17024  			break
 17025  		}
 17026  		c := auxIntToInt64(v_1.AuxInt)
 17027  		v.reset(OpARM64XORconst)
 17028  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17029  		v.AddArg(x)
 17030  		return true
 17031  	}
 17032  	// match: (XORshiftLL (SLLconst x [c]) x [c])
 17033  	// result: (MOVDconst [0])
 17034  	for {
 17035  		c := auxIntToInt64(v.AuxInt)
 17036  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != c {
 17037  			break
 17038  		}
 17039  		x := v_0.Args[0]
 17040  		if x != v_1 {
 17041  			break
 17042  		}
 17043  		v.reset(OpARM64MOVDconst)
 17044  		v.AuxInt = int64ToAuxInt(0)
 17045  		return true
 17046  	}
 17047  	// match: (XORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [armBFAuxInt(8, 8)] x) x)
 17048  	// result: (REV16W x)
 17049  	for {
 17050  		if v.Type != typ.UInt16 || auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || v_0.Type != typ.UInt16 || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 8) {
 17051  			break
 17052  		}
 17053  		x := v_0.Args[0]
 17054  		if x != v_1 {
 17055  			break
 17056  		}
 17057  		v.reset(OpARM64REV16W)
 17058  		v.AddArg(x)
 17059  		return true
 17060  	}
 17061  	// match: (XORshiftLL [8] (UBFX [armBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 17062  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 17063  	// result: (REV16W x)
 17064  	for {
 17065  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 24) {
 17066  			break
 17067  		}
 17068  		v_0_0 := v_0.Args[0]
 17069  		if v_0_0.Op != OpARM64ANDconst {
 17070  			break
 17071  		}
 17072  		c1 := auxIntToInt64(v_0_0.AuxInt)
 17073  		x := v_0_0.Args[0]
 17074  		if v_1.Op != OpARM64ANDconst {
 17075  			break
 17076  		}
 17077  		c2 := auxIntToInt64(v_1.AuxInt)
 17078  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 17079  			break
 17080  		}
 17081  		v.reset(OpARM64REV16W)
 17082  		v.AddArg(x)
 17083  		return true
 17084  	}
 17085  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 17086  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 17087  	// result: (REV16 x)
 17088  	for {
 17089  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 8 {
 17090  			break
 17091  		}
 17092  		v_0_0 := v_0.Args[0]
 17093  		if v_0_0.Op != OpARM64ANDconst {
 17094  			break
 17095  		}
 17096  		c1 := auxIntToInt64(v_0_0.AuxInt)
 17097  		x := v_0_0.Args[0]
 17098  		if v_1.Op != OpARM64ANDconst {
 17099  			break
 17100  		}
 17101  		c2 := auxIntToInt64(v_1.AuxInt)
 17102  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 17103  			break
 17104  		}
 17105  		v.reset(OpARM64REV16)
 17106  		v.AddArg(x)
 17107  		return true
 17108  	}
 17109  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 17110  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 17111  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 17112  	for {
 17113  		if auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 8 {
 17114  			break
 17115  		}
 17116  		v_0_0 := v_0.Args[0]
 17117  		if v_0_0.Op != OpARM64ANDconst {
 17118  			break
 17119  		}
 17120  		c1 := auxIntToInt64(v_0_0.AuxInt)
 17121  		x := v_0_0.Args[0]
 17122  		if v_1.Op != OpARM64ANDconst {
 17123  			break
 17124  		}
 17125  		c2 := auxIntToInt64(v_1.AuxInt)
 17126  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 17127  			break
 17128  		}
 17129  		v.reset(OpARM64REV16)
 17130  		v0 := b.NewValue0(v.Pos, OpARM64ANDconst, x.Type)
 17131  		v0.AuxInt = int64ToAuxInt(0xffffffff)
 17132  		v0.AddArg(x)
 17133  		v.AddArg(v0)
 17134  		return true
 17135  	}
 17136  	// match: (XORshiftLL [c] (SRLconst x [64-c]) x2)
 17137  	// result: (EXTRconst [64-c] x2 x)
 17138  	for {
 17139  		c := auxIntToInt64(v.AuxInt)
 17140  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 64-c {
 17141  			break
 17142  		}
 17143  		x := v_0.Args[0]
 17144  		x2 := v_1
 17145  		v.reset(OpARM64EXTRconst)
 17146  		v.AuxInt = int64ToAuxInt(64 - c)
 17147  		v.AddArg2(x2, x)
 17148  		return true
 17149  	}
 17150  	// match: (XORshiftLL <t> [c] (UBFX [bfc] x) x2)
 17151  	// cond: c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
 17152  	// result: (EXTRWconst [32-c] x2 x)
 17153  	for {
 17154  		t := v.Type
 17155  		c := auxIntToInt64(v.AuxInt)
 17156  		if v_0.Op != OpARM64UBFX {
 17157  			break
 17158  		}
 17159  		bfc := auxIntToArm64BitField(v_0.AuxInt)
 17160  		x := v_0.Args[0]
 17161  		x2 := v_1
 17162  		if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
 17163  			break
 17164  		}
 17165  		v.reset(OpARM64EXTRWconst)
 17166  		v.AuxInt = int64ToAuxInt(32 - c)
 17167  		v.AddArg2(x2, x)
 17168  		return true
 17169  	}
 17170  	return false
 17171  }
 17172  func rewriteValueARM64_OpARM64XORshiftRA(v *Value) bool {
 17173  	v_1 := v.Args[1]
 17174  	v_0 := v.Args[0]
 17175  	b := v.Block
 17176  	// match: (XORshiftRA (MOVDconst [c]) x [d])
 17177  	// result: (XORconst [c] (SRAconst <x.Type> x [d]))
 17178  	for {
 17179  		d := auxIntToInt64(v.AuxInt)
 17180  		if v_0.Op != OpARM64MOVDconst {
 17181  			break
 17182  		}
 17183  		c := auxIntToInt64(v_0.AuxInt)
 17184  		x := v_1
 17185  		v.reset(OpARM64XORconst)
 17186  		v.AuxInt = int64ToAuxInt(c)
 17187  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
 17188  		v0.AuxInt = int64ToAuxInt(d)
 17189  		v0.AddArg(x)
 17190  		v.AddArg(v0)
 17191  		return true
 17192  	}
 17193  	// match: (XORshiftRA x (MOVDconst [c]) [d])
 17194  	// result: (XORconst x [c>>uint64(d)])
 17195  	for {
 17196  		d := auxIntToInt64(v.AuxInt)
 17197  		x := v_0
 17198  		if v_1.Op != OpARM64MOVDconst {
 17199  			break
 17200  		}
 17201  		c := auxIntToInt64(v_1.AuxInt)
 17202  		v.reset(OpARM64XORconst)
 17203  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
 17204  		v.AddArg(x)
 17205  		return true
 17206  	}
 17207  	// match: (XORshiftRA (SRAconst x [c]) x [c])
 17208  	// result: (MOVDconst [0])
 17209  	for {
 17210  		c := auxIntToInt64(v.AuxInt)
 17211  		if v_0.Op != OpARM64SRAconst || auxIntToInt64(v_0.AuxInt) != c {
 17212  			break
 17213  		}
 17214  		x := v_0.Args[0]
 17215  		if x != v_1 {
 17216  			break
 17217  		}
 17218  		v.reset(OpARM64MOVDconst)
 17219  		v.AuxInt = int64ToAuxInt(0)
 17220  		return true
 17221  	}
 17222  	return false
 17223  }
 17224  func rewriteValueARM64_OpARM64XORshiftRL(v *Value) bool {
 17225  	v_1 := v.Args[1]
 17226  	v_0 := v.Args[0]
 17227  	b := v.Block
 17228  	// match: (XORshiftRL (MOVDconst [c]) x [d])
 17229  	// result: (XORconst [c] (SRLconst <x.Type> x [d]))
 17230  	for {
 17231  		d := auxIntToInt64(v.AuxInt)
 17232  		if v_0.Op != OpARM64MOVDconst {
 17233  			break
 17234  		}
 17235  		c := auxIntToInt64(v_0.AuxInt)
 17236  		x := v_1
 17237  		v.reset(OpARM64XORconst)
 17238  		v.AuxInt = int64ToAuxInt(c)
 17239  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
 17240  		v0.AuxInt = int64ToAuxInt(d)
 17241  		v0.AddArg(x)
 17242  		v.AddArg(v0)
 17243  		return true
 17244  	}
 17245  	// match: (XORshiftRL x (MOVDconst [c]) [d])
 17246  	// result: (XORconst x [int64(uint64(c)>>uint64(d))])
 17247  	for {
 17248  		d := auxIntToInt64(v.AuxInt)
 17249  		x := v_0
 17250  		if v_1.Op != OpARM64MOVDconst {
 17251  			break
 17252  		}
 17253  		c := auxIntToInt64(v_1.AuxInt)
 17254  		v.reset(OpARM64XORconst)
 17255  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17256  		v.AddArg(x)
 17257  		return true
 17258  	}
 17259  	// match: (XORshiftRL (SRLconst x [c]) x [c])
 17260  	// result: (MOVDconst [0])
 17261  	for {
 17262  		c := auxIntToInt64(v.AuxInt)
 17263  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != c {
 17264  			break
 17265  		}
 17266  		x := v_0.Args[0]
 17267  		if x != v_1 {
 17268  			break
 17269  		}
 17270  		v.reset(OpARM64MOVDconst)
 17271  		v.AuxInt = int64ToAuxInt(0)
 17272  		return true
 17273  	}
 17274  	return false
 17275  }
 17276  func rewriteValueARM64_OpARM64XORshiftRO(v *Value) bool {
 17277  	v_1 := v.Args[1]
 17278  	v_0 := v.Args[0]
 17279  	b := v.Block
 17280  	// match: (XORshiftRO (MOVDconst [c]) x [d])
 17281  	// result: (XORconst [c] (RORconst <x.Type> x [d]))
 17282  	for {
 17283  		d := auxIntToInt64(v.AuxInt)
 17284  		if v_0.Op != OpARM64MOVDconst {
 17285  			break
 17286  		}
 17287  		c := auxIntToInt64(v_0.AuxInt)
 17288  		x := v_1
 17289  		v.reset(OpARM64XORconst)
 17290  		v.AuxInt = int64ToAuxInt(c)
 17291  		v0 := b.NewValue0(v.Pos, OpARM64RORconst, x.Type)
 17292  		v0.AuxInt = int64ToAuxInt(d)
 17293  		v0.AddArg(x)
 17294  		v.AddArg(v0)
 17295  		return true
 17296  	}
 17297  	// match: (XORshiftRO x (MOVDconst [c]) [d])
 17298  	// result: (XORconst x [rotateRight64(c, d)])
 17299  	for {
 17300  		d := auxIntToInt64(v.AuxInt)
 17301  		x := v_0
 17302  		if v_1.Op != OpARM64MOVDconst {
 17303  			break
 17304  		}
 17305  		c := auxIntToInt64(v_1.AuxInt)
 17306  		v.reset(OpARM64XORconst)
 17307  		v.AuxInt = int64ToAuxInt(rotateRight64(c, d))
 17308  		v.AddArg(x)
 17309  		return true
 17310  	}
 17311  	// match: (XORshiftRO (RORconst x [c]) x [c])
 17312  	// result: (MOVDconst [0])
 17313  	for {
 17314  		c := auxIntToInt64(v.AuxInt)
 17315  		if v_0.Op != OpARM64RORconst || auxIntToInt64(v_0.AuxInt) != c {
 17316  			break
 17317  		}
 17318  		x := v_0.Args[0]
 17319  		if x != v_1 {
 17320  			break
 17321  		}
 17322  		v.reset(OpARM64MOVDconst)
 17323  		v.AuxInt = int64ToAuxInt(0)
 17324  		return true
 17325  	}
 17326  	return false
 17327  }
 17328  func rewriteValueARM64_OpAddr(v *Value) bool {
 17329  	v_0 := v.Args[0]
 17330  	// match: (Addr {sym} base)
 17331  	// result: (MOVDaddr {sym} base)
 17332  	for {
 17333  		sym := auxToSym(v.Aux)
 17334  		base := v_0
 17335  		v.reset(OpARM64MOVDaddr)
 17336  		v.Aux = symToAux(sym)
 17337  		v.AddArg(base)
 17338  		return true
 17339  	}
 17340  }
 17341  func rewriteValueARM64_OpAvg64u(v *Value) bool {
 17342  	v_1 := v.Args[1]
 17343  	v_0 := v.Args[0]
 17344  	b := v.Block
 17345  	// match: (Avg64u <t> x y)
 17346  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
 17347  	for {
 17348  		t := v.Type
 17349  		x := v_0
 17350  		y := v_1
 17351  		v.reset(OpARM64ADD)
 17352  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, t)
 17353  		v0.AuxInt = int64ToAuxInt(1)
 17354  		v1 := b.NewValue0(v.Pos, OpARM64SUB, t)
 17355  		v1.AddArg2(x, y)
 17356  		v0.AddArg(v1)
 17357  		v.AddArg2(v0, y)
 17358  		return true
 17359  	}
 17360  }
 17361  func rewriteValueARM64_OpBitLen16(v *Value) bool {
 17362  	v_0 := v.Args[0]
 17363  	b := v.Block
 17364  	typ := &b.Func.Config.Types
 17365  	// match: (BitLen16 x)
 17366  	// result: (BitLen64 (ZeroExt16to64 x))
 17367  	for {
 17368  		x := v_0
 17369  		v.reset(OpBitLen64)
 17370  		v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 17371  		v0.AddArg(x)
 17372  		v.AddArg(v0)
 17373  		return true
 17374  	}
 17375  }
 17376  func rewriteValueARM64_OpBitLen32(v *Value) bool {
 17377  	v_0 := v.Args[0]
 17378  	b := v.Block
 17379  	typ := &b.Func.Config.Types
 17380  	// match: (BitLen32 x)
 17381  	// result: (SUB (MOVDconst [32]) (CLZW <typ.Int> x))
 17382  	for {
 17383  		x := v_0
 17384  		v.reset(OpARM64SUB)
 17385  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 17386  		v0.AuxInt = int64ToAuxInt(32)
 17387  		v1 := b.NewValue0(v.Pos, OpARM64CLZW, typ.Int)
 17388  		v1.AddArg(x)
 17389  		v.AddArg2(v0, v1)
 17390  		return true
 17391  	}
 17392  }
 17393  func rewriteValueARM64_OpBitLen64(v *Value) bool {
 17394  	v_0 := v.Args[0]
 17395  	b := v.Block
 17396  	typ := &b.Func.Config.Types
 17397  	// match: (BitLen64 x)
 17398  	// result: (SUB (MOVDconst [64]) (CLZ <typ.Int> x))
 17399  	for {
 17400  		x := v_0
 17401  		v.reset(OpARM64SUB)
 17402  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 17403  		v0.AuxInt = int64ToAuxInt(64)
 17404  		v1 := b.NewValue0(v.Pos, OpARM64CLZ, typ.Int)
 17405  		v1.AddArg(x)
 17406  		v.AddArg2(v0, v1)
 17407  		return true
 17408  	}
 17409  }
 17410  func rewriteValueARM64_OpBitLen8(v *Value) bool {
 17411  	v_0 := v.Args[0]
 17412  	b := v.Block
 17413  	typ := &b.Func.Config.Types
 17414  	// match: (BitLen8 x)
 17415  	// result: (BitLen64 (ZeroExt8to64 x))
 17416  	for {
 17417  		x := v_0
 17418  		v.reset(OpBitLen64)
 17419  		v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 17420  		v0.AddArg(x)
 17421  		v.AddArg(v0)
 17422  		return true
 17423  	}
 17424  }
 17425  func rewriteValueARM64_OpBitRev16(v *Value) bool {
 17426  	v_0 := v.Args[0]
 17427  	b := v.Block
 17428  	typ := &b.Func.Config.Types
 17429  	// match: (BitRev16 x)
 17430  	// result: (SRLconst [48] (RBIT <typ.UInt64> x))
 17431  	for {
 17432  		x := v_0
 17433  		v.reset(OpARM64SRLconst)
 17434  		v.AuxInt = int64ToAuxInt(48)
 17435  		v0 := b.NewValue0(v.Pos, OpARM64RBIT, typ.UInt64)
 17436  		v0.AddArg(x)
 17437  		v.AddArg(v0)
 17438  		return true
 17439  	}
 17440  }
 17441  func rewriteValueARM64_OpBitRev8(v *Value) bool {
 17442  	v_0 := v.Args[0]
 17443  	b := v.Block
 17444  	typ := &b.Func.Config.Types
 17445  	// match: (BitRev8 x)
 17446  	// result: (SRLconst [56] (RBIT <typ.UInt64> x))
 17447  	for {
 17448  		x := v_0
 17449  		v.reset(OpARM64SRLconst)
 17450  		v.AuxInt = int64ToAuxInt(56)
 17451  		v0 := b.NewValue0(v.Pos, OpARM64RBIT, typ.UInt64)
 17452  		v0.AddArg(x)
 17453  		v.AddArg(v0)
 17454  		return true
 17455  	}
 17456  }
 17457  func rewriteValueARM64_OpCondSelect(v *Value) bool {
 17458  	v_2 := v.Args[2]
 17459  	v_1 := v.Args[1]
 17460  	v_0 := v.Args[0]
 17461  	b := v.Block
 17462  	// match: (CondSelect x y boolval)
 17463  	// cond: flagArg(boolval) != nil
 17464  	// result: (CSEL [boolval.Op] x y flagArg(boolval))
 17465  	for {
 17466  		x := v_0
 17467  		y := v_1
 17468  		boolval := v_2
 17469  		if !(flagArg(boolval) != nil) {
 17470  			break
 17471  		}
 17472  		v.reset(OpARM64CSEL)
 17473  		v.AuxInt = opToAuxInt(boolval.Op)
 17474  		v.AddArg3(x, y, flagArg(boolval))
 17475  		return true
 17476  	}
 17477  	// match: (CondSelect x y boolval)
 17478  	// cond: flagArg(boolval) == nil
 17479  	// result: (CSEL [OpARM64NotEqual] x y (TSTWconst [1] boolval))
 17480  	for {
 17481  		x := v_0
 17482  		y := v_1
 17483  		boolval := v_2
 17484  		if !(flagArg(boolval) == nil) {
 17485  			break
 17486  		}
 17487  		v.reset(OpARM64CSEL)
 17488  		v.AuxInt = opToAuxInt(OpARM64NotEqual)
 17489  		v0 := b.NewValue0(v.Pos, OpARM64TSTWconst, types.TypeFlags)
 17490  		v0.AuxInt = int32ToAuxInt(1)
 17491  		v0.AddArg(boolval)
 17492  		v.AddArg3(x, y, v0)
 17493  		return true
 17494  	}
 17495  	return false
 17496  }
 17497  func rewriteValueARM64_OpConst16(v *Value) bool {
 17498  	// match: (Const16 [val])
 17499  	// result: (MOVDconst [int64(val)])
 17500  	for {
 17501  		val := auxIntToInt16(v.AuxInt)
 17502  		v.reset(OpARM64MOVDconst)
 17503  		v.AuxInt = int64ToAuxInt(int64(val))
 17504  		return true
 17505  	}
 17506  }
 17507  func rewriteValueARM64_OpConst32(v *Value) bool {
 17508  	// match: (Const32 [val])
 17509  	// result: (MOVDconst [int64(val)])
 17510  	for {
 17511  		val := auxIntToInt32(v.AuxInt)
 17512  		v.reset(OpARM64MOVDconst)
 17513  		v.AuxInt = int64ToAuxInt(int64(val))
 17514  		return true
 17515  	}
 17516  }
 17517  func rewriteValueARM64_OpConst32F(v *Value) bool {
 17518  	// match: (Const32F [val])
 17519  	// result: (FMOVSconst [float64(val)])
 17520  	for {
 17521  		val := auxIntToFloat32(v.AuxInt)
 17522  		v.reset(OpARM64FMOVSconst)
 17523  		v.AuxInt = float64ToAuxInt(float64(val))
 17524  		return true
 17525  	}
 17526  }
 17527  func rewriteValueARM64_OpConst64(v *Value) bool {
 17528  	// match: (Const64 [val])
 17529  	// result: (MOVDconst [int64(val)])
 17530  	for {
 17531  		val := auxIntToInt64(v.AuxInt)
 17532  		v.reset(OpARM64MOVDconst)
 17533  		v.AuxInt = int64ToAuxInt(int64(val))
 17534  		return true
 17535  	}
 17536  }
 17537  func rewriteValueARM64_OpConst64F(v *Value) bool {
 17538  	// match: (Const64F [val])
 17539  	// result: (FMOVDconst [float64(val)])
 17540  	for {
 17541  		val := auxIntToFloat64(v.AuxInt)
 17542  		v.reset(OpARM64FMOVDconst)
 17543  		v.AuxInt = float64ToAuxInt(float64(val))
 17544  		return true
 17545  	}
 17546  }
 17547  func rewriteValueARM64_OpConst8(v *Value) bool {
 17548  	// match: (Const8 [val])
 17549  	// result: (MOVDconst [int64(val)])
 17550  	for {
 17551  		val := auxIntToInt8(v.AuxInt)
 17552  		v.reset(OpARM64MOVDconst)
 17553  		v.AuxInt = int64ToAuxInt(int64(val))
 17554  		return true
 17555  	}
 17556  }
 17557  func rewriteValueARM64_OpConstBool(v *Value) bool {
 17558  	// match: (ConstBool [t])
 17559  	// result: (MOVDconst [b2i(t)])
 17560  	for {
 17561  		t := auxIntToBool(v.AuxInt)
 17562  		v.reset(OpARM64MOVDconst)
 17563  		v.AuxInt = int64ToAuxInt(b2i(t))
 17564  		return true
 17565  	}
 17566  }
 17567  func rewriteValueARM64_OpConstNil(v *Value) bool {
 17568  	// match: (ConstNil)
 17569  	// result: (MOVDconst [0])
 17570  	for {
 17571  		v.reset(OpARM64MOVDconst)
 17572  		v.AuxInt = int64ToAuxInt(0)
 17573  		return true
 17574  	}
 17575  }
 17576  func rewriteValueARM64_OpCtz16(v *Value) bool {
 17577  	v_0 := v.Args[0]
 17578  	b := v.Block
 17579  	typ := &b.Func.Config.Types
 17580  	// match: (Ctz16 <t> x)
 17581  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
 17582  	for {
 17583  		t := v.Type
 17584  		x := v_0
 17585  		v.reset(OpARM64CLZW)
 17586  		v.Type = t
 17587  		v0 := b.NewValue0(v.Pos, OpARM64RBITW, typ.UInt32)
 17588  		v1 := b.NewValue0(v.Pos, OpARM64ORconst, typ.UInt32)
 17589  		v1.AuxInt = int64ToAuxInt(0x10000)
 17590  		v1.AddArg(x)
 17591  		v0.AddArg(v1)
 17592  		v.AddArg(v0)
 17593  		return true
 17594  	}
 17595  }
 17596  func rewriteValueARM64_OpCtz32(v *Value) bool {
 17597  	v_0 := v.Args[0]
 17598  	b := v.Block
 17599  	// match: (Ctz32 <t> x)
 17600  	// result: (CLZW (RBITW <t> x))
 17601  	for {
 17602  		t := v.Type
 17603  		x := v_0
 17604  		v.reset(OpARM64CLZW)
 17605  		v0 := b.NewValue0(v.Pos, OpARM64RBITW, t)
 17606  		v0.AddArg(x)
 17607  		v.AddArg(v0)
 17608  		return true
 17609  	}
 17610  }
 17611  func rewriteValueARM64_OpCtz64(v *Value) bool {
 17612  	v_0 := v.Args[0]
 17613  	b := v.Block
 17614  	// match: (Ctz64 <t> x)
 17615  	// result: (CLZ (RBIT <t> x))
 17616  	for {
 17617  		t := v.Type
 17618  		x := v_0
 17619  		v.reset(OpARM64CLZ)
 17620  		v0 := b.NewValue0(v.Pos, OpARM64RBIT, t)
 17621  		v0.AddArg(x)
 17622  		v.AddArg(v0)
 17623  		return true
 17624  	}
 17625  }
 17626  func rewriteValueARM64_OpCtz8(v *Value) bool {
 17627  	v_0 := v.Args[0]
 17628  	b := v.Block
 17629  	typ := &b.Func.Config.Types
 17630  	// match: (Ctz8 <t> x)
 17631  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
 17632  	for {
 17633  		t := v.Type
 17634  		x := v_0
 17635  		v.reset(OpARM64CLZW)
 17636  		v.Type = t
 17637  		v0 := b.NewValue0(v.Pos, OpARM64RBITW, typ.UInt32)
 17638  		v1 := b.NewValue0(v.Pos, OpARM64ORconst, typ.UInt32)
 17639  		v1.AuxInt = int64ToAuxInt(0x100)
 17640  		v1.AddArg(x)
 17641  		v0.AddArg(v1)
 17642  		v.AddArg(v0)
 17643  		return true
 17644  	}
 17645  }
 17646  func rewriteValueARM64_OpDiv16(v *Value) bool {
 17647  	v_1 := v.Args[1]
 17648  	v_0 := v.Args[0]
 17649  	b := v.Block
 17650  	typ := &b.Func.Config.Types
 17651  	// match: (Div16 [false] x y)
 17652  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
 17653  	for {
 17654  		if auxIntToBool(v.AuxInt) != false {
 17655  			break
 17656  		}
 17657  		x := v_0
 17658  		y := v_1
 17659  		v.reset(OpARM64DIVW)
 17660  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 17661  		v0.AddArg(x)
 17662  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 17663  		v1.AddArg(y)
 17664  		v.AddArg2(v0, v1)
 17665  		return true
 17666  	}
 17667  	return false
 17668  }
 17669  func rewriteValueARM64_OpDiv16u(v *Value) bool {
 17670  	v_1 := v.Args[1]
 17671  	v_0 := v.Args[0]
 17672  	b := v.Block
 17673  	typ := &b.Func.Config.Types
 17674  	// match: (Div16u x y)
 17675  	// result: (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
 17676  	for {
 17677  		x := v_0
 17678  		y := v_1
 17679  		v.reset(OpARM64UDIVW)
 17680  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 17681  		v0.AddArg(x)
 17682  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 17683  		v1.AddArg(y)
 17684  		v.AddArg2(v0, v1)
 17685  		return true
 17686  	}
 17687  }
 17688  func rewriteValueARM64_OpDiv32(v *Value) bool {
 17689  	v_1 := v.Args[1]
 17690  	v_0 := v.Args[0]
 17691  	// match: (Div32 [false] x y)
 17692  	// result: (DIVW x y)
 17693  	for {
 17694  		if auxIntToBool(v.AuxInt) != false {
 17695  			break
 17696  		}
 17697  		x := v_0
 17698  		y := v_1
 17699  		v.reset(OpARM64DIVW)
 17700  		v.AddArg2(x, y)
 17701  		return true
 17702  	}
 17703  	return false
 17704  }
 17705  func rewriteValueARM64_OpDiv64(v *Value) bool {
 17706  	v_1 := v.Args[1]
 17707  	v_0 := v.Args[0]
 17708  	// match: (Div64 [false] x y)
 17709  	// result: (DIV x y)
 17710  	for {
 17711  		if auxIntToBool(v.AuxInt) != false {
 17712  			break
 17713  		}
 17714  		x := v_0
 17715  		y := v_1
 17716  		v.reset(OpARM64DIV)
 17717  		v.AddArg2(x, y)
 17718  		return true
 17719  	}
 17720  	return false
 17721  }
 17722  func rewriteValueARM64_OpDiv8(v *Value) bool {
 17723  	v_1 := v.Args[1]
 17724  	v_0 := v.Args[0]
 17725  	b := v.Block
 17726  	typ := &b.Func.Config.Types
 17727  	// match: (Div8 x y)
 17728  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
 17729  	for {
 17730  		x := v_0
 17731  		y := v_1
 17732  		v.reset(OpARM64DIVW)
 17733  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 17734  		v0.AddArg(x)
 17735  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 17736  		v1.AddArg(y)
 17737  		v.AddArg2(v0, v1)
 17738  		return true
 17739  	}
 17740  }
 17741  func rewriteValueARM64_OpDiv8u(v *Value) bool {
 17742  	v_1 := v.Args[1]
 17743  	v_0 := v.Args[0]
 17744  	b := v.Block
 17745  	typ := &b.Func.Config.Types
 17746  	// match: (Div8u x y)
 17747  	// result: (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y))
 17748  	for {
 17749  		x := v_0
 17750  		y := v_1
 17751  		v.reset(OpARM64UDIVW)
 17752  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 17753  		v0.AddArg(x)
 17754  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 17755  		v1.AddArg(y)
 17756  		v.AddArg2(v0, v1)
 17757  		return true
 17758  	}
 17759  }
 17760  func rewriteValueARM64_OpEq16(v *Value) bool {
 17761  	v_1 := v.Args[1]
 17762  	v_0 := v.Args[0]
 17763  	b := v.Block
 17764  	typ := &b.Func.Config.Types
 17765  	// match: (Eq16 x y)
 17766  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 17767  	for {
 17768  		x := v_0
 17769  		y := v_1
 17770  		v.reset(OpARM64Equal)
 17771  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 17772  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 17773  		v1.AddArg(x)
 17774  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 17775  		v2.AddArg(y)
 17776  		v0.AddArg2(v1, v2)
 17777  		v.AddArg(v0)
 17778  		return true
 17779  	}
 17780  }
 17781  func rewriteValueARM64_OpEq32(v *Value) bool {
 17782  	v_1 := v.Args[1]
 17783  	v_0 := v.Args[0]
 17784  	b := v.Block
 17785  	// match: (Eq32 x y)
 17786  	// result: (Equal (CMPW x y))
 17787  	for {
 17788  		x := v_0
 17789  		y := v_1
 17790  		v.reset(OpARM64Equal)
 17791  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 17792  		v0.AddArg2(x, y)
 17793  		v.AddArg(v0)
 17794  		return true
 17795  	}
 17796  }
 17797  func rewriteValueARM64_OpEq32F(v *Value) bool {
 17798  	v_1 := v.Args[1]
 17799  	v_0 := v.Args[0]
 17800  	b := v.Block
 17801  	// match: (Eq32F x y)
 17802  	// result: (Equal (FCMPS x y))
 17803  	for {
 17804  		x := v_0
 17805  		y := v_1
 17806  		v.reset(OpARM64Equal)
 17807  		v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
 17808  		v0.AddArg2(x, y)
 17809  		v.AddArg(v0)
 17810  		return true
 17811  	}
 17812  }
 17813  func rewriteValueARM64_OpEq64(v *Value) bool {
 17814  	v_1 := v.Args[1]
 17815  	v_0 := v.Args[0]
 17816  	b := v.Block
 17817  	// match: (Eq64 x y)
 17818  	// result: (Equal (CMP x y))
 17819  	for {
 17820  		x := v_0
 17821  		y := v_1
 17822  		v.reset(OpARM64Equal)
 17823  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 17824  		v0.AddArg2(x, y)
 17825  		v.AddArg(v0)
 17826  		return true
 17827  	}
 17828  }
 17829  func rewriteValueARM64_OpEq64F(v *Value) bool {
 17830  	v_1 := v.Args[1]
 17831  	v_0 := v.Args[0]
 17832  	b := v.Block
 17833  	// match: (Eq64F x y)
 17834  	// result: (Equal (FCMPD x y))
 17835  	for {
 17836  		x := v_0
 17837  		y := v_1
 17838  		v.reset(OpARM64Equal)
 17839  		v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
 17840  		v0.AddArg2(x, y)
 17841  		v.AddArg(v0)
 17842  		return true
 17843  	}
 17844  }
 17845  func rewriteValueARM64_OpEq8(v *Value) bool {
 17846  	v_1 := v.Args[1]
 17847  	v_0 := v.Args[0]
 17848  	b := v.Block
 17849  	typ := &b.Func.Config.Types
 17850  	// match: (Eq8 x y)
 17851  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 17852  	for {
 17853  		x := v_0
 17854  		y := v_1
 17855  		v.reset(OpARM64Equal)
 17856  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 17857  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 17858  		v1.AddArg(x)
 17859  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 17860  		v2.AddArg(y)
 17861  		v0.AddArg2(v1, v2)
 17862  		v.AddArg(v0)
 17863  		return true
 17864  	}
 17865  }
 17866  func rewriteValueARM64_OpEqB(v *Value) bool {
 17867  	v_1 := v.Args[1]
 17868  	v_0 := v.Args[0]
 17869  	b := v.Block
 17870  	typ := &b.Func.Config.Types
 17871  	// match: (EqB x y)
 17872  	// result: (XOR (MOVDconst [1]) (XOR <typ.Bool> x y))
 17873  	for {
 17874  		x := v_0
 17875  		y := v_1
 17876  		v.reset(OpARM64XOR)
 17877  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 17878  		v0.AuxInt = int64ToAuxInt(1)
 17879  		v1 := b.NewValue0(v.Pos, OpARM64XOR, typ.Bool)
 17880  		v1.AddArg2(x, y)
 17881  		v.AddArg2(v0, v1)
 17882  		return true
 17883  	}
 17884  }
 17885  func rewriteValueARM64_OpEqPtr(v *Value) bool {
 17886  	v_1 := v.Args[1]
 17887  	v_0 := v.Args[0]
 17888  	b := v.Block
 17889  	// match: (EqPtr x y)
 17890  	// result: (Equal (CMP x y))
 17891  	for {
 17892  		x := v_0
 17893  		y := v_1
 17894  		v.reset(OpARM64Equal)
 17895  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 17896  		v0.AddArg2(x, y)
 17897  		v.AddArg(v0)
 17898  		return true
 17899  	}
 17900  }
 17901  func rewriteValueARM64_OpFMA(v *Value) bool {
 17902  	v_2 := v.Args[2]
 17903  	v_1 := v.Args[1]
 17904  	v_0 := v.Args[0]
 17905  	// match: (FMA x y z)
 17906  	// result: (FMADDD z x y)
 17907  	for {
 17908  		x := v_0
 17909  		y := v_1
 17910  		z := v_2
 17911  		v.reset(OpARM64FMADDD)
 17912  		v.AddArg3(z, x, y)
 17913  		return true
 17914  	}
 17915  }
 17916  func rewriteValueARM64_OpHmul32(v *Value) bool {
 17917  	v_1 := v.Args[1]
 17918  	v_0 := v.Args[0]
 17919  	b := v.Block
 17920  	typ := &b.Func.Config.Types
 17921  	// match: (Hmul32 x y)
 17922  	// result: (SRAconst (MULL <typ.Int64> x y) [32])
 17923  	for {
 17924  		x := v_0
 17925  		y := v_1
 17926  		v.reset(OpARM64SRAconst)
 17927  		v.AuxInt = int64ToAuxInt(32)
 17928  		v0 := b.NewValue0(v.Pos, OpARM64MULL, typ.Int64)
 17929  		v0.AddArg2(x, y)
 17930  		v.AddArg(v0)
 17931  		return true
 17932  	}
 17933  }
 17934  func rewriteValueARM64_OpHmul32u(v *Value) bool {
 17935  	v_1 := v.Args[1]
 17936  	v_0 := v.Args[0]
 17937  	b := v.Block
 17938  	typ := &b.Func.Config.Types
 17939  	// match: (Hmul32u x y)
 17940  	// result: (SRAconst (UMULL <typ.UInt64> x y) [32])
 17941  	for {
 17942  		x := v_0
 17943  		y := v_1
 17944  		v.reset(OpARM64SRAconst)
 17945  		v.AuxInt = int64ToAuxInt(32)
 17946  		v0 := b.NewValue0(v.Pos, OpARM64UMULL, typ.UInt64)
 17947  		v0.AddArg2(x, y)
 17948  		v.AddArg(v0)
 17949  		return true
 17950  	}
 17951  }
 17952  func rewriteValueARM64_OpIsInBounds(v *Value) bool {
 17953  	v_1 := v.Args[1]
 17954  	v_0 := v.Args[0]
 17955  	b := v.Block
 17956  	// match: (IsInBounds idx len)
 17957  	// result: (LessThanU (CMP idx len))
 17958  	for {
 17959  		idx := v_0
 17960  		len := v_1
 17961  		v.reset(OpARM64LessThanU)
 17962  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 17963  		v0.AddArg2(idx, len)
 17964  		v.AddArg(v0)
 17965  		return true
 17966  	}
 17967  }
 17968  func rewriteValueARM64_OpIsNonNil(v *Value) bool {
 17969  	v_0 := v.Args[0]
 17970  	b := v.Block
 17971  	// match: (IsNonNil ptr)
 17972  	// result: (NotEqual (CMPconst [0] ptr))
 17973  	for {
 17974  		ptr := v_0
 17975  		v.reset(OpARM64NotEqual)
 17976  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
 17977  		v0.AuxInt = int64ToAuxInt(0)
 17978  		v0.AddArg(ptr)
 17979  		v.AddArg(v0)
 17980  		return true
 17981  	}
 17982  }
 17983  func rewriteValueARM64_OpIsSliceInBounds(v *Value) bool {
 17984  	v_1 := v.Args[1]
 17985  	v_0 := v.Args[0]
 17986  	b := v.Block
 17987  	// match: (IsSliceInBounds idx len)
 17988  	// result: (LessEqualU (CMP idx len))
 17989  	for {
 17990  		idx := v_0
 17991  		len := v_1
 17992  		v.reset(OpARM64LessEqualU)
 17993  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 17994  		v0.AddArg2(idx, len)
 17995  		v.AddArg(v0)
 17996  		return true
 17997  	}
 17998  }
 17999  func rewriteValueARM64_OpLeq16(v *Value) bool {
 18000  	v_1 := v.Args[1]
 18001  	v_0 := v.Args[0]
 18002  	b := v.Block
 18003  	typ := &b.Func.Config.Types
 18004  	// match: (Leq16 x y)
 18005  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 18006  	for {
 18007  		x := v_0
 18008  		y := v_1
 18009  		v.reset(OpARM64LessEqual)
 18010  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18011  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 18012  		v1.AddArg(x)
 18013  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 18014  		v2.AddArg(y)
 18015  		v0.AddArg2(v1, v2)
 18016  		v.AddArg(v0)
 18017  		return true
 18018  	}
 18019  }
 18020  func rewriteValueARM64_OpLeq16U(v *Value) bool {
 18021  	v_1 := v.Args[1]
 18022  	v_0 := v.Args[0]
 18023  	b := v.Block
 18024  	typ := &b.Func.Config.Types
 18025  	// match: (Leq16U x zero:(MOVDconst [0]))
 18026  	// result: (Eq16 x zero)
 18027  	for {
 18028  		x := v_0
 18029  		zero := v_1
 18030  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18031  			break
 18032  		}
 18033  		v.reset(OpEq16)
 18034  		v.AddArg2(x, zero)
 18035  		return true
 18036  	}
 18037  	// match: (Leq16U (MOVDconst [1]) x)
 18038  	// result: (Neq16 (MOVDconst [0]) x)
 18039  	for {
 18040  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 1 {
 18041  			break
 18042  		}
 18043  		x := v_1
 18044  		v.reset(OpNeq16)
 18045  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18046  		v0.AuxInt = int64ToAuxInt(0)
 18047  		v.AddArg2(v0, x)
 18048  		return true
 18049  	}
 18050  	// match: (Leq16U x y)
 18051  	// result: (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 18052  	for {
 18053  		x := v_0
 18054  		y := v_1
 18055  		v.reset(OpARM64LessEqualU)
 18056  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18057  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18058  		v1.AddArg(x)
 18059  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18060  		v2.AddArg(y)
 18061  		v0.AddArg2(v1, v2)
 18062  		v.AddArg(v0)
 18063  		return true
 18064  	}
 18065  }
 18066  func rewriteValueARM64_OpLeq32(v *Value) bool {
 18067  	v_1 := v.Args[1]
 18068  	v_0 := v.Args[0]
 18069  	b := v.Block
 18070  	// match: (Leq32 x y)
 18071  	// result: (LessEqual (CMPW x y))
 18072  	for {
 18073  		x := v_0
 18074  		y := v_1
 18075  		v.reset(OpARM64LessEqual)
 18076  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18077  		v0.AddArg2(x, y)
 18078  		v.AddArg(v0)
 18079  		return true
 18080  	}
 18081  }
 18082  func rewriteValueARM64_OpLeq32F(v *Value) bool {
 18083  	v_1 := v.Args[1]
 18084  	v_0 := v.Args[0]
 18085  	b := v.Block
 18086  	// match: (Leq32F x y)
 18087  	// result: (LessEqualF (FCMPS x y))
 18088  	for {
 18089  		x := v_0
 18090  		y := v_1
 18091  		v.reset(OpARM64LessEqualF)
 18092  		v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
 18093  		v0.AddArg2(x, y)
 18094  		v.AddArg(v0)
 18095  		return true
 18096  	}
 18097  }
 18098  func rewriteValueARM64_OpLeq32U(v *Value) bool {
 18099  	v_1 := v.Args[1]
 18100  	v_0 := v.Args[0]
 18101  	b := v.Block
 18102  	typ := &b.Func.Config.Types
 18103  	// match: (Leq32U x zero:(MOVDconst [0]))
 18104  	// result: (Eq32 x zero)
 18105  	for {
 18106  		x := v_0
 18107  		zero := v_1
 18108  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18109  			break
 18110  		}
 18111  		v.reset(OpEq32)
 18112  		v.AddArg2(x, zero)
 18113  		return true
 18114  	}
 18115  	// match: (Leq32U (MOVDconst [1]) x)
 18116  	// result: (Neq32 (MOVDconst [0]) x)
 18117  	for {
 18118  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 1 {
 18119  			break
 18120  		}
 18121  		x := v_1
 18122  		v.reset(OpNeq32)
 18123  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18124  		v0.AuxInt = int64ToAuxInt(0)
 18125  		v.AddArg2(v0, x)
 18126  		return true
 18127  	}
 18128  	// match: (Leq32U x y)
 18129  	// result: (LessEqualU (CMPW x y))
 18130  	for {
 18131  		x := v_0
 18132  		y := v_1
 18133  		v.reset(OpARM64LessEqualU)
 18134  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18135  		v0.AddArg2(x, y)
 18136  		v.AddArg(v0)
 18137  		return true
 18138  	}
 18139  }
 18140  func rewriteValueARM64_OpLeq64(v *Value) bool {
 18141  	v_1 := v.Args[1]
 18142  	v_0 := v.Args[0]
 18143  	b := v.Block
 18144  	// match: (Leq64 x y)
 18145  	// result: (LessEqual (CMP x y))
 18146  	for {
 18147  		x := v_0
 18148  		y := v_1
 18149  		v.reset(OpARM64LessEqual)
 18150  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 18151  		v0.AddArg2(x, y)
 18152  		v.AddArg(v0)
 18153  		return true
 18154  	}
 18155  }
 18156  func rewriteValueARM64_OpLeq64F(v *Value) bool {
 18157  	v_1 := v.Args[1]
 18158  	v_0 := v.Args[0]
 18159  	b := v.Block
 18160  	// match: (Leq64F x y)
 18161  	// result: (LessEqualF (FCMPD x y))
 18162  	for {
 18163  		x := v_0
 18164  		y := v_1
 18165  		v.reset(OpARM64LessEqualF)
 18166  		v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
 18167  		v0.AddArg2(x, y)
 18168  		v.AddArg(v0)
 18169  		return true
 18170  	}
 18171  }
 18172  func rewriteValueARM64_OpLeq64U(v *Value) bool {
 18173  	v_1 := v.Args[1]
 18174  	v_0 := v.Args[0]
 18175  	b := v.Block
 18176  	typ := &b.Func.Config.Types
 18177  	// match: (Leq64U x zero:(MOVDconst [0]))
 18178  	// result: (Eq64 x zero)
 18179  	for {
 18180  		x := v_0
 18181  		zero := v_1
 18182  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18183  			break
 18184  		}
 18185  		v.reset(OpEq64)
 18186  		v.AddArg2(x, zero)
 18187  		return true
 18188  	}
 18189  	// match: (Leq64U (MOVDconst [1]) x)
 18190  	// result: (Neq64 (MOVDconst [0]) x)
 18191  	for {
 18192  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 1 {
 18193  			break
 18194  		}
 18195  		x := v_1
 18196  		v.reset(OpNeq64)
 18197  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18198  		v0.AuxInt = int64ToAuxInt(0)
 18199  		v.AddArg2(v0, x)
 18200  		return true
 18201  	}
 18202  	// match: (Leq64U x y)
 18203  	// result: (LessEqualU (CMP x y))
 18204  	for {
 18205  		x := v_0
 18206  		y := v_1
 18207  		v.reset(OpARM64LessEqualU)
 18208  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 18209  		v0.AddArg2(x, y)
 18210  		v.AddArg(v0)
 18211  		return true
 18212  	}
 18213  }
 18214  func rewriteValueARM64_OpLeq8(v *Value) bool {
 18215  	v_1 := v.Args[1]
 18216  	v_0 := v.Args[0]
 18217  	b := v.Block
 18218  	typ := &b.Func.Config.Types
 18219  	// match: (Leq8 x y)
 18220  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 18221  	for {
 18222  		x := v_0
 18223  		y := v_1
 18224  		v.reset(OpARM64LessEqual)
 18225  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18226  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 18227  		v1.AddArg(x)
 18228  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 18229  		v2.AddArg(y)
 18230  		v0.AddArg2(v1, v2)
 18231  		v.AddArg(v0)
 18232  		return true
 18233  	}
 18234  }
 18235  func rewriteValueARM64_OpLeq8U(v *Value) bool {
 18236  	v_1 := v.Args[1]
 18237  	v_0 := v.Args[0]
 18238  	b := v.Block
 18239  	typ := &b.Func.Config.Types
 18240  	// match: (Leq8U x zero:(MOVDconst [0]))
 18241  	// result: (Eq8 x zero)
 18242  	for {
 18243  		x := v_0
 18244  		zero := v_1
 18245  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18246  			break
 18247  		}
 18248  		v.reset(OpEq8)
 18249  		v.AddArg2(x, zero)
 18250  		return true
 18251  	}
 18252  	// match: (Leq8U (MOVDconst [1]) x)
 18253  	// result: (Neq8 (MOVDconst [0]) x)
 18254  	for {
 18255  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 1 {
 18256  			break
 18257  		}
 18258  		x := v_1
 18259  		v.reset(OpNeq8)
 18260  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18261  		v0.AuxInt = int64ToAuxInt(0)
 18262  		v.AddArg2(v0, x)
 18263  		return true
 18264  	}
 18265  	// match: (Leq8U x y)
 18266  	// result: (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 18267  	for {
 18268  		x := v_0
 18269  		y := v_1
 18270  		v.reset(OpARM64LessEqualU)
 18271  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18272  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 18273  		v1.AddArg(x)
 18274  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 18275  		v2.AddArg(y)
 18276  		v0.AddArg2(v1, v2)
 18277  		v.AddArg(v0)
 18278  		return true
 18279  	}
 18280  }
 18281  func rewriteValueARM64_OpLess16(v *Value) bool {
 18282  	v_1 := v.Args[1]
 18283  	v_0 := v.Args[0]
 18284  	b := v.Block
 18285  	typ := &b.Func.Config.Types
 18286  	// match: (Less16 x y)
 18287  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 18288  	for {
 18289  		x := v_0
 18290  		y := v_1
 18291  		v.reset(OpARM64LessThan)
 18292  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18293  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 18294  		v1.AddArg(x)
 18295  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 18296  		v2.AddArg(y)
 18297  		v0.AddArg2(v1, v2)
 18298  		v.AddArg(v0)
 18299  		return true
 18300  	}
 18301  }
 18302  func rewriteValueARM64_OpLess16U(v *Value) bool {
 18303  	v_1 := v.Args[1]
 18304  	v_0 := v.Args[0]
 18305  	b := v.Block
 18306  	typ := &b.Func.Config.Types
 18307  	// match: (Less16U zero:(MOVDconst [0]) x)
 18308  	// result: (Neq16 zero x)
 18309  	for {
 18310  		zero := v_0
 18311  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18312  			break
 18313  		}
 18314  		x := v_1
 18315  		v.reset(OpNeq16)
 18316  		v.AddArg2(zero, x)
 18317  		return true
 18318  	}
 18319  	// match: (Less16U x (MOVDconst [1]))
 18320  	// result: (Eq16 x (MOVDconst [0]))
 18321  	for {
 18322  		x := v_0
 18323  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 18324  			break
 18325  		}
 18326  		v.reset(OpEq16)
 18327  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18328  		v0.AuxInt = int64ToAuxInt(0)
 18329  		v.AddArg2(x, v0)
 18330  		return true
 18331  	}
 18332  	// match: (Less16U x y)
 18333  	// result: (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 18334  	for {
 18335  		x := v_0
 18336  		y := v_1
 18337  		v.reset(OpARM64LessThanU)
 18338  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18339  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18340  		v1.AddArg(x)
 18341  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18342  		v2.AddArg(y)
 18343  		v0.AddArg2(v1, v2)
 18344  		v.AddArg(v0)
 18345  		return true
 18346  	}
 18347  }
 18348  func rewriteValueARM64_OpLess32(v *Value) bool {
 18349  	v_1 := v.Args[1]
 18350  	v_0 := v.Args[0]
 18351  	b := v.Block
 18352  	// match: (Less32 x y)
 18353  	// result: (LessThan (CMPW x y))
 18354  	for {
 18355  		x := v_0
 18356  		y := v_1
 18357  		v.reset(OpARM64LessThan)
 18358  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18359  		v0.AddArg2(x, y)
 18360  		v.AddArg(v0)
 18361  		return true
 18362  	}
 18363  }
 18364  func rewriteValueARM64_OpLess32F(v *Value) bool {
 18365  	v_1 := v.Args[1]
 18366  	v_0 := v.Args[0]
 18367  	b := v.Block
 18368  	// match: (Less32F x y)
 18369  	// result: (LessThanF (FCMPS x y))
 18370  	for {
 18371  		x := v_0
 18372  		y := v_1
 18373  		v.reset(OpARM64LessThanF)
 18374  		v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
 18375  		v0.AddArg2(x, y)
 18376  		v.AddArg(v0)
 18377  		return true
 18378  	}
 18379  }
 18380  func rewriteValueARM64_OpLess32U(v *Value) bool {
 18381  	v_1 := v.Args[1]
 18382  	v_0 := v.Args[0]
 18383  	b := v.Block
 18384  	typ := &b.Func.Config.Types
 18385  	// match: (Less32U zero:(MOVDconst [0]) x)
 18386  	// result: (Neq32 zero x)
 18387  	for {
 18388  		zero := v_0
 18389  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18390  			break
 18391  		}
 18392  		x := v_1
 18393  		v.reset(OpNeq32)
 18394  		v.AddArg2(zero, x)
 18395  		return true
 18396  	}
 18397  	// match: (Less32U x (MOVDconst [1]))
 18398  	// result: (Eq32 x (MOVDconst [0]))
 18399  	for {
 18400  		x := v_0
 18401  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 18402  			break
 18403  		}
 18404  		v.reset(OpEq32)
 18405  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18406  		v0.AuxInt = int64ToAuxInt(0)
 18407  		v.AddArg2(x, v0)
 18408  		return true
 18409  	}
 18410  	// match: (Less32U x y)
 18411  	// result: (LessThanU (CMPW x y))
 18412  	for {
 18413  		x := v_0
 18414  		y := v_1
 18415  		v.reset(OpARM64LessThanU)
 18416  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18417  		v0.AddArg2(x, y)
 18418  		v.AddArg(v0)
 18419  		return true
 18420  	}
 18421  }
 18422  func rewriteValueARM64_OpLess64(v *Value) bool {
 18423  	v_1 := v.Args[1]
 18424  	v_0 := v.Args[0]
 18425  	b := v.Block
 18426  	// match: (Less64 x y)
 18427  	// result: (LessThan (CMP x y))
 18428  	for {
 18429  		x := v_0
 18430  		y := v_1
 18431  		v.reset(OpARM64LessThan)
 18432  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 18433  		v0.AddArg2(x, y)
 18434  		v.AddArg(v0)
 18435  		return true
 18436  	}
 18437  }
 18438  func rewriteValueARM64_OpLess64F(v *Value) bool {
 18439  	v_1 := v.Args[1]
 18440  	v_0 := v.Args[0]
 18441  	b := v.Block
 18442  	// match: (Less64F x y)
 18443  	// result: (LessThanF (FCMPD x y))
 18444  	for {
 18445  		x := v_0
 18446  		y := v_1
 18447  		v.reset(OpARM64LessThanF)
 18448  		v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
 18449  		v0.AddArg2(x, y)
 18450  		v.AddArg(v0)
 18451  		return true
 18452  	}
 18453  }
 18454  func rewriteValueARM64_OpLess64U(v *Value) bool {
 18455  	v_1 := v.Args[1]
 18456  	v_0 := v.Args[0]
 18457  	b := v.Block
 18458  	typ := &b.Func.Config.Types
 18459  	// match: (Less64U zero:(MOVDconst [0]) x)
 18460  	// result: (Neq64 zero x)
 18461  	for {
 18462  		zero := v_0
 18463  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18464  			break
 18465  		}
 18466  		x := v_1
 18467  		v.reset(OpNeq64)
 18468  		v.AddArg2(zero, x)
 18469  		return true
 18470  	}
 18471  	// match: (Less64U x (MOVDconst [1]))
 18472  	// result: (Eq64 x (MOVDconst [0]))
 18473  	for {
 18474  		x := v_0
 18475  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 18476  			break
 18477  		}
 18478  		v.reset(OpEq64)
 18479  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18480  		v0.AuxInt = int64ToAuxInt(0)
 18481  		v.AddArg2(x, v0)
 18482  		return true
 18483  	}
 18484  	// match: (Less64U x y)
 18485  	// result: (LessThanU (CMP x y))
 18486  	for {
 18487  		x := v_0
 18488  		y := v_1
 18489  		v.reset(OpARM64LessThanU)
 18490  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 18491  		v0.AddArg2(x, y)
 18492  		v.AddArg(v0)
 18493  		return true
 18494  	}
 18495  }
 18496  func rewriteValueARM64_OpLess8(v *Value) bool {
 18497  	v_1 := v.Args[1]
 18498  	v_0 := v.Args[0]
 18499  	b := v.Block
 18500  	typ := &b.Func.Config.Types
 18501  	// match: (Less8 x y)
 18502  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 18503  	for {
 18504  		x := v_0
 18505  		y := v_1
 18506  		v.reset(OpARM64LessThan)
 18507  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18508  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 18509  		v1.AddArg(x)
 18510  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 18511  		v2.AddArg(y)
 18512  		v0.AddArg2(v1, v2)
 18513  		v.AddArg(v0)
 18514  		return true
 18515  	}
 18516  }
 18517  func rewriteValueARM64_OpLess8U(v *Value) bool {
 18518  	v_1 := v.Args[1]
 18519  	v_0 := v.Args[0]
 18520  	b := v.Block
 18521  	typ := &b.Func.Config.Types
 18522  	// match: (Less8U zero:(MOVDconst [0]) x)
 18523  	// result: (Neq8 zero x)
 18524  	for {
 18525  		zero := v_0
 18526  		if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 {
 18527  			break
 18528  		}
 18529  		x := v_1
 18530  		v.reset(OpNeq8)
 18531  		v.AddArg2(zero, x)
 18532  		return true
 18533  	}
 18534  	// match: (Less8U x (MOVDconst [1]))
 18535  	// result: (Eq8 x (MOVDconst [0]))
 18536  	for {
 18537  		x := v_0
 18538  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
 18539  			break
 18540  		}
 18541  		v.reset(OpEq8)
 18542  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 18543  		v0.AuxInt = int64ToAuxInt(0)
 18544  		v.AddArg2(x, v0)
 18545  		return true
 18546  	}
 18547  	// match: (Less8U x y)
 18548  	// result: (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 18549  	for {
 18550  		x := v_0
 18551  		y := v_1
 18552  		v.reset(OpARM64LessThanU)
 18553  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 18554  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 18555  		v1.AddArg(x)
 18556  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 18557  		v2.AddArg(y)
 18558  		v0.AddArg2(v1, v2)
 18559  		v.AddArg(v0)
 18560  		return true
 18561  	}
 18562  }
 18563  func rewriteValueARM64_OpLoad(v *Value) bool {
 18564  	v_1 := v.Args[1]
 18565  	v_0 := v.Args[0]
 18566  	// match: (Load <t> ptr mem)
 18567  	// cond: t.IsBoolean()
 18568  	// result: (MOVBUload ptr mem)
 18569  	for {
 18570  		t := v.Type
 18571  		ptr := v_0
 18572  		mem := v_1
 18573  		if !(t.IsBoolean()) {
 18574  			break
 18575  		}
 18576  		v.reset(OpARM64MOVBUload)
 18577  		v.AddArg2(ptr, mem)
 18578  		return true
 18579  	}
 18580  	// match: (Load <t> ptr mem)
 18581  	// cond: (is8BitInt(t) && t.IsSigned())
 18582  	// result: (MOVBload ptr mem)
 18583  	for {
 18584  		t := v.Type
 18585  		ptr := v_0
 18586  		mem := v_1
 18587  		if !(is8BitInt(t) && t.IsSigned()) {
 18588  			break
 18589  		}
 18590  		v.reset(OpARM64MOVBload)
 18591  		v.AddArg2(ptr, mem)
 18592  		return true
 18593  	}
 18594  	// match: (Load <t> ptr mem)
 18595  	// cond: (is8BitInt(t) && !t.IsSigned())
 18596  	// result: (MOVBUload ptr mem)
 18597  	for {
 18598  		t := v.Type
 18599  		ptr := v_0
 18600  		mem := v_1
 18601  		if !(is8BitInt(t) && !t.IsSigned()) {
 18602  			break
 18603  		}
 18604  		v.reset(OpARM64MOVBUload)
 18605  		v.AddArg2(ptr, mem)
 18606  		return true
 18607  	}
 18608  	// match: (Load <t> ptr mem)
 18609  	// cond: (is16BitInt(t) && t.IsSigned())
 18610  	// result: (MOVHload ptr mem)
 18611  	for {
 18612  		t := v.Type
 18613  		ptr := v_0
 18614  		mem := v_1
 18615  		if !(is16BitInt(t) && t.IsSigned()) {
 18616  			break
 18617  		}
 18618  		v.reset(OpARM64MOVHload)
 18619  		v.AddArg2(ptr, mem)
 18620  		return true
 18621  	}
 18622  	// match: (Load <t> ptr mem)
 18623  	// cond: (is16BitInt(t) && !t.IsSigned())
 18624  	// result: (MOVHUload ptr mem)
 18625  	for {
 18626  		t := v.Type
 18627  		ptr := v_0
 18628  		mem := v_1
 18629  		if !(is16BitInt(t) && !t.IsSigned()) {
 18630  			break
 18631  		}
 18632  		v.reset(OpARM64MOVHUload)
 18633  		v.AddArg2(ptr, mem)
 18634  		return true
 18635  	}
 18636  	// match: (Load <t> ptr mem)
 18637  	// cond: (is32BitInt(t) && t.IsSigned())
 18638  	// result: (MOVWload ptr mem)
 18639  	for {
 18640  		t := v.Type
 18641  		ptr := v_0
 18642  		mem := v_1
 18643  		if !(is32BitInt(t) && t.IsSigned()) {
 18644  			break
 18645  		}
 18646  		v.reset(OpARM64MOVWload)
 18647  		v.AddArg2(ptr, mem)
 18648  		return true
 18649  	}
 18650  	// match: (Load <t> ptr mem)
 18651  	// cond: (is32BitInt(t) && !t.IsSigned())
 18652  	// result: (MOVWUload ptr mem)
 18653  	for {
 18654  		t := v.Type
 18655  		ptr := v_0
 18656  		mem := v_1
 18657  		if !(is32BitInt(t) && !t.IsSigned()) {
 18658  			break
 18659  		}
 18660  		v.reset(OpARM64MOVWUload)
 18661  		v.AddArg2(ptr, mem)
 18662  		return true
 18663  	}
 18664  	// match: (Load <t> ptr mem)
 18665  	// cond: (is64BitInt(t) || isPtr(t))
 18666  	// result: (MOVDload ptr mem)
 18667  	for {
 18668  		t := v.Type
 18669  		ptr := v_0
 18670  		mem := v_1
 18671  		if !(is64BitInt(t) || isPtr(t)) {
 18672  			break
 18673  		}
 18674  		v.reset(OpARM64MOVDload)
 18675  		v.AddArg2(ptr, mem)
 18676  		return true
 18677  	}
 18678  	// match: (Load <t> ptr mem)
 18679  	// cond: is32BitFloat(t)
 18680  	// result: (FMOVSload ptr mem)
 18681  	for {
 18682  		t := v.Type
 18683  		ptr := v_0
 18684  		mem := v_1
 18685  		if !(is32BitFloat(t)) {
 18686  			break
 18687  		}
 18688  		v.reset(OpARM64FMOVSload)
 18689  		v.AddArg2(ptr, mem)
 18690  		return true
 18691  	}
 18692  	// match: (Load <t> ptr mem)
 18693  	// cond: is64BitFloat(t)
 18694  	// result: (FMOVDload ptr mem)
 18695  	for {
 18696  		t := v.Type
 18697  		ptr := v_0
 18698  		mem := v_1
 18699  		if !(is64BitFloat(t)) {
 18700  			break
 18701  		}
 18702  		v.reset(OpARM64FMOVDload)
 18703  		v.AddArg2(ptr, mem)
 18704  		return true
 18705  	}
 18706  	return false
 18707  }
 18708  func rewriteValueARM64_OpLocalAddr(v *Value) bool {
 18709  	v_1 := v.Args[1]
 18710  	v_0 := v.Args[0]
 18711  	b := v.Block
 18712  	typ := &b.Func.Config.Types
 18713  	// match: (LocalAddr <t> {sym} base mem)
 18714  	// cond: t.Elem().HasPointers()
 18715  	// result: (MOVDaddr {sym} (SPanchored base mem))
 18716  	for {
 18717  		t := v.Type
 18718  		sym := auxToSym(v.Aux)
 18719  		base := v_0
 18720  		mem := v_1
 18721  		if !(t.Elem().HasPointers()) {
 18722  			break
 18723  		}
 18724  		v.reset(OpARM64MOVDaddr)
 18725  		v.Aux = symToAux(sym)
 18726  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
 18727  		v0.AddArg2(base, mem)
 18728  		v.AddArg(v0)
 18729  		return true
 18730  	}
 18731  	// match: (LocalAddr <t> {sym} base _)
 18732  	// cond: !t.Elem().HasPointers()
 18733  	// result: (MOVDaddr {sym} base)
 18734  	for {
 18735  		t := v.Type
 18736  		sym := auxToSym(v.Aux)
 18737  		base := v_0
 18738  		if !(!t.Elem().HasPointers()) {
 18739  			break
 18740  		}
 18741  		v.reset(OpARM64MOVDaddr)
 18742  		v.Aux = symToAux(sym)
 18743  		v.AddArg(base)
 18744  		return true
 18745  	}
 18746  	return false
 18747  }
 18748  func rewriteValueARM64_OpLsh64x16(v *Value) bool {
 18749  	v_1 := v.Args[1]
 18750  	v_0 := v.Args[0]
 18751  	b := v.Block
 18752  	typ := &b.Func.Config.Types
 18753  	// match: (Lsh64x16 <t> x y)
 18754  	// cond: shiftIsBounded(v)
 18755  	// result: (SLL <t> x y)
 18756  	for {
 18757  		t := v.Type
 18758  		x := v_0
 18759  		y := v_1
 18760  		if !(shiftIsBounded(v)) {
 18761  			break
 18762  		}
 18763  		v.reset(OpARM64SLL)
 18764  		v.Type = t
 18765  		v.AddArg2(x, y)
 18766  		return true
 18767  	}
 18768  	// match: (Lsh64x16 <t> [bounded] x y)
 18769  	// cond: !shiftIsBounded(v)
 18770  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 18771  	for {
 18772  		t := v.Type
 18773  		bounded := auxIntToBool(v.AuxInt)
 18774  		x := v_0
 18775  		y := v_1
 18776  		if !(!shiftIsBounded(v)) {
 18777  			break
 18778  		}
 18779  		v.reset(OpLsh64x32)
 18780  		v.Type = t
 18781  		v.AuxInt = boolToAuxInt(bounded)
 18782  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18783  		v0.AddArg(y)
 18784  		v.AddArg2(x, v0)
 18785  		return true
 18786  	}
 18787  	return false
 18788  }
 18789  func rewriteValueARM64_OpLsh64x32(v *Value) bool {
 18790  	v_1 := v.Args[1]
 18791  	v_0 := v.Args[0]
 18792  	b := v.Block
 18793  	// match: (Lsh64x32 <t> x y)
 18794  	// cond: shiftIsBounded(v)
 18795  	// result: (SLL <t> x y)
 18796  	for {
 18797  		t := v.Type
 18798  		x := v_0
 18799  		y := v_1
 18800  		if !(shiftIsBounded(v)) {
 18801  			break
 18802  		}
 18803  		v.reset(OpARM64SLL)
 18804  		v.Type = t
 18805  		v.AddArg2(x, y)
 18806  		return true
 18807  	}
 18808  	// match: (Lsh64x32 <t> x y)
 18809  	// cond: !shiftIsBounded(v)
 18810  	// result: (CSEL [OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 18811  	for {
 18812  		t := v.Type
 18813  		x := v_0
 18814  		y := v_1
 18815  		if !(!shiftIsBounded(v)) {
 18816  			break
 18817  		}
 18818  		v.reset(OpARM64CSEL)
 18819  		v.AuxInt = opToAuxInt(OpARM64LessThanU)
 18820  		v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
 18821  		v0.AddArg2(x, y)
 18822  		v1 := b.NewValue0(v.Pos, OpConst64, t)
 18823  		v1.AuxInt = int64ToAuxInt(0)
 18824  		v2 := b.NewValue0(v.Pos, OpARM64CMPWconst, types.TypeFlags)
 18825  		v2.AuxInt = int32ToAuxInt(64)
 18826  		v2.AddArg(y)
 18827  		v.AddArg3(v0, v1, v2)
 18828  		return true
 18829  	}
 18830  	return false
 18831  }
 18832  func rewriteValueARM64_OpLsh64x64(v *Value) bool {
 18833  	v_1 := v.Args[1]
 18834  	v_0 := v.Args[0]
 18835  	b := v.Block
 18836  	// match: (Lsh64x64 <t> x y)
 18837  	// cond: shiftIsBounded(v)
 18838  	// result: (SLL <t> x y)
 18839  	for {
 18840  		t := v.Type
 18841  		x := v_0
 18842  		y := v_1
 18843  		if !(shiftIsBounded(v)) {
 18844  			break
 18845  		}
 18846  		v.reset(OpARM64SLL)
 18847  		v.Type = t
 18848  		v.AddArg2(x, y)
 18849  		return true
 18850  	}
 18851  	// match: (Lsh64x64 <t> x y)
 18852  	// cond: !shiftIsBounded(v)
 18853  	// result: (CSEL [OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 18854  	for {
 18855  		t := v.Type
 18856  		x := v_0
 18857  		y := v_1
 18858  		if !(!shiftIsBounded(v)) {
 18859  			break
 18860  		}
 18861  		v.reset(OpARM64CSEL)
 18862  		v.AuxInt = opToAuxInt(OpARM64LessThanU)
 18863  		v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
 18864  		v0.AddArg2(x, y)
 18865  		v1 := b.NewValue0(v.Pos, OpConst64, t)
 18866  		v1.AuxInt = int64ToAuxInt(0)
 18867  		v2 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
 18868  		v2.AuxInt = int64ToAuxInt(64)
 18869  		v2.AddArg(y)
 18870  		v.AddArg3(v0, v1, v2)
 18871  		return true
 18872  	}
 18873  	return false
 18874  }
 18875  func rewriteValueARM64_OpLsh64x8(v *Value) bool {
 18876  	v_1 := v.Args[1]
 18877  	v_0 := v.Args[0]
 18878  	b := v.Block
 18879  	typ := &b.Func.Config.Types
 18880  	// match: (Lsh64x8 <t> x y)
 18881  	// cond: shiftIsBounded(v)
 18882  	// result: (SLL <t> x y)
 18883  	for {
 18884  		t := v.Type
 18885  		x := v_0
 18886  		y := v_1
 18887  		if !(shiftIsBounded(v)) {
 18888  			break
 18889  		}
 18890  		v.reset(OpARM64SLL)
 18891  		v.Type = t
 18892  		v.AddArg2(x, y)
 18893  		return true
 18894  	}
 18895  	// match: (Lsh64x8 <t> [bounded] x y)
 18896  	// cond: !shiftIsBounded(v)
 18897  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 18898  	for {
 18899  		t := v.Type
 18900  		bounded := auxIntToBool(v.AuxInt)
 18901  		x := v_0
 18902  		y := v_1
 18903  		if !(!shiftIsBounded(v)) {
 18904  			break
 18905  		}
 18906  		v.reset(OpLsh64x32)
 18907  		v.Type = t
 18908  		v.AuxInt = boolToAuxInt(bounded)
 18909  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 18910  		v0.AddArg(y)
 18911  		v.AddArg2(x, v0)
 18912  		return true
 18913  	}
 18914  	return false
 18915  }
 18916  func rewriteValueARM64_OpMod16(v *Value) bool {
 18917  	v_1 := v.Args[1]
 18918  	v_0 := v.Args[0]
 18919  	b := v.Block
 18920  	typ := &b.Func.Config.Types
 18921  	// match: (Mod16 x y)
 18922  	// result: (MODW (SignExt16to32 x) (SignExt16to32 y))
 18923  	for {
 18924  		x := v_0
 18925  		y := v_1
 18926  		v.reset(OpARM64MODW)
 18927  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 18928  		v0.AddArg(x)
 18929  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 18930  		v1.AddArg(y)
 18931  		v.AddArg2(v0, v1)
 18932  		return true
 18933  	}
 18934  }
 18935  func rewriteValueARM64_OpMod16u(v *Value) bool {
 18936  	v_1 := v.Args[1]
 18937  	v_0 := v.Args[0]
 18938  	b := v.Block
 18939  	typ := &b.Func.Config.Types
 18940  	// match: (Mod16u x y)
 18941  	// result: (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
 18942  	for {
 18943  		x := v_0
 18944  		y := v_1
 18945  		v.reset(OpARM64UMODW)
 18946  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18947  		v0.AddArg(x)
 18948  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 18949  		v1.AddArg(y)
 18950  		v.AddArg2(v0, v1)
 18951  		return true
 18952  	}
 18953  }
 18954  func rewriteValueARM64_OpMod32(v *Value) bool {
 18955  	v_1 := v.Args[1]
 18956  	v_0 := v.Args[0]
 18957  	// match: (Mod32 x y)
 18958  	// result: (MODW x y)
 18959  	for {
 18960  		x := v_0
 18961  		y := v_1
 18962  		v.reset(OpARM64MODW)
 18963  		v.AddArg2(x, y)
 18964  		return true
 18965  	}
 18966  }
 18967  func rewriteValueARM64_OpMod64(v *Value) bool {
 18968  	v_1 := v.Args[1]
 18969  	v_0 := v.Args[0]
 18970  	// match: (Mod64 x y)
 18971  	// result: (MOD x y)
 18972  	for {
 18973  		x := v_0
 18974  		y := v_1
 18975  		v.reset(OpARM64MOD)
 18976  		v.AddArg2(x, y)
 18977  		return true
 18978  	}
 18979  }
 18980  func rewriteValueARM64_OpMod8(v *Value) bool {
 18981  	v_1 := v.Args[1]
 18982  	v_0 := v.Args[0]
 18983  	b := v.Block
 18984  	typ := &b.Func.Config.Types
 18985  	// match: (Mod8 x y)
 18986  	// result: (MODW (SignExt8to32 x) (SignExt8to32 y))
 18987  	for {
 18988  		x := v_0
 18989  		y := v_1
 18990  		v.reset(OpARM64MODW)
 18991  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 18992  		v0.AddArg(x)
 18993  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 18994  		v1.AddArg(y)
 18995  		v.AddArg2(v0, v1)
 18996  		return true
 18997  	}
 18998  }
 18999  func rewriteValueARM64_OpMod8u(v *Value) bool {
 19000  	v_1 := v.Args[1]
 19001  	v_0 := v.Args[0]
 19002  	b := v.Block
 19003  	typ := &b.Func.Config.Types
 19004  	// match: (Mod8u x y)
 19005  	// result: (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y))
 19006  	for {
 19007  		x := v_0
 19008  		y := v_1
 19009  		v.reset(OpARM64UMODW)
 19010  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 19011  		v0.AddArg(x)
 19012  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 19013  		v1.AddArg(y)
 19014  		v.AddArg2(v0, v1)
 19015  		return true
 19016  	}
 19017  }
 19018  func rewriteValueARM64_OpMove(v *Value) bool {
 19019  	v_2 := v.Args[2]
 19020  	v_1 := v.Args[1]
 19021  	v_0 := v.Args[0]
 19022  	b := v.Block
 19023  	typ := &b.Func.Config.Types
 19024  	// match: (Move [0] _ _ mem)
 19025  	// result: mem
 19026  	for {
 19027  		if auxIntToInt64(v.AuxInt) != 0 {
 19028  			break
 19029  		}
 19030  		mem := v_2
 19031  		v.copyOf(mem)
 19032  		return true
 19033  	}
 19034  	// match: (Move [1] dst src mem)
 19035  	// result: (MOVBstore dst (MOVBUload src mem) mem)
 19036  	for {
 19037  		if auxIntToInt64(v.AuxInt) != 1 {
 19038  			break
 19039  		}
 19040  		dst := v_0
 19041  		src := v_1
 19042  		mem := v_2
 19043  		v.reset(OpARM64MOVBstore)
 19044  		v0 := b.NewValue0(v.Pos, OpARM64MOVBUload, typ.UInt8)
 19045  		v0.AddArg2(src, mem)
 19046  		v.AddArg3(dst, v0, mem)
 19047  		return true
 19048  	}
 19049  	// match: (Move [2] dst src mem)
 19050  	// result: (MOVHstore dst (MOVHUload src mem) mem)
 19051  	for {
 19052  		if auxIntToInt64(v.AuxInt) != 2 {
 19053  			break
 19054  		}
 19055  		dst := v_0
 19056  		src := v_1
 19057  		mem := v_2
 19058  		v.reset(OpARM64MOVHstore)
 19059  		v0 := b.NewValue0(v.Pos, OpARM64MOVHUload, typ.UInt16)
 19060  		v0.AddArg2(src, mem)
 19061  		v.AddArg3(dst, v0, mem)
 19062  		return true
 19063  	}
 19064  	// match: (Move [3] dst src mem)
 19065  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
 19066  	for {
 19067  		if auxIntToInt64(v.AuxInt) != 3 {
 19068  			break
 19069  		}
 19070  		dst := v_0
 19071  		src := v_1
 19072  		mem := v_2
 19073  		v.reset(OpARM64MOVBstore)
 19074  		v.AuxInt = int32ToAuxInt(2)
 19075  		v0 := b.NewValue0(v.Pos, OpARM64MOVBUload, typ.UInt8)
 19076  		v0.AuxInt = int32ToAuxInt(2)
 19077  		v0.AddArg2(src, mem)
 19078  		v1 := b.NewValue0(v.Pos, OpARM64MOVHstore, types.TypeMem)
 19079  		v2 := b.NewValue0(v.Pos, OpARM64MOVHUload, typ.UInt16)
 19080  		v2.AddArg2(src, mem)
 19081  		v1.AddArg3(dst, v2, mem)
 19082  		v.AddArg3(dst, v0, v1)
 19083  		return true
 19084  	}
 19085  	// match: (Move [4] dst src mem)
 19086  	// result: (MOVWstore dst (MOVWUload src mem) mem)
 19087  	for {
 19088  		if auxIntToInt64(v.AuxInt) != 4 {
 19089  			break
 19090  		}
 19091  		dst := v_0
 19092  		src := v_1
 19093  		mem := v_2
 19094  		v.reset(OpARM64MOVWstore)
 19095  		v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
 19096  		v0.AddArg2(src, mem)
 19097  		v.AddArg3(dst, v0, mem)
 19098  		return true
 19099  	}
 19100  	// match: (Move [5] dst src mem)
 19101  	// result: (MOVBstore [4] dst (MOVBUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 19102  	for {
 19103  		if auxIntToInt64(v.AuxInt) != 5 {
 19104  			break
 19105  		}
 19106  		dst := v_0
 19107  		src := v_1
 19108  		mem := v_2
 19109  		v.reset(OpARM64MOVBstore)
 19110  		v.AuxInt = int32ToAuxInt(4)
 19111  		v0 := b.NewValue0(v.Pos, OpARM64MOVBUload, typ.UInt8)
 19112  		v0.AuxInt = int32ToAuxInt(4)
 19113  		v0.AddArg2(src, mem)
 19114  		v1 := b.NewValue0(v.Pos, OpARM64MOVWstore, types.TypeMem)
 19115  		v2 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
 19116  		v2.AddArg2(src, mem)
 19117  		v1.AddArg3(dst, v2, mem)
 19118  		v.AddArg3(dst, v0, v1)
 19119  		return true
 19120  	}
 19121  	// match: (Move [6] dst src mem)
 19122  	// result: (MOVHstore [4] dst (MOVHUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 19123  	for {
 19124  		if auxIntToInt64(v.AuxInt) != 6 {
 19125  			break
 19126  		}
 19127  		dst := v_0
 19128  		src := v_1
 19129  		mem := v_2
 19130  		v.reset(OpARM64MOVHstore)
 19131  		v.AuxInt = int32ToAuxInt(4)
 19132  		v0 := b.NewValue0(v.Pos, OpARM64MOVHUload, typ.UInt16)
 19133  		v0.AuxInt = int32ToAuxInt(4)
 19134  		v0.AddArg2(src, mem)
 19135  		v1 := b.NewValue0(v.Pos, OpARM64MOVWstore, types.TypeMem)
 19136  		v2 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
 19137  		v2.AddArg2(src, mem)
 19138  		v1.AddArg3(dst, v2, mem)
 19139  		v.AddArg3(dst, v0, v1)
 19140  		return true
 19141  	}
 19142  	// match: (Move [7] dst src mem)
 19143  	// result: (MOVWstore [3] dst (MOVWUload [3] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 19144  	for {
 19145  		if auxIntToInt64(v.AuxInt) != 7 {
 19146  			break
 19147  		}
 19148  		dst := v_0
 19149  		src := v_1
 19150  		mem := v_2
 19151  		v.reset(OpARM64MOVWstore)
 19152  		v.AuxInt = int32ToAuxInt(3)
 19153  		v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
 19154  		v0.AuxInt = int32ToAuxInt(3)
 19155  		v0.AddArg2(src, mem)
 19156  		v1 := b.NewValue0(v.Pos, OpARM64MOVWstore, types.TypeMem)
 19157  		v2 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
 19158  		v2.AddArg2(src, mem)
 19159  		v1.AddArg3(dst, v2, mem)
 19160  		v.AddArg3(dst, v0, v1)
 19161  		return true
 19162  	}
 19163  	// match: (Move [8] dst src mem)
 19164  	// result: (MOVDstore dst (MOVDload src mem) mem)
 19165  	for {
 19166  		if auxIntToInt64(v.AuxInt) != 8 {
 19167  			break
 19168  		}
 19169  		dst := v_0
 19170  		src := v_1
 19171  		mem := v_2
 19172  		v.reset(OpARM64MOVDstore)
 19173  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19174  		v0.AddArg2(src, mem)
 19175  		v.AddArg3(dst, v0, mem)
 19176  		return true
 19177  	}
 19178  	// match: (Move [9] dst src mem)
 19179  	// result: (MOVBstore [8] dst (MOVBUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19180  	for {
 19181  		if auxIntToInt64(v.AuxInt) != 9 {
 19182  			break
 19183  		}
 19184  		dst := v_0
 19185  		src := v_1
 19186  		mem := v_2
 19187  		v.reset(OpARM64MOVBstore)
 19188  		v.AuxInt = int32ToAuxInt(8)
 19189  		v0 := b.NewValue0(v.Pos, OpARM64MOVBUload, typ.UInt8)
 19190  		v0.AuxInt = int32ToAuxInt(8)
 19191  		v0.AddArg2(src, mem)
 19192  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19193  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19194  		v2.AddArg2(src, mem)
 19195  		v1.AddArg3(dst, v2, mem)
 19196  		v.AddArg3(dst, v0, v1)
 19197  		return true
 19198  	}
 19199  	// match: (Move [10] dst src mem)
 19200  	// result: (MOVHstore [8] dst (MOVHUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19201  	for {
 19202  		if auxIntToInt64(v.AuxInt) != 10 {
 19203  			break
 19204  		}
 19205  		dst := v_0
 19206  		src := v_1
 19207  		mem := v_2
 19208  		v.reset(OpARM64MOVHstore)
 19209  		v.AuxInt = int32ToAuxInt(8)
 19210  		v0 := b.NewValue0(v.Pos, OpARM64MOVHUload, typ.UInt16)
 19211  		v0.AuxInt = int32ToAuxInt(8)
 19212  		v0.AddArg2(src, mem)
 19213  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19214  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19215  		v2.AddArg2(src, mem)
 19216  		v1.AddArg3(dst, v2, mem)
 19217  		v.AddArg3(dst, v0, v1)
 19218  		return true
 19219  	}
 19220  	// match: (Move [11] dst src mem)
 19221  	// result: (MOVDstore [3] dst (MOVDload [3] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19222  	for {
 19223  		if auxIntToInt64(v.AuxInt) != 11 {
 19224  			break
 19225  		}
 19226  		dst := v_0
 19227  		src := v_1
 19228  		mem := v_2
 19229  		v.reset(OpARM64MOVDstore)
 19230  		v.AuxInt = int32ToAuxInt(3)
 19231  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19232  		v0.AuxInt = int32ToAuxInt(3)
 19233  		v0.AddArg2(src, mem)
 19234  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19235  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19236  		v2.AddArg2(src, mem)
 19237  		v1.AddArg3(dst, v2, mem)
 19238  		v.AddArg3(dst, v0, v1)
 19239  		return true
 19240  	}
 19241  	// match: (Move [12] dst src mem)
 19242  	// result: (MOVWstore [8] dst (MOVWUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19243  	for {
 19244  		if auxIntToInt64(v.AuxInt) != 12 {
 19245  			break
 19246  		}
 19247  		dst := v_0
 19248  		src := v_1
 19249  		mem := v_2
 19250  		v.reset(OpARM64MOVWstore)
 19251  		v.AuxInt = int32ToAuxInt(8)
 19252  		v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
 19253  		v0.AuxInt = int32ToAuxInt(8)
 19254  		v0.AddArg2(src, mem)
 19255  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19256  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19257  		v2.AddArg2(src, mem)
 19258  		v1.AddArg3(dst, v2, mem)
 19259  		v.AddArg3(dst, v0, v1)
 19260  		return true
 19261  	}
 19262  	// match: (Move [13] dst src mem)
 19263  	// result: (MOVDstore [5] dst (MOVDload [5] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19264  	for {
 19265  		if auxIntToInt64(v.AuxInt) != 13 {
 19266  			break
 19267  		}
 19268  		dst := v_0
 19269  		src := v_1
 19270  		mem := v_2
 19271  		v.reset(OpARM64MOVDstore)
 19272  		v.AuxInt = int32ToAuxInt(5)
 19273  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19274  		v0.AuxInt = int32ToAuxInt(5)
 19275  		v0.AddArg2(src, mem)
 19276  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19277  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19278  		v2.AddArg2(src, mem)
 19279  		v1.AddArg3(dst, v2, mem)
 19280  		v.AddArg3(dst, v0, v1)
 19281  		return true
 19282  	}
 19283  	// match: (Move [14] dst src mem)
 19284  	// result: (MOVDstore [6] dst (MOVDload [6] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19285  	for {
 19286  		if auxIntToInt64(v.AuxInt) != 14 {
 19287  			break
 19288  		}
 19289  		dst := v_0
 19290  		src := v_1
 19291  		mem := v_2
 19292  		v.reset(OpARM64MOVDstore)
 19293  		v.AuxInt = int32ToAuxInt(6)
 19294  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19295  		v0.AuxInt = int32ToAuxInt(6)
 19296  		v0.AddArg2(src, mem)
 19297  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19298  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19299  		v2.AddArg2(src, mem)
 19300  		v1.AddArg3(dst, v2, mem)
 19301  		v.AddArg3(dst, v0, v1)
 19302  		return true
 19303  	}
 19304  	// match: (Move [15] dst src mem)
 19305  	// result: (MOVDstore [7] dst (MOVDload [7] src mem) (MOVDstore dst (MOVDload src mem) mem))
 19306  	for {
 19307  		if auxIntToInt64(v.AuxInt) != 15 {
 19308  			break
 19309  		}
 19310  		dst := v_0
 19311  		src := v_1
 19312  		mem := v_2
 19313  		v.reset(OpARM64MOVDstore)
 19314  		v.AuxInt = int32ToAuxInt(7)
 19315  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19316  		v0.AuxInt = int32ToAuxInt(7)
 19317  		v0.AddArg2(src, mem)
 19318  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 19319  		v2 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19320  		v2.AddArg2(src, mem)
 19321  		v1.AddArg3(dst, v2, mem)
 19322  		v.AddArg3(dst, v0, v1)
 19323  		return true
 19324  	}
 19325  	// match: (Move [16] dst src mem)
 19326  	// result: (FMOVQstore dst (FMOVQload src mem) mem)
 19327  	for {
 19328  		if auxIntToInt64(v.AuxInt) != 16 {
 19329  			break
 19330  		}
 19331  		dst := v_0
 19332  		src := v_1
 19333  		mem := v_2
 19334  		v.reset(OpARM64FMOVQstore)
 19335  		v0 := b.NewValue0(v.Pos, OpARM64FMOVQload, typ.Vec128)
 19336  		v0.AddArg2(src, mem)
 19337  		v.AddArg3(dst, v0, mem)
 19338  		return true
 19339  	}
 19340  	// match: (Move [s] dst src mem)
 19341  	// cond: s > 16 && s <= 24
 19342  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 19343  	for {
 19344  		s := auxIntToInt64(v.AuxInt)
 19345  		dst := v_0
 19346  		src := v_1
 19347  		mem := v_2
 19348  		if !(s > 16 && s <= 24) {
 19349  			break
 19350  		}
 19351  		v.reset(OpARM64MOVDstore)
 19352  		v.AuxInt = int32ToAuxInt(int32(s - 8))
 19353  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19354  		v0.AuxInt = int32ToAuxInt(int32(s - 8))
 19355  		v0.AddArg2(src, mem)
 19356  		v1 := b.NewValue0(v.Pos, OpARM64FMOVQstore, types.TypeMem)
 19357  		v2 := b.NewValue0(v.Pos, OpARM64FMOVQload, typ.Vec128)
 19358  		v2.AddArg2(src, mem)
 19359  		v1.AddArg3(dst, v2, mem)
 19360  		v.AddArg3(dst, v0, v1)
 19361  		return true
 19362  	}
 19363  	// match: (Move [s] dst src mem)
 19364  	// cond: s > 24 && s < 32
 19365  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 19366  	for {
 19367  		s := auxIntToInt64(v.AuxInt)
 19368  		dst := v_0
 19369  		src := v_1
 19370  		mem := v_2
 19371  		if !(s > 24 && s < 32) {
 19372  			break
 19373  		}
 19374  		v.reset(OpARM64FMOVQstore)
 19375  		v.AuxInt = int32ToAuxInt(int32(s - 16))
 19376  		v0 := b.NewValue0(v.Pos, OpARM64FMOVQload, typ.Vec128)
 19377  		v0.AuxInt = int32ToAuxInt(int32(s - 16))
 19378  		v0.AddArg2(src, mem)
 19379  		v1 := b.NewValue0(v.Pos, OpARM64FMOVQstore, types.TypeMem)
 19380  		v2 := b.NewValue0(v.Pos, OpARM64FMOVQload, typ.Vec128)
 19381  		v2.AddArg2(src, mem)
 19382  		v1.AddArg3(dst, v2, mem)
 19383  		v.AddArg3(dst, v0, v1)
 19384  		return true
 19385  	}
 19386  	// match: (Move [32] dst src mem)
 19387  	// result: (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem)
 19388  	for {
 19389  		if auxIntToInt64(v.AuxInt) != 32 {
 19390  			break
 19391  		}
 19392  		dst := v_0
 19393  		src := v_1
 19394  		mem := v_2
 19395  		v.reset(OpARM64FSTPQ)
 19396  		v0 := b.NewValue0(v.Pos, OpSelect0, typ.Vec128)
 19397  		v1 := b.NewValue0(v.Pos, OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 19398  		v1.AddArg2(src, mem)
 19399  		v0.AddArg(v1)
 19400  		v2 := b.NewValue0(v.Pos, OpSelect1, typ.Vec128)
 19401  		v2.AddArg(v1)
 19402  		v.AddArg4(dst, v0, v2, mem)
 19403  		return true
 19404  	}
 19405  	// match: (Move [s] dst src mem)
 19406  	// cond: s > 32 && s <= 40
 19407  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 19408  	for {
 19409  		s := auxIntToInt64(v.AuxInt)
 19410  		dst := v_0
 19411  		src := v_1
 19412  		mem := v_2
 19413  		if !(s > 32 && s <= 40) {
 19414  			break
 19415  		}
 19416  		v.reset(OpARM64MOVDstore)
 19417  		v.AuxInt = int32ToAuxInt(int32(s - 8))
 19418  		v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
 19419  		v0.AuxInt = int32ToAuxInt(int32(s - 8))
 19420  		v0.AddArg2(src, mem)
 19421  		v1 := b.NewValue0(v.Pos, OpARM64FSTPQ, types.TypeMem)
 19422  		v2 := b.NewValue0(v.Pos, OpSelect0, typ.Vec128)
 19423  		v3 := b.NewValue0(v.Pos, OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 19424  		v3.AddArg2(src, mem)
 19425  		v2.AddArg(v3)
 19426  		v4 := b.NewValue0(v.Pos, OpSelect1, typ.Vec128)
 19427  		v4.AddArg(v3)
 19428  		v1.AddArg4(dst, v2, v4, mem)
 19429  		v.AddArg3(dst, v0, v1)
 19430  		return true
 19431  	}
 19432  	// match: (Move [s] dst src mem)
 19433  	// cond: s > 40 && s <= 48
 19434  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 19435  	for {
 19436  		s := auxIntToInt64(v.AuxInt)
 19437  		dst := v_0
 19438  		src := v_1
 19439  		mem := v_2
 19440  		if !(s > 40 && s <= 48) {
 19441  			break
 19442  		}
 19443  		v.reset(OpARM64FMOVQstore)
 19444  		v.AuxInt = int32ToAuxInt(int32(s - 16))
 19445  		v0 := b.NewValue0(v.Pos, OpARM64FMOVQload, typ.Vec128)
 19446  		v0.AuxInt = int32ToAuxInt(int32(s - 16))
 19447  		v0.AddArg2(src, mem)
 19448  		v1 := b.NewValue0(v.Pos, OpARM64FSTPQ, types.TypeMem)
 19449  		v2 := b.NewValue0(v.Pos, OpSelect0, typ.Vec128)
 19450  		v3 := b.NewValue0(v.Pos, OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 19451  		v3.AddArg2(src, mem)
 19452  		v2.AddArg(v3)
 19453  		v4 := b.NewValue0(v.Pos, OpSelect1, typ.Vec128)
 19454  		v4.AddArg(v3)
 19455  		v1.AddArg4(dst, v2, v4, mem)
 19456  		v.AddArg3(dst, v0, v1)
 19457  		return true
 19458  	}
 19459  	// match: (Move [s] dst src mem)
 19460  	// cond: s > 48 && s <= 64
 19461  	// result: (FSTPQ [int32(s-32)] dst (Select0 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (Select1 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 19462  	for {
 19463  		s := auxIntToInt64(v.AuxInt)
 19464  		dst := v_0
 19465  		src := v_1
 19466  		mem := v_2
 19467  		if !(s > 48 && s <= 64) {
 19468  			break
 19469  		}
 19470  		v.reset(OpARM64FSTPQ)
 19471  		v.AuxInt = int32ToAuxInt(int32(s - 32))
 19472  		v0 := b.NewValue0(v.Pos, OpSelect0, typ.Vec128)
 19473  		v1 := b.NewValue0(v.Pos, OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 19474  		v1.AuxInt = int32ToAuxInt(int32(s - 32))
 19475  		v1.AddArg2(src, mem)
 19476  		v0.AddArg(v1)
 19477  		v2 := b.NewValue0(v.Pos, OpSelect1, typ.Vec128)
 19478  		v2.AddArg(v1)
 19479  		v3 := b.NewValue0(v.Pos, OpARM64FSTPQ, types.TypeMem)
 19480  		v4 := b.NewValue0(v.Pos, OpSelect0, typ.Vec128)
 19481  		v5 := b.NewValue0(v.Pos, OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 19482  		v5.AddArg2(src, mem)
 19483  		v4.AddArg(v5)
 19484  		v6 := b.NewValue0(v.Pos, OpSelect1, typ.Vec128)
 19485  		v6.AddArg(v5)
 19486  		v3.AddArg4(dst, v4, v6, mem)
 19487  		v.AddArg4(dst, v0, v2, v3)
 19488  		return true
 19489  	}
 19490  	// match: (Move [s] dst src mem)
 19491  	// cond: s > 64 && s < 192 && logLargeCopy(v, s)
 19492  	// result: (LoweredMove [s] dst src mem)
 19493  	for {
 19494  		s := auxIntToInt64(v.AuxInt)
 19495  		dst := v_0
 19496  		src := v_1
 19497  		mem := v_2
 19498  		if !(s > 64 && s < 192 && logLargeCopy(v, s)) {
 19499  			break
 19500  		}
 19501  		v.reset(OpARM64LoweredMove)
 19502  		v.AuxInt = int64ToAuxInt(s)
 19503  		v.AddArg3(dst, src, mem)
 19504  		return true
 19505  	}
 19506  	// match: (Move [s] dst src mem)
 19507  	// cond: s >= 192 && logLargeCopy(v, s)
 19508  	// result: (LoweredMoveLoop [s] dst src mem)
 19509  	for {
 19510  		s := auxIntToInt64(v.AuxInt)
 19511  		dst := v_0
 19512  		src := v_1
 19513  		mem := v_2
 19514  		if !(s >= 192 && logLargeCopy(v, s)) {
 19515  			break
 19516  		}
 19517  		v.reset(OpARM64LoweredMoveLoop)
 19518  		v.AuxInt = int64ToAuxInt(s)
 19519  		v.AddArg3(dst, src, mem)
 19520  		return true
 19521  	}
 19522  	return false
 19523  }
 19524  func rewriteValueARM64_OpNeq16(v *Value) bool {
 19525  	v_1 := v.Args[1]
 19526  	v_0 := v.Args[0]
 19527  	b := v.Block
 19528  	typ := &b.Func.Config.Types
 19529  	// match: (Neq16 x y)
 19530  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 19531  	for {
 19532  		x := v_0
 19533  		y := v_1
 19534  		v.reset(OpARM64NotEqual)
 19535  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 19536  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 19537  		v1.AddArg(x)
 19538  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 19539  		v2.AddArg(y)
 19540  		v0.AddArg2(v1, v2)
 19541  		v.AddArg(v0)
 19542  		return true
 19543  	}
 19544  }
 19545  func rewriteValueARM64_OpNeq32(v *Value) bool {
 19546  	v_1 := v.Args[1]
 19547  	v_0 := v.Args[0]
 19548  	b := v.Block
 19549  	// match: (Neq32 x y)
 19550  	// result: (NotEqual (CMPW x y))
 19551  	for {
 19552  		x := v_0
 19553  		y := v_1
 19554  		v.reset(OpARM64NotEqual)
 19555  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 19556  		v0.AddArg2(x, y)
 19557  		v.AddArg(v0)
 19558  		return true
 19559  	}
 19560  }
 19561  func rewriteValueARM64_OpNeq32F(v *Value) bool {
 19562  	v_1 := v.Args[1]
 19563  	v_0 := v.Args[0]
 19564  	b := v.Block
 19565  	// match: (Neq32F x y)
 19566  	// result: (NotEqual (FCMPS x y))
 19567  	for {
 19568  		x := v_0
 19569  		y := v_1
 19570  		v.reset(OpARM64NotEqual)
 19571  		v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
 19572  		v0.AddArg2(x, y)
 19573  		v.AddArg(v0)
 19574  		return true
 19575  	}
 19576  }
 19577  func rewriteValueARM64_OpNeq64(v *Value) bool {
 19578  	v_1 := v.Args[1]
 19579  	v_0 := v.Args[0]
 19580  	b := v.Block
 19581  	// match: (Neq64 x y)
 19582  	// result: (NotEqual (CMP x y))
 19583  	for {
 19584  		x := v_0
 19585  		y := v_1
 19586  		v.reset(OpARM64NotEqual)
 19587  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 19588  		v0.AddArg2(x, y)
 19589  		v.AddArg(v0)
 19590  		return true
 19591  	}
 19592  }
 19593  func rewriteValueARM64_OpNeq64F(v *Value) bool {
 19594  	v_1 := v.Args[1]
 19595  	v_0 := v.Args[0]
 19596  	b := v.Block
 19597  	// match: (Neq64F x y)
 19598  	// result: (NotEqual (FCMPD x y))
 19599  	for {
 19600  		x := v_0
 19601  		y := v_1
 19602  		v.reset(OpARM64NotEqual)
 19603  		v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
 19604  		v0.AddArg2(x, y)
 19605  		v.AddArg(v0)
 19606  		return true
 19607  	}
 19608  }
 19609  func rewriteValueARM64_OpNeq8(v *Value) bool {
 19610  	v_1 := v.Args[1]
 19611  	v_0 := v.Args[0]
 19612  	b := v.Block
 19613  	typ := &b.Func.Config.Types
 19614  	// match: (Neq8 x y)
 19615  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 19616  	for {
 19617  		x := v_0
 19618  		y := v_1
 19619  		v.reset(OpARM64NotEqual)
 19620  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
 19621  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 19622  		v1.AddArg(x)
 19623  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 19624  		v2.AddArg(y)
 19625  		v0.AddArg2(v1, v2)
 19626  		v.AddArg(v0)
 19627  		return true
 19628  	}
 19629  }
 19630  func rewriteValueARM64_OpNeqPtr(v *Value) bool {
 19631  	v_1 := v.Args[1]
 19632  	v_0 := v.Args[0]
 19633  	b := v.Block
 19634  	// match: (NeqPtr x y)
 19635  	// result: (NotEqual (CMP x y))
 19636  	for {
 19637  		x := v_0
 19638  		y := v_1
 19639  		v.reset(OpARM64NotEqual)
 19640  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
 19641  		v0.AddArg2(x, y)
 19642  		v.AddArg(v0)
 19643  		return true
 19644  	}
 19645  }
 19646  func rewriteValueARM64_OpNot(v *Value) bool {
 19647  	v_0 := v.Args[0]
 19648  	b := v.Block
 19649  	typ := &b.Func.Config.Types
 19650  	// match: (Not x)
 19651  	// result: (XOR (MOVDconst [1]) x)
 19652  	for {
 19653  		x := v_0
 19654  		v.reset(OpARM64XOR)
 19655  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 19656  		v0.AuxInt = int64ToAuxInt(1)
 19657  		v.AddArg2(v0, x)
 19658  		return true
 19659  	}
 19660  }
 19661  func rewriteValueARM64_OpOffPtr(v *Value) bool {
 19662  	v_0 := v.Args[0]
 19663  	// match: (OffPtr [off] ptr:(SP))
 19664  	// cond: is32Bit(off)
 19665  	// result: (MOVDaddr [int32(off)] ptr)
 19666  	for {
 19667  		off := auxIntToInt64(v.AuxInt)
 19668  		ptr := v_0
 19669  		if ptr.Op != OpSP || !(is32Bit(off)) {
 19670  			break
 19671  		}
 19672  		v.reset(OpARM64MOVDaddr)
 19673  		v.AuxInt = int32ToAuxInt(int32(off))
 19674  		v.AddArg(ptr)
 19675  		return true
 19676  	}
 19677  	// match: (OffPtr [off] ptr)
 19678  	// result: (ADDconst [off] ptr)
 19679  	for {
 19680  		off := auxIntToInt64(v.AuxInt)
 19681  		ptr := v_0
 19682  		v.reset(OpARM64ADDconst)
 19683  		v.AuxInt = int64ToAuxInt(off)
 19684  		v.AddArg(ptr)
 19685  		return true
 19686  	}
 19687  }
 19688  func rewriteValueARM64_OpPopCount16(v *Value) bool {
 19689  	v_0 := v.Args[0]
 19690  	b := v.Block
 19691  	typ := &b.Func.Config.Types
 19692  	// match: (PopCount16 <t> x)
 19693  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt16to64 x)))))
 19694  	for {
 19695  		t := v.Type
 19696  		x := v_0
 19697  		v.reset(OpARM64FMOVDfpgp)
 19698  		v.Type = t
 19699  		v0 := b.NewValue0(v.Pos, OpARM64VUADDLV, typ.Float64)
 19700  		v1 := b.NewValue0(v.Pos, OpARM64VCNT, typ.Float64)
 19701  		v2 := b.NewValue0(v.Pos, OpARM64FMOVDgpfp, typ.Float64)
 19702  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 19703  		v3.AddArg(x)
 19704  		v2.AddArg(v3)
 19705  		v1.AddArg(v2)
 19706  		v0.AddArg(v1)
 19707  		v.AddArg(v0)
 19708  		return true
 19709  	}
 19710  }
 19711  func rewriteValueARM64_OpPopCount32(v *Value) bool {
 19712  	v_0 := v.Args[0]
 19713  	b := v.Block
 19714  	typ := &b.Func.Config.Types
 19715  	// match: (PopCount32 <t> x)
 19716  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt32to64 x)))))
 19717  	for {
 19718  		t := v.Type
 19719  		x := v_0
 19720  		v.reset(OpARM64FMOVDfpgp)
 19721  		v.Type = t
 19722  		v0 := b.NewValue0(v.Pos, OpARM64VUADDLV, typ.Float64)
 19723  		v1 := b.NewValue0(v.Pos, OpARM64VCNT, typ.Float64)
 19724  		v2 := b.NewValue0(v.Pos, OpARM64FMOVDgpfp, typ.Float64)
 19725  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 19726  		v3.AddArg(x)
 19727  		v2.AddArg(v3)
 19728  		v1.AddArg(v2)
 19729  		v0.AddArg(v1)
 19730  		v.AddArg(v0)
 19731  		return true
 19732  	}
 19733  }
 19734  func rewriteValueARM64_OpPopCount64(v *Value) bool {
 19735  	v_0 := v.Args[0]
 19736  	b := v.Block
 19737  	typ := &b.Func.Config.Types
 19738  	// match: (PopCount64 <t> x)
 19739  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> x))))
 19740  	for {
 19741  		t := v.Type
 19742  		x := v_0
 19743  		v.reset(OpARM64FMOVDfpgp)
 19744  		v.Type = t
 19745  		v0 := b.NewValue0(v.Pos, OpARM64VUADDLV, typ.Float64)
 19746  		v1 := b.NewValue0(v.Pos, OpARM64VCNT, typ.Float64)
 19747  		v2 := b.NewValue0(v.Pos, OpARM64FMOVDgpfp, typ.Float64)
 19748  		v2.AddArg(x)
 19749  		v1.AddArg(v2)
 19750  		v0.AddArg(v1)
 19751  		v.AddArg(v0)
 19752  		return true
 19753  	}
 19754  }
 19755  func rewriteValueARM64_OpPrefetchCache(v *Value) bool {
 19756  	v_1 := v.Args[1]
 19757  	v_0 := v.Args[0]
 19758  	// match: (PrefetchCache addr mem)
 19759  	// result: (PRFM [0] addr mem)
 19760  	for {
 19761  		addr := v_0
 19762  		mem := v_1
 19763  		v.reset(OpARM64PRFM)
 19764  		v.AuxInt = int64ToAuxInt(0)
 19765  		v.AddArg2(addr, mem)
 19766  		return true
 19767  	}
 19768  }
 19769  func rewriteValueARM64_OpPrefetchCacheStreamed(v *Value) bool {
 19770  	v_1 := v.Args[1]
 19771  	v_0 := v.Args[0]
 19772  	// match: (PrefetchCacheStreamed addr mem)
 19773  	// result: (PRFM [1] addr mem)
 19774  	for {
 19775  		addr := v_0
 19776  		mem := v_1
 19777  		v.reset(OpARM64PRFM)
 19778  		v.AuxInt = int64ToAuxInt(1)
 19779  		v.AddArg2(addr, mem)
 19780  		return true
 19781  	}
 19782  }
 19783  func rewriteValueARM64_OpPubBarrier(v *Value) bool {
 19784  	v_0 := v.Args[0]
 19785  	// match: (PubBarrier mem)
 19786  	// result: (DMB [0xe] mem)
 19787  	for {
 19788  		mem := v_0
 19789  		v.reset(OpARM64DMB)
 19790  		v.AuxInt = int64ToAuxInt(0xe)
 19791  		v.AddArg(mem)
 19792  		return true
 19793  	}
 19794  }
 19795  func rewriteValueARM64_OpRotateLeft16(v *Value) bool {
 19796  	v_1 := v.Args[1]
 19797  	v_0 := v.Args[0]
 19798  	b := v.Block
 19799  	typ := &b.Func.Config.Types
 19800  	// match: (RotateLeft16 <t> x (MOVDconst [c]))
 19801  	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
 19802  	for {
 19803  		t := v.Type
 19804  		x := v_0
 19805  		if v_1.Op != OpARM64MOVDconst {
 19806  			break
 19807  		}
 19808  		c := auxIntToInt64(v_1.AuxInt)
 19809  		v.reset(OpOr16)
 19810  		v0 := b.NewValue0(v.Pos, OpLsh16x64, t)
 19811  		v1 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 19812  		v1.AuxInt = int64ToAuxInt(c & 15)
 19813  		v0.AddArg2(x, v1)
 19814  		v2 := b.NewValue0(v.Pos, OpRsh16Ux64, t)
 19815  		v3 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 19816  		v3.AuxInt = int64ToAuxInt(-c & 15)
 19817  		v2.AddArg2(x, v3)
 19818  		v.AddArg2(v0, v2)
 19819  		return true
 19820  	}
 19821  	// match: (RotateLeft16 <t> x y)
 19822  	// result: (RORW <t> (ORshiftLL <typ.UInt32> (ZeroExt16to32 x) (ZeroExt16to32 x) [16]) (NEG <typ.Int64> y))
 19823  	for {
 19824  		t := v.Type
 19825  		x := v_0
 19826  		y := v_1
 19827  		v.reset(OpARM64RORW)
 19828  		v.Type = t
 19829  		v0 := b.NewValue0(v.Pos, OpARM64ORshiftLL, typ.UInt32)
 19830  		v0.AuxInt = int64ToAuxInt(16)
 19831  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 19832  		v1.AddArg(x)
 19833  		v0.AddArg2(v1, v1)
 19834  		v2 := b.NewValue0(v.Pos, OpARM64NEG, typ.Int64)
 19835  		v2.AddArg(y)
 19836  		v.AddArg2(v0, v2)
 19837  		return true
 19838  	}
 19839  }
 19840  func rewriteValueARM64_OpRotateLeft32(v *Value) bool {
 19841  	v_1 := v.Args[1]
 19842  	v_0 := v.Args[0]
 19843  	b := v.Block
 19844  	// match: (RotateLeft32 x y)
 19845  	// result: (RORW x (NEG <y.Type> y))
 19846  	for {
 19847  		x := v_0
 19848  		y := v_1
 19849  		v.reset(OpARM64RORW)
 19850  		v0 := b.NewValue0(v.Pos, OpARM64NEG, y.Type)
 19851  		v0.AddArg(y)
 19852  		v.AddArg2(x, v0)
 19853  		return true
 19854  	}
 19855  }
 19856  func rewriteValueARM64_OpRotateLeft64(v *Value) bool {
 19857  	v_1 := v.Args[1]
 19858  	v_0 := v.Args[0]
 19859  	b := v.Block
 19860  	// match: (RotateLeft64 x y)
 19861  	// result: (ROR x (NEG <y.Type> y))
 19862  	for {
 19863  		x := v_0
 19864  		y := v_1
 19865  		v.reset(OpARM64ROR)
 19866  		v0 := b.NewValue0(v.Pos, OpARM64NEG, y.Type)
 19867  		v0.AddArg(y)
 19868  		v.AddArg2(x, v0)
 19869  		return true
 19870  	}
 19871  }
 19872  func rewriteValueARM64_OpRotateLeft8(v *Value) bool {
 19873  	v_1 := v.Args[1]
 19874  	v_0 := v.Args[0]
 19875  	b := v.Block
 19876  	typ := &b.Func.Config.Types
 19877  	// match: (RotateLeft8 <t> x (MOVDconst [c]))
 19878  	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
 19879  	for {
 19880  		t := v.Type
 19881  		x := v_0
 19882  		if v_1.Op != OpARM64MOVDconst {
 19883  			break
 19884  		}
 19885  		c := auxIntToInt64(v_1.AuxInt)
 19886  		v.reset(OpOr8)
 19887  		v0 := b.NewValue0(v.Pos, OpLsh8x64, t)
 19888  		v1 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 19889  		v1.AuxInt = int64ToAuxInt(c & 7)
 19890  		v0.AddArg2(x, v1)
 19891  		v2 := b.NewValue0(v.Pos, OpRsh8Ux64, t)
 19892  		v3 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 19893  		v3.AuxInt = int64ToAuxInt(-c & 7)
 19894  		v2.AddArg2(x, v3)
 19895  		v.AddArg2(v0, v2)
 19896  		return true
 19897  	}
 19898  	// match: (RotateLeft8 <t> x y)
 19899  	// result: (OR <t> (SLL <t> x (ANDconst <typ.Int64> [7] y)) (SRL <t> (ZeroExt8to64 x) (ANDconst <typ.Int64> [7] (NEG <typ.Int64> y))))
 19900  	for {
 19901  		t := v.Type
 19902  		x := v_0
 19903  		y := v_1
 19904  		v.reset(OpARM64OR)
 19905  		v.Type = t
 19906  		v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
 19907  		v1 := b.NewValue0(v.Pos, OpARM64ANDconst, typ.Int64)
 19908  		v1.AuxInt = int64ToAuxInt(7)
 19909  		v1.AddArg(y)
 19910  		v0.AddArg2(x, v1)
 19911  		v2 := b.NewValue0(v.Pos, OpARM64SRL, t)
 19912  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 19913  		v3.AddArg(x)
 19914  		v4 := b.NewValue0(v.Pos, OpARM64ANDconst, typ.Int64)
 19915  		v4.AuxInt = int64ToAuxInt(7)
 19916  		v5 := b.NewValue0(v.Pos, OpARM64NEG, typ.Int64)
 19917  		v5.AddArg(y)
 19918  		v4.AddArg(v5)
 19919  		v2.AddArg2(v3, v4)
 19920  		v.AddArg2(v0, v2)
 19921  		return true
 19922  	}
 19923  }
 19924  func rewriteValueARM64_OpRsh16Ux16(v *Value) bool {
 19925  	v_1 := v.Args[1]
 19926  	v_0 := v.Args[0]
 19927  	b := v.Block
 19928  	typ := &b.Func.Config.Types
 19929  	// match: (Rsh16Ux16 <t> [bounded] x y)
 19930  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt16to64 x) y)
 19931  	for {
 19932  		t := v.Type
 19933  		bounded := auxIntToBool(v.AuxInt)
 19934  		x := v_0
 19935  		y := v_1
 19936  		v.reset(OpRsh64Ux16)
 19937  		v.Type = t
 19938  		v.AuxInt = boolToAuxInt(bounded)
 19939  		v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 19940  		v0.AddArg(x)
 19941  		v.AddArg2(v0, y)
 19942  		return true
 19943  	}
 19944  }
 19945  func rewriteValueARM64_OpRsh16Ux32(v *Value) bool {
 19946  	v_1 := v.Args[1]
 19947  	v_0 := v.Args[0]
 19948  	b := v.Block
 19949  	typ := &b.Func.Config.Types
 19950  	// match: (Rsh16Ux32 <t> [bounded] x y)
 19951  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt16to64 x) y)
 19952  	for {
 19953  		t := v.Type
 19954  		bounded := auxIntToBool(v.AuxInt)
 19955  		x := v_0
 19956  		y := v_1
 19957  		v.reset(OpRsh64Ux32)
 19958  		v.Type = t
 19959  		v.AuxInt = boolToAuxInt(bounded)
 19960  		v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 19961  		v0.AddArg(x)
 19962  		v.AddArg2(v0, y)
 19963  		return true
 19964  	}
 19965  }
 19966  func rewriteValueARM64_OpRsh16Ux64(v *Value) bool {
 19967  	v_1 := v.Args[1]
 19968  	v_0 := v.Args[0]
 19969  	b := v.Block
 19970  	typ := &b.Func.Config.Types
 19971  	// match: (Rsh16Ux64 <t> [bounded] x y)
 19972  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt16to64 x) y)
 19973  	for {
 19974  		t := v.Type
 19975  		bounded := auxIntToBool(v.AuxInt)
 19976  		x := v_0
 19977  		y := v_1
 19978  		v.reset(OpRsh64Ux64)
 19979  		v.Type = t
 19980  		v.AuxInt = boolToAuxInt(bounded)
 19981  		v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 19982  		v0.AddArg(x)
 19983  		v.AddArg2(v0, y)
 19984  		return true
 19985  	}
 19986  }
 19987  func rewriteValueARM64_OpRsh16Ux8(v *Value) bool {
 19988  	v_1 := v.Args[1]
 19989  	v_0 := v.Args[0]
 19990  	b := v.Block
 19991  	typ := &b.Func.Config.Types
 19992  	// match: (Rsh16Ux8 <t> [bounded] x y)
 19993  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt16to64 x) y)
 19994  	for {
 19995  		t := v.Type
 19996  		bounded := auxIntToBool(v.AuxInt)
 19997  		x := v_0
 19998  		y := v_1
 19999  		v.reset(OpRsh64Ux8)
 20000  		v.Type = t
 20001  		v.AuxInt = boolToAuxInt(bounded)
 20002  		v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 20003  		v0.AddArg(x)
 20004  		v.AddArg2(v0, y)
 20005  		return true
 20006  	}
 20007  }
 20008  func rewriteValueARM64_OpRsh16x16(v *Value) bool {
 20009  	v_1 := v.Args[1]
 20010  	v_0 := v.Args[0]
 20011  	b := v.Block
 20012  	typ := &b.Func.Config.Types
 20013  	// match: (Rsh16x16 <t> [bounded] x y)
 20014  	// result: (Rsh64x16 <t> [bounded] (SignExt16to64 x) y)
 20015  	for {
 20016  		t := v.Type
 20017  		bounded := auxIntToBool(v.AuxInt)
 20018  		x := v_0
 20019  		y := v_1
 20020  		v.reset(OpRsh64x16)
 20021  		v.Type = t
 20022  		v.AuxInt = boolToAuxInt(bounded)
 20023  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
 20024  		v0.AddArg(x)
 20025  		v.AddArg2(v0, y)
 20026  		return true
 20027  	}
 20028  }
 20029  func rewriteValueARM64_OpRsh16x32(v *Value) bool {
 20030  	v_1 := v.Args[1]
 20031  	v_0 := v.Args[0]
 20032  	b := v.Block
 20033  	typ := &b.Func.Config.Types
 20034  	// match: (Rsh16x32 <t> [bounded] x y)
 20035  	// result: (Rsh64x32 <t> [bounded] (SignExt16to64 x) y)
 20036  	for {
 20037  		t := v.Type
 20038  		bounded := auxIntToBool(v.AuxInt)
 20039  		x := v_0
 20040  		y := v_1
 20041  		v.reset(OpRsh64x32)
 20042  		v.Type = t
 20043  		v.AuxInt = boolToAuxInt(bounded)
 20044  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
 20045  		v0.AddArg(x)
 20046  		v.AddArg2(v0, y)
 20047  		return true
 20048  	}
 20049  }
 20050  func rewriteValueARM64_OpRsh16x64(v *Value) bool {
 20051  	v_1 := v.Args[1]
 20052  	v_0 := v.Args[0]
 20053  	b := v.Block
 20054  	typ := &b.Func.Config.Types
 20055  	// match: (Rsh16x64 <t> [bounded] x y)
 20056  	// result: (Rsh64x64 <t> [bounded] (SignExt16to64 x) y)
 20057  	for {
 20058  		t := v.Type
 20059  		bounded := auxIntToBool(v.AuxInt)
 20060  		x := v_0
 20061  		y := v_1
 20062  		v.reset(OpRsh64x64)
 20063  		v.Type = t
 20064  		v.AuxInt = boolToAuxInt(bounded)
 20065  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
 20066  		v0.AddArg(x)
 20067  		v.AddArg2(v0, y)
 20068  		return true
 20069  	}
 20070  }
 20071  func rewriteValueARM64_OpRsh16x8(v *Value) bool {
 20072  	v_1 := v.Args[1]
 20073  	v_0 := v.Args[0]
 20074  	b := v.Block
 20075  	typ := &b.Func.Config.Types
 20076  	// match: (Rsh16x8 <t> [bounded] x y)
 20077  	// result: (Rsh64x8 <t> [bounded] (SignExt16to64 x) y)
 20078  	for {
 20079  		t := v.Type
 20080  		bounded := auxIntToBool(v.AuxInt)
 20081  		x := v_0
 20082  		y := v_1
 20083  		v.reset(OpRsh64x8)
 20084  		v.Type = t
 20085  		v.AuxInt = boolToAuxInt(bounded)
 20086  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
 20087  		v0.AddArg(x)
 20088  		v.AddArg2(v0, y)
 20089  		return true
 20090  	}
 20091  }
 20092  func rewriteValueARM64_OpRsh32Ux16(v *Value) bool {
 20093  	v_1 := v.Args[1]
 20094  	v_0 := v.Args[0]
 20095  	b := v.Block
 20096  	typ := &b.Func.Config.Types
 20097  	// match: (Rsh32Ux16 <t> [bounded] x y)
 20098  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt32to64 x) y)
 20099  	for {
 20100  		t := v.Type
 20101  		bounded := auxIntToBool(v.AuxInt)
 20102  		x := v_0
 20103  		y := v_1
 20104  		v.reset(OpRsh64Ux16)
 20105  		v.Type = t
 20106  		v.AuxInt = boolToAuxInt(bounded)
 20107  		v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 20108  		v0.AddArg(x)
 20109  		v.AddArg2(v0, y)
 20110  		return true
 20111  	}
 20112  }
 20113  func rewriteValueARM64_OpRsh32Ux32(v *Value) bool {
 20114  	v_1 := v.Args[1]
 20115  	v_0 := v.Args[0]
 20116  	b := v.Block
 20117  	typ := &b.Func.Config.Types
 20118  	// match: (Rsh32Ux32 <t> [bounded] x y)
 20119  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt32to64 x) y)
 20120  	for {
 20121  		t := v.Type
 20122  		bounded := auxIntToBool(v.AuxInt)
 20123  		x := v_0
 20124  		y := v_1
 20125  		v.reset(OpRsh64Ux32)
 20126  		v.Type = t
 20127  		v.AuxInt = boolToAuxInt(bounded)
 20128  		v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 20129  		v0.AddArg(x)
 20130  		v.AddArg2(v0, y)
 20131  		return true
 20132  	}
 20133  }
 20134  func rewriteValueARM64_OpRsh32Ux64(v *Value) bool {
 20135  	v_1 := v.Args[1]
 20136  	v_0 := v.Args[0]
 20137  	b := v.Block
 20138  	typ := &b.Func.Config.Types
 20139  	// match: (Rsh32Ux64 <t> [bounded] x y)
 20140  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt32to64 x) y)
 20141  	for {
 20142  		t := v.Type
 20143  		bounded := auxIntToBool(v.AuxInt)
 20144  		x := v_0
 20145  		y := v_1
 20146  		v.reset(OpRsh64Ux64)
 20147  		v.Type = t
 20148  		v.AuxInt = boolToAuxInt(bounded)
 20149  		v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 20150  		v0.AddArg(x)
 20151  		v.AddArg2(v0, y)
 20152  		return true
 20153  	}
 20154  }
 20155  func rewriteValueARM64_OpRsh32Ux8(v *Value) bool {
 20156  	v_1 := v.Args[1]
 20157  	v_0 := v.Args[0]
 20158  	b := v.Block
 20159  	typ := &b.Func.Config.Types
 20160  	// match: (Rsh32Ux8 <t> [bounded] x y)
 20161  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt32to64 x) y)
 20162  	for {
 20163  		t := v.Type
 20164  		bounded := auxIntToBool(v.AuxInt)
 20165  		x := v_0
 20166  		y := v_1
 20167  		v.reset(OpRsh64Ux8)
 20168  		v.Type = t
 20169  		v.AuxInt = boolToAuxInt(bounded)
 20170  		v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 20171  		v0.AddArg(x)
 20172  		v.AddArg2(v0, y)
 20173  		return true
 20174  	}
 20175  }
 20176  func rewriteValueARM64_OpRsh32x16(v *Value) bool {
 20177  	v_1 := v.Args[1]
 20178  	v_0 := v.Args[0]
 20179  	b := v.Block
 20180  	typ := &b.Func.Config.Types
 20181  	// match: (Rsh32x16 <t> [bounded] x y)
 20182  	// result: (Rsh64x16 <t> [bounded] (SignExt32to64 x) y)
 20183  	for {
 20184  		t := v.Type
 20185  		bounded := auxIntToBool(v.AuxInt)
 20186  		x := v_0
 20187  		y := v_1
 20188  		v.reset(OpRsh64x16)
 20189  		v.Type = t
 20190  		v.AuxInt = boolToAuxInt(bounded)
 20191  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
 20192  		v0.AddArg(x)
 20193  		v.AddArg2(v0, y)
 20194  		return true
 20195  	}
 20196  }
 20197  func rewriteValueARM64_OpRsh32x32(v *Value) bool {
 20198  	v_1 := v.Args[1]
 20199  	v_0 := v.Args[0]
 20200  	b := v.Block
 20201  	typ := &b.Func.Config.Types
 20202  	// match: (Rsh32x32 <t> [bounded] x y)
 20203  	// result: (Rsh64x32 <t> [bounded] (SignExt32to64 x) y)
 20204  	for {
 20205  		t := v.Type
 20206  		bounded := auxIntToBool(v.AuxInt)
 20207  		x := v_0
 20208  		y := v_1
 20209  		v.reset(OpRsh64x32)
 20210  		v.Type = t
 20211  		v.AuxInt = boolToAuxInt(bounded)
 20212  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
 20213  		v0.AddArg(x)
 20214  		v.AddArg2(v0, y)
 20215  		return true
 20216  	}
 20217  }
 20218  func rewriteValueARM64_OpRsh32x64(v *Value) bool {
 20219  	v_1 := v.Args[1]
 20220  	v_0 := v.Args[0]
 20221  	b := v.Block
 20222  	typ := &b.Func.Config.Types
 20223  	// match: (Rsh32x64 <t> [bounded] x y)
 20224  	// result: (Rsh64x64 <t> [bounded] (SignExt32to64 x) y)
 20225  	for {
 20226  		t := v.Type
 20227  		bounded := auxIntToBool(v.AuxInt)
 20228  		x := v_0
 20229  		y := v_1
 20230  		v.reset(OpRsh64x64)
 20231  		v.Type = t
 20232  		v.AuxInt = boolToAuxInt(bounded)
 20233  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
 20234  		v0.AddArg(x)
 20235  		v.AddArg2(v0, y)
 20236  		return true
 20237  	}
 20238  }
 20239  func rewriteValueARM64_OpRsh32x8(v *Value) bool {
 20240  	v_1 := v.Args[1]
 20241  	v_0 := v.Args[0]
 20242  	b := v.Block
 20243  	typ := &b.Func.Config.Types
 20244  	// match: (Rsh32x8 <t> [bounded] x y)
 20245  	// result: (Rsh64x8 <t> [bounded] (SignExt32to64 x) y)
 20246  	for {
 20247  		t := v.Type
 20248  		bounded := auxIntToBool(v.AuxInt)
 20249  		x := v_0
 20250  		y := v_1
 20251  		v.reset(OpRsh64x8)
 20252  		v.Type = t
 20253  		v.AuxInt = boolToAuxInt(bounded)
 20254  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
 20255  		v0.AddArg(x)
 20256  		v.AddArg2(v0, y)
 20257  		return true
 20258  	}
 20259  }
 20260  func rewriteValueARM64_OpRsh64Ux16(v *Value) bool {
 20261  	v_1 := v.Args[1]
 20262  	v_0 := v.Args[0]
 20263  	b := v.Block
 20264  	typ := &b.Func.Config.Types
 20265  	// match: (Rsh64Ux16 <t> x y)
 20266  	// cond: shiftIsBounded(v)
 20267  	// result: (SRL <t> x y)
 20268  	for {
 20269  		t := v.Type
 20270  		x := v_0
 20271  		y := v_1
 20272  		if !(shiftIsBounded(v)) {
 20273  			break
 20274  		}
 20275  		v.reset(OpARM64SRL)
 20276  		v.Type = t
 20277  		v.AddArg2(x, y)
 20278  		return true
 20279  	}
 20280  	// match: (Rsh64Ux16 <t> [bounded] x y)
 20281  	// cond: !shiftIsBounded(v)
 20282  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt16to32 y))
 20283  	for {
 20284  		t := v.Type
 20285  		bounded := auxIntToBool(v.AuxInt)
 20286  		x := v_0
 20287  		y := v_1
 20288  		if !(!shiftIsBounded(v)) {
 20289  			break
 20290  		}
 20291  		v.reset(OpRsh64Ux32)
 20292  		v.Type = t
 20293  		v.AuxInt = boolToAuxInt(bounded)
 20294  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 20295  		v0.AddArg(y)
 20296  		v.AddArg2(x, v0)
 20297  		return true
 20298  	}
 20299  	return false
 20300  }
 20301  func rewriteValueARM64_OpRsh64Ux32(v *Value) bool {
 20302  	v_1 := v.Args[1]
 20303  	v_0 := v.Args[0]
 20304  	b := v.Block
 20305  	// match: (Rsh64Ux32 <t> x y)
 20306  	// cond: shiftIsBounded(v)
 20307  	// result: (SRL <t> x y)
 20308  	for {
 20309  		t := v.Type
 20310  		x := v_0
 20311  		y := v_1
 20312  		if !(shiftIsBounded(v)) {
 20313  			break
 20314  		}
 20315  		v.reset(OpARM64SRL)
 20316  		v.Type = t
 20317  		v.AddArg2(x, y)
 20318  		return true
 20319  	}
 20320  	// match: (Rsh64Ux32 <t> x y)
 20321  	// cond: !shiftIsBounded(v)
 20322  	// result: (CSEL [OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 20323  	for {
 20324  		t := v.Type
 20325  		x := v_0
 20326  		y := v_1
 20327  		if !(!shiftIsBounded(v)) {
 20328  			break
 20329  		}
 20330  		v.reset(OpARM64CSEL)
 20331  		v.AuxInt = opToAuxInt(OpARM64LessThanU)
 20332  		v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
 20333  		v0.AddArg2(x, y)
 20334  		v1 := b.NewValue0(v.Pos, OpConst64, t)
 20335  		v1.AuxInt = int64ToAuxInt(0)
 20336  		v2 := b.NewValue0(v.Pos, OpARM64CMPWconst, types.TypeFlags)
 20337  		v2.AuxInt = int32ToAuxInt(64)
 20338  		v2.AddArg(y)
 20339  		v.AddArg3(v0, v1, v2)
 20340  		return true
 20341  	}
 20342  	return false
 20343  }
 20344  func rewriteValueARM64_OpRsh64Ux64(v *Value) bool {
 20345  	v_1 := v.Args[1]
 20346  	v_0 := v.Args[0]
 20347  	b := v.Block
 20348  	// match: (Rsh64Ux64 <t> x y)
 20349  	// cond: shiftIsBounded(v)
 20350  	// result: (SRL <t> x y)
 20351  	for {
 20352  		t := v.Type
 20353  		x := v_0
 20354  		y := v_1
 20355  		if !(shiftIsBounded(v)) {
 20356  			break
 20357  		}
 20358  		v.reset(OpARM64SRL)
 20359  		v.Type = t
 20360  		v.AddArg2(x, y)
 20361  		return true
 20362  	}
 20363  	// match: (Rsh64Ux64 <t> x y)
 20364  	// cond: !shiftIsBounded(v)
 20365  	// result: (CSEL [OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 20366  	for {
 20367  		t := v.Type
 20368  		x := v_0
 20369  		y := v_1
 20370  		if !(!shiftIsBounded(v)) {
 20371  			break
 20372  		}
 20373  		v.reset(OpARM64CSEL)
 20374  		v.AuxInt = opToAuxInt(OpARM64LessThanU)
 20375  		v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
 20376  		v0.AddArg2(x, y)
 20377  		v1 := b.NewValue0(v.Pos, OpConst64, t)
 20378  		v1.AuxInt = int64ToAuxInt(0)
 20379  		v2 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
 20380  		v2.AuxInt = int64ToAuxInt(64)
 20381  		v2.AddArg(y)
 20382  		v.AddArg3(v0, v1, v2)
 20383  		return true
 20384  	}
 20385  	return false
 20386  }
 20387  func rewriteValueARM64_OpRsh64Ux8(v *Value) bool {
 20388  	v_1 := v.Args[1]
 20389  	v_0 := v.Args[0]
 20390  	b := v.Block
 20391  	typ := &b.Func.Config.Types
 20392  	// match: (Rsh64Ux8 <t> x y)
 20393  	// cond: shiftIsBounded(v)
 20394  	// result: (SRL <t> x y)
 20395  	for {
 20396  		t := v.Type
 20397  		x := v_0
 20398  		y := v_1
 20399  		if !(shiftIsBounded(v)) {
 20400  			break
 20401  		}
 20402  		v.reset(OpARM64SRL)
 20403  		v.Type = t
 20404  		v.AddArg2(x, y)
 20405  		return true
 20406  	}
 20407  	// match: (Rsh64Ux8 <t> [bounded] x y)
 20408  	// cond: !shiftIsBounded(v)
 20409  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt8to32 y))
 20410  	for {
 20411  		t := v.Type
 20412  		bounded := auxIntToBool(v.AuxInt)
 20413  		x := v_0
 20414  		y := v_1
 20415  		if !(!shiftIsBounded(v)) {
 20416  			break
 20417  		}
 20418  		v.reset(OpRsh64Ux32)
 20419  		v.Type = t
 20420  		v.AuxInt = boolToAuxInt(bounded)
 20421  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 20422  		v0.AddArg(y)
 20423  		v.AddArg2(x, v0)
 20424  		return true
 20425  	}
 20426  	return false
 20427  }
 20428  func rewriteValueARM64_OpRsh64x16(v *Value) bool {
 20429  	v_1 := v.Args[1]
 20430  	v_0 := v.Args[0]
 20431  	b := v.Block
 20432  	typ := &b.Func.Config.Types
 20433  	// match: (Rsh64x16 <t> x y)
 20434  	// cond: shiftIsBounded(v)
 20435  	// result: (SRA <t> x y)
 20436  	for {
 20437  		t := v.Type
 20438  		x := v_0
 20439  		y := v_1
 20440  		if !(shiftIsBounded(v)) {
 20441  			break
 20442  		}
 20443  		v.reset(OpARM64SRA)
 20444  		v.Type = t
 20445  		v.AddArg2(x, y)
 20446  		return true
 20447  	}
 20448  	// match: (Rsh64x16 <t> [bounded] x y)
 20449  	// cond: !shiftIsBounded(v)
 20450  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 20451  	for {
 20452  		t := v.Type
 20453  		bounded := auxIntToBool(v.AuxInt)
 20454  		x := v_0
 20455  		y := v_1
 20456  		if !(!shiftIsBounded(v)) {
 20457  			break
 20458  		}
 20459  		v.reset(OpRsh64x32)
 20460  		v.Type = t
 20461  		v.AuxInt = boolToAuxInt(bounded)
 20462  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 20463  		v0.AddArg(y)
 20464  		v.AddArg2(x, v0)
 20465  		return true
 20466  	}
 20467  	return false
 20468  }
 20469  func rewriteValueARM64_OpRsh64x32(v *Value) bool {
 20470  	v_1 := v.Args[1]
 20471  	v_0 := v.Args[0]
 20472  	b := v.Block
 20473  	// match: (Rsh64x32 <t> x y)
 20474  	// cond: shiftIsBounded(v)
 20475  	// result: (SRA <t> x y)
 20476  	for {
 20477  		t := v.Type
 20478  		x := v_0
 20479  		y := v_1
 20480  		if !(shiftIsBounded(v)) {
 20481  			break
 20482  		}
 20483  		v.reset(OpARM64SRA)
 20484  		v.Type = t
 20485  		v.AddArg2(x, y)
 20486  		return true
 20487  	}
 20488  	// match: (Rsh64x32 <t> x y)
 20489  	// cond: !shiftIsBounded(v)
 20490  	// result: (SRA x (CSEL [OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
 20491  	for {
 20492  		x := v_0
 20493  		y := v_1
 20494  		if !(!shiftIsBounded(v)) {
 20495  			break
 20496  		}
 20497  		v.reset(OpARM64SRA)
 20498  		v0 := b.NewValue0(v.Pos, OpARM64CSEL, y.Type)
 20499  		v0.AuxInt = opToAuxInt(OpARM64LessThanU)
 20500  		v1 := b.NewValue0(v.Pos, OpConst64, y.Type)
 20501  		v1.AuxInt = int64ToAuxInt(63)
 20502  		v2 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
 20503  		v2.AuxInt = int64ToAuxInt(64)
 20504  		v2.AddArg(y)
 20505  		v0.AddArg3(y, v1, v2)
 20506  		v.AddArg2(x, v0)
 20507  		return true
 20508  	}
 20509  	return false
 20510  }
 20511  func rewriteValueARM64_OpRsh64x64(v *Value) bool {
 20512  	v_1 := v.Args[1]
 20513  	v_0 := v.Args[0]
 20514  	b := v.Block
 20515  	// match: (Rsh64x64 <t> x y)
 20516  	// cond: shiftIsBounded(v)
 20517  	// result: (SRA <t> x y)
 20518  	for {
 20519  		t := v.Type
 20520  		x := v_0
 20521  		y := v_1
 20522  		if !(shiftIsBounded(v)) {
 20523  			break
 20524  		}
 20525  		v.reset(OpARM64SRA)
 20526  		v.Type = t
 20527  		v.AddArg2(x, y)
 20528  		return true
 20529  	}
 20530  	// match: (Rsh64x64 <t> x y)
 20531  	// cond: !shiftIsBounded(v)
 20532  	// result: (SRA x (CSEL [OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
 20533  	for {
 20534  		x := v_0
 20535  		y := v_1
 20536  		if !(!shiftIsBounded(v)) {
 20537  			break
 20538  		}
 20539  		v.reset(OpARM64SRA)
 20540  		v0 := b.NewValue0(v.Pos, OpARM64CSEL, y.Type)
 20541  		v0.AuxInt = opToAuxInt(OpARM64LessThanU)
 20542  		v1 := b.NewValue0(v.Pos, OpConst64, y.Type)
 20543  		v1.AuxInt = int64ToAuxInt(63)
 20544  		v2 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
 20545  		v2.AuxInt = int64ToAuxInt(64)
 20546  		v2.AddArg(y)
 20547  		v0.AddArg3(y, v1, v2)
 20548  		v.AddArg2(x, v0)
 20549  		return true
 20550  	}
 20551  	return false
 20552  }
 20553  func rewriteValueARM64_OpRsh64x8(v *Value) bool {
 20554  	v_1 := v.Args[1]
 20555  	v_0 := v.Args[0]
 20556  	b := v.Block
 20557  	typ := &b.Func.Config.Types
 20558  	// match: (Rsh64x8 <t> x y)
 20559  	// cond: shiftIsBounded(v)
 20560  	// result: (SRA <t> x y)
 20561  	for {
 20562  		t := v.Type
 20563  		x := v_0
 20564  		y := v_1
 20565  		if !(shiftIsBounded(v)) {
 20566  			break
 20567  		}
 20568  		v.reset(OpARM64SRA)
 20569  		v.Type = t
 20570  		v.AddArg2(x, y)
 20571  		return true
 20572  	}
 20573  	// match: (Rsh64x8 <t> [bounded] x y)
 20574  	// cond: !shiftIsBounded(v)
 20575  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 20576  	for {
 20577  		t := v.Type
 20578  		bounded := auxIntToBool(v.AuxInt)
 20579  		x := v_0
 20580  		y := v_1
 20581  		if !(!shiftIsBounded(v)) {
 20582  			break
 20583  		}
 20584  		v.reset(OpRsh64x32)
 20585  		v.Type = t
 20586  		v.AuxInt = boolToAuxInt(bounded)
 20587  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 20588  		v0.AddArg(y)
 20589  		v.AddArg2(x, v0)
 20590  		return true
 20591  	}
 20592  	return false
 20593  }
 20594  func rewriteValueARM64_OpRsh8Ux16(v *Value) bool {
 20595  	v_1 := v.Args[1]
 20596  	v_0 := v.Args[0]
 20597  	b := v.Block
 20598  	typ := &b.Func.Config.Types
 20599  	// match: (Rsh8Ux16 <t> [bounded] x y)
 20600  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt8to64 x) y)
 20601  	for {
 20602  		t := v.Type
 20603  		bounded := auxIntToBool(v.AuxInt)
 20604  		x := v_0
 20605  		y := v_1
 20606  		v.reset(OpRsh64Ux16)
 20607  		v.Type = t
 20608  		v.AuxInt = boolToAuxInt(bounded)
 20609  		v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 20610  		v0.AddArg(x)
 20611  		v.AddArg2(v0, y)
 20612  		return true
 20613  	}
 20614  }
 20615  func rewriteValueARM64_OpRsh8Ux32(v *Value) bool {
 20616  	v_1 := v.Args[1]
 20617  	v_0 := v.Args[0]
 20618  	b := v.Block
 20619  	typ := &b.Func.Config.Types
 20620  	// match: (Rsh8Ux32 <t> [bounded] x y)
 20621  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt8to64 x) y)
 20622  	for {
 20623  		t := v.Type
 20624  		bounded := auxIntToBool(v.AuxInt)
 20625  		x := v_0
 20626  		y := v_1
 20627  		v.reset(OpRsh64Ux32)
 20628  		v.Type = t
 20629  		v.AuxInt = boolToAuxInt(bounded)
 20630  		v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 20631  		v0.AddArg(x)
 20632  		v.AddArg2(v0, y)
 20633  		return true
 20634  	}
 20635  }
 20636  func rewriteValueARM64_OpRsh8Ux64(v *Value) bool {
 20637  	v_1 := v.Args[1]
 20638  	v_0 := v.Args[0]
 20639  	b := v.Block
 20640  	typ := &b.Func.Config.Types
 20641  	// match: (Rsh8Ux64 <t> [bounded] x y)
 20642  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt8to64 x) y)
 20643  	for {
 20644  		t := v.Type
 20645  		bounded := auxIntToBool(v.AuxInt)
 20646  		x := v_0
 20647  		y := v_1
 20648  		v.reset(OpRsh64Ux64)
 20649  		v.Type = t
 20650  		v.AuxInt = boolToAuxInt(bounded)
 20651  		v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 20652  		v0.AddArg(x)
 20653  		v.AddArg2(v0, y)
 20654  		return true
 20655  	}
 20656  }
 20657  func rewriteValueARM64_OpRsh8Ux8(v *Value) bool {
 20658  	v_1 := v.Args[1]
 20659  	v_0 := v.Args[0]
 20660  	b := v.Block
 20661  	typ := &b.Func.Config.Types
 20662  	// match: (Rsh8Ux8 <t> [bounded] x y)
 20663  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt8to64 x) y)
 20664  	for {
 20665  		t := v.Type
 20666  		bounded := auxIntToBool(v.AuxInt)
 20667  		x := v_0
 20668  		y := v_1
 20669  		v.reset(OpRsh64Ux8)
 20670  		v.Type = t
 20671  		v.AuxInt = boolToAuxInt(bounded)
 20672  		v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 20673  		v0.AddArg(x)
 20674  		v.AddArg2(v0, y)
 20675  		return true
 20676  	}
 20677  }
 20678  func rewriteValueARM64_OpRsh8x16(v *Value) bool {
 20679  	v_1 := v.Args[1]
 20680  	v_0 := v.Args[0]
 20681  	b := v.Block
 20682  	typ := &b.Func.Config.Types
 20683  	// match: (Rsh8x16 <t> [bounded] x y)
 20684  	// result: (Rsh64x16 <t> [bounded] (SignExt8to64 x) y)
 20685  	for {
 20686  		t := v.Type
 20687  		bounded := auxIntToBool(v.AuxInt)
 20688  		x := v_0
 20689  		y := v_1
 20690  		v.reset(OpRsh64x16)
 20691  		v.Type = t
 20692  		v.AuxInt = boolToAuxInt(bounded)
 20693  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
 20694  		v0.AddArg(x)
 20695  		v.AddArg2(v0, y)
 20696  		return true
 20697  	}
 20698  }
 20699  func rewriteValueARM64_OpRsh8x32(v *Value) bool {
 20700  	v_1 := v.Args[1]
 20701  	v_0 := v.Args[0]
 20702  	b := v.Block
 20703  	typ := &b.Func.Config.Types
 20704  	// match: (Rsh8x32 <t> [bounded] x y)
 20705  	// result: (Rsh64x32 <t> [bounded] (SignExt8to64 x) y)
 20706  	for {
 20707  		t := v.Type
 20708  		bounded := auxIntToBool(v.AuxInt)
 20709  		x := v_0
 20710  		y := v_1
 20711  		v.reset(OpRsh64x32)
 20712  		v.Type = t
 20713  		v.AuxInt = boolToAuxInt(bounded)
 20714  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
 20715  		v0.AddArg(x)
 20716  		v.AddArg2(v0, y)
 20717  		return true
 20718  	}
 20719  }
 20720  func rewriteValueARM64_OpRsh8x64(v *Value) bool {
 20721  	v_1 := v.Args[1]
 20722  	v_0 := v.Args[0]
 20723  	b := v.Block
 20724  	typ := &b.Func.Config.Types
 20725  	// match: (Rsh8x64 <t> [bounded] x y)
 20726  	// result: (Rsh64x64 <t> [bounded] (SignExt8to64 x) y)
 20727  	for {
 20728  		t := v.Type
 20729  		bounded := auxIntToBool(v.AuxInt)
 20730  		x := v_0
 20731  		y := v_1
 20732  		v.reset(OpRsh64x64)
 20733  		v.Type = t
 20734  		v.AuxInt = boolToAuxInt(bounded)
 20735  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
 20736  		v0.AddArg(x)
 20737  		v.AddArg2(v0, y)
 20738  		return true
 20739  	}
 20740  }
 20741  func rewriteValueARM64_OpRsh8x8(v *Value) bool {
 20742  	v_1 := v.Args[1]
 20743  	v_0 := v.Args[0]
 20744  	b := v.Block
 20745  	typ := &b.Func.Config.Types
 20746  	// match: (Rsh8x8 <t> [bounded] x y)
 20747  	// result: (Rsh64x8 <t> [bounded] (SignExt8to64 x) y)
 20748  	for {
 20749  		t := v.Type
 20750  		bounded := auxIntToBool(v.AuxInt)
 20751  		x := v_0
 20752  		y := v_1
 20753  		v.reset(OpRsh64x8)
 20754  		v.Type = t
 20755  		v.AuxInt = boolToAuxInt(bounded)
 20756  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
 20757  		v0.AddArg(x)
 20758  		v.AddArg2(v0, y)
 20759  		return true
 20760  	}
 20761  }
 20762  func rewriteValueARM64_OpSelect0(v *Value) bool {
 20763  	v_0 := v.Args[0]
 20764  	b := v.Block
 20765  	typ := &b.Func.Config.Types
 20766  	// match: (Select0 (Mul64uhilo x y))
 20767  	// result: (UMULH x y)
 20768  	for {
 20769  		if v_0.Op != OpMul64uhilo {
 20770  			break
 20771  		}
 20772  		y := v_0.Args[1]
 20773  		x := v_0.Args[0]
 20774  		v.reset(OpARM64UMULH)
 20775  		v.AddArg2(x, y)
 20776  		return true
 20777  	}
 20778  	// match: (Select0 (Add64carry x y c))
 20779  	// result: (Select0 <typ.UInt64> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c))))
 20780  	for {
 20781  		if v_0.Op != OpAdd64carry {
 20782  			break
 20783  		}
 20784  		c := v_0.Args[2]
 20785  		x := v_0.Args[0]
 20786  		y := v_0.Args[1]
 20787  		v.reset(OpSelect0)
 20788  		v.Type = typ.UInt64
 20789  		v0 := b.NewValue0(v.Pos, OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20790  		v1 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
 20791  		v2 := b.NewValue0(v.Pos, OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20792  		v2.AuxInt = int64ToAuxInt(-1)
 20793  		v2.AddArg(c)
 20794  		v1.AddArg(v2)
 20795  		v0.AddArg3(x, y, v1)
 20796  		v.AddArg(v0)
 20797  		return true
 20798  	}
 20799  	// match: (Select0 (Sub64borrow x y bo))
 20800  	// result: (Select0 <typ.UInt64> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))
 20801  	for {
 20802  		if v_0.Op != OpSub64borrow {
 20803  			break
 20804  		}
 20805  		bo := v_0.Args[2]
 20806  		x := v_0.Args[0]
 20807  		y := v_0.Args[1]
 20808  		v.reset(OpSelect0)
 20809  		v.Type = typ.UInt64
 20810  		v0 := b.NewValue0(v.Pos, OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20811  		v1 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
 20812  		v2 := b.NewValue0(v.Pos, OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20813  		v2.AddArg(bo)
 20814  		v1.AddArg(v2)
 20815  		v0.AddArg3(x, y, v1)
 20816  		v.AddArg(v0)
 20817  		return true
 20818  	}
 20819  	// match: (Select0 (Mul64uover x y))
 20820  	// result: (MUL x y)
 20821  	for {
 20822  		if v_0.Op != OpMul64uover {
 20823  			break
 20824  		}
 20825  		y := v_0.Args[1]
 20826  		x := v_0.Args[0]
 20827  		v.reset(OpARM64MUL)
 20828  		v.AddArg2(x, y)
 20829  		return true
 20830  	}
 20831  	return false
 20832  }
 20833  func rewriteValueARM64_OpSelect1(v *Value) bool {
 20834  	v_0 := v.Args[0]
 20835  	b := v.Block
 20836  	typ := &b.Func.Config.Types
 20837  	// match: (Select1 (Mul64uhilo x y))
 20838  	// result: (MUL x y)
 20839  	for {
 20840  		if v_0.Op != OpMul64uhilo {
 20841  			break
 20842  		}
 20843  		y := v_0.Args[1]
 20844  		x := v_0.Args[0]
 20845  		v.reset(OpARM64MUL)
 20846  		v.AddArg2(x, y)
 20847  		return true
 20848  	}
 20849  	// match: (Select1 (Add64carry x y c))
 20850  	// result: (ADCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c)))))
 20851  	for {
 20852  		if v_0.Op != OpAdd64carry {
 20853  			break
 20854  		}
 20855  		c := v_0.Args[2]
 20856  		x := v_0.Args[0]
 20857  		y := v_0.Args[1]
 20858  		v.reset(OpARM64ADCzerocarry)
 20859  		v.Type = typ.UInt64
 20860  		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
 20861  		v1 := b.NewValue0(v.Pos, OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20862  		v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
 20863  		v3 := b.NewValue0(v.Pos, OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20864  		v3.AuxInt = int64ToAuxInt(-1)
 20865  		v3.AddArg(c)
 20866  		v2.AddArg(v3)
 20867  		v1.AddArg3(x, y, v2)
 20868  		v0.AddArg(v1)
 20869  		v.AddArg(v0)
 20870  		return true
 20871  	}
 20872  	// match: (Select1 (Sub64borrow x y bo))
 20873  	// result: (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))))
 20874  	for {
 20875  		if v_0.Op != OpSub64borrow {
 20876  			break
 20877  		}
 20878  		bo := v_0.Args[2]
 20879  		x := v_0.Args[0]
 20880  		y := v_0.Args[1]
 20881  		v.reset(OpARM64NEG)
 20882  		v.Type = typ.UInt64
 20883  		v0 := b.NewValue0(v.Pos, OpARM64NGCzerocarry, typ.UInt64)
 20884  		v1 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
 20885  		v2 := b.NewValue0(v.Pos, OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20886  		v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
 20887  		v4 := b.NewValue0(v.Pos, OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 20888  		v4.AddArg(bo)
 20889  		v3.AddArg(v4)
 20890  		v2.AddArg3(x, y, v3)
 20891  		v1.AddArg(v2)
 20892  		v0.AddArg(v1)
 20893  		v.AddArg(v0)
 20894  		return true
 20895  	}
 20896  	// match: (Select1 (Mul64uover x y))
 20897  	// result: (NotEqual (CMPconst (UMULH <typ.UInt64> x y) [0]))
 20898  	for {
 20899  		if v_0.Op != OpMul64uover {
 20900  			break
 20901  		}
 20902  		y := v_0.Args[1]
 20903  		x := v_0.Args[0]
 20904  		v.reset(OpARM64NotEqual)
 20905  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
 20906  		v0.AuxInt = int64ToAuxInt(0)
 20907  		v1 := b.NewValue0(v.Pos, OpARM64UMULH, typ.UInt64)
 20908  		v1.AddArg2(x, y)
 20909  		v0.AddArg(v1)
 20910  		v.AddArg(v0)
 20911  		return true
 20912  	}
 20913  	return false
 20914  }
 20915  func rewriteValueARM64_OpSelectN(v *Value) bool {
 20916  	v_0 := v.Args[0]
 20917  	b := v.Block
 20918  	config := b.Func.Config
 20919  	// match: (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem)))))
 20920  	// cond: sz >= 0 && isSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(s1, s2, s3, call)
 20921  	// result: (Move [sz] dst src mem)
 20922  	for {
 20923  		if auxIntToInt64(v.AuxInt) != 0 {
 20924  			break
 20925  		}
 20926  		call := v_0
 20927  		if call.Op != OpARM64CALLstatic || len(call.Args) != 1 {
 20928  			break
 20929  		}
 20930  		sym := auxToCall(call.Aux)
 20931  		s1 := call.Args[0]
 20932  		if s1.Op != OpARM64MOVDstore {
 20933  			break
 20934  		}
 20935  		_ = s1.Args[2]
 20936  		s1_1 := s1.Args[1]
 20937  		if s1_1.Op != OpARM64MOVDconst {
 20938  			break
 20939  		}
 20940  		sz := auxIntToInt64(s1_1.AuxInt)
 20941  		s2 := s1.Args[2]
 20942  		if s2.Op != OpARM64MOVDstore {
 20943  			break
 20944  		}
 20945  		_ = s2.Args[2]
 20946  		src := s2.Args[1]
 20947  		s3 := s2.Args[2]
 20948  		if s3.Op != OpARM64MOVDstore {
 20949  			break
 20950  		}
 20951  		mem := s3.Args[2]
 20952  		dst := s3.Args[1]
 20953  		if !(sz >= 0 && isSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(s1, s2, s3, call)) {
 20954  			break
 20955  		}
 20956  		v.reset(OpMove)
 20957  		v.AuxInt = int64ToAuxInt(sz)
 20958  		v.AddArg3(dst, src, mem)
 20959  		return true
 20960  	}
 20961  	// match: (SelectN [0] call:(CALLstatic {sym} dst src (MOVDconst [sz]) mem))
 20962  	// cond: sz >= 0 && isSameCall(sym, "runtime.memmove") && call.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(call)
 20963  	// result: (Move [sz] dst src mem)
 20964  	for {
 20965  		if auxIntToInt64(v.AuxInt) != 0 {
 20966  			break
 20967  		}
 20968  		call := v_0
 20969  		if call.Op != OpARM64CALLstatic || len(call.Args) != 4 {
 20970  			break
 20971  		}
 20972  		sym := auxToCall(call.Aux)
 20973  		mem := call.Args[3]
 20974  		dst := call.Args[0]
 20975  		src := call.Args[1]
 20976  		call_2 := call.Args[2]
 20977  		if call_2.Op != OpARM64MOVDconst {
 20978  			break
 20979  		}
 20980  		sz := auxIntToInt64(call_2.AuxInt)
 20981  		if !(sz >= 0 && isSameCall(sym, "runtime.memmove") && call.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(call)) {
 20982  			break
 20983  		}
 20984  		v.reset(OpMove)
 20985  		v.AuxInt = int64ToAuxInt(sz)
 20986  		v.AddArg3(dst, src, mem)
 20987  		return true
 20988  	}
 20989  	return false
 20990  }
 20991  func rewriteValueARM64_OpSlicemask(v *Value) bool {
 20992  	v_0 := v.Args[0]
 20993  	b := v.Block
 20994  	// match: (Slicemask <t> x)
 20995  	// result: (SRAconst (NEG <t> x) [63])
 20996  	for {
 20997  		t := v.Type
 20998  		x := v_0
 20999  		v.reset(OpARM64SRAconst)
 21000  		v.AuxInt = int64ToAuxInt(63)
 21001  		v0 := b.NewValue0(v.Pos, OpARM64NEG, t)
 21002  		v0.AddArg(x)
 21003  		v.AddArg(v0)
 21004  		return true
 21005  	}
 21006  }
 21007  func rewriteValueARM64_OpStore(v *Value) bool {
 21008  	v_2 := v.Args[2]
 21009  	v_1 := v.Args[1]
 21010  	v_0 := v.Args[0]
 21011  	// match: (Store {t} ptr val mem)
 21012  	// cond: t.Size() == 1
 21013  	// result: (MOVBstore ptr val mem)
 21014  	for {
 21015  		t := auxToType(v.Aux)
 21016  		ptr := v_0
 21017  		val := v_1
 21018  		mem := v_2
 21019  		if !(t.Size() == 1) {
 21020  			break
 21021  		}
 21022  		v.reset(OpARM64MOVBstore)
 21023  		v.AddArg3(ptr, val, mem)
 21024  		return true
 21025  	}
 21026  	// match: (Store {t} ptr val mem)
 21027  	// cond: t.Size() == 2
 21028  	// result: (MOVHstore ptr val mem)
 21029  	for {
 21030  		t := auxToType(v.Aux)
 21031  		ptr := v_0
 21032  		val := v_1
 21033  		mem := v_2
 21034  		if !(t.Size() == 2) {
 21035  			break
 21036  		}
 21037  		v.reset(OpARM64MOVHstore)
 21038  		v.AddArg3(ptr, val, mem)
 21039  		return true
 21040  	}
 21041  	// match: (Store {t} ptr val mem)
 21042  	// cond: t.Size() == 4 && !t.IsFloat()
 21043  	// result: (MOVWstore ptr val mem)
 21044  	for {
 21045  		t := auxToType(v.Aux)
 21046  		ptr := v_0
 21047  		val := v_1
 21048  		mem := v_2
 21049  		if !(t.Size() == 4 && !t.IsFloat()) {
 21050  			break
 21051  		}
 21052  		v.reset(OpARM64MOVWstore)
 21053  		v.AddArg3(ptr, val, mem)
 21054  		return true
 21055  	}
 21056  	// match: (Store {t} ptr val mem)
 21057  	// cond: t.Size() == 8 && !t.IsFloat()
 21058  	// result: (MOVDstore ptr val mem)
 21059  	for {
 21060  		t := auxToType(v.Aux)
 21061  		ptr := v_0
 21062  		val := v_1
 21063  		mem := v_2
 21064  		if !(t.Size() == 8 && !t.IsFloat()) {
 21065  			break
 21066  		}
 21067  		v.reset(OpARM64MOVDstore)
 21068  		v.AddArg3(ptr, val, mem)
 21069  		return true
 21070  	}
 21071  	// match: (Store {t} ptr val mem)
 21072  	// cond: t.Size() == 4 && t.IsFloat()
 21073  	// result: (FMOVSstore ptr val mem)
 21074  	for {
 21075  		t := auxToType(v.Aux)
 21076  		ptr := v_0
 21077  		val := v_1
 21078  		mem := v_2
 21079  		if !(t.Size() == 4 && t.IsFloat()) {
 21080  			break
 21081  		}
 21082  		v.reset(OpARM64FMOVSstore)
 21083  		v.AddArg3(ptr, val, mem)
 21084  		return true
 21085  	}
 21086  	// match: (Store {t} ptr val mem)
 21087  	// cond: t.Size() == 8 && t.IsFloat()
 21088  	// result: (FMOVDstore ptr val mem)
 21089  	for {
 21090  		t := auxToType(v.Aux)
 21091  		ptr := v_0
 21092  		val := v_1
 21093  		mem := v_2
 21094  		if !(t.Size() == 8 && t.IsFloat()) {
 21095  			break
 21096  		}
 21097  		v.reset(OpARM64FMOVDstore)
 21098  		v.AddArg3(ptr, val, mem)
 21099  		return true
 21100  	}
 21101  	return false
 21102  }
 21103  func rewriteValueARM64_OpZero(v *Value) bool {
 21104  	v_1 := v.Args[1]
 21105  	v_0 := v.Args[0]
 21106  	b := v.Block
 21107  	typ := &b.Func.Config.Types
 21108  	// match: (Zero [0] _ mem)
 21109  	// result: mem
 21110  	for {
 21111  		if auxIntToInt64(v.AuxInt) != 0 {
 21112  			break
 21113  		}
 21114  		mem := v_1
 21115  		v.copyOf(mem)
 21116  		return true
 21117  	}
 21118  	// match: (Zero [1] ptr mem)
 21119  	// result: (MOVBstore ptr (MOVDconst [0]) mem)
 21120  	for {
 21121  		if auxIntToInt64(v.AuxInt) != 1 {
 21122  			break
 21123  		}
 21124  		ptr := v_0
 21125  		mem := v_1
 21126  		v.reset(OpARM64MOVBstore)
 21127  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21128  		v0.AuxInt = int64ToAuxInt(0)
 21129  		v.AddArg3(ptr, v0, mem)
 21130  		return true
 21131  	}
 21132  	// match: (Zero [2] ptr mem)
 21133  	// result: (MOVHstore ptr (MOVDconst [0]) mem)
 21134  	for {
 21135  		if auxIntToInt64(v.AuxInt) != 2 {
 21136  			break
 21137  		}
 21138  		ptr := v_0
 21139  		mem := v_1
 21140  		v.reset(OpARM64MOVHstore)
 21141  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21142  		v0.AuxInt = int64ToAuxInt(0)
 21143  		v.AddArg3(ptr, v0, mem)
 21144  		return true
 21145  	}
 21146  	// match: (Zero [4] ptr mem)
 21147  	// result: (MOVWstore ptr (MOVDconst [0]) mem)
 21148  	for {
 21149  		if auxIntToInt64(v.AuxInt) != 4 {
 21150  			break
 21151  		}
 21152  		ptr := v_0
 21153  		mem := v_1
 21154  		v.reset(OpARM64MOVWstore)
 21155  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21156  		v0.AuxInt = int64ToAuxInt(0)
 21157  		v.AddArg3(ptr, v0, mem)
 21158  		return true
 21159  	}
 21160  	// match: (Zero [3] ptr mem)
 21161  	// result: (MOVBstore [2] ptr (MOVDconst [0]) (MOVHstore ptr (MOVDconst [0]) mem))
 21162  	for {
 21163  		if auxIntToInt64(v.AuxInt) != 3 {
 21164  			break
 21165  		}
 21166  		ptr := v_0
 21167  		mem := v_1
 21168  		v.reset(OpARM64MOVBstore)
 21169  		v.AuxInt = int32ToAuxInt(2)
 21170  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21171  		v0.AuxInt = int64ToAuxInt(0)
 21172  		v1 := b.NewValue0(v.Pos, OpARM64MOVHstore, types.TypeMem)
 21173  		v1.AddArg3(ptr, v0, mem)
 21174  		v.AddArg3(ptr, v0, v1)
 21175  		return true
 21176  	}
 21177  	// match: (Zero [5] ptr mem)
 21178  	// result: (MOVBstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 21179  	for {
 21180  		if auxIntToInt64(v.AuxInt) != 5 {
 21181  			break
 21182  		}
 21183  		ptr := v_0
 21184  		mem := v_1
 21185  		v.reset(OpARM64MOVBstore)
 21186  		v.AuxInt = int32ToAuxInt(4)
 21187  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21188  		v0.AuxInt = int64ToAuxInt(0)
 21189  		v1 := b.NewValue0(v.Pos, OpARM64MOVWstore, types.TypeMem)
 21190  		v1.AddArg3(ptr, v0, mem)
 21191  		v.AddArg3(ptr, v0, v1)
 21192  		return true
 21193  	}
 21194  	// match: (Zero [6] ptr mem)
 21195  	// result: (MOVHstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 21196  	for {
 21197  		if auxIntToInt64(v.AuxInt) != 6 {
 21198  			break
 21199  		}
 21200  		ptr := v_0
 21201  		mem := v_1
 21202  		v.reset(OpARM64MOVHstore)
 21203  		v.AuxInt = int32ToAuxInt(4)
 21204  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21205  		v0.AuxInt = int64ToAuxInt(0)
 21206  		v1 := b.NewValue0(v.Pos, OpARM64MOVWstore, types.TypeMem)
 21207  		v1.AddArg3(ptr, v0, mem)
 21208  		v.AddArg3(ptr, v0, v1)
 21209  		return true
 21210  	}
 21211  	// match: (Zero [7] ptr mem)
 21212  	// result: (MOVWstore [3] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 21213  	for {
 21214  		if auxIntToInt64(v.AuxInt) != 7 {
 21215  			break
 21216  		}
 21217  		ptr := v_0
 21218  		mem := v_1
 21219  		v.reset(OpARM64MOVWstore)
 21220  		v.AuxInt = int32ToAuxInt(3)
 21221  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21222  		v0.AuxInt = int64ToAuxInt(0)
 21223  		v1 := b.NewValue0(v.Pos, OpARM64MOVWstore, types.TypeMem)
 21224  		v1.AddArg3(ptr, v0, mem)
 21225  		v.AddArg3(ptr, v0, v1)
 21226  		return true
 21227  	}
 21228  	// match: (Zero [8] ptr mem)
 21229  	// result: (MOVDstore ptr (MOVDconst [0]) mem)
 21230  	for {
 21231  		if auxIntToInt64(v.AuxInt) != 8 {
 21232  			break
 21233  		}
 21234  		ptr := v_0
 21235  		mem := v_1
 21236  		v.reset(OpARM64MOVDstore)
 21237  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21238  		v0.AuxInt = int64ToAuxInt(0)
 21239  		v.AddArg3(ptr, v0, mem)
 21240  		return true
 21241  	}
 21242  	// match: (Zero [9] ptr mem)
 21243  	// result: (MOVBstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21244  	for {
 21245  		if auxIntToInt64(v.AuxInt) != 9 {
 21246  			break
 21247  		}
 21248  		ptr := v_0
 21249  		mem := v_1
 21250  		v.reset(OpARM64MOVBstore)
 21251  		v.AuxInt = int32ToAuxInt(8)
 21252  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21253  		v0.AuxInt = int64ToAuxInt(0)
 21254  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21255  		v1.AddArg3(ptr, v0, mem)
 21256  		v.AddArg3(ptr, v0, v1)
 21257  		return true
 21258  	}
 21259  	// match: (Zero [10] ptr mem)
 21260  	// result: (MOVHstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21261  	for {
 21262  		if auxIntToInt64(v.AuxInt) != 10 {
 21263  			break
 21264  		}
 21265  		ptr := v_0
 21266  		mem := v_1
 21267  		v.reset(OpARM64MOVHstore)
 21268  		v.AuxInt = int32ToAuxInt(8)
 21269  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21270  		v0.AuxInt = int64ToAuxInt(0)
 21271  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21272  		v1.AddArg3(ptr, v0, mem)
 21273  		v.AddArg3(ptr, v0, v1)
 21274  		return true
 21275  	}
 21276  	// match: (Zero [11] ptr mem)
 21277  	// result: (MOVDstore [3] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21278  	for {
 21279  		if auxIntToInt64(v.AuxInt) != 11 {
 21280  			break
 21281  		}
 21282  		ptr := v_0
 21283  		mem := v_1
 21284  		v.reset(OpARM64MOVDstore)
 21285  		v.AuxInt = int32ToAuxInt(3)
 21286  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21287  		v0.AuxInt = int64ToAuxInt(0)
 21288  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21289  		v1.AddArg3(ptr, v0, mem)
 21290  		v.AddArg3(ptr, v0, v1)
 21291  		return true
 21292  	}
 21293  	// match: (Zero [12] ptr mem)
 21294  	// result: (MOVWstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21295  	for {
 21296  		if auxIntToInt64(v.AuxInt) != 12 {
 21297  			break
 21298  		}
 21299  		ptr := v_0
 21300  		mem := v_1
 21301  		v.reset(OpARM64MOVWstore)
 21302  		v.AuxInt = int32ToAuxInt(8)
 21303  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21304  		v0.AuxInt = int64ToAuxInt(0)
 21305  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21306  		v1.AddArg3(ptr, v0, mem)
 21307  		v.AddArg3(ptr, v0, v1)
 21308  		return true
 21309  	}
 21310  	// match: (Zero [13] ptr mem)
 21311  	// result: (MOVDstore [5] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21312  	for {
 21313  		if auxIntToInt64(v.AuxInt) != 13 {
 21314  			break
 21315  		}
 21316  		ptr := v_0
 21317  		mem := v_1
 21318  		v.reset(OpARM64MOVDstore)
 21319  		v.AuxInt = int32ToAuxInt(5)
 21320  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21321  		v0.AuxInt = int64ToAuxInt(0)
 21322  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21323  		v1.AddArg3(ptr, v0, mem)
 21324  		v.AddArg3(ptr, v0, v1)
 21325  		return true
 21326  	}
 21327  	// match: (Zero [14] ptr mem)
 21328  	// result: (MOVDstore [6] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21329  	for {
 21330  		if auxIntToInt64(v.AuxInt) != 14 {
 21331  			break
 21332  		}
 21333  		ptr := v_0
 21334  		mem := v_1
 21335  		v.reset(OpARM64MOVDstore)
 21336  		v.AuxInt = int32ToAuxInt(6)
 21337  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21338  		v0.AuxInt = int64ToAuxInt(0)
 21339  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21340  		v1.AddArg3(ptr, v0, mem)
 21341  		v.AddArg3(ptr, v0, v1)
 21342  		return true
 21343  	}
 21344  	// match: (Zero [15] ptr mem)
 21345  	// result: (MOVDstore [7] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 21346  	for {
 21347  		if auxIntToInt64(v.AuxInt) != 15 {
 21348  			break
 21349  		}
 21350  		ptr := v_0
 21351  		mem := v_1
 21352  		v.reset(OpARM64MOVDstore)
 21353  		v.AuxInt = int32ToAuxInt(7)
 21354  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21355  		v0.AuxInt = int64ToAuxInt(0)
 21356  		v1 := b.NewValue0(v.Pos, OpARM64MOVDstore, types.TypeMem)
 21357  		v1.AddArg3(ptr, v0, mem)
 21358  		v.AddArg3(ptr, v0, v1)
 21359  		return true
 21360  	}
 21361  	// match: (Zero [16] ptr mem)
 21362  	// result: (STP [0] ptr (MOVDconst [0]) (MOVDconst [0]) mem)
 21363  	for {
 21364  		if auxIntToInt64(v.AuxInt) != 16 {
 21365  			break
 21366  		}
 21367  		ptr := v_0
 21368  		mem := v_1
 21369  		v.reset(OpARM64STP)
 21370  		v.AuxInt = int32ToAuxInt(0)
 21371  		v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
 21372  		v0.AuxInt = int64ToAuxInt(0)
 21373  		v.AddArg4(ptr, v0, v0, mem)
 21374  		return true
 21375  	}
 21376  	// match: (Zero [s] ptr mem)
 21377  	// cond: s > 16 && s < 192
 21378  	// result: (LoweredZero [s] ptr mem)
 21379  	for {
 21380  		s := auxIntToInt64(v.AuxInt)
 21381  		ptr := v_0
 21382  		mem := v_1
 21383  		if !(s > 16 && s < 192) {
 21384  			break
 21385  		}
 21386  		v.reset(OpARM64LoweredZero)
 21387  		v.AuxInt = int64ToAuxInt(s)
 21388  		v.AddArg2(ptr, mem)
 21389  		return true
 21390  	}
 21391  	// match: (Zero [s] ptr mem)
 21392  	// cond: s >= 192
 21393  	// result: (LoweredZeroLoop [s] ptr mem)
 21394  	for {
 21395  		s := auxIntToInt64(v.AuxInt)
 21396  		ptr := v_0
 21397  		mem := v_1
 21398  		if !(s >= 192) {
 21399  			break
 21400  		}
 21401  		v.reset(OpARM64LoweredZeroLoop)
 21402  		v.AuxInt = int64ToAuxInt(s)
 21403  		v.AddArg2(ptr, mem)
 21404  		return true
 21405  	}
 21406  	return false
 21407  }
 21408  func rewriteBlockARM64(b *Block) bool {
 21409  	typ := &b.Func.Config.Types
 21410  	switch b.Kind {
 21411  	case BlockARM64EQ:
 21412  		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 21413  		// cond: z.Uses == 1
 21414  		// result: (EQ (TST x y) yes no)
 21415  		for b.Controls[0].Op == OpARM64CMPconst {
 21416  			v_0 := b.Controls[0]
 21417  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21418  				break
 21419  			}
 21420  			z := v_0.Args[0]
 21421  			if z.Op != OpARM64AND {
 21422  				break
 21423  			}
 21424  			_ = z.Args[1]
 21425  			z_0 := z.Args[0]
 21426  			z_1 := z.Args[1]
 21427  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 21428  				x := z_0
 21429  				y := z_1
 21430  				if !(z.Uses == 1) {
 21431  					continue
 21432  				}
 21433  				v0 := b.NewValue0(v_0.Pos, OpARM64TST, types.TypeFlags)
 21434  				v0.AddArg2(x, y)
 21435  				b.resetWithControl(BlockARM64EQ, v0)
 21436  				return true
 21437  			}
 21438  			break
 21439  		}
 21440  		// match: (EQ (CMPconst [0] x:(ANDconst [c] y)) yes no)
 21441  		// cond: x.Uses == 1
 21442  		// result: (EQ (TSTconst [c] y) yes no)
 21443  		for b.Controls[0].Op == OpARM64CMPconst {
 21444  			v_0 := b.Controls[0]
 21445  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21446  				break
 21447  			}
 21448  			x := v_0.Args[0]
 21449  			if x.Op != OpARM64ANDconst {
 21450  				break
 21451  			}
 21452  			c := auxIntToInt64(x.AuxInt)
 21453  			y := x.Args[0]
 21454  			if !(x.Uses == 1) {
 21455  				break
 21456  			}
 21457  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTconst, types.TypeFlags)
 21458  			v0.AuxInt = int64ToAuxInt(c)
 21459  			v0.AddArg(y)
 21460  			b.resetWithControl(BlockARM64EQ, v0)
 21461  			return true
 21462  		}
 21463  		// match: (EQ (CMPWconst [0] z:(AND x y)) yes no)
 21464  		// cond: z.Uses == 1
 21465  		// result: (EQ (TSTW x y) yes no)
 21466  		for b.Controls[0].Op == OpARM64CMPWconst {
 21467  			v_0 := b.Controls[0]
 21468  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21469  				break
 21470  			}
 21471  			z := v_0.Args[0]
 21472  			if z.Op != OpARM64AND {
 21473  				break
 21474  			}
 21475  			_ = z.Args[1]
 21476  			z_0 := z.Args[0]
 21477  			z_1 := z.Args[1]
 21478  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 21479  				x := z_0
 21480  				y := z_1
 21481  				if !(z.Uses == 1) {
 21482  					continue
 21483  				}
 21484  				v0 := b.NewValue0(v_0.Pos, OpARM64TSTW, types.TypeFlags)
 21485  				v0.AddArg2(x, y)
 21486  				b.resetWithControl(BlockARM64EQ, v0)
 21487  				return true
 21488  			}
 21489  			break
 21490  		}
 21491  		// match: (EQ (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 21492  		// cond: x.Uses == 1
 21493  		// result: (EQ (TSTWconst [int32(c)] y) yes no)
 21494  		for b.Controls[0].Op == OpARM64CMPWconst {
 21495  			v_0 := b.Controls[0]
 21496  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21497  				break
 21498  			}
 21499  			x := v_0.Args[0]
 21500  			if x.Op != OpARM64ANDconst {
 21501  				break
 21502  			}
 21503  			c := auxIntToInt64(x.AuxInt)
 21504  			y := x.Args[0]
 21505  			if !(x.Uses == 1) {
 21506  				break
 21507  			}
 21508  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTWconst, types.TypeFlags)
 21509  			v0.AuxInt = int32ToAuxInt(int32(c))
 21510  			v0.AddArg(y)
 21511  			b.resetWithControl(BlockARM64EQ, v0)
 21512  			return true
 21513  		}
 21514  		// match: (EQ (CMPconst [0] x:(ADDconst [c] y)) yes no)
 21515  		// cond: x.Uses == 1
 21516  		// result: (EQ (CMNconst [c] y) yes no)
 21517  		for b.Controls[0].Op == OpARM64CMPconst {
 21518  			v_0 := b.Controls[0]
 21519  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21520  				break
 21521  			}
 21522  			x := v_0.Args[0]
 21523  			if x.Op != OpARM64ADDconst {
 21524  				break
 21525  			}
 21526  			c := auxIntToInt64(x.AuxInt)
 21527  			y := x.Args[0]
 21528  			if !(x.Uses == 1) {
 21529  				break
 21530  			}
 21531  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNconst, types.TypeFlags)
 21532  			v0.AuxInt = int64ToAuxInt(c)
 21533  			v0.AddArg(y)
 21534  			b.resetWithControl(BlockARM64EQ, v0)
 21535  			return true
 21536  		}
 21537  		// match: (EQ (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 21538  		// cond: x.Uses == 1
 21539  		// result: (EQ (CMNWconst [int32(c)] y) yes no)
 21540  		for b.Controls[0].Op == OpARM64CMPWconst {
 21541  			v_0 := b.Controls[0]
 21542  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21543  				break
 21544  			}
 21545  			x := v_0.Args[0]
 21546  			if x.Op != OpARM64ADDconst {
 21547  				break
 21548  			}
 21549  			c := auxIntToInt64(x.AuxInt)
 21550  			y := x.Args[0]
 21551  			if !(x.Uses == 1) {
 21552  				break
 21553  			}
 21554  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNWconst, types.TypeFlags)
 21555  			v0.AuxInt = int32ToAuxInt(int32(c))
 21556  			v0.AddArg(y)
 21557  			b.resetWithControl(BlockARM64EQ, v0)
 21558  			return true
 21559  		}
 21560  		// match: (EQ (CMPconst [0] z:(ADD x y)) yes no)
 21561  		// cond: z.Uses == 1
 21562  		// result: (EQ (CMN x y) yes no)
 21563  		for b.Controls[0].Op == OpARM64CMPconst {
 21564  			v_0 := b.Controls[0]
 21565  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21566  				break
 21567  			}
 21568  			z := v_0.Args[0]
 21569  			if z.Op != OpARM64ADD {
 21570  				break
 21571  			}
 21572  			_ = z.Args[1]
 21573  			z_0 := z.Args[0]
 21574  			z_1 := z.Args[1]
 21575  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 21576  				x := z_0
 21577  				y := z_1
 21578  				if !(z.Uses == 1) {
 21579  					continue
 21580  				}
 21581  				v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 21582  				v0.AddArg2(x, y)
 21583  				b.resetWithControl(BlockARM64EQ, v0)
 21584  				return true
 21585  			}
 21586  			break
 21587  		}
 21588  		// match: (EQ (CMPWconst [0] z:(ADD x y)) yes no)
 21589  		// cond: z.Uses == 1
 21590  		// result: (EQ (CMNW x y) yes no)
 21591  		for b.Controls[0].Op == OpARM64CMPWconst {
 21592  			v_0 := b.Controls[0]
 21593  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21594  				break
 21595  			}
 21596  			z := v_0.Args[0]
 21597  			if z.Op != OpARM64ADD {
 21598  				break
 21599  			}
 21600  			_ = z.Args[1]
 21601  			z_0 := z.Args[0]
 21602  			z_1 := z.Args[1]
 21603  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 21604  				x := z_0
 21605  				y := z_1
 21606  				if !(z.Uses == 1) {
 21607  					continue
 21608  				}
 21609  				v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 21610  				v0.AddArg2(x, y)
 21611  				b.resetWithControl(BlockARM64EQ, v0)
 21612  				return true
 21613  			}
 21614  			break
 21615  		}
 21616  		// match: (EQ (CMP x z:(NEG y)) yes no)
 21617  		// cond: z.Uses == 1
 21618  		// result: (EQ (CMN x y) yes no)
 21619  		for b.Controls[0].Op == OpARM64CMP {
 21620  			v_0 := b.Controls[0]
 21621  			_ = v_0.Args[1]
 21622  			x := v_0.Args[0]
 21623  			z := v_0.Args[1]
 21624  			if z.Op != OpARM64NEG {
 21625  				break
 21626  			}
 21627  			y := z.Args[0]
 21628  			if !(z.Uses == 1) {
 21629  				break
 21630  			}
 21631  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 21632  			v0.AddArg2(x, y)
 21633  			b.resetWithControl(BlockARM64EQ, v0)
 21634  			return true
 21635  		}
 21636  		// match: (EQ (CMPW x z:(NEG y)) yes no)
 21637  		// cond: z.Uses == 1
 21638  		// result: (EQ (CMNW x y) yes no)
 21639  		for b.Controls[0].Op == OpARM64CMPW {
 21640  			v_0 := b.Controls[0]
 21641  			_ = v_0.Args[1]
 21642  			x := v_0.Args[0]
 21643  			z := v_0.Args[1]
 21644  			if z.Op != OpARM64NEG {
 21645  				break
 21646  			}
 21647  			y := z.Args[0]
 21648  			if !(z.Uses == 1) {
 21649  				break
 21650  			}
 21651  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 21652  			v0.AddArg2(x, y)
 21653  			b.resetWithControl(BlockARM64EQ, v0)
 21654  			return true
 21655  		}
 21656  		// match: (EQ (CMPconst [0] x) yes no)
 21657  		// result: (Z x yes no)
 21658  		for b.Controls[0].Op == OpARM64CMPconst {
 21659  			v_0 := b.Controls[0]
 21660  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21661  				break
 21662  			}
 21663  			x := v_0.Args[0]
 21664  			b.resetWithControl(BlockARM64Z, x)
 21665  			return true
 21666  		}
 21667  		// match: (EQ (CMPWconst [0] x) yes no)
 21668  		// result: (ZW x yes no)
 21669  		for b.Controls[0].Op == OpARM64CMPWconst {
 21670  			v_0 := b.Controls[0]
 21671  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21672  				break
 21673  			}
 21674  			x := v_0.Args[0]
 21675  			b.resetWithControl(BlockARM64ZW, x)
 21676  			return true
 21677  		}
 21678  		// match: (EQ (CMPconst [0] z:(MADD a x y)) yes no)
 21679  		// cond: z.Uses==1
 21680  		// result: (EQ (CMN a (MUL <x.Type> x y)) yes no)
 21681  		for b.Controls[0].Op == OpARM64CMPconst {
 21682  			v_0 := b.Controls[0]
 21683  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21684  				break
 21685  			}
 21686  			z := v_0.Args[0]
 21687  			if z.Op != OpARM64MADD {
 21688  				break
 21689  			}
 21690  			y := z.Args[2]
 21691  			a := z.Args[0]
 21692  			x := z.Args[1]
 21693  			if !(z.Uses == 1) {
 21694  				break
 21695  			}
 21696  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 21697  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 21698  			v1.AddArg2(x, y)
 21699  			v0.AddArg2(a, v1)
 21700  			b.resetWithControl(BlockARM64EQ, v0)
 21701  			return true
 21702  		}
 21703  		// match: (EQ (CMPconst [0] z:(MSUB a x y)) yes no)
 21704  		// cond: z.Uses==1
 21705  		// result: (EQ (CMP a (MUL <x.Type> x y)) yes no)
 21706  		for b.Controls[0].Op == OpARM64CMPconst {
 21707  			v_0 := b.Controls[0]
 21708  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21709  				break
 21710  			}
 21711  			z := v_0.Args[0]
 21712  			if z.Op != OpARM64MSUB {
 21713  				break
 21714  			}
 21715  			y := z.Args[2]
 21716  			a := z.Args[0]
 21717  			x := z.Args[1]
 21718  			if !(z.Uses == 1) {
 21719  				break
 21720  			}
 21721  			v0 := b.NewValue0(v_0.Pos, OpARM64CMP, types.TypeFlags)
 21722  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 21723  			v1.AddArg2(x, y)
 21724  			v0.AddArg2(a, v1)
 21725  			b.resetWithControl(BlockARM64EQ, v0)
 21726  			return true
 21727  		}
 21728  		// match: (EQ (CMPWconst [0] z:(MADDW a x y)) yes no)
 21729  		// cond: z.Uses==1
 21730  		// result: (EQ (CMNW a (MULW <x.Type> x y)) yes no)
 21731  		for b.Controls[0].Op == OpARM64CMPWconst {
 21732  			v_0 := b.Controls[0]
 21733  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21734  				break
 21735  			}
 21736  			z := v_0.Args[0]
 21737  			if z.Op != OpARM64MADDW {
 21738  				break
 21739  			}
 21740  			y := z.Args[2]
 21741  			a := z.Args[0]
 21742  			x := z.Args[1]
 21743  			if !(z.Uses == 1) {
 21744  				break
 21745  			}
 21746  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 21747  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 21748  			v1.AddArg2(x, y)
 21749  			v0.AddArg2(a, v1)
 21750  			b.resetWithControl(BlockARM64EQ, v0)
 21751  			return true
 21752  		}
 21753  		// match: (EQ (CMPWconst [0] z:(MSUBW a x y)) yes no)
 21754  		// cond: z.Uses==1
 21755  		// result: (EQ (CMPW a (MULW <x.Type> x y)) yes no)
 21756  		for b.Controls[0].Op == OpARM64CMPWconst {
 21757  			v_0 := b.Controls[0]
 21758  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21759  				break
 21760  			}
 21761  			z := v_0.Args[0]
 21762  			if z.Op != OpARM64MSUBW {
 21763  				break
 21764  			}
 21765  			y := z.Args[2]
 21766  			a := z.Args[0]
 21767  			x := z.Args[1]
 21768  			if !(z.Uses == 1) {
 21769  				break
 21770  			}
 21771  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPW, types.TypeFlags)
 21772  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 21773  			v1.AddArg2(x, y)
 21774  			v0.AddArg2(a, v1)
 21775  			b.resetWithControl(BlockARM64EQ, v0)
 21776  			return true
 21777  		}
 21778  		// match: (EQ (TSTconst [c] x) yes no)
 21779  		// cond: oneBit(c)
 21780  		// result: (TBZ [int64(ntz64(c))] x yes no)
 21781  		for b.Controls[0].Op == OpARM64TSTconst {
 21782  			v_0 := b.Controls[0]
 21783  			c := auxIntToInt64(v_0.AuxInt)
 21784  			x := v_0.Args[0]
 21785  			if !(oneBit(c)) {
 21786  				break
 21787  			}
 21788  			b.resetWithControl(BlockARM64TBZ, x)
 21789  			b.AuxInt = int64ToAuxInt(int64(ntz64(c)))
 21790  			return true
 21791  		}
 21792  		// match: (EQ (TSTWconst [c] x) yes no)
 21793  		// cond: oneBit(int64(uint32(c)))
 21794  		// result: (TBZ [int64(ntz64(int64(uint32(c))))] x yes no)
 21795  		for b.Controls[0].Op == OpARM64TSTWconst {
 21796  			v_0 := b.Controls[0]
 21797  			c := auxIntToInt32(v_0.AuxInt)
 21798  			x := v_0.Args[0]
 21799  			if !(oneBit(int64(uint32(c)))) {
 21800  				break
 21801  			}
 21802  			b.resetWithControl(BlockARM64TBZ, x)
 21803  			b.AuxInt = int64ToAuxInt(int64(ntz64(int64(uint32(c)))))
 21804  			return true
 21805  		}
 21806  		// match: (EQ (FlagConstant [fc]) yes no)
 21807  		// cond: fc.eq()
 21808  		// result: (First yes no)
 21809  		for b.Controls[0].Op == OpARM64FlagConstant {
 21810  			v_0 := b.Controls[0]
 21811  			fc := auxIntToFlagConstant(v_0.AuxInt)
 21812  			if !(fc.eq()) {
 21813  				break
 21814  			}
 21815  			b.Reset(BlockFirst)
 21816  			return true
 21817  		}
 21818  		// match: (EQ (FlagConstant [fc]) yes no)
 21819  		// cond: !fc.eq()
 21820  		// result: (First no yes)
 21821  		for b.Controls[0].Op == OpARM64FlagConstant {
 21822  			v_0 := b.Controls[0]
 21823  			fc := auxIntToFlagConstant(v_0.AuxInt)
 21824  			if !(!fc.eq()) {
 21825  				break
 21826  			}
 21827  			b.Reset(BlockFirst)
 21828  			b.swapSuccessors()
 21829  			return true
 21830  		}
 21831  		// match: (EQ (InvertFlags cmp) yes no)
 21832  		// result: (EQ cmp yes no)
 21833  		for b.Controls[0].Op == OpARM64InvertFlags {
 21834  			v_0 := b.Controls[0]
 21835  			cmp := v_0.Args[0]
 21836  			b.resetWithControl(BlockARM64EQ, cmp)
 21837  			return true
 21838  		}
 21839  	case BlockARM64FGE:
 21840  		// match: (FGE (InvertFlags cmp) yes no)
 21841  		// result: (FLE cmp yes no)
 21842  		for b.Controls[0].Op == OpARM64InvertFlags {
 21843  			v_0 := b.Controls[0]
 21844  			cmp := v_0.Args[0]
 21845  			b.resetWithControl(BlockARM64FLE, cmp)
 21846  			return true
 21847  		}
 21848  	case BlockARM64FGT:
 21849  		// match: (FGT (InvertFlags cmp) yes no)
 21850  		// result: (FLT cmp yes no)
 21851  		for b.Controls[0].Op == OpARM64InvertFlags {
 21852  			v_0 := b.Controls[0]
 21853  			cmp := v_0.Args[0]
 21854  			b.resetWithControl(BlockARM64FLT, cmp)
 21855  			return true
 21856  		}
 21857  	case BlockARM64FLE:
 21858  		// match: (FLE (InvertFlags cmp) yes no)
 21859  		// result: (FGE cmp yes no)
 21860  		for b.Controls[0].Op == OpARM64InvertFlags {
 21861  			v_0 := b.Controls[0]
 21862  			cmp := v_0.Args[0]
 21863  			b.resetWithControl(BlockARM64FGE, cmp)
 21864  			return true
 21865  		}
 21866  	case BlockARM64FLT:
 21867  		// match: (FLT (InvertFlags cmp) yes no)
 21868  		// result: (FGT cmp yes no)
 21869  		for b.Controls[0].Op == OpARM64InvertFlags {
 21870  			v_0 := b.Controls[0]
 21871  			cmp := v_0.Args[0]
 21872  			b.resetWithControl(BlockARM64FGT, cmp)
 21873  			return true
 21874  		}
 21875  	case BlockARM64GE:
 21876  		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 21877  		// cond: z.Uses == 1
 21878  		// result: (GE (TST x y) yes no)
 21879  		for b.Controls[0].Op == OpARM64CMPconst {
 21880  			v_0 := b.Controls[0]
 21881  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21882  				break
 21883  			}
 21884  			z := v_0.Args[0]
 21885  			if z.Op != OpARM64AND {
 21886  				break
 21887  			}
 21888  			_ = z.Args[1]
 21889  			z_0 := z.Args[0]
 21890  			z_1 := z.Args[1]
 21891  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 21892  				x := z_0
 21893  				y := z_1
 21894  				if !(z.Uses == 1) {
 21895  					continue
 21896  				}
 21897  				v0 := b.NewValue0(v_0.Pos, OpARM64TST, types.TypeFlags)
 21898  				v0.AddArg2(x, y)
 21899  				b.resetWithControl(BlockARM64GE, v0)
 21900  				return true
 21901  			}
 21902  			break
 21903  		}
 21904  		// match: (GE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 21905  		// cond: x.Uses == 1
 21906  		// result: (GE (TSTconst [c] y) yes no)
 21907  		for b.Controls[0].Op == OpARM64CMPconst {
 21908  			v_0 := b.Controls[0]
 21909  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21910  				break
 21911  			}
 21912  			x := v_0.Args[0]
 21913  			if x.Op != OpARM64ANDconst {
 21914  				break
 21915  			}
 21916  			c := auxIntToInt64(x.AuxInt)
 21917  			y := x.Args[0]
 21918  			if !(x.Uses == 1) {
 21919  				break
 21920  			}
 21921  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTconst, types.TypeFlags)
 21922  			v0.AuxInt = int64ToAuxInt(c)
 21923  			v0.AddArg(y)
 21924  			b.resetWithControl(BlockARM64GE, v0)
 21925  			return true
 21926  		}
 21927  		// match: (GE (CMPWconst [0] z:(AND x y)) yes no)
 21928  		// cond: z.Uses == 1
 21929  		// result: (GE (TSTW x y) yes no)
 21930  		for b.Controls[0].Op == OpARM64CMPWconst {
 21931  			v_0 := b.Controls[0]
 21932  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21933  				break
 21934  			}
 21935  			z := v_0.Args[0]
 21936  			if z.Op != OpARM64AND {
 21937  				break
 21938  			}
 21939  			_ = z.Args[1]
 21940  			z_0 := z.Args[0]
 21941  			z_1 := z.Args[1]
 21942  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 21943  				x := z_0
 21944  				y := z_1
 21945  				if !(z.Uses == 1) {
 21946  					continue
 21947  				}
 21948  				v0 := b.NewValue0(v_0.Pos, OpARM64TSTW, types.TypeFlags)
 21949  				v0.AddArg2(x, y)
 21950  				b.resetWithControl(BlockARM64GE, v0)
 21951  				return true
 21952  			}
 21953  			break
 21954  		}
 21955  		// match: (GE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 21956  		// cond: x.Uses == 1
 21957  		// result: (GE (TSTWconst [int32(c)] y) yes no)
 21958  		for b.Controls[0].Op == OpARM64CMPWconst {
 21959  			v_0 := b.Controls[0]
 21960  			if auxIntToInt32(v_0.AuxInt) != 0 {
 21961  				break
 21962  			}
 21963  			x := v_0.Args[0]
 21964  			if x.Op != OpARM64ANDconst {
 21965  				break
 21966  			}
 21967  			c := auxIntToInt64(x.AuxInt)
 21968  			y := x.Args[0]
 21969  			if !(x.Uses == 1) {
 21970  				break
 21971  			}
 21972  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTWconst, types.TypeFlags)
 21973  			v0.AuxInt = int32ToAuxInt(int32(c))
 21974  			v0.AddArg(y)
 21975  			b.resetWithControl(BlockARM64GE, v0)
 21976  			return true
 21977  		}
 21978  		// match: (GE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 21979  		// cond: x.Uses == 1
 21980  		// result: (GEnoov (CMNconst [c] y) yes no)
 21981  		for b.Controls[0].Op == OpARM64CMPconst {
 21982  			v_0 := b.Controls[0]
 21983  			if auxIntToInt64(v_0.AuxInt) != 0 {
 21984  				break
 21985  			}
 21986  			x := v_0.Args[0]
 21987  			if x.Op != OpARM64ADDconst {
 21988  				break
 21989  			}
 21990  			c := auxIntToInt64(x.AuxInt)
 21991  			y := x.Args[0]
 21992  			if !(x.Uses == 1) {
 21993  				break
 21994  			}
 21995  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNconst, types.TypeFlags)
 21996  			v0.AuxInt = int64ToAuxInt(c)
 21997  			v0.AddArg(y)
 21998  			b.resetWithControl(BlockARM64GEnoov, v0)
 21999  			return true
 22000  		}
 22001  		// match: (GE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 22002  		// cond: x.Uses == 1
 22003  		// result: (GEnoov (CMNWconst [int32(c)] y) yes no)
 22004  		for b.Controls[0].Op == OpARM64CMPWconst {
 22005  			v_0 := b.Controls[0]
 22006  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22007  				break
 22008  			}
 22009  			x := v_0.Args[0]
 22010  			if x.Op != OpARM64ADDconst {
 22011  				break
 22012  			}
 22013  			c := auxIntToInt64(x.AuxInt)
 22014  			y := x.Args[0]
 22015  			if !(x.Uses == 1) {
 22016  				break
 22017  			}
 22018  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNWconst, types.TypeFlags)
 22019  			v0.AuxInt = int32ToAuxInt(int32(c))
 22020  			v0.AddArg(y)
 22021  			b.resetWithControl(BlockARM64GEnoov, v0)
 22022  			return true
 22023  		}
 22024  		// match: (GE (CMPconst [0] z:(ADD x y)) yes no)
 22025  		// cond: z.Uses == 1
 22026  		// result: (GEnoov (CMN x y) yes no)
 22027  		for b.Controls[0].Op == OpARM64CMPconst {
 22028  			v_0 := b.Controls[0]
 22029  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22030  				break
 22031  			}
 22032  			z := v_0.Args[0]
 22033  			if z.Op != OpARM64ADD {
 22034  				break
 22035  			}
 22036  			_ = z.Args[1]
 22037  			z_0 := z.Args[0]
 22038  			z_1 := z.Args[1]
 22039  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22040  				x := z_0
 22041  				y := z_1
 22042  				if !(z.Uses == 1) {
 22043  					continue
 22044  				}
 22045  				v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 22046  				v0.AddArg2(x, y)
 22047  				b.resetWithControl(BlockARM64GEnoov, v0)
 22048  				return true
 22049  			}
 22050  			break
 22051  		}
 22052  		// match: (GE (CMPWconst [0] z:(ADD x y)) yes no)
 22053  		// cond: z.Uses == 1
 22054  		// result: (GEnoov (CMNW x y) yes no)
 22055  		for b.Controls[0].Op == OpARM64CMPWconst {
 22056  			v_0 := b.Controls[0]
 22057  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22058  				break
 22059  			}
 22060  			z := v_0.Args[0]
 22061  			if z.Op != OpARM64ADD {
 22062  				break
 22063  			}
 22064  			_ = z.Args[1]
 22065  			z_0 := z.Args[0]
 22066  			z_1 := z.Args[1]
 22067  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22068  				x := z_0
 22069  				y := z_1
 22070  				if !(z.Uses == 1) {
 22071  					continue
 22072  				}
 22073  				v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 22074  				v0.AddArg2(x, y)
 22075  				b.resetWithControl(BlockARM64GEnoov, v0)
 22076  				return true
 22077  			}
 22078  			break
 22079  		}
 22080  		// match: (GE (CMPconst [0] z:(MADD a x y)) yes no)
 22081  		// cond: z.Uses==1
 22082  		// result: (GEnoov (CMN a (MUL <x.Type> x y)) yes no)
 22083  		for b.Controls[0].Op == OpARM64CMPconst {
 22084  			v_0 := b.Controls[0]
 22085  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22086  				break
 22087  			}
 22088  			z := v_0.Args[0]
 22089  			if z.Op != OpARM64MADD {
 22090  				break
 22091  			}
 22092  			y := z.Args[2]
 22093  			a := z.Args[0]
 22094  			x := z.Args[1]
 22095  			if !(z.Uses == 1) {
 22096  				break
 22097  			}
 22098  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 22099  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 22100  			v1.AddArg2(x, y)
 22101  			v0.AddArg2(a, v1)
 22102  			b.resetWithControl(BlockARM64GEnoov, v0)
 22103  			return true
 22104  		}
 22105  		// match: (GE (CMPconst [0] z:(MSUB a x y)) yes no)
 22106  		// cond: z.Uses==1
 22107  		// result: (GEnoov (CMP a (MUL <x.Type> x y)) yes no)
 22108  		for b.Controls[0].Op == OpARM64CMPconst {
 22109  			v_0 := b.Controls[0]
 22110  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22111  				break
 22112  			}
 22113  			z := v_0.Args[0]
 22114  			if z.Op != OpARM64MSUB {
 22115  				break
 22116  			}
 22117  			y := z.Args[2]
 22118  			a := z.Args[0]
 22119  			x := z.Args[1]
 22120  			if !(z.Uses == 1) {
 22121  				break
 22122  			}
 22123  			v0 := b.NewValue0(v_0.Pos, OpARM64CMP, types.TypeFlags)
 22124  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 22125  			v1.AddArg2(x, y)
 22126  			v0.AddArg2(a, v1)
 22127  			b.resetWithControl(BlockARM64GEnoov, v0)
 22128  			return true
 22129  		}
 22130  		// match: (GE (CMPWconst [0] z:(MADDW a x y)) yes no)
 22131  		// cond: z.Uses==1
 22132  		// result: (GEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 22133  		for b.Controls[0].Op == OpARM64CMPWconst {
 22134  			v_0 := b.Controls[0]
 22135  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22136  				break
 22137  			}
 22138  			z := v_0.Args[0]
 22139  			if z.Op != OpARM64MADDW {
 22140  				break
 22141  			}
 22142  			y := z.Args[2]
 22143  			a := z.Args[0]
 22144  			x := z.Args[1]
 22145  			if !(z.Uses == 1) {
 22146  				break
 22147  			}
 22148  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 22149  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 22150  			v1.AddArg2(x, y)
 22151  			v0.AddArg2(a, v1)
 22152  			b.resetWithControl(BlockARM64GEnoov, v0)
 22153  			return true
 22154  		}
 22155  		// match: (GE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 22156  		// cond: z.Uses==1
 22157  		// result: (GEnoov (CMPW a (MULW <x.Type> x y)) yes no)
 22158  		for b.Controls[0].Op == OpARM64CMPWconst {
 22159  			v_0 := b.Controls[0]
 22160  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22161  				break
 22162  			}
 22163  			z := v_0.Args[0]
 22164  			if z.Op != OpARM64MSUBW {
 22165  				break
 22166  			}
 22167  			y := z.Args[2]
 22168  			a := z.Args[0]
 22169  			x := z.Args[1]
 22170  			if !(z.Uses == 1) {
 22171  				break
 22172  			}
 22173  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPW, types.TypeFlags)
 22174  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 22175  			v1.AddArg2(x, y)
 22176  			v0.AddArg2(a, v1)
 22177  			b.resetWithControl(BlockARM64GEnoov, v0)
 22178  			return true
 22179  		}
 22180  		// match: (GE (CMPWconst [0] x) yes no)
 22181  		// result: (TBZ [31] x yes no)
 22182  		for b.Controls[0].Op == OpARM64CMPWconst {
 22183  			v_0 := b.Controls[0]
 22184  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22185  				break
 22186  			}
 22187  			x := v_0.Args[0]
 22188  			b.resetWithControl(BlockARM64TBZ, x)
 22189  			b.AuxInt = int64ToAuxInt(31)
 22190  			return true
 22191  		}
 22192  		// match: (GE (CMPconst [0] x) yes no)
 22193  		// result: (TBZ [63] x yes no)
 22194  		for b.Controls[0].Op == OpARM64CMPconst {
 22195  			v_0 := b.Controls[0]
 22196  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22197  				break
 22198  			}
 22199  			x := v_0.Args[0]
 22200  			b.resetWithControl(BlockARM64TBZ, x)
 22201  			b.AuxInt = int64ToAuxInt(63)
 22202  			return true
 22203  		}
 22204  		// match: (GE (FlagConstant [fc]) yes no)
 22205  		// cond: fc.ge()
 22206  		// result: (First yes no)
 22207  		for b.Controls[0].Op == OpARM64FlagConstant {
 22208  			v_0 := b.Controls[0]
 22209  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22210  			if !(fc.ge()) {
 22211  				break
 22212  			}
 22213  			b.Reset(BlockFirst)
 22214  			return true
 22215  		}
 22216  		// match: (GE (FlagConstant [fc]) yes no)
 22217  		// cond: !fc.ge()
 22218  		// result: (First no yes)
 22219  		for b.Controls[0].Op == OpARM64FlagConstant {
 22220  			v_0 := b.Controls[0]
 22221  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22222  			if !(!fc.ge()) {
 22223  				break
 22224  			}
 22225  			b.Reset(BlockFirst)
 22226  			b.swapSuccessors()
 22227  			return true
 22228  		}
 22229  		// match: (GE (InvertFlags cmp) yes no)
 22230  		// result: (LE cmp yes no)
 22231  		for b.Controls[0].Op == OpARM64InvertFlags {
 22232  			v_0 := b.Controls[0]
 22233  			cmp := v_0.Args[0]
 22234  			b.resetWithControl(BlockARM64LE, cmp)
 22235  			return true
 22236  		}
 22237  	case BlockARM64GEnoov:
 22238  		// match: (GEnoov (FlagConstant [fc]) yes no)
 22239  		// cond: fc.geNoov()
 22240  		// result: (First yes no)
 22241  		for b.Controls[0].Op == OpARM64FlagConstant {
 22242  			v_0 := b.Controls[0]
 22243  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22244  			if !(fc.geNoov()) {
 22245  				break
 22246  			}
 22247  			b.Reset(BlockFirst)
 22248  			return true
 22249  		}
 22250  		// match: (GEnoov (FlagConstant [fc]) yes no)
 22251  		// cond: !fc.geNoov()
 22252  		// result: (First no yes)
 22253  		for b.Controls[0].Op == OpARM64FlagConstant {
 22254  			v_0 := b.Controls[0]
 22255  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22256  			if !(!fc.geNoov()) {
 22257  				break
 22258  			}
 22259  			b.Reset(BlockFirst)
 22260  			b.swapSuccessors()
 22261  			return true
 22262  		}
 22263  		// match: (GEnoov (InvertFlags cmp) yes no)
 22264  		// result: (LEnoov cmp yes no)
 22265  		for b.Controls[0].Op == OpARM64InvertFlags {
 22266  			v_0 := b.Controls[0]
 22267  			cmp := v_0.Args[0]
 22268  			b.resetWithControl(BlockARM64LEnoov, cmp)
 22269  			return true
 22270  		}
 22271  	case BlockARM64GT:
 22272  		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 22273  		// cond: z.Uses == 1
 22274  		// result: (GT (TST x y) yes no)
 22275  		for b.Controls[0].Op == OpARM64CMPconst {
 22276  			v_0 := b.Controls[0]
 22277  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22278  				break
 22279  			}
 22280  			z := v_0.Args[0]
 22281  			if z.Op != OpARM64AND {
 22282  				break
 22283  			}
 22284  			_ = z.Args[1]
 22285  			z_0 := z.Args[0]
 22286  			z_1 := z.Args[1]
 22287  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22288  				x := z_0
 22289  				y := z_1
 22290  				if !(z.Uses == 1) {
 22291  					continue
 22292  				}
 22293  				v0 := b.NewValue0(v_0.Pos, OpARM64TST, types.TypeFlags)
 22294  				v0.AddArg2(x, y)
 22295  				b.resetWithControl(BlockARM64GT, v0)
 22296  				return true
 22297  			}
 22298  			break
 22299  		}
 22300  		// match: (GT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 22301  		// cond: x.Uses == 1
 22302  		// result: (GT (TSTconst [c] y) yes no)
 22303  		for b.Controls[0].Op == OpARM64CMPconst {
 22304  			v_0 := b.Controls[0]
 22305  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22306  				break
 22307  			}
 22308  			x := v_0.Args[0]
 22309  			if x.Op != OpARM64ANDconst {
 22310  				break
 22311  			}
 22312  			c := auxIntToInt64(x.AuxInt)
 22313  			y := x.Args[0]
 22314  			if !(x.Uses == 1) {
 22315  				break
 22316  			}
 22317  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTconst, types.TypeFlags)
 22318  			v0.AuxInt = int64ToAuxInt(c)
 22319  			v0.AddArg(y)
 22320  			b.resetWithControl(BlockARM64GT, v0)
 22321  			return true
 22322  		}
 22323  		// match: (GT (CMPWconst [0] z:(AND x y)) yes no)
 22324  		// cond: z.Uses == 1
 22325  		// result: (GT (TSTW x y) yes no)
 22326  		for b.Controls[0].Op == OpARM64CMPWconst {
 22327  			v_0 := b.Controls[0]
 22328  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22329  				break
 22330  			}
 22331  			z := v_0.Args[0]
 22332  			if z.Op != OpARM64AND {
 22333  				break
 22334  			}
 22335  			_ = z.Args[1]
 22336  			z_0 := z.Args[0]
 22337  			z_1 := z.Args[1]
 22338  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22339  				x := z_0
 22340  				y := z_1
 22341  				if !(z.Uses == 1) {
 22342  					continue
 22343  				}
 22344  				v0 := b.NewValue0(v_0.Pos, OpARM64TSTW, types.TypeFlags)
 22345  				v0.AddArg2(x, y)
 22346  				b.resetWithControl(BlockARM64GT, v0)
 22347  				return true
 22348  			}
 22349  			break
 22350  		}
 22351  		// match: (GT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 22352  		// cond: x.Uses == 1
 22353  		// result: (GT (TSTWconst [int32(c)] y) yes no)
 22354  		for b.Controls[0].Op == OpARM64CMPWconst {
 22355  			v_0 := b.Controls[0]
 22356  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22357  				break
 22358  			}
 22359  			x := v_0.Args[0]
 22360  			if x.Op != OpARM64ANDconst {
 22361  				break
 22362  			}
 22363  			c := auxIntToInt64(x.AuxInt)
 22364  			y := x.Args[0]
 22365  			if !(x.Uses == 1) {
 22366  				break
 22367  			}
 22368  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTWconst, types.TypeFlags)
 22369  			v0.AuxInt = int32ToAuxInt(int32(c))
 22370  			v0.AddArg(y)
 22371  			b.resetWithControl(BlockARM64GT, v0)
 22372  			return true
 22373  		}
 22374  		// match: (GT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 22375  		// cond: x.Uses == 1
 22376  		// result: (GTnoov (CMNconst [c] y) yes no)
 22377  		for b.Controls[0].Op == OpARM64CMPconst {
 22378  			v_0 := b.Controls[0]
 22379  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22380  				break
 22381  			}
 22382  			x := v_0.Args[0]
 22383  			if x.Op != OpARM64ADDconst {
 22384  				break
 22385  			}
 22386  			c := auxIntToInt64(x.AuxInt)
 22387  			y := x.Args[0]
 22388  			if !(x.Uses == 1) {
 22389  				break
 22390  			}
 22391  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNconst, types.TypeFlags)
 22392  			v0.AuxInt = int64ToAuxInt(c)
 22393  			v0.AddArg(y)
 22394  			b.resetWithControl(BlockARM64GTnoov, v0)
 22395  			return true
 22396  		}
 22397  		// match: (GT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 22398  		// cond: x.Uses == 1
 22399  		// result: (GTnoov (CMNWconst [int32(c)] y) yes no)
 22400  		for b.Controls[0].Op == OpARM64CMPWconst {
 22401  			v_0 := b.Controls[0]
 22402  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22403  				break
 22404  			}
 22405  			x := v_0.Args[0]
 22406  			if x.Op != OpARM64ADDconst {
 22407  				break
 22408  			}
 22409  			c := auxIntToInt64(x.AuxInt)
 22410  			y := x.Args[0]
 22411  			if !(x.Uses == 1) {
 22412  				break
 22413  			}
 22414  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNWconst, types.TypeFlags)
 22415  			v0.AuxInt = int32ToAuxInt(int32(c))
 22416  			v0.AddArg(y)
 22417  			b.resetWithControl(BlockARM64GTnoov, v0)
 22418  			return true
 22419  		}
 22420  		// match: (GT (CMPconst [0] z:(ADD x y)) yes no)
 22421  		// cond: z.Uses == 1
 22422  		// result: (GTnoov (CMN x y) yes no)
 22423  		for b.Controls[0].Op == OpARM64CMPconst {
 22424  			v_0 := b.Controls[0]
 22425  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22426  				break
 22427  			}
 22428  			z := v_0.Args[0]
 22429  			if z.Op != OpARM64ADD {
 22430  				break
 22431  			}
 22432  			_ = z.Args[1]
 22433  			z_0 := z.Args[0]
 22434  			z_1 := z.Args[1]
 22435  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22436  				x := z_0
 22437  				y := z_1
 22438  				if !(z.Uses == 1) {
 22439  					continue
 22440  				}
 22441  				v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 22442  				v0.AddArg2(x, y)
 22443  				b.resetWithControl(BlockARM64GTnoov, v0)
 22444  				return true
 22445  			}
 22446  			break
 22447  		}
 22448  		// match: (GT (CMPWconst [0] z:(ADD x y)) yes no)
 22449  		// cond: z.Uses == 1
 22450  		// result: (GTnoov (CMNW x y) yes no)
 22451  		for b.Controls[0].Op == OpARM64CMPWconst {
 22452  			v_0 := b.Controls[0]
 22453  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22454  				break
 22455  			}
 22456  			z := v_0.Args[0]
 22457  			if z.Op != OpARM64ADD {
 22458  				break
 22459  			}
 22460  			_ = z.Args[1]
 22461  			z_0 := z.Args[0]
 22462  			z_1 := z.Args[1]
 22463  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22464  				x := z_0
 22465  				y := z_1
 22466  				if !(z.Uses == 1) {
 22467  					continue
 22468  				}
 22469  				v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 22470  				v0.AddArg2(x, y)
 22471  				b.resetWithControl(BlockARM64GTnoov, v0)
 22472  				return true
 22473  			}
 22474  			break
 22475  		}
 22476  		// match: (GT (CMPconst [0] z:(MADD a x y)) yes no)
 22477  		// cond: z.Uses==1
 22478  		// result: (GTnoov (CMN a (MUL <x.Type> x y)) yes no)
 22479  		for b.Controls[0].Op == OpARM64CMPconst {
 22480  			v_0 := b.Controls[0]
 22481  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22482  				break
 22483  			}
 22484  			z := v_0.Args[0]
 22485  			if z.Op != OpARM64MADD {
 22486  				break
 22487  			}
 22488  			y := z.Args[2]
 22489  			a := z.Args[0]
 22490  			x := z.Args[1]
 22491  			if !(z.Uses == 1) {
 22492  				break
 22493  			}
 22494  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 22495  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 22496  			v1.AddArg2(x, y)
 22497  			v0.AddArg2(a, v1)
 22498  			b.resetWithControl(BlockARM64GTnoov, v0)
 22499  			return true
 22500  		}
 22501  		// match: (GT (CMPconst [0] z:(MSUB a x y)) yes no)
 22502  		// cond: z.Uses==1
 22503  		// result: (GTnoov (CMP a (MUL <x.Type> x y)) yes no)
 22504  		for b.Controls[0].Op == OpARM64CMPconst {
 22505  			v_0 := b.Controls[0]
 22506  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22507  				break
 22508  			}
 22509  			z := v_0.Args[0]
 22510  			if z.Op != OpARM64MSUB {
 22511  				break
 22512  			}
 22513  			y := z.Args[2]
 22514  			a := z.Args[0]
 22515  			x := z.Args[1]
 22516  			if !(z.Uses == 1) {
 22517  				break
 22518  			}
 22519  			v0 := b.NewValue0(v_0.Pos, OpARM64CMP, types.TypeFlags)
 22520  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 22521  			v1.AddArg2(x, y)
 22522  			v0.AddArg2(a, v1)
 22523  			b.resetWithControl(BlockARM64GTnoov, v0)
 22524  			return true
 22525  		}
 22526  		// match: (GT (CMPWconst [0] z:(MADDW a x y)) yes no)
 22527  		// cond: z.Uses==1
 22528  		// result: (GTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 22529  		for b.Controls[0].Op == OpARM64CMPWconst {
 22530  			v_0 := b.Controls[0]
 22531  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22532  				break
 22533  			}
 22534  			z := v_0.Args[0]
 22535  			if z.Op != OpARM64MADDW {
 22536  				break
 22537  			}
 22538  			y := z.Args[2]
 22539  			a := z.Args[0]
 22540  			x := z.Args[1]
 22541  			if !(z.Uses == 1) {
 22542  				break
 22543  			}
 22544  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 22545  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 22546  			v1.AddArg2(x, y)
 22547  			v0.AddArg2(a, v1)
 22548  			b.resetWithControl(BlockARM64GTnoov, v0)
 22549  			return true
 22550  		}
 22551  		// match: (GT (CMPWconst [0] z:(MSUBW a x y)) yes no)
 22552  		// cond: z.Uses==1
 22553  		// result: (GTnoov (CMPW a (MULW <x.Type> x y)) yes no)
 22554  		for b.Controls[0].Op == OpARM64CMPWconst {
 22555  			v_0 := b.Controls[0]
 22556  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22557  				break
 22558  			}
 22559  			z := v_0.Args[0]
 22560  			if z.Op != OpARM64MSUBW {
 22561  				break
 22562  			}
 22563  			y := z.Args[2]
 22564  			a := z.Args[0]
 22565  			x := z.Args[1]
 22566  			if !(z.Uses == 1) {
 22567  				break
 22568  			}
 22569  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPW, types.TypeFlags)
 22570  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 22571  			v1.AddArg2(x, y)
 22572  			v0.AddArg2(a, v1)
 22573  			b.resetWithControl(BlockARM64GTnoov, v0)
 22574  			return true
 22575  		}
 22576  		// match: (GT (FlagConstant [fc]) yes no)
 22577  		// cond: fc.gt()
 22578  		// result: (First yes no)
 22579  		for b.Controls[0].Op == OpARM64FlagConstant {
 22580  			v_0 := b.Controls[0]
 22581  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22582  			if !(fc.gt()) {
 22583  				break
 22584  			}
 22585  			b.Reset(BlockFirst)
 22586  			return true
 22587  		}
 22588  		// match: (GT (FlagConstant [fc]) yes no)
 22589  		// cond: !fc.gt()
 22590  		// result: (First no yes)
 22591  		for b.Controls[0].Op == OpARM64FlagConstant {
 22592  			v_0 := b.Controls[0]
 22593  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22594  			if !(!fc.gt()) {
 22595  				break
 22596  			}
 22597  			b.Reset(BlockFirst)
 22598  			b.swapSuccessors()
 22599  			return true
 22600  		}
 22601  		// match: (GT (InvertFlags cmp) yes no)
 22602  		// result: (LT cmp yes no)
 22603  		for b.Controls[0].Op == OpARM64InvertFlags {
 22604  			v_0 := b.Controls[0]
 22605  			cmp := v_0.Args[0]
 22606  			b.resetWithControl(BlockARM64LT, cmp)
 22607  			return true
 22608  		}
 22609  	case BlockARM64GTnoov:
 22610  		// match: (GTnoov (FlagConstant [fc]) yes no)
 22611  		// cond: fc.gtNoov()
 22612  		// result: (First yes no)
 22613  		for b.Controls[0].Op == OpARM64FlagConstant {
 22614  			v_0 := b.Controls[0]
 22615  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22616  			if !(fc.gtNoov()) {
 22617  				break
 22618  			}
 22619  			b.Reset(BlockFirst)
 22620  			return true
 22621  		}
 22622  		// match: (GTnoov (FlagConstant [fc]) yes no)
 22623  		// cond: !fc.gtNoov()
 22624  		// result: (First no yes)
 22625  		for b.Controls[0].Op == OpARM64FlagConstant {
 22626  			v_0 := b.Controls[0]
 22627  			fc := auxIntToFlagConstant(v_0.AuxInt)
 22628  			if !(!fc.gtNoov()) {
 22629  				break
 22630  			}
 22631  			b.Reset(BlockFirst)
 22632  			b.swapSuccessors()
 22633  			return true
 22634  		}
 22635  		// match: (GTnoov (InvertFlags cmp) yes no)
 22636  		// result: (LTnoov cmp yes no)
 22637  		for b.Controls[0].Op == OpARM64InvertFlags {
 22638  			v_0 := b.Controls[0]
 22639  			cmp := v_0.Args[0]
 22640  			b.resetWithControl(BlockARM64LTnoov, cmp)
 22641  			return true
 22642  		}
 22643  	case BlockIf:
 22644  		// match: (If (Equal cc) yes no)
 22645  		// result: (EQ cc yes no)
 22646  		for b.Controls[0].Op == OpARM64Equal {
 22647  			v_0 := b.Controls[0]
 22648  			cc := v_0.Args[0]
 22649  			b.resetWithControl(BlockARM64EQ, cc)
 22650  			return true
 22651  		}
 22652  		// match: (If (NotEqual cc) yes no)
 22653  		// result: (NE cc yes no)
 22654  		for b.Controls[0].Op == OpARM64NotEqual {
 22655  			v_0 := b.Controls[0]
 22656  			cc := v_0.Args[0]
 22657  			b.resetWithControl(BlockARM64NE, cc)
 22658  			return true
 22659  		}
 22660  		// match: (If (LessThan cc) yes no)
 22661  		// result: (LT cc yes no)
 22662  		for b.Controls[0].Op == OpARM64LessThan {
 22663  			v_0 := b.Controls[0]
 22664  			cc := v_0.Args[0]
 22665  			b.resetWithControl(BlockARM64LT, cc)
 22666  			return true
 22667  		}
 22668  		// match: (If (LessThanU cc) yes no)
 22669  		// result: (ULT cc yes no)
 22670  		for b.Controls[0].Op == OpARM64LessThanU {
 22671  			v_0 := b.Controls[0]
 22672  			cc := v_0.Args[0]
 22673  			b.resetWithControl(BlockARM64ULT, cc)
 22674  			return true
 22675  		}
 22676  		// match: (If (LessEqual cc) yes no)
 22677  		// result: (LE cc yes no)
 22678  		for b.Controls[0].Op == OpARM64LessEqual {
 22679  			v_0 := b.Controls[0]
 22680  			cc := v_0.Args[0]
 22681  			b.resetWithControl(BlockARM64LE, cc)
 22682  			return true
 22683  		}
 22684  		// match: (If (LessEqualU cc) yes no)
 22685  		// result: (ULE cc yes no)
 22686  		for b.Controls[0].Op == OpARM64LessEqualU {
 22687  			v_0 := b.Controls[0]
 22688  			cc := v_0.Args[0]
 22689  			b.resetWithControl(BlockARM64ULE, cc)
 22690  			return true
 22691  		}
 22692  		// match: (If (GreaterThan cc) yes no)
 22693  		// result: (GT cc yes no)
 22694  		for b.Controls[0].Op == OpARM64GreaterThan {
 22695  			v_0 := b.Controls[0]
 22696  			cc := v_0.Args[0]
 22697  			b.resetWithControl(BlockARM64GT, cc)
 22698  			return true
 22699  		}
 22700  		// match: (If (GreaterThanU cc) yes no)
 22701  		// result: (UGT cc yes no)
 22702  		for b.Controls[0].Op == OpARM64GreaterThanU {
 22703  			v_0 := b.Controls[0]
 22704  			cc := v_0.Args[0]
 22705  			b.resetWithControl(BlockARM64UGT, cc)
 22706  			return true
 22707  		}
 22708  		// match: (If (GreaterEqual cc) yes no)
 22709  		// result: (GE cc yes no)
 22710  		for b.Controls[0].Op == OpARM64GreaterEqual {
 22711  			v_0 := b.Controls[0]
 22712  			cc := v_0.Args[0]
 22713  			b.resetWithControl(BlockARM64GE, cc)
 22714  			return true
 22715  		}
 22716  		// match: (If (GreaterEqualU cc) yes no)
 22717  		// result: (UGE cc yes no)
 22718  		for b.Controls[0].Op == OpARM64GreaterEqualU {
 22719  			v_0 := b.Controls[0]
 22720  			cc := v_0.Args[0]
 22721  			b.resetWithControl(BlockARM64UGE, cc)
 22722  			return true
 22723  		}
 22724  		// match: (If (LessThanF cc) yes no)
 22725  		// result: (FLT cc yes no)
 22726  		for b.Controls[0].Op == OpARM64LessThanF {
 22727  			v_0 := b.Controls[0]
 22728  			cc := v_0.Args[0]
 22729  			b.resetWithControl(BlockARM64FLT, cc)
 22730  			return true
 22731  		}
 22732  		// match: (If (LessEqualF cc) yes no)
 22733  		// result: (FLE cc yes no)
 22734  		for b.Controls[0].Op == OpARM64LessEqualF {
 22735  			v_0 := b.Controls[0]
 22736  			cc := v_0.Args[0]
 22737  			b.resetWithControl(BlockARM64FLE, cc)
 22738  			return true
 22739  		}
 22740  		// match: (If (GreaterThanF cc) yes no)
 22741  		// result: (FGT cc yes no)
 22742  		for b.Controls[0].Op == OpARM64GreaterThanF {
 22743  			v_0 := b.Controls[0]
 22744  			cc := v_0.Args[0]
 22745  			b.resetWithControl(BlockARM64FGT, cc)
 22746  			return true
 22747  		}
 22748  		// match: (If (GreaterEqualF cc) yes no)
 22749  		// result: (FGE cc yes no)
 22750  		for b.Controls[0].Op == OpARM64GreaterEqualF {
 22751  			v_0 := b.Controls[0]
 22752  			cc := v_0.Args[0]
 22753  			b.resetWithControl(BlockARM64FGE, cc)
 22754  			return true
 22755  		}
 22756  		// match: (If cond yes no)
 22757  		// result: (TBNZ [0] cond yes no)
 22758  		for {
 22759  			cond := b.Controls[0]
 22760  			b.resetWithControl(BlockARM64TBNZ, cond)
 22761  			b.AuxInt = int64ToAuxInt(0)
 22762  			return true
 22763  		}
 22764  	case BlockJumpTable:
 22765  		// match: (JumpTable idx)
 22766  		// result: (JUMPTABLE {makeJumpTableSym(b)} idx (MOVDaddr <typ.Uintptr> {makeJumpTableSym(b)} (SB)))
 22767  		for {
 22768  			idx := b.Controls[0]
 22769  			v0 := b.NewValue0(b.Pos, OpARM64MOVDaddr, typ.Uintptr)
 22770  			v0.Aux = symToAux(makeJumpTableSym(b))
 22771  			v1 := b.NewValue0(b.Pos, OpSB, typ.Uintptr)
 22772  			v0.AddArg(v1)
 22773  			b.resetWithControl2(BlockARM64JUMPTABLE, idx, v0)
 22774  			b.Aux = symToAux(makeJumpTableSym(b))
 22775  			return true
 22776  		}
 22777  	case BlockARM64LE:
 22778  		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 22779  		// cond: z.Uses == 1
 22780  		// result: (LE (TST x y) yes no)
 22781  		for b.Controls[0].Op == OpARM64CMPconst {
 22782  			v_0 := b.Controls[0]
 22783  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22784  				break
 22785  			}
 22786  			z := v_0.Args[0]
 22787  			if z.Op != OpARM64AND {
 22788  				break
 22789  			}
 22790  			_ = z.Args[1]
 22791  			z_0 := z.Args[0]
 22792  			z_1 := z.Args[1]
 22793  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22794  				x := z_0
 22795  				y := z_1
 22796  				if !(z.Uses == 1) {
 22797  					continue
 22798  				}
 22799  				v0 := b.NewValue0(v_0.Pos, OpARM64TST, types.TypeFlags)
 22800  				v0.AddArg2(x, y)
 22801  				b.resetWithControl(BlockARM64LE, v0)
 22802  				return true
 22803  			}
 22804  			break
 22805  		}
 22806  		// match: (LE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 22807  		// cond: x.Uses == 1
 22808  		// result: (LE (TSTconst [c] y) yes no)
 22809  		for b.Controls[0].Op == OpARM64CMPconst {
 22810  			v_0 := b.Controls[0]
 22811  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22812  				break
 22813  			}
 22814  			x := v_0.Args[0]
 22815  			if x.Op != OpARM64ANDconst {
 22816  				break
 22817  			}
 22818  			c := auxIntToInt64(x.AuxInt)
 22819  			y := x.Args[0]
 22820  			if !(x.Uses == 1) {
 22821  				break
 22822  			}
 22823  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTconst, types.TypeFlags)
 22824  			v0.AuxInt = int64ToAuxInt(c)
 22825  			v0.AddArg(y)
 22826  			b.resetWithControl(BlockARM64LE, v0)
 22827  			return true
 22828  		}
 22829  		// match: (LE (CMPWconst [0] z:(AND x y)) yes no)
 22830  		// cond: z.Uses == 1
 22831  		// result: (LE (TSTW x y) yes no)
 22832  		for b.Controls[0].Op == OpARM64CMPWconst {
 22833  			v_0 := b.Controls[0]
 22834  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22835  				break
 22836  			}
 22837  			z := v_0.Args[0]
 22838  			if z.Op != OpARM64AND {
 22839  				break
 22840  			}
 22841  			_ = z.Args[1]
 22842  			z_0 := z.Args[0]
 22843  			z_1 := z.Args[1]
 22844  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22845  				x := z_0
 22846  				y := z_1
 22847  				if !(z.Uses == 1) {
 22848  					continue
 22849  				}
 22850  				v0 := b.NewValue0(v_0.Pos, OpARM64TSTW, types.TypeFlags)
 22851  				v0.AddArg2(x, y)
 22852  				b.resetWithControl(BlockARM64LE, v0)
 22853  				return true
 22854  			}
 22855  			break
 22856  		}
 22857  		// match: (LE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 22858  		// cond: x.Uses == 1
 22859  		// result: (LE (TSTWconst [int32(c)] y) yes no)
 22860  		for b.Controls[0].Op == OpARM64CMPWconst {
 22861  			v_0 := b.Controls[0]
 22862  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22863  				break
 22864  			}
 22865  			x := v_0.Args[0]
 22866  			if x.Op != OpARM64ANDconst {
 22867  				break
 22868  			}
 22869  			c := auxIntToInt64(x.AuxInt)
 22870  			y := x.Args[0]
 22871  			if !(x.Uses == 1) {
 22872  				break
 22873  			}
 22874  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTWconst, types.TypeFlags)
 22875  			v0.AuxInt = int32ToAuxInt(int32(c))
 22876  			v0.AddArg(y)
 22877  			b.resetWithControl(BlockARM64LE, v0)
 22878  			return true
 22879  		}
 22880  		// match: (LE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 22881  		// cond: x.Uses == 1
 22882  		// result: (LEnoov (CMNconst [c] y) yes no)
 22883  		for b.Controls[0].Op == OpARM64CMPconst {
 22884  			v_0 := b.Controls[0]
 22885  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22886  				break
 22887  			}
 22888  			x := v_0.Args[0]
 22889  			if x.Op != OpARM64ADDconst {
 22890  				break
 22891  			}
 22892  			c := auxIntToInt64(x.AuxInt)
 22893  			y := x.Args[0]
 22894  			if !(x.Uses == 1) {
 22895  				break
 22896  			}
 22897  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNconst, types.TypeFlags)
 22898  			v0.AuxInt = int64ToAuxInt(c)
 22899  			v0.AddArg(y)
 22900  			b.resetWithControl(BlockARM64LEnoov, v0)
 22901  			return true
 22902  		}
 22903  		// match: (LE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 22904  		// cond: x.Uses == 1
 22905  		// result: (LEnoov (CMNWconst [int32(c)] y) yes no)
 22906  		for b.Controls[0].Op == OpARM64CMPWconst {
 22907  			v_0 := b.Controls[0]
 22908  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22909  				break
 22910  			}
 22911  			x := v_0.Args[0]
 22912  			if x.Op != OpARM64ADDconst {
 22913  				break
 22914  			}
 22915  			c := auxIntToInt64(x.AuxInt)
 22916  			y := x.Args[0]
 22917  			if !(x.Uses == 1) {
 22918  				break
 22919  			}
 22920  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNWconst, types.TypeFlags)
 22921  			v0.AuxInt = int32ToAuxInt(int32(c))
 22922  			v0.AddArg(y)
 22923  			b.resetWithControl(BlockARM64LEnoov, v0)
 22924  			return true
 22925  		}
 22926  		// match: (LE (CMPconst [0] z:(ADD x y)) yes no)
 22927  		// cond: z.Uses == 1
 22928  		// result: (LEnoov (CMN x y) yes no)
 22929  		for b.Controls[0].Op == OpARM64CMPconst {
 22930  			v_0 := b.Controls[0]
 22931  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22932  				break
 22933  			}
 22934  			z := v_0.Args[0]
 22935  			if z.Op != OpARM64ADD {
 22936  				break
 22937  			}
 22938  			_ = z.Args[1]
 22939  			z_0 := z.Args[0]
 22940  			z_1 := z.Args[1]
 22941  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22942  				x := z_0
 22943  				y := z_1
 22944  				if !(z.Uses == 1) {
 22945  					continue
 22946  				}
 22947  				v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 22948  				v0.AddArg2(x, y)
 22949  				b.resetWithControl(BlockARM64LEnoov, v0)
 22950  				return true
 22951  			}
 22952  			break
 22953  		}
 22954  		// match: (LE (CMPWconst [0] z:(ADD x y)) yes no)
 22955  		// cond: z.Uses == 1
 22956  		// result: (LEnoov (CMNW x y) yes no)
 22957  		for b.Controls[0].Op == OpARM64CMPWconst {
 22958  			v_0 := b.Controls[0]
 22959  			if auxIntToInt32(v_0.AuxInt) != 0 {
 22960  				break
 22961  			}
 22962  			z := v_0.Args[0]
 22963  			if z.Op != OpARM64ADD {
 22964  				break
 22965  			}
 22966  			_ = z.Args[1]
 22967  			z_0 := z.Args[0]
 22968  			z_1 := z.Args[1]
 22969  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 22970  				x := z_0
 22971  				y := z_1
 22972  				if !(z.Uses == 1) {
 22973  					continue
 22974  				}
 22975  				v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 22976  				v0.AddArg2(x, y)
 22977  				b.resetWithControl(BlockARM64LEnoov, v0)
 22978  				return true
 22979  			}
 22980  			break
 22981  		}
 22982  		// match: (LE (CMPconst [0] z:(MADD a x y)) yes no)
 22983  		// cond: z.Uses==1
 22984  		// result: (LEnoov (CMN a (MUL <x.Type> x y)) yes no)
 22985  		for b.Controls[0].Op == OpARM64CMPconst {
 22986  			v_0 := b.Controls[0]
 22987  			if auxIntToInt64(v_0.AuxInt) != 0 {
 22988  				break
 22989  			}
 22990  			z := v_0.Args[0]
 22991  			if z.Op != OpARM64MADD {
 22992  				break
 22993  			}
 22994  			y := z.Args[2]
 22995  			a := z.Args[0]
 22996  			x := z.Args[1]
 22997  			if !(z.Uses == 1) {
 22998  				break
 22999  			}
 23000  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 23001  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 23002  			v1.AddArg2(x, y)
 23003  			v0.AddArg2(a, v1)
 23004  			b.resetWithControl(BlockARM64LEnoov, v0)
 23005  			return true
 23006  		}
 23007  		// match: (LE (CMPconst [0] z:(MSUB a x y)) yes no)
 23008  		// cond: z.Uses==1
 23009  		// result: (LEnoov (CMP a (MUL <x.Type> x y)) yes no)
 23010  		for b.Controls[0].Op == OpARM64CMPconst {
 23011  			v_0 := b.Controls[0]
 23012  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23013  				break
 23014  			}
 23015  			z := v_0.Args[0]
 23016  			if z.Op != OpARM64MSUB {
 23017  				break
 23018  			}
 23019  			y := z.Args[2]
 23020  			a := z.Args[0]
 23021  			x := z.Args[1]
 23022  			if !(z.Uses == 1) {
 23023  				break
 23024  			}
 23025  			v0 := b.NewValue0(v_0.Pos, OpARM64CMP, types.TypeFlags)
 23026  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 23027  			v1.AddArg2(x, y)
 23028  			v0.AddArg2(a, v1)
 23029  			b.resetWithControl(BlockARM64LEnoov, v0)
 23030  			return true
 23031  		}
 23032  		// match: (LE (CMPWconst [0] z:(MADDW a x y)) yes no)
 23033  		// cond: z.Uses==1
 23034  		// result: (LEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 23035  		for b.Controls[0].Op == OpARM64CMPWconst {
 23036  			v_0 := b.Controls[0]
 23037  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23038  				break
 23039  			}
 23040  			z := v_0.Args[0]
 23041  			if z.Op != OpARM64MADDW {
 23042  				break
 23043  			}
 23044  			y := z.Args[2]
 23045  			a := z.Args[0]
 23046  			x := z.Args[1]
 23047  			if !(z.Uses == 1) {
 23048  				break
 23049  			}
 23050  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 23051  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 23052  			v1.AddArg2(x, y)
 23053  			v0.AddArg2(a, v1)
 23054  			b.resetWithControl(BlockARM64LEnoov, v0)
 23055  			return true
 23056  		}
 23057  		// match: (LE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 23058  		// cond: z.Uses==1
 23059  		// result: (LEnoov (CMPW a (MULW <x.Type> x y)) yes no)
 23060  		for b.Controls[0].Op == OpARM64CMPWconst {
 23061  			v_0 := b.Controls[0]
 23062  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23063  				break
 23064  			}
 23065  			z := v_0.Args[0]
 23066  			if z.Op != OpARM64MSUBW {
 23067  				break
 23068  			}
 23069  			y := z.Args[2]
 23070  			a := z.Args[0]
 23071  			x := z.Args[1]
 23072  			if !(z.Uses == 1) {
 23073  				break
 23074  			}
 23075  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPW, types.TypeFlags)
 23076  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 23077  			v1.AddArg2(x, y)
 23078  			v0.AddArg2(a, v1)
 23079  			b.resetWithControl(BlockARM64LEnoov, v0)
 23080  			return true
 23081  		}
 23082  		// match: (LE (FlagConstant [fc]) yes no)
 23083  		// cond: fc.le()
 23084  		// result: (First yes no)
 23085  		for b.Controls[0].Op == OpARM64FlagConstant {
 23086  			v_0 := b.Controls[0]
 23087  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23088  			if !(fc.le()) {
 23089  				break
 23090  			}
 23091  			b.Reset(BlockFirst)
 23092  			return true
 23093  		}
 23094  		// match: (LE (FlagConstant [fc]) yes no)
 23095  		// cond: !fc.le()
 23096  		// result: (First no yes)
 23097  		for b.Controls[0].Op == OpARM64FlagConstant {
 23098  			v_0 := b.Controls[0]
 23099  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23100  			if !(!fc.le()) {
 23101  				break
 23102  			}
 23103  			b.Reset(BlockFirst)
 23104  			b.swapSuccessors()
 23105  			return true
 23106  		}
 23107  		// match: (LE (InvertFlags cmp) yes no)
 23108  		// result: (GE cmp yes no)
 23109  		for b.Controls[0].Op == OpARM64InvertFlags {
 23110  			v_0 := b.Controls[0]
 23111  			cmp := v_0.Args[0]
 23112  			b.resetWithControl(BlockARM64GE, cmp)
 23113  			return true
 23114  		}
 23115  	case BlockARM64LEnoov:
 23116  		// match: (LEnoov (FlagConstant [fc]) yes no)
 23117  		// cond: fc.leNoov()
 23118  		// result: (First yes no)
 23119  		for b.Controls[0].Op == OpARM64FlagConstant {
 23120  			v_0 := b.Controls[0]
 23121  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23122  			if !(fc.leNoov()) {
 23123  				break
 23124  			}
 23125  			b.Reset(BlockFirst)
 23126  			return true
 23127  		}
 23128  		// match: (LEnoov (FlagConstant [fc]) yes no)
 23129  		// cond: !fc.leNoov()
 23130  		// result: (First no yes)
 23131  		for b.Controls[0].Op == OpARM64FlagConstant {
 23132  			v_0 := b.Controls[0]
 23133  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23134  			if !(!fc.leNoov()) {
 23135  				break
 23136  			}
 23137  			b.Reset(BlockFirst)
 23138  			b.swapSuccessors()
 23139  			return true
 23140  		}
 23141  		// match: (LEnoov (InvertFlags cmp) yes no)
 23142  		// result: (GEnoov cmp yes no)
 23143  		for b.Controls[0].Op == OpARM64InvertFlags {
 23144  			v_0 := b.Controls[0]
 23145  			cmp := v_0.Args[0]
 23146  			b.resetWithControl(BlockARM64GEnoov, cmp)
 23147  			return true
 23148  		}
 23149  	case BlockARM64LT:
 23150  		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 23151  		// cond: z.Uses == 1
 23152  		// result: (LT (TST x y) yes no)
 23153  		for b.Controls[0].Op == OpARM64CMPconst {
 23154  			v_0 := b.Controls[0]
 23155  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23156  				break
 23157  			}
 23158  			z := v_0.Args[0]
 23159  			if z.Op != OpARM64AND {
 23160  				break
 23161  			}
 23162  			_ = z.Args[1]
 23163  			z_0 := z.Args[0]
 23164  			z_1 := z.Args[1]
 23165  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23166  				x := z_0
 23167  				y := z_1
 23168  				if !(z.Uses == 1) {
 23169  					continue
 23170  				}
 23171  				v0 := b.NewValue0(v_0.Pos, OpARM64TST, types.TypeFlags)
 23172  				v0.AddArg2(x, y)
 23173  				b.resetWithControl(BlockARM64LT, v0)
 23174  				return true
 23175  			}
 23176  			break
 23177  		}
 23178  		// match: (LT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 23179  		// cond: x.Uses == 1
 23180  		// result: (LT (TSTconst [c] y) yes no)
 23181  		for b.Controls[0].Op == OpARM64CMPconst {
 23182  			v_0 := b.Controls[0]
 23183  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23184  				break
 23185  			}
 23186  			x := v_0.Args[0]
 23187  			if x.Op != OpARM64ANDconst {
 23188  				break
 23189  			}
 23190  			c := auxIntToInt64(x.AuxInt)
 23191  			y := x.Args[0]
 23192  			if !(x.Uses == 1) {
 23193  				break
 23194  			}
 23195  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTconst, types.TypeFlags)
 23196  			v0.AuxInt = int64ToAuxInt(c)
 23197  			v0.AddArg(y)
 23198  			b.resetWithControl(BlockARM64LT, v0)
 23199  			return true
 23200  		}
 23201  		// match: (LT (CMPWconst [0] z:(AND x y)) yes no)
 23202  		// cond: z.Uses == 1
 23203  		// result: (LT (TSTW x y) yes no)
 23204  		for b.Controls[0].Op == OpARM64CMPWconst {
 23205  			v_0 := b.Controls[0]
 23206  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23207  				break
 23208  			}
 23209  			z := v_0.Args[0]
 23210  			if z.Op != OpARM64AND {
 23211  				break
 23212  			}
 23213  			_ = z.Args[1]
 23214  			z_0 := z.Args[0]
 23215  			z_1 := z.Args[1]
 23216  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23217  				x := z_0
 23218  				y := z_1
 23219  				if !(z.Uses == 1) {
 23220  					continue
 23221  				}
 23222  				v0 := b.NewValue0(v_0.Pos, OpARM64TSTW, types.TypeFlags)
 23223  				v0.AddArg2(x, y)
 23224  				b.resetWithControl(BlockARM64LT, v0)
 23225  				return true
 23226  			}
 23227  			break
 23228  		}
 23229  		// match: (LT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 23230  		// cond: x.Uses == 1
 23231  		// result: (LT (TSTWconst [int32(c)] y) yes no)
 23232  		for b.Controls[0].Op == OpARM64CMPWconst {
 23233  			v_0 := b.Controls[0]
 23234  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23235  				break
 23236  			}
 23237  			x := v_0.Args[0]
 23238  			if x.Op != OpARM64ANDconst {
 23239  				break
 23240  			}
 23241  			c := auxIntToInt64(x.AuxInt)
 23242  			y := x.Args[0]
 23243  			if !(x.Uses == 1) {
 23244  				break
 23245  			}
 23246  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTWconst, types.TypeFlags)
 23247  			v0.AuxInt = int32ToAuxInt(int32(c))
 23248  			v0.AddArg(y)
 23249  			b.resetWithControl(BlockARM64LT, v0)
 23250  			return true
 23251  		}
 23252  		// match: (LT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 23253  		// cond: x.Uses == 1
 23254  		// result: (LTnoov (CMNconst [c] y) yes no)
 23255  		for b.Controls[0].Op == OpARM64CMPconst {
 23256  			v_0 := b.Controls[0]
 23257  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23258  				break
 23259  			}
 23260  			x := v_0.Args[0]
 23261  			if x.Op != OpARM64ADDconst {
 23262  				break
 23263  			}
 23264  			c := auxIntToInt64(x.AuxInt)
 23265  			y := x.Args[0]
 23266  			if !(x.Uses == 1) {
 23267  				break
 23268  			}
 23269  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNconst, types.TypeFlags)
 23270  			v0.AuxInt = int64ToAuxInt(c)
 23271  			v0.AddArg(y)
 23272  			b.resetWithControl(BlockARM64LTnoov, v0)
 23273  			return true
 23274  		}
 23275  		// match: (LT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 23276  		// cond: x.Uses == 1
 23277  		// result: (LTnoov (CMNWconst [int32(c)] y) yes no)
 23278  		for b.Controls[0].Op == OpARM64CMPWconst {
 23279  			v_0 := b.Controls[0]
 23280  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23281  				break
 23282  			}
 23283  			x := v_0.Args[0]
 23284  			if x.Op != OpARM64ADDconst {
 23285  				break
 23286  			}
 23287  			c := auxIntToInt64(x.AuxInt)
 23288  			y := x.Args[0]
 23289  			if !(x.Uses == 1) {
 23290  				break
 23291  			}
 23292  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNWconst, types.TypeFlags)
 23293  			v0.AuxInt = int32ToAuxInt(int32(c))
 23294  			v0.AddArg(y)
 23295  			b.resetWithControl(BlockARM64LTnoov, v0)
 23296  			return true
 23297  		}
 23298  		// match: (LT (CMPconst [0] z:(ADD x y)) yes no)
 23299  		// cond: z.Uses == 1
 23300  		// result: (LTnoov (CMN x y) yes no)
 23301  		for b.Controls[0].Op == OpARM64CMPconst {
 23302  			v_0 := b.Controls[0]
 23303  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23304  				break
 23305  			}
 23306  			z := v_0.Args[0]
 23307  			if z.Op != OpARM64ADD {
 23308  				break
 23309  			}
 23310  			_ = z.Args[1]
 23311  			z_0 := z.Args[0]
 23312  			z_1 := z.Args[1]
 23313  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23314  				x := z_0
 23315  				y := z_1
 23316  				if !(z.Uses == 1) {
 23317  					continue
 23318  				}
 23319  				v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 23320  				v0.AddArg2(x, y)
 23321  				b.resetWithControl(BlockARM64LTnoov, v0)
 23322  				return true
 23323  			}
 23324  			break
 23325  		}
 23326  		// match: (LT (CMPWconst [0] z:(ADD x y)) yes no)
 23327  		// cond: z.Uses == 1
 23328  		// result: (LTnoov (CMNW x y) yes no)
 23329  		for b.Controls[0].Op == OpARM64CMPWconst {
 23330  			v_0 := b.Controls[0]
 23331  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23332  				break
 23333  			}
 23334  			z := v_0.Args[0]
 23335  			if z.Op != OpARM64ADD {
 23336  				break
 23337  			}
 23338  			_ = z.Args[1]
 23339  			z_0 := z.Args[0]
 23340  			z_1 := z.Args[1]
 23341  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23342  				x := z_0
 23343  				y := z_1
 23344  				if !(z.Uses == 1) {
 23345  					continue
 23346  				}
 23347  				v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 23348  				v0.AddArg2(x, y)
 23349  				b.resetWithControl(BlockARM64LTnoov, v0)
 23350  				return true
 23351  			}
 23352  			break
 23353  		}
 23354  		// match: (LT (CMPconst [0] z:(MADD a x y)) yes no)
 23355  		// cond: z.Uses==1
 23356  		// result: (LTnoov (CMN a (MUL <x.Type> x y)) yes no)
 23357  		for b.Controls[0].Op == OpARM64CMPconst {
 23358  			v_0 := b.Controls[0]
 23359  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23360  				break
 23361  			}
 23362  			z := v_0.Args[0]
 23363  			if z.Op != OpARM64MADD {
 23364  				break
 23365  			}
 23366  			y := z.Args[2]
 23367  			a := z.Args[0]
 23368  			x := z.Args[1]
 23369  			if !(z.Uses == 1) {
 23370  				break
 23371  			}
 23372  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 23373  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 23374  			v1.AddArg2(x, y)
 23375  			v0.AddArg2(a, v1)
 23376  			b.resetWithControl(BlockARM64LTnoov, v0)
 23377  			return true
 23378  		}
 23379  		// match: (LT (CMPconst [0] z:(MSUB a x y)) yes no)
 23380  		// cond: z.Uses==1
 23381  		// result: (LTnoov (CMP a (MUL <x.Type> x y)) yes no)
 23382  		for b.Controls[0].Op == OpARM64CMPconst {
 23383  			v_0 := b.Controls[0]
 23384  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23385  				break
 23386  			}
 23387  			z := v_0.Args[0]
 23388  			if z.Op != OpARM64MSUB {
 23389  				break
 23390  			}
 23391  			y := z.Args[2]
 23392  			a := z.Args[0]
 23393  			x := z.Args[1]
 23394  			if !(z.Uses == 1) {
 23395  				break
 23396  			}
 23397  			v0 := b.NewValue0(v_0.Pos, OpARM64CMP, types.TypeFlags)
 23398  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 23399  			v1.AddArg2(x, y)
 23400  			v0.AddArg2(a, v1)
 23401  			b.resetWithControl(BlockARM64LTnoov, v0)
 23402  			return true
 23403  		}
 23404  		// match: (LT (CMPWconst [0] z:(MADDW a x y)) yes no)
 23405  		// cond: z.Uses==1
 23406  		// result: (LTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 23407  		for b.Controls[0].Op == OpARM64CMPWconst {
 23408  			v_0 := b.Controls[0]
 23409  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23410  				break
 23411  			}
 23412  			z := v_0.Args[0]
 23413  			if z.Op != OpARM64MADDW {
 23414  				break
 23415  			}
 23416  			y := z.Args[2]
 23417  			a := z.Args[0]
 23418  			x := z.Args[1]
 23419  			if !(z.Uses == 1) {
 23420  				break
 23421  			}
 23422  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 23423  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 23424  			v1.AddArg2(x, y)
 23425  			v0.AddArg2(a, v1)
 23426  			b.resetWithControl(BlockARM64LTnoov, v0)
 23427  			return true
 23428  		}
 23429  		// match: (LT (CMPWconst [0] z:(MSUBW a x y)) yes no)
 23430  		// cond: z.Uses==1
 23431  		// result: (LTnoov (CMPW a (MULW <x.Type> x y)) yes no)
 23432  		for b.Controls[0].Op == OpARM64CMPWconst {
 23433  			v_0 := b.Controls[0]
 23434  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23435  				break
 23436  			}
 23437  			z := v_0.Args[0]
 23438  			if z.Op != OpARM64MSUBW {
 23439  				break
 23440  			}
 23441  			y := z.Args[2]
 23442  			a := z.Args[0]
 23443  			x := z.Args[1]
 23444  			if !(z.Uses == 1) {
 23445  				break
 23446  			}
 23447  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPW, types.TypeFlags)
 23448  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 23449  			v1.AddArg2(x, y)
 23450  			v0.AddArg2(a, v1)
 23451  			b.resetWithControl(BlockARM64LTnoov, v0)
 23452  			return true
 23453  		}
 23454  		// match: (LT (CMPWconst [0] x) yes no)
 23455  		// result: (TBNZ [31] x yes no)
 23456  		for b.Controls[0].Op == OpARM64CMPWconst {
 23457  			v_0 := b.Controls[0]
 23458  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23459  				break
 23460  			}
 23461  			x := v_0.Args[0]
 23462  			b.resetWithControl(BlockARM64TBNZ, x)
 23463  			b.AuxInt = int64ToAuxInt(31)
 23464  			return true
 23465  		}
 23466  		// match: (LT (CMPconst [0] x) yes no)
 23467  		// result: (TBNZ [63] x yes no)
 23468  		for b.Controls[0].Op == OpARM64CMPconst {
 23469  			v_0 := b.Controls[0]
 23470  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23471  				break
 23472  			}
 23473  			x := v_0.Args[0]
 23474  			b.resetWithControl(BlockARM64TBNZ, x)
 23475  			b.AuxInt = int64ToAuxInt(63)
 23476  			return true
 23477  		}
 23478  		// match: (LT (FlagConstant [fc]) yes no)
 23479  		// cond: fc.lt()
 23480  		// result: (First yes no)
 23481  		for b.Controls[0].Op == OpARM64FlagConstant {
 23482  			v_0 := b.Controls[0]
 23483  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23484  			if !(fc.lt()) {
 23485  				break
 23486  			}
 23487  			b.Reset(BlockFirst)
 23488  			return true
 23489  		}
 23490  		// match: (LT (FlagConstant [fc]) yes no)
 23491  		// cond: !fc.lt()
 23492  		// result: (First no yes)
 23493  		for b.Controls[0].Op == OpARM64FlagConstant {
 23494  			v_0 := b.Controls[0]
 23495  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23496  			if !(!fc.lt()) {
 23497  				break
 23498  			}
 23499  			b.Reset(BlockFirst)
 23500  			b.swapSuccessors()
 23501  			return true
 23502  		}
 23503  		// match: (LT (InvertFlags cmp) yes no)
 23504  		// result: (GT cmp yes no)
 23505  		for b.Controls[0].Op == OpARM64InvertFlags {
 23506  			v_0 := b.Controls[0]
 23507  			cmp := v_0.Args[0]
 23508  			b.resetWithControl(BlockARM64GT, cmp)
 23509  			return true
 23510  		}
 23511  	case BlockARM64LTnoov:
 23512  		// match: (LTnoov (FlagConstant [fc]) yes no)
 23513  		// cond: fc.ltNoov()
 23514  		// result: (First yes no)
 23515  		for b.Controls[0].Op == OpARM64FlagConstant {
 23516  			v_0 := b.Controls[0]
 23517  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23518  			if !(fc.ltNoov()) {
 23519  				break
 23520  			}
 23521  			b.Reset(BlockFirst)
 23522  			return true
 23523  		}
 23524  		// match: (LTnoov (FlagConstant [fc]) yes no)
 23525  		// cond: !fc.ltNoov()
 23526  		// result: (First no yes)
 23527  		for b.Controls[0].Op == OpARM64FlagConstant {
 23528  			v_0 := b.Controls[0]
 23529  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23530  			if !(!fc.ltNoov()) {
 23531  				break
 23532  			}
 23533  			b.Reset(BlockFirst)
 23534  			b.swapSuccessors()
 23535  			return true
 23536  		}
 23537  		// match: (LTnoov (InvertFlags cmp) yes no)
 23538  		// result: (GTnoov cmp yes no)
 23539  		for b.Controls[0].Op == OpARM64InvertFlags {
 23540  			v_0 := b.Controls[0]
 23541  			cmp := v_0.Args[0]
 23542  			b.resetWithControl(BlockARM64GTnoov, cmp)
 23543  			return true
 23544  		}
 23545  	case BlockARM64NE:
 23546  		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 23547  		// cond: z.Uses == 1
 23548  		// result: (NE (TST x y) yes no)
 23549  		for b.Controls[0].Op == OpARM64CMPconst {
 23550  			v_0 := b.Controls[0]
 23551  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23552  				break
 23553  			}
 23554  			z := v_0.Args[0]
 23555  			if z.Op != OpARM64AND {
 23556  				break
 23557  			}
 23558  			_ = z.Args[1]
 23559  			z_0 := z.Args[0]
 23560  			z_1 := z.Args[1]
 23561  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23562  				x := z_0
 23563  				y := z_1
 23564  				if !(z.Uses == 1) {
 23565  					continue
 23566  				}
 23567  				v0 := b.NewValue0(v_0.Pos, OpARM64TST, types.TypeFlags)
 23568  				v0.AddArg2(x, y)
 23569  				b.resetWithControl(BlockARM64NE, v0)
 23570  				return true
 23571  			}
 23572  			break
 23573  		}
 23574  		// match: (NE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 23575  		// cond: x.Uses == 1
 23576  		// result: (NE (TSTconst [c] y) yes no)
 23577  		for b.Controls[0].Op == OpARM64CMPconst {
 23578  			v_0 := b.Controls[0]
 23579  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23580  				break
 23581  			}
 23582  			x := v_0.Args[0]
 23583  			if x.Op != OpARM64ANDconst {
 23584  				break
 23585  			}
 23586  			c := auxIntToInt64(x.AuxInt)
 23587  			y := x.Args[0]
 23588  			if !(x.Uses == 1) {
 23589  				break
 23590  			}
 23591  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTconst, types.TypeFlags)
 23592  			v0.AuxInt = int64ToAuxInt(c)
 23593  			v0.AddArg(y)
 23594  			b.resetWithControl(BlockARM64NE, v0)
 23595  			return true
 23596  		}
 23597  		// match: (NE (CMPWconst [0] z:(AND x y)) yes no)
 23598  		// cond: z.Uses == 1
 23599  		// result: (NE (TSTW x y) yes no)
 23600  		for b.Controls[0].Op == OpARM64CMPWconst {
 23601  			v_0 := b.Controls[0]
 23602  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23603  				break
 23604  			}
 23605  			z := v_0.Args[0]
 23606  			if z.Op != OpARM64AND {
 23607  				break
 23608  			}
 23609  			_ = z.Args[1]
 23610  			z_0 := z.Args[0]
 23611  			z_1 := z.Args[1]
 23612  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23613  				x := z_0
 23614  				y := z_1
 23615  				if !(z.Uses == 1) {
 23616  					continue
 23617  				}
 23618  				v0 := b.NewValue0(v_0.Pos, OpARM64TSTW, types.TypeFlags)
 23619  				v0.AddArg2(x, y)
 23620  				b.resetWithControl(BlockARM64NE, v0)
 23621  				return true
 23622  			}
 23623  			break
 23624  		}
 23625  		// match: (NE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 23626  		// cond: x.Uses == 1
 23627  		// result: (NE (TSTWconst [int32(c)] y) yes no)
 23628  		for b.Controls[0].Op == OpARM64CMPWconst {
 23629  			v_0 := b.Controls[0]
 23630  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23631  				break
 23632  			}
 23633  			x := v_0.Args[0]
 23634  			if x.Op != OpARM64ANDconst {
 23635  				break
 23636  			}
 23637  			c := auxIntToInt64(x.AuxInt)
 23638  			y := x.Args[0]
 23639  			if !(x.Uses == 1) {
 23640  				break
 23641  			}
 23642  			v0 := b.NewValue0(v_0.Pos, OpARM64TSTWconst, types.TypeFlags)
 23643  			v0.AuxInt = int32ToAuxInt(int32(c))
 23644  			v0.AddArg(y)
 23645  			b.resetWithControl(BlockARM64NE, v0)
 23646  			return true
 23647  		}
 23648  		// match: (NE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 23649  		// cond: x.Uses == 1
 23650  		// result: (NE (CMNconst [c] y) yes no)
 23651  		for b.Controls[0].Op == OpARM64CMPconst {
 23652  			v_0 := b.Controls[0]
 23653  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23654  				break
 23655  			}
 23656  			x := v_0.Args[0]
 23657  			if x.Op != OpARM64ADDconst {
 23658  				break
 23659  			}
 23660  			c := auxIntToInt64(x.AuxInt)
 23661  			y := x.Args[0]
 23662  			if !(x.Uses == 1) {
 23663  				break
 23664  			}
 23665  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNconst, types.TypeFlags)
 23666  			v0.AuxInt = int64ToAuxInt(c)
 23667  			v0.AddArg(y)
 23668  			b.resetWithControl(BlockARM64NE, v0)
 23669  			return true
 23670  		}
 23671  		// match: (NE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 23672  		// cond: x.Uses == 1
 23673  		// result: (NE (CMNWconst [int32(c)] y) yes no)
 23674  		for b.Controls[0].Op == OpARM64CMPWconst {
 23675  			v_0 := b.Controls[0]
 23676  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23677  				break
 23678  			}
 23679  			x := v_0.Args[0]
 23680  			if x.Op != OpARM64ADDconst {
 23681  				break
 23682  			}
 23683  			c := auxIntToInt64(x.AuxInt)
 23684  			y := x.Args[0]
 23685  			if !(x.Uses == 1) {
 23686  				break
 23687  			}
 23688  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNWconst, types.TypeFlags)
 23689  			v0.AuxInt = int32ToAuxInt(int32(c))
 23690  			v0.AddArg(y)
 23691  			b.resetWithControl(BlockARM64NE, v0)
 23692  			return true
 23693  		}
 23694  		// match: (NE (CMPconst [0] z:(ADD x y)) yes no)
 23695  		// cond: z.Uses == 1
 23696  		// result: (NE (CMN x y) yes no)
 23697  		for b.Controls[0].Op == OpARM64CMPconst {
 23698  			v_0 := b.Controls[0]
 23699  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23700  				break
 23701  			}
 23702  			z := v_0.Args[0]
 23703  			if z.Op != OpARM64ADD {
 23704  				break
 23705  			}
 23706  			_ = z.Args[1]
 23707  			z_0 := z.Args[0]
 23708  			z_1 := z.Args[1]
 23709  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23710  				x := z_0
 23711  				y := z_1
 23712  				if !(z.Uses == 1) {
 23713  					continue
 23714  				}
 23715  				v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 23716  				v0.AddArg2(x, y)
 23717  				b.resetWithControl(BlockARM64NE, v0)
 23718  				return true
 23719  			}
 23720  			break
 23721  		}
 23722  		// match: (NE (CMPWconst [0] z:(ADD x y)) yes no)
 23723  		// cond: z.Uses == 1
 23724  		// result: (NE (CMNW x y) yes no)
 23725  		for b.Controls[0].Op == OpARM64CMPWconst {
 23726  			v_0 := b.Controls[0]
 23727  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23728  				break
 23729  			}
 23730  			z := v_0.Args[0]
 23731  			if z.Op != OpARM64ADD {
 23732  				break
 23733  			}
 23734  			_ = z.Args[1]
 23735  			z_0 := z.Args[0]
 23736  			z_1 := z.Args[1]
 23737  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 23738  				x := z_0
 23739  				y := z_1
 23740  				if !(z.Uses == 1) {
 23741  					continue
 23742  				}
 23743  				v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 23744  				v0.AddArg2(x, y)
 23745  				b.resetWithControl(BlockARM64NE, v0)
 23746  				return true
 23747  			}
 23748  			break
 23749  		}
 23750  		// match: (NE (CMP x z:(NEG y)) yes no)
 23751  		// cond: z.Uses == 1
 23752  		// result: (NE (CMN x y) yes no)
 23753  		for b.Controls[0].Op == OpARM64CMP {
 23754  			v_0 := b.Controls[0]
 23755  			_ = v_0.Args[1]
 23756  			x := v_0.Args[0]
 23757  			z := v_0.Args[1]
 23758  			if z.Op != OpARM64NEG {
 23759  				break
 23760  			}
 23761  			y := z.Args[0]
 23762  			if !(z.Uses == 1) {
 23763  				break
 23764  			}
 23765  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 23766  			v0.AddArg2(x, y)
 23767  			b.resetWithControl(BlockARM64NE, v0)
 23768  			return true
 23769  		}
 23770  		// match: (NE (CMPW x z:(NEG y)) yes no)
 23771  		// cond: z.Uses == 1
 23772  		// result: (NE (CMNW x y) yes no)
 23773  		for b.Controls[0].Op == OpARM64CMPW {
 23774  			v_0 := b.Controls[0]
 23775  			_ = v_0.Args[1]
 23776  			x := v_0.Args[0]
 23777  			z := v_0.Args[1]
 23778  			if z.Op != OpARM64NEG {
 23779  				break
 23780  			}
 23781  			y := z.Args[0]
 23782  			if !(z.Uses == 1) {
 23783  				break
 23784  			}
 23785  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 23786  			v0.AddArg2(x, y)
 23787  			b.resetWithControl(BlockARM64NE, v0)
 23788  			return true
 23789  		}
 23790  		// match: (NE (CMPconst [0] x) yes no)
 23791  		// result: (NZ x yes no)
 23792  		for b.Controls[0].Op == OpARM64CMPconst {
 23793  			v_0 := b.Controls[0]
 23794  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23795  				break
 23796  			}
 23797  			x := v_0.Args[0]
 23798  			b.resetWithControl(BlockARM64NZ, x)
 23799  			return true
 23800  		}
 23801  		// match: (NE (CMPWconst [0] x) yes no)
 23802  		// result: (NZW x yes no)
 23803  		for b.Controls[0].Op == OpARM64CMPWconst {
 23804  			v_0 := b.Controls[0]
 23805  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23806  				break
 23807  			}
 23808  			x := v_0.Args[0]
 23809  			b.resetWithControl(BlockARM64NZW, x)
 23810  			return true
 23811  		}
 23812  		// match: (NE (CMPconst [0] z:(MADD a x y)) yes no)
 23813  		// cond: z.Uses==1
 23814  		// result: (NE (CMN a (MUL <x.Type> x y)) yes no)
 23815  		for b.Controls[0].Op == OpARM64CMPconst {
 23816  			v_0 := b.Controls[0]
 23817  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23818  				break
 23819  			}
 23820  			z := v_0.Args[0]
 23821  			if z.Op != OpARM64MADD {
 23822  				break
 23823  			}
 23824  			y := z.Args[2]
 23825  			a := z.Args[0]
 23826  			x := z.Args[1]
 23827  			if !(z.Uses == 1) {
 23828  				break
 23829  			}
 23830  			v0 := b.NewValue0(v_0.Pos, OpARM64CMN, types.TypeFlags)
 23831  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 23832  			v1.AddArg2(x, y)
 23833  			v0.AddArg2(a, v1)
 23834  			b.resetWithControl(BlockARM64NE, v0)
 23835  			return true
 23836  		}
 23837  		// match: (NE (CMPconst [0] z:(MSUB a x y)) yes no)
 23838  		// cond: z.Uses==1
 23839  		// result: (NE (CMP a (MUL <x.Type> x y)) yes no)
 23840  		for b.Controls[0].Op == OpARM64CMPconst {
 23841  			v_0 := b.Controls[0]
 23842  			if auxIntToInt64(v_0.AuxInt) != 0 {
 23843  				break
 23844  			}
 23845  			z := v_0.Args[0]
 23846  			if z.Op != OpARM64MSUB {
 23847  				break
 23848  			}
 23849  			y := z.Args[2]
 23850  			a := z.Args[0]
 23851  			x := z.Args[1]
 23852  			if !(z.Uses == 1) {
 23853  				break
 23854  			}
 23855  			v0 := b.NewValue0(v_0.Pos, OpARM64CMP, types.TypeFlags)
 23856  			v1 := b.NewValue0(v_0.Pos, OpARM64MUL, x.Type)
 23857  			v1.AddArg2(x, y)
 23858  			v0.AddArg2(a, v1)
 23859  			b.resetWithControl(BlockARM64NE, v0)
 23860  			return true
 23861  		}
 23862  		// match: (NE (CMPWconst [0] z:(MADDW a x y)) yes no)
 23863  		// cond: z.Uses==1
 23864  		// result: (NE (CMNW a (MULW <x.Type> x y)) yes no)
 23865  		for b.Controls[0].Op == OpARM64CMPWconst {
 23866  			v_0 := b.Controls[0]
 23867  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23868  				break
 23869  			}
 23870  			z := v_0.Args[0]
 23871  			if z.Op != OpARM64MADDW {
 23872  				break
 23873  			}
 23874  			y := z.Args[2]
 23875  			a := z.Args[0]
 23876  			x := z.Args[1]
 23877  			if !(z.Uses == 1) {
 23878  				break
 23879  			}
 23880  			v0 := b.NewValue0(v_0.Pos, OpARM64CMNW, types.TypeFlags)
 23881  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 23882  			v1.AddArg2(x, y)
 23883  			v0.AddArg2(a, v1)
 23884  			b.resetWithControl(BlockARM64NE, v0)
 23885  			return true
 23886  		}
 23887  		// match: (NE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 23888  		// cond: z.Uses==1
 23889  		// result: (NE (CMPW a (MULW <x.Type> x y)) yes no)
 23890  		for b.Controls[0].Op == OpARM64CMPWconst {
 23891  			v_0 := b.Controls[0]
 23892  			if auxIntToInt32(v_0.AuxInt) != 0 {
 23893  				break
 23894  			}
 23895  			z := v_0.Args[0]
 23896  			if z.Op != OpARM64MSUBW {
 23897  				break
 23898  			}
 23899  			y := z.Args[2]
 23900  			a := z.Args[0]
 23901  			x := z.Args[1]
 23902  			if !(z.Uses == 1) {
 23903  				break
 23904  			}
 23905  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPW, types.TypeFlags)
 23906  			v1 := b.NewValue0(v_0.Pos, OpARM64MULW, x.Type)
 23907  			v1.AddArg2(x, y)
 23908  			v0.AddArg2(a, v1)
 23909  			b.resetWithControl(BlockARM64NE, v0)
 23910  			return true
 23911  		}
 23912  		// match: (NE (TSTconst [c] x) yes no)
 23913  		// cond: oneBit(c)
 23914  		// result: (TBNZ [int64(ntz64(c))] x yes no)
 23915  		for b.Controls[0].Op == OpARM64TSTconst {
 23916  			v_0 := b.Controls[0]
 23917  			c := auxIntToInt64(v_0.AuxInt)
 23918  			x := v_0.Args[0]
 23919  			if !(oneBit(c)) {
 23920  				break
 23921  			}
 23922  			b.resetWithControl(BlockARM64TBNZ, x)
 23923  			b.AuxInt = int64ToAuxInt(int64(ntz64(c)))
 23924  			return true
 23925  		}
 23926  		// match: (NE (TSTWconst [c] x) yes no)
 23927  		// cond: oneBit(int64(uint32(c)))
 23928  		// result: (TBNZ [int64(ntz64(int64(uint32(c))))] x yes no)
 23929  		for b.Controls[0].Op == OpARM64TSTWconst {
 23930  			v_0 := b.Controls[0]
 23931  			c := auxIntToInt32(v_0.AuxInt)
 23932  			x := v_0.Args[0]
 23933  			if !(oneBit(int64(uint32(c)))) {
 23934  				break
 23935  			}
 23936  			b.resetWithControl(BlockARM64TBNZ, x)
 23937  			b.AuxInt = int64ToAuxInt(int64(ntz64(int64(uint32(c)))))
 23938  			return true
 23939  		}
 23940  		// match: (NE (FlagConstant [fc]) yes no)
 23941  		// cond: fc.ne()
 23942  		// result: (First yes no)
 23943  		for b.Controls[0].Op == OpARM64FlagConstant {
 23944  			v_0 := b.Controls[0]
 23945  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23946  			if !(fc.ne()) {
 23947  				break
 23948  			}
 23949  			b.Reset(BlockFirst)
 23950  			return true
 23951  		}
 23952  		// match: (NE (FlagConstant [fc]) yes no)
 23953  		// cond: !fc.ne()
 23954  		// result: (First no yes)
 23955  		for b.Controls[0].Op == OpARM64FlagConstant {
 23956  			v_0 := b.Controls[0]
 23957  			fc := auxIntToFlagConstant(v_0.AuxInt)
 23958  			if !(!fc.ne()) {
 23959  				break
 23960  			}
 23961  			b.Reset(BlockFirst)
 23962  			b.swapSuccessors()
 23963  			return true
 23964  		}
 23965  		// match: (NE (InvertFlags cmp) yes no)
 23966  		// result: (NE cmp yes no)
 23967  		for b.Controls[0].Op == OpARM64InvertFlags {
 23968  			v_0 := b.Controls[0]
 23969  			cmp := v_0.Args[0]
 23970  			b.resetWithControl(BlockARM64NE, cmp)
 23971  			return true
 23972  		}
 23973  	case BlockARM64NZ:
 23974  		// match: (NZ (Equal cc) yes no)
 23975  		// result: (EQ cc yes no)
 23976  		for b.Controls[0].Op == OpARM64Equal {
 23977  			v_0 := b.Controls[0]
 23978  			cc := v_0.Args[0]
 23979  			b.resetWithControl(BlockARM64EQ, cc)
 23980  			return true
 23981  		}
 23982  		// match: (NZ (NotEqual cc) yes no)
 23983  		// result: (NE cc yes no)
 23984  		for b.Controls[0].Op == OpARM64NotEqual {
 23985  			v_0 := b.Controls[0]
 23986  			cc := v_0.Args[0]
 23987  			b.resetWithControl(BlockARM64NE, cc)
 23988  			return true
 23989  		}
 23990  		// match: (NZ (LessThan cc) yes no)
 23991  		// result: (LT cc yes no)
 23992  		for b.Controls[0].Op == OpARM64LessThan {
 23993  			v_0 := b.Controls[0]
 23994  			cc := v_0.Args[0]
 23995  			b.resetWithControl(BlockARM64LT, cc)
 23996  			return true
 23997  		}
 23998  		// match: (NZ (LessThanU cc) yes no)
 23999  		// result: (ULT cc yes no)
 24000  		for b.Controls[0].Op == OpARM64LessThanU {
 24001  			v_0 := b.Controls[0]
 24002  			cc := v_0.Args[0]
 24003  			b.resetWithControl(BlockARM64ULT, cc)
 24004  			return true
 24005  		}
 24006  		// match: (NZ (LessEqual cc) yes no)
 24007  		// result: (LE cc yes no)
 24008  		for b.Controls[0].Op == OpARM64LessEqual {
 24009  			v_0 := b.Controls[0]
 24010  			cc := v_0.Args[0]
 24011  			b.resetWithControl(BlockARM64LE, cc)
 24012  			return true
 24013  		}
 24014  		// match: (NZ (LessEqualU cc) yes no)
 24015  		// result: (ULE cc yes no)
 24016  		for b.Controls[0].Op == OpARM64LessEqualU {
 24017  			v_0 := b.Controls[0]
 24018  			cc := v_0.Args[0]
 24019  			b.resetWithControl(BlockARM64ULE, cc)
 24020  			return true
 24021  		}
 24022  		// match: (NZ (GreaterThan cc) yes no)
 24023  		// result: (GT cc yes no)
 24024  		for b.Controls[0].Op == OpARM64GreaterThan {
 24025  			v_0 := b.Controls[0]
 24026  			cc := v_0.Args[0]
 24027  			b.resetWithControl(BlockARM64GT, cc)
 24028  			return true
 24029  		}
 24030  		// match: (NZ (GreaterThanU cc) yes no)
 24031  		// result: (UGT cc yes no)
 24032  		for b.Controls[0].Op == OpARM64GreaterThanU {
 24033  			v_0 := b.Controls[0]
 24034  			cc := v_0.Args[0]
 24035  			b.resetWithControl(BlockARM64UGT, cc)
 24036  			return true
 24037  		}
 24038  		// match: (NZ (GreaterEqual cc) yes no)
 24039  		// result: (GE cc yes no)
 24040  		for b.Controls[0].Op == OpARM64GreaterEqual {
 24041  			v_0 := b.Controls[0]
 24042  			cc := v_0.Args[0]
 24043  			b.resetWithControl(BlockARM64GE, cc)
 24044  			return true
 24045  		}
 24046  		// match: (NZ (GreaterEqualU cc) yes no)
 24047  		// result: (UGE cc yes no)
 24048  		for b.Controls[0].Op == OpARM64GreaterEqualU {
 24049  			v_0 := b.Controls[0]
 24050  			cc := v_0.Args[0]
 24051  			b.resetWithControl(BlockARM64UGE, cc)
 24052  			return true
 24053  		}
 24054  		// match: (NZ (LessThanF cc) yes no)
 24055  		// result: (FLT cc yes no)
 24056  		for b.Controls[0].Op == OpARM64LessThanF {
 24057  			v_0 := b.Controls[0]
 24058  			cc := v_0.Args[0]
 24059  			b.resetWithControl(BlockARM64FLT, cc)
 24060  			return true
 24061  		}
 24062  		// match: (NZ (LessEqualF cc) yes no)
 24063  		// result: (FLE cc yes no)
 24064  		for b.Controls[0].Op == OpARM64LessEqualF {
 24065  			v_0 := b.Controls[0]
 24066  			cc := v_0.Args[0]
 24067  			b.resetWithControl(BlockARM64FLE, cc)
 24068  			return true
 24069  		}
 24070  		// match: (NZ (GreaterThanF cc) yes no)
 24071  		// result: (FGT cc yes no)
 24072  		for b.Controls[0].Op == OpARM64GreaterThanF {
 24073  			v_0 := b.Controls[0]
 24074  			cc := v_0.Args[0]
 24075  			b.resetWithControl(BlockARM64FGT, cc)
 24076  			return true
 24077  		}
 24078  		// match: (NZ (GreaterEqualF cc) yes no)
 24079  		// result: (FGE cc yes no)
 24080  		for b.Controls[0].Op == OpARM64GreaterEqualF {
 24081  			v_0 := b.Controls[0]
 24082  			cc := v_0.Args[0]
 24083  			b.resetWithControl(BlockARM64FGE, cc)
 24084  			return true
 24085  		}
 24086  		// match: (NZ sub:(SUB x y))
 24087  		// cond: sub.Uses == 1
 24088  		// result: (NE (CMP x y))
 24089  		for b.Controls[0].Op == OpARM64SUB {
 24090  			sub := b.Controls[0]
 24091  			y := sub.Args[1]
 24092  			x := sub.Args[0]
 24093  			if !(sub.Uses == 1) {
 24094  				break
 24095  			}
 24096  			v0 := b.NewValue0(sub.Pos, OpARM64CMP, types.TypeFlags)
 24097  			v0.AddArg2(x, y)
 24098  			b.resetWithControl(BlockARM64NE, v0)
 24099  			return true
 24100  		}
 24101  		// match: (NZ sub:(SUBconst [c] y))
 24102  		// cond: sub.Uses == 1
 24103  		// result: (NE (CMPconst [c] y))
 24104  		for b.Controls[0].Op == OpARM64SUBconst {
 24105  			sub := b.Controls[0]
 24106  			c := auxIntToInt64(sub.AuxInt)
 24107  			y := sub.Args[0]
 24108  			if !(sub.Uses == 1) {
 24109  				break
 24110  			}
 24111  			v0 := b.NewValue0(sub.Pos, OpARM64CMPconst, types.TypeFlags)
 24112  			v0.AuxInt = int64ToAuxInt(c)
 24113  			v0.AddArg(y)
 24114  			b.resetWithControl(BlockARM64NE, v0)
 24115  			return true
 24116  		}
 24117  		// match: (NZ (ANDconst [c] x) yes no)
 24118  		// cond: oneBit(c)
 24119  		// result: (TBNZ [int64(ntz64(c))] x yes no)
 24120  		for b.Controls[0].Op == OpARM64ANDconst {
 24121  			v_0 := b.Controls[0]
 24122  			c := auxIntToInt64(v_0.AuxInt)
 24123  			x := v_0.Args[0]
 24124  			if !(oneBit(c)) {
 24125  				break
 24126  			}
 24127  			b.resetWithControl(BlockARM64TBNZ, x)
 24128  			b.AuxInt = int64ToAuxInt(int64(ntz64(c)))
 24129  			return true
 24130  		}
 24131  		// match: (NZ s:(SRLconst [63] x) yes no)
 24132  		// cond: s.Uses == 1
 24133  		// result: (TBNZ [63] x yes no)
 24134  		for b.Controls[0].Op == OpARM64SRLconst {
 24135  			s := b.Controls[0]
 24136  			if auxIntToInt64(s.AuxInt) != 63 {
 24137  				break
 24138  			}
 24139  			x := s.Args[0]
 24140  			if !(s.Uses == 1) {
 24141  				break
 24142  			}
 24143  			b.resetWithControl(BlockARM64TBNZ, x)
 24144  			b.AuxInt = int64ToAuxInt(63)
 24145  			return true
 24146  		}
 24147  		// match: (NZ s:(SRAconst [63] x) yes no)
 24148  		// cond: s.Uses == 1
 24149  		// result: (TBNZ [63] x yes no)
 24150  		for b.Controls[0].Op == OpARM64SRAconst {
 24151  			s := b.Controls[0]
 24152  			if auxIntToInt64(s.AuxInt) != 63 {
 24153  				break
 24154  			}
 24155  			x := s.Args[0]
 24156  			if !(s.Uses == 1) {
 24157  				break
 24158  			}
 24159  			b.resetWithControl(BlockARM64TBNZ, x)
 24160  			b.AuxInt = int64ToAuxInt(63)
 24161  			return true
 24162  		}
 24163  		// match: (NZ (MOVDconst [0]) yes no)
 24164  		// result: (First no yes)
 24165  		for b.Controls[0].Op == OpARM64MOVDconst {
 24166  			v_0 := b.Controls[0]
 24167  			if auxIntToInt64(v_0.AuxInt) != 0 {
 24168  				break
 24169  			}
 24170  			b.Reset(BlockFirst)
 24171  			b.swapSuccessors()
 24172  			return true
 24173  		}
 24174  		// match: (NZ (MOVDconst [c]) yes no)
 24175  		// cond: c != 0
 24176  		// result: (First yes no)
 24177  		for b.Controls[0].Op == OpARM64MOVDconst {
 24178  			v_0 := b.Controls[0]
 24179  			c := auxIntToInt64(v_0.AuxInt)
 24180  			if !(c != 0) {
 24181  				break
 24182  			}
 24183  			b.Reset(BlockFirst)
 24184  			return true
 24185  		}
 24186  	case BlockARM64NZW:
 24187  		// match: (NZW sub:(SUB x y))
 24188  		// cond: sub.Uses == 1
 24189  		// result: (NE (CMPW x y))
 24190  		for b.Controls[0].Op == OpARM64SUB {
 24191  			sub := b.Controls[0]
 24192  			y := sub.Args[1]
 24193  			x := sub.Args[0]
 24194  			if !(sub.Uses == 1) {
 24195  				break
 24196  			}
 24197  			v0 := b.NewValue0(sub.Pos, OpARM64CMPW, types.TypeFlags)
 24198  			v0.AddArg2(x, y)
 24199  			b.resetWithControl(BlockARM64NE, v0)
 24200  			return true
 24201  		}
 24202  		// match: (NZW sub:(SUBconst [c] y))
 24203  		// cond: sub.Uses == 1
 24204  		// result: (NE (CMPWconst [int32(c)] y))
 24205  		for b.Controls[0].Op == OpARM64SUBconst {
 24206  			sub := b.Controls[0]
 24207  			c := auxIntToInt64(sub.AuxInt)
 24208  			y := sub.Args[0]
 24209  			if !(sub.Uses == 1) {
 24210  				break
 24211  			}
 24212  			v0 := b.NewValue0(sub.Pos, OpARM64CMPWconst, types.TypeFlags)
 24213  			v0.AuxInt = int32ToAuxInt(int32(c))
 24214  			v0.AddArg(y)
 24215  			b.resetWithControl(BlockARM64NE, v0)
 24216  			return true
 24217  		}
 24218  		// match: (NZW (ANDconst [c] x) yes no)
 24219  		// cond: oneBit(int64(uint32(c)))
 24220  		// result: (TBNZ [int64(ntz64(int64(uint32(c))))] x yes no)
 24221  		for b.Controls[0].Op == OpARM64ANDconst {
 24222  			v_0 := b.Controls[0]
 24223  			c := auxIntToInt64(v_0.AuxInt)
 24224  			x := v_0.Args[0]
 24225  			if !(oneBit(int64(uint32(c)))) {
 24226  				break
 24227  			}
 24228  			b.resetWithControl(BlockARM64TBNZ, x)
 24229  			b.AuxInt = int64ToAuxInt(int64(ntz64(int64(uint32(c)))))
 24230  			return true
 24231  		}
 24232  		// match: (NZW (MOVDconst [c]) yes no)
 24233  		// cond: int32(c) == 0
 24234  		// result: (First no yes)
 24235  		for b.Controls[0].Op == OpARM64MOVDconst {
 24236  			v_0 := b.Controls[0]
 24237  			c := auxIntToInt64(v_0.AuxInt)
 24238  			if !(int32(c) == 0) {
 24239  				break
 24240  			}
 24241  			b.Reset(BlockFirst)
 24242  			b.swapSuccessors()
 24243  			return true
 24244  		}
 24245  		// match: (NZW (MOVDconst [c]) yes no)
 24246  		// cond: int32(c) != 0
 24247  		// result: (First yes no)
 24248  		for b.Controls[0].Op == OpARM64MOVDconst {
 24249  			v_0 := b.Controls[0]
 24250  			c := auxIntToInt64(v_0.AuxInt)
 24251  			if !(int32(c) != 0) {
 24252  				break
 24253  			}
 24254  			b.Reset(BlockFirst)
 24255  			return true
 24256  		}
 24257  	case BlockARM64TBNZ:
 24258  		// match: (TBNZ [0] (Equal cc) yes no)
 24259  		// result: (EQ cc yes no)
 24260  		for b.Controls[0].Op == OpARM64Equal {
 24261  			v_0 := b.Controls[0]
 24262  			cc := v_0.Args[0]
 24263  			if auxIntToInt64(b.AuxInt) != 0 {
 24264  				break
 24265  			}
 24266  			b.resetWithControl(BlockARM64EQ, cc)
 24267  			return true
 24268  		}
 24269  		// match: (TBNZ [0] (NotEqual cc) yes no)
 24270  		// result: (NE cc yes no)
 24271  		for b.Controls[0].Op == OpARM64NotEqual {
 24272  			v_0 := b.Controls[0]
 24273  			cc := v_0.Args[0]
 24274  			if auxIntToInt64(b.AuxInt) != 0 {
 24275  				break
 24276  			}
 24277  			b.resetWithControl(BlockARM64NE, cc)
 24278  			return true
 24279  		}
 24280  		// match: (TBNZ [0] (LessThan cc) yes no)
 24281  		// result: (LT cc yes no)
 24282  		for b.Controls[0].Op == OpARM64LessThan {
 24283  			v_0 := b.Controls[0]
 24284  			cc := v_0.Args[0]
 24285  			if auxIntToInt64(b.AuxInt) != 0 {
 24286  				break
 24287  			}
 24288  			b.resetWithControl(BlockARM64LT, cc)
 24289  			return true
 24290  		}
 24291  		// match: (TBNZ [0] (LessThanU cc) yes no)
 24292  		// result: (ULT cc yes no)
 24293  		for b.Controls[0].Op == OpARM64LessThanU {
 24294  			v_0 := b.Controls[0]
 24295  			cc := v_0.Args[0]
 24296  			if auxIntToInt64(b.AuxInt) != 0 {
 24297  				break
 24298  			}
 24299  			b.resetWithControl(BlockARM64ULT, cc)
 24300  			return true
 24301  		}
 24302  		// match: (TBNZ [0] (LessEqual cc) yes no)
 24303  		// result: (LE cc yes no)
 24304  		for b.Controls[0].Op == OpARM64LessEqual {
 24305  			v_0 := b.Controls[0]
 24306  			cc := v_0.Args[0]
 24307  			if auxIntToInt64(b.AuxInt) != 0 {
 24308  				break
 24309  			}
 24310  			b.resetWithControl(BlockARM64LE, cc)
 24311  			return true
 24312  		}
 24313  		// match: (TBNZ [0] (LessEqualU cc) yes no)
 24314  		// result: (ULE cc yes no)
 24315  		for b.Controls[0].Op == OpARM64LessEqualU {
 24316  			v_0 := b.Controls[0]
 24317  			cc := v_0.Args[0]
 24318  			if auxIntToInt64(b.AuxInt) != 0 {
 24319  				break
 24320  			}
 24321  			b.resetWithControl(BlockARM64ULE, cc)
 24322  			return true
 24323  		}
 24324  		// match: (TBNZ [0] (GreaterThan cc) yes no)
 24325  		// result: (GT cc yes no)
 24326  		for b.Controls[0].Op == OpARM64GreaterThan {
 24327  			v_0 := b.Controls[0]
 24328  			cc := v_0.Args[0]
 24329  			if auxIntToInt64(b.AuxInt) != 0 {
 24330  				break
 24331  			}
 24332  			b.resetWithControl(BlockARM64GT, cc)
 24333  			return true
 24334  		}
 24335  		// match: (TBNZ [0] (GreaterThanU cc) yes no)
 24336  		// result: (UGT cc yes no)
 24337  		for b.Controls[0].Op == OpARM64GreaterThanU {
 24338  			v_0 := b.Controls[0]
 24339  			cc := v_0.Args[0]
 24340  			if auxIntToInt64(b.AuxInt) != 0 {
 24341  				break
 24342  			}
 24343  			b.resetWithControl(BlockARM64UGT, cc)
 24344  			return true
 24345  		}
 24346  		// match: (TBNZ [0] (GreaterEqual cc) yes no)
 24347  		// result: (GE cc yes no)
 24348  		for b.Controls[0].Op == OpARM64GreaterEqual {
 24349  			v_0 := b.Controls[0]
 24350  			cc := v_0.Args[0]
 24351  			if auxIntToInt64(b.AuxInt) != 0 {
 24352  				break
 24353  			}
 24354  			b.resetWithControl(BlockARM64GE, cc)
 24355  			return true
 24356  		}
 24357  		// match: (TBNZ [0] (GreaterEqualU cc) yes no)
 24358  		// result: (UGE cc yes no)
 24359  		for b.Controls[0].Op == OpARM64GreaterEqualU {
 24360  			v_0 := b.Controls[0]
 24361  			cc := v_0.Args[0]
 24362  			if auxIntToInt64(b.AuxInt) != 0 {
 24363  				break
 24364  			}
 24365  			b.resetWithControl(BlockARM64UGE, cc)
 24366  			return true
 24367  		}
 24368  		// match: (TBNZ [0] (LessThanF cc) yes no)
 24369  		// result: (FLT cc yes no)
 24370  		for b.Controls[0].Op == OpARM64LessThanF {
 24371  			v_0 := b.Controls[0]
 24372  			cc := v_0.Args[0]
 24373  			if auxIntToInt64(b.AuxInt) != 0 {
 24374  				break
 24375  			}
 24376  			b.resetWithControl(BlockARM64FLT, cc)
 24377  			return true
 24378  		}
 24379  		// match: (TBNZ [0] (LessEqualF cc) yes no)
 24380  		// result: (FLE cc yes no)
 24381  		for b.Controls[0].Op == OpARM64LessEqualF {
 24382  			v_0 := b.Controls[0]
 24383  			cc := v_0.Args[0]
 24384  			if auxIntToInt64(b.AuxInt) != 0 {
 24385  				break
 24386  			}
 24387  			b.resetWithControl(BlockARM64FLE, cc)
 24388  			return true
 24389  		}
 24390  		// match: (TBNZ [0] (GreaterThanF cc) yes no)
 24391  		// result: (FGT cc yes no)
 24392  		for b.Controls[0].Op == OpARM64GreaterThanF {
 24393  			v_0 := b.Controls[0]
 24394  			cc := v_0.Args[0]
 24395  			if auxIntToInt64(b.AuxInt) != 0 {
 24396  				break
 24397  			}
 24398  			b.resetWithControl(BlockARM64FGT, cc)
 24399  			return true
 24400  		}
 24401  		// match: (TBNZ [0] (GreaterEqualF cc) yes no)
 24402  		// result: (FGE cc yes no)
 24403  		for b.Controls[0].Op == OpARM64GreaterEqualF {
 24404  			v_0 := b.Controls[0]
 24405  			cc := v_0.Args[0]
 24406  			if auxIntToInt64(b.AuxInt) != 0 {
 24407  				break
 24408  			}
 24409  			b.resetWithControl(BlockARM64FGE, cc)
 24410  			return true
 24411  		}
 24412  		// match: (TBNZ [0] (XORconst [1] x) yes no)
 24413  		// result: (TBZ [0] x yes no)
 24414  		for b.Controls[0].Op == OpARM64XORconst {
 24415  			v_0 := b.Controls[0]
 24416  			if auxIntToInt64(v_0.AuxInt) != 1 {
 24417  				break
 24418  			}
 24419  			x := v_0.Args[0]
 24420  			if auxIntToInt64(b.AuxInt) != 0 {
 24421  				break
 24422  			}
 24423  			b.resetWithControl(BlockARM64TBZ, x)
 24424  			b.AuxInt = int64ToAuxInt(0)
 24425  			return true
 24426  		}
 24427  		// match: (TBNZ [t] sv:(SRLconst [s] x) yes no)
 24428  		// cond: t+s < 64 && sv.Uses == 1
 24429  		// result: (TBNZ [t+s] x yes no )
 24430  		for b.Controls[0].Op == OpARM64SRLconst {
 24431  			sv := b.Controls[0]
 24432  			s := auxIntToInt64(sv.AuxInt)
 24433  			x := sv.Args[0]
 24434  			t := auxIntToInt64(b.AuxInt)
 24435  			if !(t+s < 64 && sv.Uses == 1) {
 24436  				break
 24437  			}
 24438  			b.resetWithControl(BlockARM64TBNZ, x)
 24439  			b.AuxInt = int64ToAuxInt(t + s)
 24440  			return true
 24441  		}
 24442  		// match: (TBNZ [t] (SRLconst [s] x) yes no)
 24443  		// cond: t+s >= 64
 24444  		// result: (First no yes)
 24445  		for b.Controls[0].Op == OpARM64SRLconst {
 24446  			v_0 := b.Controls[0]
 24447  			s := auxIntToInt64(v_0.AuxInt)
 24448  			t := auxIntToInt64(b.AuxInt)
 24449  			if !(t+s >= 64) {
 24450  				break
 24451  			}
 24452  			b.Reset(BlockFirst)
 24453  			b.swapSuccessors()
 24454  			return true
 24455  		}
 24456  		// match: (TBNZ [t] sv:(SLLconst [s] x) yes no)
 24457  		// cond: t-s >= 0 && sv.Uses == 1
 24458  		// result: (TBNZ [t-s] x yes no )
 24459  		for b.Controls[0].Op == OpARM64SLLconst {
 24460  			sv := b.Controls[0]
 24461  			s := auxIntToInt64(sv.AuxInt)
 24462  			x := sv.Args[0]
 24463  			t := auxIntToInt64(b.AuxInt)
 24464  			if !(t-s >= 0 && sv.Uses == 1) {
 24465  				break
 24466  			}
 24467  			b.resetWithControl(BlockARM64TBNZ, x)
 24468  			b.AuxInt = int64ToAuxInt(t - s)
 24469  			return true
 24470  		}
 24471  		// match: (TBNZ [t] (SLLconst [s] x) yes no)
 24472  		// cond: t-s < 0
 24473  		// result: (First no yes)
 24474  		for b.Controls[0].Op == OpARM64SLLconst {
 24475  			v_0 := b.Controls[0]
 24476  			s := auxIntToInt64(v_0.AuxInt)
 24477  			t := auxIntToInt64(b.AuxInt)
 24478  			if !(t-s < 0) {
 24479  				break
 24480  			}
 24481  			b.Reset(BlockFirst)
 24482  			b.swapSuccessors()
 24483  			return true
 24484  		}
 24485  		// match: (TBNZ [t] rv:(RORconst [r] x) yes no)
 24486  		// cond: rv.Uses == 1
 24487  		// result: (TBNZ [int64(uint64(t+r)%64)] x yes no)
 24488  		for b.Controls[0].Op == OpARM64RORconst {
 24489  			rv := b.Controls[0]
 24490  			r := auxIntToInt64(rv.AuxInt)
 24491  			x := rv.Args[0]
 24492  			t := auxIntToInt64(b.AuxInt)
 24493  			if !(rv.Uses == 1) {
 24494  				break
 24495  			}
 24496  			b.resetWithControl(BlockARM64TBNZ, x)
 24497  			b.AuxInt = int64ToAuxInt(int64(uint64(t+r) % 64))
 24498  			return true
 24499  		}
 24500  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 24501  		// cond: t+s < 64 && sv.Uses == 1
 24502  		// result: (TBNZ [t+s] x yes no)
 24503  		for b.Controls[0].Op == OpARM64SRAconst {
 24504  			sv := b.Controls[0]
 24505  			s := auxIntToInt64(sv.AuxInt)
 24506  			x := sv.Args[0]
 24507  			t := auxIntToInt64(b.AuxInt)
 24508  			if !(t+s < 64 && sv.Uses == 1) {
 24509  				break
 24510  			}
 24511  			b.resetWithControl(BlockARM64TBNZ, x)
 24512  			b.AuxInt = int64ToAuxInt(t + s)
 24513  			return true
 24514  		}
 24515  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 24516  		// cond: t+s >= 64 && sv.Uses == 1
 24517  		// result: (TBNZ [63 ] x yes no)
 24518  		for b.Controls[0].Op == OpARM64SRAconst {
 24519  			sv := b.Controls[0]
 24520  			s := auxIntToInt64(sv.AuxInt)
 24521  			x := sv.Args[0]
 24522  			t := auxIntToInt64(b.AuxInt)
 24523  			if !(t+s >= 64 && sv.Uses == 1) {
 24524  				break
 24525  			}
 24526  			b.resetWithControl(BlockARM64TBNZ, x)
 24527  			b.AuxInt = int64ToAuxInt(63)
 24528  			return true
 24529  		}
 24530  	case BlockARM64TBZ:
 24531  		// match: (TBZ [0] (XORconst [1] x) yes no)
 24532  		// result: (TBNZ [0] x yes no)
 24533  		for b.Controls[0].Op == OpARM64XORconst {
 24534  			v_0 := b.Controls[0]
 24535  			if auxIntToInt64(v_0.AuxInt) != 1 {
 24536  				break
 24537  			}
 24538  			x := v_0.Args[0]
 24539  			if auxIntToInt64(b.AuxInt) != 0 {
 24540  				break
 24541  			}
 24542  			b.resetWithControl(BlockARM64TBNZ, x)
 24543  			b.AuxInt = int64ToAuxInt(0)
 24544  			return true
 24545  		}
 24546  		// match: (TBZ [t] sv:(SRLconst [s] x) yes no)
 24547  		// cond: t+s < 64 && sv.Uses == 1
 24548  		// result: (TBZ [t+s] x yes no )
 24549  		for b.Controls[0].Op == OpARM64SRLconst {
 24550  			sv := b.Controls[0]
 24551  			s := auxIntToInt64(sv.AuxInt)
 24552  			x := sv.Args[0]
 24553  			t := auxIntToInt64(b.AuxInt)
 24554  			if !(t+s < 64 && sv.Uses == 1) {
 24555  				break
 24556  			}
 24557  			b.resetWithControl(BlockARM64TBZ, x)
 24558  			b.AuxInt = int64ToAuxInt(t + s)
 24559  			return true
 24560  		}
 24561  		// match: (TBZ [t] (SRLconst [s] x) yes no)
 24562  		// cond: t+s >= 64
 24563  		// result: (First yes no )
 24564  		for b.Controls[0].Op == OpARM64SRLconst {
 24565  			v_0 := b.Controls[0]
 24566  			s := auxIntToInt64(v_0.AuxInt)
 24567  			t := auxIntToInt64(b.AuxInt)
 24568  			if !(t+s >= 64) {
 24569  				break
 24570  			}
 24571  			b.Reset(BlockFirst)
 24572  			return true
 24573  		}
 24574  		// match: (TBZ [t] sv:(SLLconst [s] x) yes no)
 24575  		// cond: t-s >= 0 && sv.Uses == 1
 24576  		// result: (TBZ [t-s] x yes no )
 24577  		for b.Controls[0].Op == OpARM64SLLconst {
 24578  			sv := b.Controls[0]
 24579  			s := auxIntToInt64(sv.AuxInt)
 24580  			x := sv.Args[0]
 24581  			t := auxIntToInt64(b.AuxInt)
 24582  			if !(t-s >= 0 && sv.Uses == 1) {
 24583  				break
 24584  			}
 24585  			b.resetWithControl(BlockARM64TBZ, x)
 24586  			b.AuxInt = int64ToAuxInt(t - s)
 24587  			return true
 24588  		}
 24589  		// match: (TBZ [t] (SLLconst [s] x) yes no)
 24590  		// cond: t-s < 0
 24591  		// result: (First yes no )
 24592  		for b.Controls[0].Op == OpARM64SLLconst {
 24593  			v_0 := b.Controls[0]
 24594  			s := auxIntToInt64(v_0.AuxInt)
 24595  			t := auxIntToInt64(b.AuxInt)
 24596  			if !(t-s < 0) {
 24597  				break
 24598  			}
 24599  			b.Reset(BlockFirst)
 24600  			return true
 24601  		}
 24602  		// match: (TBZ [t] rv:(RORconst [r] x) yes no)
 24603  		// cond: rv.Uses == 1
 24604  		// result: (TBZ [int64(uint64(t+r)%64)] x yes no)
 24605  		for b.Controls[0].Op == OpARM64RORconst {
 24606  			rv := b.Controls[0]
 24607  			r := auxIntToInt64(rv.AuxInt)
 24608  			x := rv.Args[0]
 24609  			t := auxIntToInt64(b.AuxInt)
 24610  			if !(rv.Uses == 1) {
 24611  				break
 24612  			}
 24613  			b.resetWithControl(BlockARM64TBZ, x)
 24614  			b.AuxInt = int64ToAuxInt(int64(uint64(t+r) % 64))
 24615  			return true
 24616  		}
 24617  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 24618  		// cond: t+s < 64 && sv.Uses == 1
 24619  		// result: (TBZ [t+s] x yes no)
 24620  		for b.Controls[0].Op == OpARM64SRAconst {
 24621  			sv := b.Controls[0]
 24622  			s := auxIntToInt64(sv.AuxInt)
 24623  			x := sv.Args[0]
 24624  			t := auxIntToInt64(b.AuxInt)
 24625  			if !(t+s < 64 && sv.Uses == 1) {
 24626  				break
 24627  			}
 24628  			b.resetWithControl(BlockARM64TBZ, x)
 24629  			b.AuxInt = int64ToAuxInt(t + s)
 24630  			return true
 24631  		}
 24632  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 24633  		// cond: t+s >= 64 && sv.Uses == 1
 24634  		// result: (TBZ [63 ] x yes no)
 24635  		for b.Controls[0].Op == OpARM64SRAconst {
 24636  			sv := b.Controls[0]
 24637  			s := auxIntToInt64(sv.AuxInt)
 24638  			x := sv.Args[0]
 24639  			t := auxIntToInt64(b.AuxInt)
 24640  			if !(t+s >= 64 && sv.Uses == 1) {
 24641  				break
 24642  			}
 24643  			b.resetWithControl(BlockARM64TBZ, x)
 24644  			b.AuxInt = int64ToAuxInt(63)
 24645  			return true
 24646  		}
 24647  	case BlockARM64UGE:
 24648  		// match: (UGE (FlagConstant [fc]) yes no)
 24649  		// cond: fc.uge()
 24650  		// result: (First yes no)
 24651  		for b.Controls[0].Op == OpARM64FlagConstant {
 24652  			v_0 := b.Controls[0]
 24653  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24654  			if !(fc.uge()) {
 24655  				break
 24656  			}
 24657  			b.Reset(BlockFirst)
 24658  			return true
 24659  		}
 24660  		// match: (UGE (FlagConstant [fc]) yes no)
 24661  		// cond: !fc.uge()
 24662  		// result: (First no yes)
 24663  		for b.Controls[0].Op == OpARM64FlagConstant {
 24664  			v_0 := b.Controls[0]
 24665  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24666  			if !(!fc.uge()) {
 24667  				break
 24668  			}
 24669  			b.Reset(BlockFirst)
 24670  			b.swapSuccessors()
 24671  			return true
 24672  		}
 24673  		// match: (UGE (InvertFlags cmp) yes no)
 24674  		// result: (ULE cmp yes no)
 24675  		for b.Controls[0].Op == OpARM64InvertFlags {
 24676  			v_0 := b.Controls[0]
 24677  			cmp := v_0.Args[0]
 24678  			b.resetWithControl(BlockARM64ULE, cmp)
 24679  			return true
 24680  		}
 24681  	case BlockARM64UGT:
 24682  		// match: (UGT (CMPconst [0] x))
 24683  		// result: (NE (CMPconst [0] x))
 24684  		for b.Controls[0].Op == OpARM64CMPconst {
 24685  			v_0 := b.Controls[0]
 24686  			if auxIntToInt64(v_0.AuxInt) != 0 {
 24687  				break
 24688  			}
 24689  			x := v_0.Args[0]
 24690  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPconst, types.TypeFlags)
 24691  			v0.AuxInt = int64ToAuxInt(0)
 24692  			v0.AddArg(x)
 24693  			b.resetWithControl(BlockARM64NE, v0)
 24694  			return true
 24695  		}
 24696  		// match: (UGT (CMPWconst [0] x))
 24697  		// result: (NE (CMPWconst [0] x))
 24698  		for b.Controls[0].Op == OpARM64CMPWconst {
 24699  			v_0 := b.Controls[0]
 24700  			if auxIntToInt32(v_0.AuxInt) != 0 {
 24701  				break
 24702  			}
 24703  			x := v_0.Args[0]
 24704  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPWconst, types.TypeFlags)
 24705  			v0.AuxInt = int32ToAuxInt(0)
 24706  			v0.AddArg(x)
 24707  			b.resetWithControl(BlockARM64NE, v0)
 24708  			return true
 24709  		}
 24710  		// match: (UGT (FlagConstant [fc]) yes no)
 24711  		// cond: fc.ugt()
 24712  		// result: (First yes no)
 24713  		for b.Controls[0].Op == OpARM64FlagConstant {
 24714  			v_0 := b.Controls[0]
 24715  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24716  			if !(fc.ugt()) {
 24717  				break
 24718  			}
 24719  			b.Reset(BlockFirst)
 24720  			return true
 24721  		}
 24722  		// match: (UGT (FlagConstant [fc]) yes no)
 24723  		// cond: !fc.ugt()
 24724  		// result: (First no yes)
 24725  		for b.Controls[0].Op == OpARM64FlagConstant {
 24726  			v_0 := b.Controls[0]
 24727  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24728  			if !(!fc.ugt()) {
 24729  				break
 24730  			}
 24731  			b.Reset(BlockFirst)
 24732  			b.swapSuccessors()
 24733  			return true
 24734  		}
 24735  		// match: (UGT (InvertFlags cmp) yes no)
 24736  		// result: (ULT cmp yes no)
 24737  		for b.Controls[0].Op == OpARM64InvertFlags {
 24738  			v_0 := b.Controls[0]
 24739  			cmp := v_0.Args[0]
 24740  			b.resetWithControl(BlockARM64ULT, cmp)
 24741  			return true
 24742  		}
 24743  	case BlockARM64ULE:
 24744  		// match: (ULE (CMPconst [0] x))
 24745  		// result: (EQ (CMPconst [0] x))
 24746  		for b.Controls[0].Op == OpARM64CMPconst {
 24747  			v_0 := b.Controls[0]
 24748  			if auxIntToInt64(v_0.AuxInt) != 0 {
 24749  				break
 24750  			}
 24751  			x := v_0.Args[0]
 24752  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPconst, types.TypeFlags)
 24753  			v0.AuxInt = int64ToAuxInt(0)
 24754  			v0.AddArg(x)
 24755  			b.resetWithControl(BlockARM64EQ, v0)
 24756  			return true
 24757  		}
 24758  		// match: (ULE (CMPWconst [0] x))
 24759  		// result: (EQ (CMPWconst [0] x))
 24760  		for b.Controls[0].Op == OpARM64CMPWconst {
 24761  			v_0 := b.Controls[0]
 24762  			if auxIntToInt32(v_0.AuxInt) != 0 {
 24763  				break
 24764  			}
 24765  			x := v_0.Args[0]
 24766  			v0 := b.NewValue0(v_0.Pos, OpARM64CMPWconst, types.TypeFlags)
 24767  			v0.AuxInt = int32ToAuxInt(0)
 24768  			v0.AddArg(x)
 24769  			b.resetWithControl(BlockARM64EQ, v0)
 24770  			return true
 24771  		}
 24772  		// match: (ULE (FlagConstant [fc]) yes no)
 24773  		// cond: fc.ule()
 24774  		// result: (First yes no)
 24775  		for b.Controls[0].Op == OpARM64FlagConstant {
 24776  			v_0 := b.Controls[0]
 24777  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24778  			if !(fc.ule()) {
 24779  				break
 24780  			}
 24781  			b.Reset(BlockFirst)
 24782  			return true
 24783  		}
 24784  		// match: (ULE (FlagConstant [fc]) yes no)
 24785  		// cond: !fc.ule()
 24786  		// result: (First no yes)
 24787  		for b.Controls[0].Op == OpARM64FlagConstant {
 24788  			v_0 := b.Controls[0]
 24789  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24790  			if !(!fc.ule()) {
 24791  				break
 24792  			}
 24793  			b.Reset(BlockFirst)
 24794  			b.swapSuccessors()
 24795  			return true
 24796  		}
 24797  		// match: (ULE (InvertFlags cmp) yes no)
 24798  		// result: (UGE cmp yes no)
 24799  		for b.Controls[0].Op == OpARM64InvertFlags {
 24800  			v_0 := b.Controls[0]
 24801  			cmp := v_0.Args[0]
 24802  			b.resetWithControl(BlockARM64UGE, cmp)
 24803  			return true
 24804  		}
 24805  	case BlockARM64ULT:
 24806  		// match: (ULT (FlagConstant [fc]) yes no)
 24807  		// cond: fc.ult()
 24808  		// result: (First yes no)
 24809  		for b.Controls[0].Op == OpARM64FlagConstant {
 24810  			v_0 := b.Controls[0]
 24811  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24812  			if !(fc.ult()) {
 24813  				break
 24814  			}
 24815  			b.Reset(BlockFirst)
 24816  			return true
 24817  		}
 24818  		// match: (ULT (FlagConstant [fc]) yes no)
 24819  		// cond: !fc.ult()
 24820  		// result: (First no yes)
 24821  		for b.Controls[0].Op == OpARM64FlagConstant {
 24822  			v_0 := b.Controls[0]
 24823  			fc := auxIntToFlagConstant(v_0.AuxInt)
 24824  			if !(!fc.ult()) {
 24825  				break
 24826  			}
 24827  			b.Reset(BlockFirst)
 24828  			b.swapSuccessors()
 24829  			return true
 24830  		}
 24831  		// match: (ULT (InvertFlags cmp) yes no)
 24832  		// result: (UGT cmp yes no)
 24833  		for b.Controls[0].Op == OpARM64InvertFlags {
 24834  			v_0 := b.Controls[0]
 24835  			cmp := v_0.Args[0]
 24836  			b.resetWithControl(BlockARM64UGT, cmp)
 24837  			return true
 24838  		}
 24839  	case BlockARM64Z:
 24840  		// match: (Z sub:(SUB x y))
 24841  		// cond: sub.Uses == 1
 24842  		// result: (EQ (CMP x y))
 24843  		for b.Controls[0].Op == OpARM64SUB {
 24844  			sub := b.Controls[0]
 24845  			y := sub.Args[1]
 24846  			x := sub.Args[0]
 24847  			if !(sub.Uses == 1) {
 24848  				break
 24849  			}
 24850  			v0 := b.NewValue0(sub.Pos, OpARM64CMP, types.TypeFlags)
 24851  			v0.AddArg2(x, y)
 24852  			b.resetWithControl(BlockARM64EQ, v0)
 24853  			return true
 24854  		}
 24855  		// match: (Z sub:(SUBconst [c] y))
 24856  		// cond: sub.Uses == 1
 24857  		// result: (EQ (CMPconst [c] y))
 24858  		for b.Controls[0].Op == OpARM64SUBconst {
 24859  			sub := b.Controls[0]
 24860  			c := auxIntToInt64(sub.AuxInt)
 24861  			y := sub.Args[0]
 24862  			if !(sub.Uses == 1) {
 24863  				break
 24864  			}
 24865  			v0 := b.NewValue0(sub.Pos, OpARM64CMPconst, types.TypeFlags)
 24866  			v0.AuxInt = int64ToAuxInt(c)
 24867  			v0.AddArg(y)
 24868  			b.resetWithControl(BlockARM64EQ, v0)
 24869  			return true
 24870  		}
 24871  		// match: (Z (ANDconst [c] x) yes no)
 24872  		// cond: oneBit(c)
 24873  		// result: (TBZ [int64(ntz64(c))] x yes no)
 24874  		for b.Controls[0].Op == OpARM64ANDconst {
 24875  			v_0 := b.Controls[0]
 24876  			c := auxIntToInt64(v_0.AuxInt)
 24877  			x := v_0.Args[0]
 24878  			if !(oneBit(c)) {
 24879  				break
 24880  			}
 24881  			b.resetWithControl(BlockARM64TBZ, x)
 24882  			b.AuxInt = int64ToAuxInt(int64(ntz64(c)))
 24883  			return true
 24884  		}
 24885  		// match: (Z s:(SRLconst [63] x) yes no)
 24886  		// cond: s.Uses == 1
 24887  		// result: (TBZ [63] x yes no)
 24888  		for b.Controls[0].Op == OpARM64SRLconst {
 24889  			s := b.Controls[0]
 24890  			if auxIntToInt64(s.AuxInt) != 63 {
 24891  				break
 24892  			}
 24893  			x := s.Args[0]
 24894  			if !(s.Uses == 1) {
 24895  				break
 24896  			}
 24897  			b.resetWithControl(BlockARM64TBZ, x)
 24898  			b.AuxInt = int64ToAuxInt(63)
 24899  			return true
 24900  		}
 24901  		// match: (Z s:(SRAconst [63] x) yes no)
 24902  		// cond: s.Uses == 1
 24903  		// result: (TBZ [63] x yes no)
 24904  		for b.Controls[0].Op == OpARM64SRAconst {
 24905  			s := b.Controls[0]
 24906  			if auxIntToInt64(s.AuxInt) != 63 {
 24907  				break
 24908  			}
 24909  			x := s.Args[0]
 24910  			if !(s.Uses == 1) {
 24911  				break
 24912  			}
 24913  			b.resetWithControl(BlockARM64TBZ, x)
 24914  			b.AuxInt = int64ToAuxInt(63)
 24915  			return true
 24916  		}
 24917  		// match: (Z (MOVDconst [0]) yes no)
 24918  		// result: (First yes no)
 24919  		for b.Controls[0].Op == OpARM64MOVDconst {
 24920  			v_0 := b.Controls[0]
 24921  			if auxIntToInt64(v_0.AuxInt) != 0 {
 24922  				break
 24923  			}
 24924  			b.Reset(BlockFirst)
 24925  			return true
 24926  		}
 24927  		// match: (Z (MOVDconst [c]) yes no)
 24928  		// cond: c != 0
 24929  		// result: (First no yes)
 24930  		for b.Controls[0].Op == OpARM64MOVDconst {
 24931  			v_0 := b.Controls[0]
 24932  			c := auxIntToInt64(v_0.AuxInt)
 24933  			if !(c != 0) {
 24934  				break
 24935  			}
 24936  			b.Reset(BlockFirst)
 24937  			b.swapSuccessors()
 24938  			return true
 24939  		}
 24940  	case BlockARM64ZW:
 24941  		// match: (ZW sub:(SUB x y))
 24942  		// cond: sub.Uses == 1
 24943  		// result: (EQ (CMPW x y))
 24944  		for b.Controls[0].Op == OpARM64SUB {
 24945  			sub := b.Controls[0]
 24946  			y := sub.Args[1]
 24947  			x := sub.Args[0]
 24948  			if !(sub.Uses == 1) {
 24949  				break
 24950  			}
 24951  			v0 := b.NewValue0(sub.Pos, OpARM64CMPW, types.TypeFlags)
 24952  			v0.AddArg2(x, y)
 24953  			b.resetWithControl(BlockARM64EQ, v0)
 24954  			return true
 24955  		}
 24956  		// match: (ZW sub:(SUBconst [c] y))
 24957  		// cond: sub.Uses == 1
 24958  		// result: (EQ (CMPWconst [int32(c)] y))
 24959  		for b.Controls[0].Op == OpARM64SUBconst {
 24960  			sub := b.Controls[0]
 24961  			c := auxIntToInt64(sub.AuxInt)
 24962  			y := sub.Args[0]
 24963  			if !(sub.Uses == 1) {
 24964  				break
 24965  			}
 24966  			v0 := b.NewValue0(sub.Pos, OpARM64CMPWconst, types.TypeFlags)
 24967  			v0.AuxInt = int32ToAuxInt(int32(c))
 24968  			v0.AddArg(y)
 24969  			b.resetWithControl(BlockARM64EQ, v0)
 24970  			return true
 24971  		}
 24972  		// match: (ZW (ANDconst [c] x) yes no)
 24973  		// cond: oneBit(int64(uint32(c)))
 24974  		// result: (TBZ [int64(ntz64(int64(uint32(c))))] x yes no)
 24975  		for b.Controls[0].Op == OpARM64ANDconst {
 24976  			v_0 := b.Controls[0]
 24977  			c := auxIntToInt64(v_0.AuxInt)
 24978  			x := v_0.Args[0]
 24979  			if !(oneBit(int64(uint32(c)))) {
 24980  				break
 24981  			}
 24982  			b.resetWithControl(BlockARM64TBZ, x)
 24983  			b.AuxInt = int64ToAuxInt(int64(ntz64(int64(uint32(c)))))
 24984  			return true
 24985  		}
 24986  		// match: (ZW (MOVDconst [c]) yes no)
 24987  		// cond: int32(c) == 0
 24988  		// result: (First yes no)
 24989  		for b.Controls[0].Op == OpARM64MOVDconst {
 24990  			v_0 := b.Controls[0]
 24991  			c := auxIntToInt64(v_0.AuxInt)
 24992  			if !(int32(c) == 0) {
 24993  				break
 24994  			}
 24995  			b.Reset(BlockFirst)
 24996  			return true
 24997  		}
 24998  		// match: (ZW (MOVDconst [c]) yes no)
 24999  		// cond: int32(c) != 0
 25000  		// result: (First no yes)
 25001  		for b.Controls[0].Op == OpARM64MOVDconst {
 25002  			v_0 := b.Controls[0]
 25003  			c := auxIntToInt64(v_0.AuxInt)
 25004  			if !(int32(c) != 0) {
 25005  				break
 25006  			}
 25007  			b.Reset(BlockFirst)
 25008  			b.swapSuccessors()
 25009  			return true
 25010  		}
 25011  	}
 25012  	return false
 25013  }
 25014